Commit 87f60368 authored by francescomani's avatar francescomani

fixing most warning when compiling nr-uesoftmodem

parent 2385bc36
......@@ -29,18 +29,18 @@
/* optname helpstr paramflags XXXptr defXXXval type numelt */
/*------------------------------------------------------------------------------------------------------------------------------------------*/
#define CMDLINE_NRUEPARAMS_DESC { \
{"usrp-args", CONFIG_HLP_USRP_ARGS, 0, strptr:&usrp_args, defstrval:"type=b200", TYPE_STRING, 0}, \
{"tx_subdev", CONFIG_HLP_TX_SUBDEV, 0, strptr:&tx_subdev, defstrval:NULL, TYPE_STRING, 0}, \
{"rx_subdev", CONFIG_HLP_RX_SUBDEV, 0, strptr:&rx_subdev, defstrval:NULL, TYPE_STRING, 0}, \
{"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \
{"dlsch-parallel", CONFIG_HLP_DLSCH_PARA, 0, u8ptr:NULL, defintval:0, TYPE_UINT8, 0}, \
{"offset-divisor", CONFIG_HLP_OFFSET_DIV, 0, uptr:&nrUE_params.ofdm_offset_divisor, defuintval:8, TYPE_UINT32, 0}, \
{"max-ldpc-iterations", CONFIG_HLP_MAX_LDPC_ITERATIONS, 0, u8ptr:&nrUE_params.max_ldpc_iterations, defuintval:5, TYPE_UINT8, 0}, \
{"nr-dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&nr_dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \
{"V" , CONFIG_HLP_VCD, PARAMFLAG_BOOL, iptr:&vcdflag, defintval:0, TYPE_INT, 0}, \
{"uecap_file", CONFIG_HLP_UECAP_FILE, 0, strptr:&uecap_file, defstrval:"./uecap_ports1.xml", TYPE_STRING, 0}, \
{"rrc_config_path", CONFIG_HLP_RRC_CFG_PATH,0, strptr:&rrc_config_path, defstrval:"./", TYPE_STRING, 0}, \
{"ue-idx-standalone", NULL, 0, u16ptr:&ue_idx_standalone, defuintval:0xFFFF, TYPE_UINT16, 0} \
{"usrp-args", CONFIG_HLP_USRP_ARGS, 0, .strptr=&usrp_args, .defstrval="type=b200", TYPE_STRING, 0}, \
{"tx_subdev", CONFIG_HLP_TX_SUBDEV, 0, .strptr=&tx_subdev, .defstrval=NULL, TYPE_STRING, 0}, \
{"rx_subdev", CONFIG_HLP_RX_SUBDEV, 0, .strptr=&rx_subdev, .defstrval=NULL, TYPE_STRING, 0}, \
{"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, .iptr=&single_thread_flag, .defintval=1, TYPE_INT, 0}, \
{"dlsch-parallel", CONFIG_HLP_DLSCH_PARA, 0, .u8ptr=NULL, .defintval=0, TYPE_UINT8, 0}, \
{"offset-divisor", CONFIG_HLP_OFFSET_DIV, 0, .uptr=&nrUE_params.ofdm_offset_divisor, .defuintval=8, TYPE_UINT32, 0}, \
{"max-ldpc-iterations", CONFIG_HLP_MAX_LDPC_ITERATIONS, 0, .u8ptr=&nrUE_params.max_ldpc_iterations, .defuintval=5, TYPE_UINT8, 0}, \
{"nr-dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, .iptr=(int32_t *)&nr_dlsch_demod_shift, .defintval=0, TYPE_INT, 0}, \
{"V" , CONFIG_HLP_VCD, PARAMFLAG_BOOL, .iptr=&vcdflag, .defintval=0, TYPE_INT, 0}, \
{"uecap_file", CONFIG_HLP_UECAP_FILE, 0, .strptr=&uecap_file, .defstrval="./uecap_ports1.xml", TYPE_STRING, 0}, \
{"rrc_config_path", CONFIG_HLP_RRC_CFG_PATH,0, .strptr=&rrc_config_path, .defstrval="./", TYPE_STRING, 0}, \
{"ue-idx-standalone", NULL, 0, .u16ptr=&ue_idx_standalone, .defuintval=0xFFFF, TYPE_UINT16, 0} \
}
......@@ -49,31 +49,31 @@
/* optname helpstr paramflags XXXptr defXXXval type numelt */
/*------------------------------------------------------------------------------------------------------------------------------------------*/
#define CMDLINE_NRUE_PHYPARAMS_DESC { \
{ CALIBRX_OPT, CONFIG_HLP_CALUER, 0, iptr:&rx_input_level_dBm, defintval:0, TYPE_INT, 0}, \
{ CALIBRXMED_OPT, CONFIG_HLP_CALUERM, 0, iptr:&rx_input_level_dBm, defintval:0, TYPE_INT, 0}, \
{ CALIBRXBYP_OPT, CONFIG_HLP_CALUERB, 0, iptr:&rx_input_level_dBm, defintval:0, TYPE_INT, 0}, \
{ DBGPRACH_OPT, CONFIG_HLP_DBGUEPR, PARAMFLAG_BOOL, uptr:NULL, defuintval:1, TYPE_INT, 0}, \
{ NOL2CONNECT_OPT, CONFIG_HLP_NOL2CN, PARAMFLAG_BOOL, uptr:NULL, defuintval:1, TYPE_INT, 0}, \
{ CALIBPRACH_OPT, CONFIG_HLP_CALPRACH, PARAMFLAG_BOOL, uptr:NULL, defuintval:1, TYPE_INT, 0}, \
{ DUMPFRAME_OPT, CONFIG_HLP_DUMPFRAME, PARAMFLAG_BOOL, iptr:&dumpframe, defintval:0, TYPE_INT, 0}, \
{"ue-rxgain", CONFIG_HLP_UERXG, 0, dblptr:&(rx_gain[0][0]), defdblval:110, TYPE_DOUBLE,0}, \
{"ue-rxgain-off", CONFIG_HLP_UERXGOFF, 0, dblptr:&rx_gain_off, defdblval:0, TYPE_DOUBLE,0}, \
{"ue-txgain", CONFIG_HLP_UETXG, 0, dblptr:&(tx_gain[0][0]), defdblval:0, TYPE_DOUBLE,0}, \
{"ue-nb-ant-rx", CONFIG_HLP_UENANTR, 0, u8ptr:&(fp->nb_antennas_rx), defuintval:1, TYPE_UINT8, 0}, \
{"ue-nb-ant-tx", CONFIG_HLP_UENANTT, 0, u8ptr:&(fp->nb_antennas_tx), defuintval:1, TYPE_UINT8, 0}, \
{"ue-scan-carrier", CONFIG_HLP_UESCAN, PARAMFLAG_BOOL, iptr:&(UE->UE_scan_carrier), defintval:0, TYPE_INT, 0}, \
{"ue-fo-compensation", CONFIG_HLP_UEFO, PARAMFLAG_BOOL, iptr:&(UE->UE_fo_compensation), defintval:0, TYPE_INT, 0}, \
{"ue-max-power", NULL, 0, iptr:&(tx_max_power[0]), defintval:90, TYPE_INT, 0}, \
{"A" , CONFIG_HLP_TADV, 0, iptr:&(UE->timing_advance), defintval:0, TYPE_INT, 0}, \
{"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, u8ptr:&(fp->threequarter_fs), defintval:0, TYPE_UINT8, 0}, \
{"r" , CONFIG_HLP_PRB_SA, 0, iptr:&(fp->N_RB_DL), defintval:106, TYPE_UINT, 0}, \
{"ssb", CONFIG_HLP_SSC, 0, u16ptr:&(fp->ssb_start_subcarrier), defintval:516, TYPE_UINT16,0}, \
{"T" , CONFIG_HLP_TDD, PARAMFLAG_BOOL, iptr:&tddflag, defintval:0, TYPE_INT, 0}, \
{"if_freq" , CONFIG_HLP_IF_FREQ, 0, u64ptr:&(UE->if_freq), defuintval:0, TYPE_UINT64,0}, \
{"if_freq_off" , CONFIG_HLP_IF_FREQ_OFF, 0, iptr:&(UE->if_freq_off), defuintval:0, TYPE_INT, 0}, \
{"chest-freq", CONFIG_HLP_CHESTFREQ, 0, iptr:&(UE->chest_freq), defintval:0, TYPE_INT, 0}, \
{"chest-time", CONFIG_HLP_CHESTTIME, 0, iptr:&(UE->chest_time), defintval:0, TYPE_INT, 0}, \
{"ue-timing-correction-disable", CONFIG_HLP_DISABLETIMECORR, PARAMFLAG_BOOL, iptr:&(UE->no_timing_correction), defintval:0, TYPE_INT, 0}, \
{ CALIBRX_OPT, CONFIG_HLP_CALUER, 0, .iptr=&rx_input_level_dBm, .defintval=0, TYPE_INT, 0}, \
{ CALIBRXMED_OPT, CONFIG_HLP_CALUERM, 0, .iptr=&rx_input_level_dBm, .defintval=0, TYPE_INT, 0}, \
{ CALIBRXBYP_OPT, CONFIG_HLP_CALUERB, 0, .iptr=&rx_input_level_dBm, .defintval=0, TYPE_INT, 0}, \
{ DBGPRACH_OPT, CONFIG_HLP_DBGUEPR, PARAMFLAG_BOOL, .uptr=NULL, .defuintval=1, TYPE_INT, 0}, \
{ NOL2CONNECT_OPT, CONFIG_HLP_NOL2CN, PARAMFLAG_BOOL, .uptr=NULL, .defuintval=1, TYPE_INT, 0}, \
{ CALIBPRACH_OPT, CONFIG_HLP_CALPRACH, PARAMFLAG_BOOL, .uptr=NULL, .defuintval=1, TYPE_INT, 0}, \
{ DUMPFRAME_OPT, CONFIG_HLP_DUMPFRAME, PARAMFLAG_BOOL, .iptr=&dumpframe, .defintval=0, TYPE_INT, 0}, \
{"ue-rxgain", CONFIG_HLP_UERXG, 0, .dblptr=&(rx_gain[0][0]), .defdblval=110, TYPE_DOUBLE,0}, \
{"ue-rxgain-off", CONFIG_HLP_UERXGOFF, 0, .dblptr=&rx_gain_off, .defdblval=0, TYPE_DOUBLE,0}, \
{"ue-txgain", CONFIG_HLP_UETXG, 0, .dblptr=&(tx_gain[0][0]), .defdblval=0, TYPE_DOUBLE,0}, \
{"ue-nb-ant-rx", CONFIG_HLP_UENANTR, 0, .u8ptr=&(fp->nb_antennas_rx), .defuintval=1, TYPE_UINT8, 0}, \
{"ue-nb-ant-tx", CONFIG_HLP_UENANTT, 0, .u8ptr=&(fp->nb_antennas_tx), .defuintval=1, TYPE_UINT8, 0}, \
{"ue-scan-carrier", CONFIG_HLP_UESCAN, PARAMFLAG_BOOL, .iptr=&(UE->UE_scan_carrier), .defintval=0, TYPE_INT, 0}, \
{"ue-fo-compensation", CONFIG_HLP_UEFO, PARAMFLAG_BOOL, .iptr=&(UE->UE_fo_compensation), .defintval=0, TYPE_INT, 0}, \
{"ue-max-power", NULL, 0, .iptr=&(tx_max_power[0]), .defintval=90, TYPE_INT, 0}, \
{"A" , CONFIG_HLP_TADV, 0, .iptr=&(UE->timing_advance), .defintval=0, TYPE_INT, 0}, \
{"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, .u8ptr=&(fp->threequarter_fs), .defintval=0, TYPE_UINT8, 0}, \
{"r" , CONFIG_HLP_PRB_SA, 0, .iptr=&(fp->N_RB_DL), .defintval=106, TYPE_UINT, 0}, \
{"ssb", CONFIG_HLP_SSC, 0, .u16ptr=&(fp->ssb_start_subcarrier), .defintval=516, TYPE_UINT16,0}, \
{"T" , CONFIG_HLP_TDD, PARAMFLAG_BOOL, .iptr=&tddflag, .defintval=0, TYPE_INT, 0}, \
{"if_freq" , CONFIG_HLP_IF_FREQ, 0, .u64ptr=&(UE->if_freq), .defuintval=0, TYPE_UINT64,0}, \
{"if_freq_off" , CONFIG_HLP_IF_FREQ_OFF, 0, .iptr=&(UE->if_freq_off), .defuintval=0, TYPE_INT, 0}, \
{"chest-freq", CONFIG_HLP_CHESTFREQ, 0, .iptr=&(UE->chest_freq), .defintval=0, TYPE_INT, 0}, \
{"chest-time", CONFIG_HLP_CHESTTIME, 0, .iptr=&(UE->chest_time), .defintval=0, TYPE_INT, 0}, \
{"ue-timing-correction-disable", CONFIG_HLP_DISABLETIMECORR, PARAMFLAG_BOOL, .iptr=&(UE->no_timing_correction), .defintval=0, TYPE_INT, 0}, \
}
......
......@@ -43,7 +43,7 @@ void RCconfig_nrUE_prs(void *cfg)
{
int j = 0, k = 0, gNB_id = 0;
char aprefix[MAX_OPTNAME_SIZE*2 + 8];
char str[7][100] = {'\0'}; int16_t n[7] = {0};
char str[7][100] = {{'\0'}}; int16_t n[7] = {0};
PHY_VARS_NR_UE *ue = (PHY_VARS_NR_UE *)cfg;
prs_config_t *prs_config = NULL;
......
......@@ -340,8 +340,6 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, int frame, uint8_t
case 30720:
// 20, 25, 30 MHz @ 30.72 Ms/s
Ncp = Ncp;
dftlen = dftlen;
break;
case 46080:
......
......@@ -48,7 +48,7 @@
/* optname helpstr paramflags XXXptr defXXXval type numelt */
/*----------------------------------------------------------------------------------------------------------------------------------------------------*/
#define PRS_GLOBAL_PARAMS_DESC { \
{CONFIG_STRING_ACTIVE_GNBs, HELP_STRING_ACTIVE_GNBs, 0, uptr:NULL, defuintval:0, TYPE_UINT, 0} \
{CONFIG_STRING_ACTIVE_GNBs, HELP_STRING_ACTIVE_GNBs, 0, .uptr=NULL, .defuintval=0, TYPE_UINT, 0} \
}
#define PRS_ACTIVE_GNBS_IDX 0
......
......@@ -903,7 +903,7 @@ int ue_query_p_mch_info(module_id_t module_idP, uint32_t frameP, uint32_t subfra
continue;
int mch_scheduling_period = 8 << UE_mac_inst[module_idP].pmch_Config[i]->mch_SchedulingPeriod_r9;
uint8_t sf_AllocEnd_r9 = UE_mac_inst[module_idP].pmch_Config[i]->sf_AllocEnd_r9;
long sf_AllocEnd_r9 = UE_mac_inst[module_idP].pmch_Config[i]->sf_AllocEnd_r9;
if (sf_AllocEnd_r9 == 2047) {
msi_flag = 1;
......@@ -915,7 +915,7 @@ int ue_query_p_mch_info(module_id_t module_idP, uint32_t frameP, uint32_t subfra
//msi and mtch are mutally excluded then the break is safe
if ((num_sf_alloc == 0) && (sf_AllocEnd_r9 >= 1)) {
msi_flag = 1;
LOG_D(MAC,"msi(%d) should be allocated:frame(%d),submframe(%d),num_sf_alloc(%d),sf_AllocEnd_r9(%d),common_num_sf_alloc(%d)\n",i,frameP,subframe,num_sf_alloc,sf_AllocEnd_r9,
LOG_D(MAC,"msi(%d) should be allocated:frame(%d),submframe(%d),num_sf_alloc(%d),sf_AllocEnd_r9(%ld),common_num_sf_alloc(%d)\n",i,frameP,subframe,num_sf_alloc,sf_AllocEnd_r9,
UE_mac_inst[module_idP].common_num_sf_alloc);
UE_mac_inst[module_idP].msi_current_alloc = num_sf_alloc;
UE_mac_inst[module_idP].msi_pmch = i;
......@@ -927,7 +927,7 @@ int ue_query_p_mch_info(module_id_t module_idP, uint32_t frameP, uint32_t subfra
//if ((num_sf_alloc == UE_mac_inst[module_idP].pmch_Config[i-1]->sf_AllocEnd_r9) && (sf_AllocEnd_r9 >= (num_sf_alloc))) {
//msi should be just after
msi_flag = 1;
LOG_D(MAC,"msi(%d) should be allocated:frame(%d),submframe(%d),num_sf_alloc(%d),sf_AllocEnd_r9(%d),common_num_sf_alloc(%d)\n",i,frameP,subframe,num_sf_alloc,sf_AllocEnd_r9,
LOG_D(MAC,"msi(%d) should be allocated:frame(%d),submframe(%d),num_sf_alloc(%d),sf_AllocEnd_r9(%ld),common_num_sf_alloc(%d)\n",i,frameP,subframe,num_sf_alloc,sf_AllocEnd_r9,
UE_mac_inst[module_idP].common_num_sf_alloc);
UE_mac_inst[module_idP].msi_current_alloc = num_sf_alloc;
UE_mac_inst[module_idP].msi_pmch = i;
......@@ -1305,7 +1305,7 @@ int ue_query_mch_fembms(module_id_t module_idP, uint8_t CC_id, uint32_t frameP,
//}
if ((mcch_flag == 1)) { // || (msi_flag==1))
if (mcch_flag == 1) { // || (msi_flag==1))
*mcch_active = 1;
}
......@@ -1975,7 +1975,7 @@ int ue_query_mch(module_id_t module_idP, uint8_t CC_id, uint32_t frameP, uint32_
stop_UE_TIMING(UE_mac_inst[module_idP].ue_query_mch);
if ((mcch_flag == 1)) { // || (msi_flag==1))
if (mcch_flag == 1) { // || (msi_flag==1))
*mcch_active = 1;
}
......@@ -3129,7 +3129,7 @@ ue_scheduler(const module_id_t module_idP,
}
// UE has no valid phy config dedicated || no valid/released SR
if ((UE_mac_inst[module_idP].physicalConfigDedicated == NULL)) {
if (UE_mac_inst[module_idP].physicalConfigDedicated == NULL) {
// cancel all pending SRs
UE_mac_inst[module_idP].scheduling_info.SR_pending = 0;
UE_mac_inst[module_idP].ul_active = 0;
......
......@@ -505,7 +505,7 @@ typedef struct prach_association_pattern {
typedef struct ssb_info {
bool transmitted; // True if the SSB index is transmitted according to the SSB positions map configuration
prach_occasion_info_t *mapped_ro[MAX_NB_RO_PER_SSB_IN_ASSOCIATION_PATTERN]; // List of mapped RACH Occasions to this SSB index
uint16_t nb_mapped_ro; // Total number of mapped ROs to this SSB index
uint32_t nb_mapped_ro; // Total number of mapped ROs to this SSB index
} ssb_info_t;
// List of all the possible SSBs and their details
......
......@@ -70,7 +70,7 @@ long nr_get_Pcmax(module_id_t mod_id){
NR_P_Max_t p_max = 0;
uint8_t P_powerclass = 23;
uint8_t delta_P_powerclass = 0;
uint8_t MPR_c = 1.5;
uint8_t MPR_c = 1;
uint8_t delta_MPR_c = 0;
uint8_t A_MPR_c = 0;
uint8_t delta_T_IB_c = 0;
......@@ -82,7 +82,7 @@ long nr_get_Pcmax(module_id_t mod_id){
long P_cmax = 0;
if (band == 28 && mac->phy_config.config_req.carrier_config.uplink_bandwidth == 30){
delta_MPR_c = 0.5;
delta_MPR_c = 1;
}
if (mac->cg && mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->ext1){
......
......@@ -149,17 +149,16 @@ void ul_layers_config(NR_UE_MAC_INST_t *mac, nfapi_nr_ue_pusch_pdu_t *pusch_conf
pusch_config_pdu->transform_precoding = transformPrecoder;
/* PRECOD_NBR_LAYERS */
if ((*pusch_Config->txConfig == NR_PUSCH_Config__txConfig_nonCodebook));
// 0 bits if the higher layer parameter txConfig = nonCodeBook
if ((*pusch_Config->txConfig == NR_PUSCH_Config__txConfig_codebook)){
if (*pusch_Config->txConfig == NR_PUSCH_Config__txConfig_codebook){
// The UE shall transmit PUSCH using the same antenna port(s) as the SRS port(s) in the SRS resource indicated by the DCI format 0_1
// 38.214 Section 6.1.1
uint8_t n_antenna_port = get_pusch_nb_antenna_ports(pusch_Config, srs_config, dci->srs_resource_indicator);
if (n_antenna_port == 1); // 1 antenna port and the higher layer parameter txConfig = codebook 0 bits
// 1 antenna port and the higher layer parameter txConfig = codebook 0 bits
if (n_antenna_port == 4) { // 4 antenna port and the higher layer parameter txConfig = codebook
......
......@@ -1603,7 +1603,7 @@ rrc_ue_process_securityModeCommand(
securityModeCommand->criticalExtensions.choice.c1.present);
ul_dcch_msg.message.choice.c1.choice.securityModeComplete.rrc_TransactionIdentifier = securityModeCommand->rrc_TransactionIdentifier;
ul_dcch_msg.message.choice.c1.choice.securityModeComplete.criticalExtensions.present = LTE_SecurityModeCommand__criticalExtensions_PR_c1;
ul_dcch_msg.message.choice.c1.choice.securityModeComplete.criticalExtensions.present = LTE_SecurityModeComplete__criticalExtensions_PR_securityModeComplete_r8;
ul_dcch_msg.message.choice.c1.choice.securityModeComplete.criticalExtensions.choice.securityModeComplete_r8.nonCriticalExtension =NULL;
LOG_I(RRC,"[UE %d] SFN/SF %d/%d: Receiving from SRB1 (DL-DCCH), encoding securityModeComplete (eNB %d), rrc_TransactionIdentifier: %ld\n",
ctxt_pP->module_id,ctxt_pP->frame, ctxt_pP->subframe, eNB_index, securityModeCommand->rrc_TransactionIdentifier);
......@@ -1947,9 +1947,10 @@ rrc_ue_process_rrcConnectionReconfiguration(
uint32_t SecondaryCellGroup_size;
uint8_t trans_id;
uint8_t padding[3];
uint8_t buffer[total_size];
uint8_t *buffer;
} msg;
msg.buffer = calloc(total_size, sizeof(uint8_t));
msg.RadioBearer_size = nr_RadioBearer->size;
msg.SecondaryCellGroup_size = nr_SecondaryCellGroup->size;
msg.trans_id = rrcConnectionReconfiguration->rrc_TransactionIdentifier;
......
......@@ -992,7 +992,7 @@ int nr_decode_SI( const protocol_ctxt_t *const ctxt_pP, const uint8_t gNB_index
if (new_sib == 1) {
NR_UE_rrc_inst[ctxt_pP->module_id].Info[gNB_index].SIcnt++;
if (NR_UE_rrc_inst[ctxt_pP->module_id].Info[gNB_index].SIcnt == sib1->si_SchedulingInfo->schedulingInfoList.list.count)
nr_rrc_set_sub_state( ctxt_pP->module_id, RRC_SUB_STATE_IDLE_SIB_COMPLETE );
nr_rrc_set_sub_state(ctxt_pP->module_id, RRC_SUB_STATE_IDLE_SIB_COMPLETE_NR);
LOG_I(NR_RRC,"SIStatus %x, SIcnt %d/%d\n",
NR_UE_rrc_inst[ctxt_pP->module_id].Info[gNB_index].SIStatus,
......@@ -1217,7 +1217,7 @@ int8_t nr_rrc_ue_decode_NR_BCCH_DL_SCH_Message(module_id_t module_id,
if (nr_rrc_get_sub_state(module_id) == RRC_SUB_STATE_IDLE_SIB_COMPLETE_NR) {
//if ( (NR_UE_rrc_inst[ctxt_pP->module_id].initialNasMsg.data != NULL) || (!get_softmodem_params()->sa)) {
nr_rrc_ue_generate_RRCSetupRequest(module_id, 0);
nr_rrc_set_sub_state( module_id, RRC_SUB_STATE_IDLE_CONNECTING );
nr_rrc_set_sub_state(module_id, RRC_SUB_STATE_IDLE_CONNECTING_NR);
//}
}
......
......@@ -66,8 +66,8 @@ void capture_pdu_session_establishment_accept_msg(uint8_t *buffer, uint32_t msg_
packet_filter_t pf;
if(qos_rule.oc == ROC_CREATE_NEW_QOS_RULE ||
ROC_MODIFY_QOS_RULE_ADD_PF ||
ROC_MODIFY_QOS_RULE_REPLACE_PF) {
qos_rule.oc == ROC_MODIFY_QOS_RULE_ADD_PF ||
qos_rule.oc == ROC_MODIFY_QOS_RULE_REPLACE_PF) {
pf.pf_type.type_1.pf_dir = (*(buffer + offset) & 0x30) >> 4;
pf.pf_type.type_1.pf_id = *(buffer + offset++) & 0x0F;
pf.pf_type.type_1.length = *(buffer + offset++);
......
......@@ -991,7 +991,7 @@ void *nas_nrue_task(void *args_p)
uint8_t offset = 0;
uint8_t *payload_container = pdu_buffer;
offset += SECURITY_PROTECTED_5GS_NAS_MESSAGE_HEADER_LENGTH;
uint16_t payload_container_length = htons(((dl_nas_transport_t *)(pdu_buffer + offset))->payload_container_length);
uint32_t payload_container_length = htons(((dl_nas_transport_t *)(pdu_buffer + offset))->payload_container_length);
if ((payload_container_length >= PAYLOAD_CONTAINER_LENGTH_MIN) &&
(payload_container_length <= PAYLOAD_CONTAINER_LENGTH_MAX))
offset += (PLAIN_5GS_NAS_MESSAGE_HEADER_LENGTH + 3);
......
......@@ -308,7 +308,7 @@ void *nas_ue_task(void *args_p)
struct epoll_event events[20];
nb_events = itti_get_events(TASK_NAS_UE, events, 20);
if ((nb_events > 0) && (events != NULL)) {
if (nb_events > 0) {
if (nas_ue_process_events(users, events, nb_events) == true) {
LOG_E(NAS, "[UE] Received exit loop\n");
}
......
......@@ -38,16 +38,16 @@ extern uint16_t NB_UE_INST;
/* optname helpstr paramflags XXXptr defXXXval type numelt */
/*-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
#define UICC_PARAMS_DESC { \
{"imsi", "USIM IMSI\n", 0, strptr:&uicc->imsiStr, defstrval:"2089900007487", TYPE_STRING, 0 }, \
{"nmc_size" "number of digits in NMC", 0, iptr:&uicc->nmc_size, defintval:2, TYPE_INT, 0 }, \
{"key", "USIM Ki\n", 0, strptr:&uicc->keyStr, defstrval:"fec86ba6eb707ed08905757b1bb44b8f", TYPE_STRING, 0 }, \
{"opc", "USIM OPc\n", 0, strptr:&uicc->opcStr, defstrval:"c42449363bbad02b66d16bc975d77cc1", TYPE_STRING, 0 }, \
{"amf", "USIM amf\n", 0, strptr:&uicc->amfStr, defstrval:"8000", TYPE_STRING, 0 }, \
{"sqn", "USIM sqn\n", 0, strptr:&uicc->sqnStr, defstrval:"000000", TYPE_STRING, 0 }, \
{"dnn", "UE dnn (apn)\n", 0, strptr:&uicc->dnnStr, defstrval:"oai", TYPE_STRING, 0 }, \
{"nssai_sst", "UE nssai\n", 0, iptr:&uicc->nssai_sst, defintval:1, TYPE_INT, 0 }, \
{"nssai_sd", "UE nssai\n", 0, iptr:&uicc->nssai_sd, defintval:0xffffff, TYPE_INT, 0 }, \
{"imeisv", "IMEISV\n", 0, strptr:&uicc->imeisvStr, defstrval:"6754567890123413", TYPE_STRING, 0 }, \
{"imsi", "USIM IMSI\n", 0, .strptr=&uicc->imsiStr, .defstrval="2089900007487", TYPE_STRING, 0 }, \
{"nmc_size" "number of digits in NMC", 0, .iptr=&uicc->nmc_size, .defintval=2, TYPE_INT, 0 }, \
{"key", "USIM Ki\n", 0, .strptr=&uicc->keyStr, .defstrval="fec86ba6eb707ed08905757b1bb44b8f", TYPE_STRING, 0 }, \
{"opc", "USIM OPc\n", 0, .strptr=&uicc->opcStr, .defstrval="c42449363bbad02b66d16bc975d77cc1", TYPE_STRING, 0 }, \
{"amf", "USIM amf\n", 0, .strptr=&uicc->amfStr, .defstrval="8000", TYPE_STRING, 0 }, \
{"sqn", "USIM sqn\n", 0, .strptr=&uicc->sqnStr, .defstrval="000000", TYPE_STRING, 0 }, \
{"dnn", "UE dnn (apn)\n", 0, .strptr=&uicc->dnnStr, .defstrval="oai", TYPE_STRING, 0 }, \
{"nssai_sst", "UE nssai\n", 0, .iptr=&uicc->nssai_sst, .defintval=1, TYPE_INT, 0 }, \
{"nssai_sd", "UE nssai\n", 0, .iptr=&uicc->nssai_sd, .defintval=0xffffff, TYPE_INT, 0 }, \
{"imeisv", "IMEISV\n", 0, .strptr=&uicc->imeisvStr, .defstrval="6754567890123413", TYPE_STRING, 0 }, \
};
static uicc_t** uiccArray=NULL;
......@@ -133,4 +133,4 @@ uint8_t getImeisvDigit(int Mod_id,uint8_t i)
}
}
return (0x0f & r);
}
\ No newline at end of file
}
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