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Commit 0fb79d62 authored by Raymond Knopp's avatar Raymond Knopp
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Added DLSCH scheduling for subframes 0 and 5. Changes in MAC scheduling data... 

Added DLSCH scheduling for subframes 0 and 5. Changes in MAC scheduling data structure to keep track of VRB allocations from SI,RA when scheduling regular DLSCH
parent f2e9bcd3
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Showing with 183 additions and 140 deletions
openair1/PHY/LTE_TRANSPORT/dci_tools.c
View file @ 0fb79d62
......@@ -453,7 +453,7 @@ uint32_t conv_1C_RIV(int32_t rballoc,uint32_t N_RB_DL) {
}
int get_prb(int N_RB_DL,int odd_slot,int vrb,int Ngap) {
uint32_t get_prb(int N_RB_DL,int odd_slot,int vrb,int Ngap) {
int offset;
......@@ -926,10 +926,15 @@ int generate_eNB_dlsch_params_from_dci(int frame,
// printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
}
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT6[rballoc];
if (vrb_type==LOCALIZED) {
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT6[rballoc];
}
else {
LOG_E(PHY,"Distributed RB allocation not done yet\n");
mac_xface->macphy_exit("exiting");
}
dlsch0_harq->vrb_type = vrb_type;
dlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rballoc];//NPRB;
RIV_max = RIV_max6;
......@@ -960,7 +965,14 @@ int generate_eNB_dlsch_params_from_dci(int frame,
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT25[rballoc];
if (vrb_type==LOCALIZED) {
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT25[rballoc];
}
else {
LOG_E(PHY,"Distributed RB allocation not done yet\n");
mac_xface->macphy_exit("exiting");
}
dlsch0_harq->vrb_type = vrb_type;
dlsch0_harq->nb_rb = RIV2nb_rb_LUT25[rballoc];//NPRB;
RIV_max = RIV_max25;
......@@ -987,9 +999,16 @@ int generate_eNB_dlsch_params_from_dci(int frame,
}
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
if (vrb_type==LOCALIZED) {
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT50_0[rballoc];
dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT50_1[rballoc];
}
else {
LOG_E(PHY,"Distributed RB allocation not done yet\n");
mac_xface->macphy_exit("exiting");
}
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT50_0[rballoc];
dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT50_1[rballoc];
dlsch0_harq->vrb_type = vrb_type;
dlsch0_harq->nb_rb = RIV2nb_rb_LUT50[rballoc];//NPRB;
RIV_max = RIV_max50;
......@@ -1017,10 +1036,17 @@ int generate_eNB_dlsch_params_from_dci(int frame,
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
dlsch0_harq->vrb_type = vrb_type;
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT100_0[rballoc];
dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT100_1[rballoc];
dlsch0_harq->rb_alloc[2] = localRIV2alloc_LUT100_2[rballoc];
dlsch0_harq->rb_alloc[3] = localRIV2alloc_LUT100_3[rballoc];
if (vrb_type==LOCALIZED) {
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT100_0[rballoc];
dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT100_1[rballoc];
dlsch0_harq->rb_alloc[2] = localRIV2alloc_LUT100_2[rballoc];
dlsch0_harq->rb_alloc[3] = localRIV2alloc_LUT100_3[rballoc];
}
else {
LOG_E(PHY,"Distributed RB allocation not done yet\n");
mac_xface->macphy_exit("exiting");
}
dlsch0_harq->nb_rb = RIV2nb_rb_LUT100[rballoc];//NPRB;
......@@ -2641,7 +2667,7 @@ int generate_eNB_dlsch_params_from_dci(int frame,
dlsch1_harq->subframe = subframe;
}
//#ifdef DEBUG_DCI
#ifdef DEBUG_DCI
if (dlsch0) {
printf("dlsch0 eNB: dlsch0 %p\n",dlsch0);
......@@ -2657,7 +2683,7 @@ int generate_eNB_dlsch_params_from_dci(int frame,
printf("dlsch0 eNB: mimo_mode %d\n",dlsch0_harq->mimo_mode);
}
//#endif
#endif
// compute DL power control parameters
computeRhoA_eNB(pdsch_config_dedicated, dlsch[0],dlsch0_harq->dl_power_off);
......@@ -5508,7 +5534,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
}
//#ifdef DEBUG_DCI
#ifdef DEBUG_DCI
if (dlsch[0]) {
printf("PDSCH dlsch0 UE: rnti %x\n",dlsch[0]->rnti);
......@@ -5522,7 +5548,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
printf("PDSCH dlsch0 UE: pwr_off %d\n",dlsch0_harq->dl_power_off);
}
//#endif
#endif
dlsch[0]->active=1;
// compute DL power control parameters
......
openair1/PHY/LTE_TRANSPORT/proto.h
View file @ 0fb79d62
......@@ -1242,11 +1242,20 @@ uint32_t get_TBS_DL(uint8_t mcs, uint16_t nb_rb);
uint32_t get_TBS_UL(uint8_t mcs, uint16_t nb_rb);
/* \brief Return bit-map of resource allocation for a given DCI rballoc (RIV format) and vrb type
@param N_RB_DL number of PRB on DL
@param indicator for even/odd slot
@param vrb vrb index
@param Ngap Gap indicator
*/
uint32_t get_prb(int N_RB_DL,int odd_slot,int vrb,int Ngap);
/* \brief Return prb for a given vrb index
@param vrb_type VRB type (0=localized,1=distributed)
@param rb_alloc_dci rballoc field from DCI
*/
uint32_t get_rballoc(vrb_t vrb_type,uint16_t rb_alloc_dci);
/* \brief Return bit-map of resource allocation for a given DCI rballoc (RIV format) and vrb type
@returns Transmission mode (1-7)
*/
......
openair1/SCHED/phy_procedures_lte_ue.c
View file @ 0fb79d62
......@@ -168,7 +168,7 @@ void dump_dlsch_SI(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe)
1,
phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->num_pdcch_symbols,
phy_vars_ue->frame_rx,subframe);
LOG_I(PHY,"[UE %d] Dumping dlsch_SI : ofdm_symbol_size %d, nsymb %d, nb_rb %d, mcs %d, nb_rb %d, num_pdcch_symbols %d,G %d\n",
LOG_D(PHY,"[UE %d] Dumping dlsch_SI : ofdm_symbol_size %d, nsymb %d, nb_rb %d, mcs %d, nb_rb %d, num_pdcch_symbols %d,G %d\n",
phy_vars_ue->Mod_id,
phy_vars_ue->lte_frame_parms.ofdm_symbol_size,
nsymb,
......@@ -2062,7 +2062,7 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
#endif
//#ifdef DEBUG_PHY_PROC
LOG_I(PHY,"[UE %d] Frame %d, slot %d, Mode %s: DCI found %i\n",phy_vars_ue->Mod_id,frame_rx,slot_rx,mode_string[phy_vars_ue->UE_mode[eNB_id]],dci_cnt);
LOG_D(PHY,"[UE %d] Frame %d, slot %d, Mode %s: DCI found %i\n",phy_vars_ue->Mod_id,frame_rx,slot_rx,mode_string[phy_vars_ue->UE_mode[eNB_id]],dci_cnt);
//#endif
phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->dci_received += dci_cnt;
......@@ -2102,7 +2102,7 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
#ifdef DEBUG_PHY_PROC
// if (subframe_rx == 9) { //( frame_rx % 100 == 0) {
LOG_I(PHY,"frame %d, subframe %d, rnti %x: dci %d/%d\n",frame_rx,subframe_rx,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,i,dci_cnt);
LOG_D(PHY,"frame %d, subframe %d, rnti %x: dci %d/%d\n",frame_rx,subframe_rx,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,i,dci_cnt);
//dump_dci(&phy_vars_ue->lte_frame_parms, &dci_alloc_rx[i]);
// }
......@@ -2444,7 +2444,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
else
openair_daq_vars.use_ia_receiver = (openair_daq_vars.use_ia_receiver+1)%3;
LOG_I(PHY,"[MYEMOS] frame %d, IA receiver %d, MCS %d, bitrate %d\n",
LOG_D(PHY,"[MYEMOS] frame %d, IA receiver %d, MCS %d, bitrate %d\n",
frame_rx,
openair_daq_vars.use_ia_receiver,
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[phy_vars_ue->dlsch_ue[eNB_id][0]->current_harq_pid]->mcs,
......@@ -2800,7 +2800,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
frame_rx,subframe_prev);
#ifdef DEBUG_PHY_PROC
LOG_I(PHY,"Decoding DLSCH_SI : rb_alloc %x : nb_rb %d G %d TBS %d, num_pdcch_sym %d\n",phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->rb_alloc_even[0],
LOG_D(PHY,"Decoding DLSCH_SI : rb_alloc %x : nb_rb %d G %d TBS %d, num_pdcch_sym %d\n",phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->rb_alloc_even[0],
phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->nb_rb,
phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->G,
phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->TBS,
......@@ -2848,7 +2848,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
if (ret == (1+phy_vars_ue->dlsch_ue_SI[eNB_id]->max_turbo_iterations)) {
phy_vars_ue->dlsch_SI_errors[eNB_id]++;
#ifdef DEBUG_PHY_PROC
LOG_I(PHY,"[UE %d] Frame %d, subframe %d, received SI in error (TBS %d, mcs %d, rvidx %d, rballoc %X.%X.%X.%X\n",
LOG_D(PHY,"[UE %d] Frame %d, subframe %d, received SI in error (TBS %d, mcs %d, rvidx %d, rballoc %X.%X.%X.%X\n",
phy_vars_ue->Mod_id,
frame_rx,
subframe_prev,
......@@ -3281,7 +3281,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
}
if (is_pmch_subframe((subframe_rx==9?-1:0)+frame_rx,subframe_rx,&phy_vars_ue->lte_frame_parms)) {
LOG_I(PHY,"ue calling pmch subframe ..\n ");
LOG_D(PHY,"ue calling pmch subframe ..\n ");
if ((slot_rx%2)==1) {
LOG_D(PHY,"[UE %d] Frame %d, subframe %d: Querying for PMCH demodulation(%d)\n",
......@@ -3429,7 +3429,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
phy_vars_rn->sync_area[subframe_rx] = sync_area; // this could also go the harq data struct
phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->TBS = phy_vars_ue->dlsch_ue_MCH[0]->harq_processes[0]->TBS;
phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->mcs = phy_vars_ue->dlsch_ue_MCH[0]->harq_processes[0]->mcs;
LOG_I(PHY,"[RN/UE %d] Frame %d subframe %d: store the MCH PDU for MBSFN sync area %d (MCS %d, TBS %d)\n",
LOG_D(PHY,"[RN/UE %d] Frame %d subframe %d: store the MCH PDU for MBSFN sync area %d (MCS %d, TBS %d)\n",
phy_vars_ue->Mod_id, frame_rx,subframe_rx,sync_area,
phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->mcs,
phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->TBS>>3);
......
openair2/LAYER2/MAC/eNB_scheduler.c
View file @ 0fb79d62
......@@ -83,9 +83,7 @@
void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag, frame_t frameP, sub_frame_t subframeP) //, int calibration_flag) {
{
unsigned int nprb[MAX_NUM_CCs];
int mbsfn_status[MAX_NUM_CCs];
uint32_t RBalloc[MAX_NUM_CCs];
protocol_ctxt_t ctxt;
#ifdef EXMIMO
int ret;
......@@ -110,8 +108,6 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
DCI_pdu[CC_id] = &eNB_mac_inst[module_idP].common_channels[CC_id].DCI_pdu;
DCI_pdu[CC_id]->nCCE=0;
DCI_pdu[CC_id]->num_pdcch_symbols=1;
nprb[CC_id]=0;
RBalloc[CC_id]=0;
mbsfn_status[CC_id]=0;
// clear vrb_map
memset(eNB_mac_inst[module_idP].common_channels[CC_id].vrb_map,0,100);
......@@ -245,19 +241,21 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
// Schedule ULSCH for FDD or subframeP 4 (TDD config 0,3,6)
// Schedule Normal DLSCH
schedule_RA(module_idP,frameP,subframeP,2,nprb);
schedule_RA(module_idP,frameP,subframeP,2);
if (mac_xface->lte_frame_parms->frame_type == FDD) { //FDD
schedule_ulsch(module_idP,frameP,cooperation_flag,0,4);//,calibration_flag);
} else if ((mac_xface->lte_frame_parms->tdd_config == TDD) || //TDD
(mac_xface->lte_frame_parms->tdd_config == 3) ||
(mac_xface->lte_frame_parms->tdd_config == 6)) {
//schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,4);//,calibration_flag);
}
// schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break;
......@@ -270,21 +268,22 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
case 0:
case 1:
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,7);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break;
case 6:
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,8);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break;
default:
break;
}
} else { //FDD
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
schedule_ulsch(module_idP,frameP,cooperation_flag,1,5);
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
}
break;
......@@ -294,9 +293,9 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
// TDD, nothing
// FDD, normal UL/DLSCH
if (mac_xface->lte_frame_parms->frame_type == FDD) { //FDD
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
schedule_ulsch(module_idP,frameP,cooperation_flag,2,6);
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
}
break;
......@@ -313,17 +312,18 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
// no break here!
case 5:
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break;
default:
break;
}
} else { //FDD
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
schedule_ulsch(module_idP,frameP,cooperation_flag,3,7);
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
}
......@@ -337,7 +337,7 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
if (mac_xface->lte_frame_parms->frame_type == 1) { // TDD
switch (mac_xface->lte_frame_parms->tdd_config) {
case 1:
// schedule_RA(module_idP,frameP,subframeP,nprb);
// schedule_RA(module_idP,frameP,subframeP);
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,8);
// no break here!
......@@ -348,8 +348,8 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
// no break here!
case 5:
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break;
default:
......@@ -357,10 +357,10 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
}
} else {
if (mac_xface->lte_frame_parms->frame_type == FDD) { //FDD
// schedule_RA(module_idP,frameP, subframeP, 0, nprb);
// schedule_ulsch(module_idP, frameP, cooperation_flag, 4, 8);
schedule_ue_spec(module_idP, frameP, subframeP, nprb, mbsfn_status);
fill_DLSCH_dci(module_idP, frameP, subframeP, RBalloc, mbsfn_status);
// schedule_RA(module_idP,frameP, subframeP, 0);
schedule_ulsch(module_idP, frameP, cooperation_flag, 4, 8);
schedule_ue_spec(module_idP, frameP, subframeP, mbsfn_status);
fill_DLSCH_dci(module_idP, frameP, subframeP, mbsfn_status);
}
}
......@@ -372,21 +372,22 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
// TDD Config 0,6 ULSCH for subframes 9,3 resp.
// TDD normal DLSCH
// FDD normal UL/DLSCH
schedule_SI(module_idP,frameP,subframeP,nprb);
schedule_SI(module_idP,frameP,subframeP);
//schedule_RA(module_idP,frameP,subframeP,5,nprb);
//schedule_RA(module_idP,frameP,subframeP,5);
if (mac_xface->lte_frame_parms->frame_type == FDD) {
schedule_RA(module_idP,frameP,subframeP,1,nprb);
// schedule_ulsch(module_idP,frameP,cooperation_flag,5,9);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
schedule_RA(module_idP,frameP,subframeP,1);
schedule_ulsch(module_idP,frameP,cooperation_flag,5,9);
schedule_ue_spec(module_idP, frameP, subframeP, mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
} else if ((mac_xface->lte_frame_parms->tdd_config == 0) || // TDD Config 0
(mac_xface->lte_frame_parms->tdd_config == 6)) { // TDD Config 6
//schedule_ulsch(module_idP,cooperation_flag,subframeP);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
} else {
//schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
}
break;
......@@ -403,26 +404,26 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
case 1:
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,2);
// schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
// schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break;
case 6:
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,3);
// schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
// schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break;
case 5:
schedule_RA(module_idP,frameP,subframeP,2,nprb);
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
schedule_RA(module_idP,frameP,subframeP,2);
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break;
case 3:
case 4:
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break;
default:
......@@ -430,8 +431,8 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
}
} else { //FDD
// schedule_ulsch(module_idP,frameP,cooperation_flag,6,0);
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
}
break;
......@@ -444,14 +445,14 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
switch (mac_xface->lte_frame_parms->tdd_config) {
case 3:
case 4:
schedule_RA(module_idP,frameP,subframeP,3,nprb); // 3 = Msg3 subframeP, not
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
schedule_RA(module_idP,frameP,subframeP,3); // 3 = Msg3 subframeP, not
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break;
case 5:
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break;
default:
......@@ -459,8 +460,8 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
}
} else { //FDD
//schedule_ulsch(module_idP,frameP,cooperation_flag,7,1);
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
}
break;
......@@ -477,10 +478,10 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
case 4:
case 5:
// schedule_RA(module_idP,subframeP,nprb);
// schedule_RA(module_idP,subframeP);
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,2);
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break;
default:
......@@ -488,8 +489,8 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
}
} else { //FDD
//schedule_ulsch(module_idP,frameP,cooperation_flag,8,2);
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
}
break;
......@@ -501,30 +502,30 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
switch (mac_xface->lte_frame_parms->tdd_config) {
case 1:
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,3);
schedule_RA(module_idP,frameP,subframeP,7,nprb); // 7 = Msg3 subframeP, not
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
schedule_RA(module_idP,frameP,subframeP,7); // 7 = Msg3 subframeP, not
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break;
case 3:
case 4:
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,3);
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break;
case 6:
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,4);
//schedule_RA(module_idP,frameP,subframeP,nprb);
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
//schedule_RA(module_idP,frameP,subframeP);
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break;
case 2:
case 5:
//schedule_RA(module_idP,frameP,subframeP,nprb);
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
//schedule_RA(module_idP,frameP,subframeP);
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break;
default:
......@@ -532,15 +533,15 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
}
} else { //FDD
// schedule_ulsch(module_idP,frameP,cooperation_flag,9,3);
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
}
break;
}
LOG_I(MAC,"FrameP %d, subframeP %d : Scheduling CCEs\n",frameP,subframeP);
LOG_D(MAC,"FrameP %d, subframeP %d : Scheduling CCEs\n",frameP,subframeP);
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++)
allocate_CCEs(module_idP,CC_id,subframeP,0);
......
openair2/LAYER2/MAC/eNB_scheduler_RA.c
View file @ 0fb79d62
......@@ -68,7 +68,7 @@
#include "SIMULATION/TOOLS/defs.h" // for taus
void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,unsigned char Msg3_subframe,unsigned int *nprb)
void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,unsigned char Msg3_subframe)
{
int CC_id;
......@@ -259,7 +259,6 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
RA_template->RA_dci_fmt1,
1);
nprb[CC_id]= nprb[CC_id] + 3;
RA_template->Msg3_subframe=Msg3_subframe;
}
} else if (RA_template->generate_Msg4 == 1) {
......@@ -647,7 +646,6 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
module_idP, CC_id, frameP, UE_RNTI(module_idP,UE_id), rrc_sdu_length);
}
nprb[CC_id]= nprb[CC_id] + 3;
}
}
......
openair2/LAYER2/MAC/eNB_scheduler_bch.c
View file @ 0fb79d62
......@@ -72,8 +72,7 @@ void
schedule_SI(
module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
unsigned int* nprbP)
sub_frame_t subframeP)
//------------------------------------------------------------------------------
{
......@@ -323,14 +322,13 @@ schedule_SI(
}
nprbP[CC_id]=3;
eNB->eNB_stats[CC_id].total_num_bcch_pdu+=1;
eNB->eNB_stats[CC_id].bcch_buffer=bcch_sdu_length;
eNB->eNB_stats[CC_id].total_bcch_buffer+=bcch_sdu_length;
eNB->eNB_stats[CC_id].bcch_mcs=mcs;
} else {
nprbP[CC_id]=0;
//LOG_D(MAC,"[eNB %d] Frame %d : BCCH not active \n",Mod_id,frame);
}
}
......
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
View file @ 0fb79d62
......@@ -422,8 +422,7 @@ schedule_ue_spec(
module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
unsigned int *nb_rb_used0,
int* mbsfn_flag
int* mbsfn_flag
)
//------------------------------------------------------------------------------
{
......@@ -457,6 +456,7 @@ schedule_ue_spec(
int32_t tpc=1;
static int32_t tpc_accumulated=0;
UE_sched_ctrl *ue_sched_ctl;
int i;
if (UE_list->head==-1) {
return;
......@@ -471,7 +471,13 @@ schedule_ue_spec(
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
min_rb_unit[CC_id]=get_min_rb_unit(module_idP,CC_id);
frame_parms[CC_id] = mac_xface->get_lte_frame_parms(module_idP,CC_id);
total_nb_available_rb[CC_id] = frame_parms[CC_id]->N_RB_DL - nb_rb_used0[CC_id];
// get number of PRBs less those used by common channels
total_nb_available_rb[CC_id] = frame_parms[CC_id]->N_RB_DL;
for (i=0;i<frame_parms[CC_id]->N_RB_DL;i++)
if (eNB->common_channels[CC_id].vrb_map[i]!=0)
total_nb_available_rb[CC_id]--;
N_RBG[CC_id] = frame_parms[CC_id]->N_RBG;
// store the global enb stats:
......@@ -1505,7 +1511,6 @@ fill_DLSCH_dci(
module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
uint32_t* RBallocP,
int* mbsfn_flagP
)
//------------------------------------------------------------------------------
......@@ -1518,7 +1523,6 @@ fill_DLSCH_dci(
unsigned char *vrb_map;
uint8_t rballoc_sub[25];
//uint8_t number_of_subbands=13;
uint32_t *rballoc=RBallocP;
unsigned char round;
unsigned char harq_pid;
......@@ -1563,11 +1567,6 @@ fill_DLSCH_dci(
/// Synchronizing rballoc with rballoc_sub
for(i=0; i<PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RBG; i++) {
rballoc_sub[i] = UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][i];
if(rballoc_sub[i] == 1) {
rballoc[CC_id] |= (0x0001<<i); // TO be FIXED!!!!!!
}
}
switch(mac_xface->get_transmission_mode(module_idP,CC_id,rnti)) {
......@@ -1576,7 +1575,7 @@ fill_DLSCH_dci(
case 1:
case 2:
LOG_D(MAC,"[eNB %d] CC_id %d Adding UE %d spec DCI for %d PRBS (rb alloc: %x) \n",module_idP, CC_id, UE_id, nb_rb,rballoc);
LOG_D(MAC,"[eNB %d] CC_id %d Adding UE %d spec DCI for %d PRBS \n",module_idP, CC_id, UE_id, nb_rb);
if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
......@@ -1669,7 +1668,7 @@ fill_DLSCH_dci(
case 3:
LOG_D(MAC,"[eNB %d] CC_id %d Adding Format 2A UE %d spec DCI for %d PRBS (rb alloc: %x) \n",
module_idP, CC_id, UE_id, nb_rb,rballoc);
module_idP, CC_id, UE_id, nb_rb);
if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
......
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
View file @ 0fb79d62
......@@ -906,12 +906,12 @@ int get_nCCE_offset(int *CCE_table,
// check CCE(0 ... L-1)
nb_candidates = (L==4) ? 4 : 2;
nb_candidates = min(nb_candidates,nCCE/L);
printf("Common DCI nb_candidates %d, L %d\n",nb_candidates,L);
// printf("Common DCI nb_candidates %d, L %d\n",nb_candidates,L);
for (m = nb_candidates-1 ; m >=0 ; m--) {
search_space_free = 1;
for (l=0; l<L; l++) {
printf("CCE_table[%d] %d\n",(m*L)+l,CCE_table[(m*L)+l]);
// printf("CCE_table[%d] %d\n",(m*L)+l,CCE_table[(m*L)+l]);
if (CCE_table[(m*L) + l] == 1) {
search_space_free = 0;
break;
......@@ -919,7 +919,7 @@ int get_nCCE_offset(int *CCE_table,
}
if (search_space_free == 1) {
printf("returning %d\n",m*L);
// printf("returning %d\n",m*L);
for (l=0; l<L; l++)
CCE_table[(m*L)+l]=1;
return(m*L);
......@@ -955,7 +955,7 @@ int get_nCCE_offset(int *CCE_table,
break;
}
LOG_I(MAC,"rnti %x, Yk = %d, nCCE %d (nCCE/L %d),nb_cand %d\n",rnti,Yk,nCCE,nCCE/L,nb_candidates);
LOG_D(MAC,"rnti %x, Yk = %d, nCCE %d (nCCE/L %d),nb_cand %d\n",rnti,Yk,nCCE,nCCE/L,nb_candidates);
for (m = 0 ; m < nb_candidates ; m++) {
search_space_free = 1;
......@@ -994,7 +994,7 @@ int allocate_CCEs(int module_idP,
int allocation_is_feasible = 1;
DCI_ALLOC_t *dci_alloc;
LOG_I(MAC,"Allocate CCEs subframe %d, test %d : (common %d,uspec %d)\n",subframeP,test_onlyP,DCI_pdu->Num_common_dci,DCI_pdu->Num_ue_spec_dci);
LOG_D(MAC,"Allocate CCEs subframe %d, test %d : (common %d,uspec %d)\n",subframeP,test_onlyP,DCI_pdu->Num_common_dci,DCI_pdu->Num_ue_spec_dci);
init_CCE_table(module_idP,CC_idP);
DCI_pdu->nCCE=0;
......@@ -1002,7 +1002,7 @@ int allocate_CCEs(int module_idP,
for (i=0;i<DCI_pdu->Num_common_dci + DCI_pdu->Num_ue_spec_dci;i++) {
dci_alloc = &DCI_pdu->dci_alloc[i];
LOG_I(MAC,"Trying to allocate DCI %d/%d (%d,%d) : rnti %x, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
LOG_D(MAC,"Trying to allocate DCI %d/%d (%d,%d) : rnti %x, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
i,DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci,
DCI_pdu->Num_common_dci,DCI_pdu->Num_ue_spec_dci,
dci_alloc->rnti,1<<dci_alloc->L,
......@@ -1024,11 +1024,11 @@ int allocate_CCEs(int module_idP,
(i<DCI_pdu->Num_common_dci) ? 1 : 0,
dci_alloc->rnti,
subframeP))>=0) {// the allocation is feasible, rnti rule passes
LOG_I(MAC,"Allocating at nCCE %d\n",fCCE);
LOG_D(MAC,"Allocating at nCCE %d\n",fCCE);
if (test_onlyP == 0) {
DCI_pdu->nCCE += (1<<dci_alloc->L);
dci_alloc->firstCCE=fCCE;
LOG_I(MAC,"Allocate CCEs subframe %d, test %d\n",subframeP,test_onlyP);
LOG_D(MAC,"Allocate CCEs subframe %d, test %d\n",subframeP,test_onlyP);
}
} // fCCE>=0
else {
......
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
View file @ 0fb79d62
......@@ -732,7 +732,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
continue; // break;
}
printf("UE %d/%x is feasible, mode %s\n",UE_id,rnti,mode_string[eNB_UE_stats->mode]);
// printf("UE %d/%x is feasible, mode %s\n",UE_id,rnti,mode_string[eNB_UE_stats->mode]);
if (eNB_UE_stats->mode == PUSCH) { // ue has a ulsch channel
......
openair2/LAYER2/MAC/main.c
View file @ 0fb79d62
......@@ -468,6 +468,7 @@ int l2_init(LTE_DL_FRAME_PARMS *frame_parms,int eMBMS_active, char *uecap_xer,ui
mac_xface->get_transmission_mode = get_transmission_mode;
mac_xface->get_rballoc = get_rballoc;
mac_xface->get_nb_rb = conv_nprb;
mac_xface->get_prb = get_prb;
// mac_xface->get_SB_size = Get_SB_size;
mac_xface->get_subframe_direction = get_subframe_direction;
mac_xface->Msg3_transmitted = Msg3_tx;
......
openair2/LAYER2/MAC/pre_processor.c
View file @ 0fb79d62
......@@ -731,20 +731,24 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
void dlsch_scheduler_pre_processor_reset (int module_idP,
int UE_id,
uint8_t CC_id,
int frameP,
int subframeP,
int N_RBG,
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t nb_rbs_required_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX])
int UE_id,
uint8_t CC_id,
int frameP,
int subframeP,
int N_RBG,
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t nb_rbs_required_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX])
{
int i;
int i,j;
UE_list_t *UE_list=&eNB_mac_inst[module_idP].UE_list;
UE_sched_ctrl *ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
rnti_t rnti = UE_RNTI(module_idP,UE_id);
uint8_t *vrb_map = &eNB_mac_inst[module_idP].common_channels[CC_id].vrb_map;
int RBGsize = PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL/N_RBG;
// initialize harq_pid and round
mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,
......@@ -759,8 +763,15 @@ void dlsch_scheduler_pre_processor_reset (int module_idP,
nb_rbs_required_remaining[CC_id][UE_id] = 0;
for (i=0; i<N_RBG; i++) {
ue_sched_ctl->rballoc_sub_UE[CC_id][i] = 0;
ue_sched_ctl->rballoc_sub_UE[CC_id][UE_id] = 0;
rballoc_sub[CC_id][i] = 0;
for (j=0;j<RBGsize;j++) {
if (vrb_map[j+(i*RBGsize)]!=0) {
rballoc_sub[CC_id][i] = 1;
break;
}
}
LOG_D(MAC,"Frame %d Subframe %d CC_id %d RBG %i : rb_alloc %d\n",frameP,subframeP,CC_id,i,rballoc_sub[CC_id][i]);
MIMO_mode_indicator[CC_id][i] = 2;
}
}
......
openair2/LAYER2/MAC/proto.h
View file @ 0fb79d62
......@@ -53,18 +53,16 @@ for the message.
@param Mod_id Instance ID of eNB
@param frame Frame index
@param subframe Subframe number on which to act
@param nprb Pointer to current PRB count
*/
void schedule_RA(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,uint8_t Msg3_subframe,unsigned int *nprb);
void schedule_RA(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,uint8_t Msg3_subframe);
/** \brief First stage of SI Scheduling. Gets a SI SDU from RRC if available and computes the MCS required to transport it as a function of the SDU length. It assumes a length less than or equal to 64 bytes (MCS 6, 3 PRBs).
@param Mod_id Instance ID of eNB
@param frame Frame index
@param subframe Subframe number on which to act
@param Msg3_subframe Subframe where Msg3 will be transmitted
@param nprb Pointer to current PRB count
*/
void schedule_SI(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP, unsigned int *nprb);
void schedule_SI(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP);
/** \brief MBMS scheduling: Checking the position for MBSFN subframes. Create MSI, transfer MCCH from RRC to MAC, transfer MTCHs from RLC to MAC. Multiplexing MSI,MCCH&MTCHs. Return 1 if there are MBSFN data being allocated, otherwise return 0;
@param Mod_id Instance ID of eNB
......@@ -116,19 +114,17 @@ void schedule_ulsch_cba_rnti(module_id_t module_idP, unsigned char cooperation_f
@param Mod_id Instance of eNB
@param frame Frame index
@param subframe Index of subframe
@param rballoc Bitmask for allowable subband allocations
@param mbsfn_flag Indicates that this subframe is for MCH/MCCH
*/
void fill_DLSCH_dci(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,uint32_t *rballoc,int *mbsfn_flag);
void fill_DLSCH_dci(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,int *mbsfn_flag);
/** \brief UE specific DLSCH scheduling. Retrieves next ue to be schduled from round-robin scheduler and gets the appropriate harq_pid for the subframe from PHY. If the process is active and requires a retransmission, it schedules the retransmission with the same PRB count and MCS as the first transmission. Otherwise it consults RLC for DCCH/DTCH SDUs (status with maximum number of available PRBS), builds the MAC header (timing advance sent by default) and copies
@param Mod_id Instance ID of eNB
@param frame Frame index
@param subframe Subframe on which to act
@param nb_rb_used0 Number of PRB used by SI/RA
@param mbsfn_flag Indicates that MCH/MCCH is in this subframe
*/
void schedule_ue_spec(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,unsigned int *nb_rb_used0,int *mbsfn_flag);
void schedule_ue_spec(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,int *mbsfn_flag);
/** \brief Function for UE/PHY to compute PUSCH transmit power in power-control procedure.
@param Mod_id Module id of UE
......
openair2/PHY_INTERFACE/defs.h
View file @ 0fb79d62
......@@ -238,13 +238,16 @@ typedef struct {
int (*get_ue_active_harq_pid)(module_id_t Mod_id, uint8_t CC_id,rnti_t rnti, int frame, uint8_t subframe, uint8_t *harq_pid, uint8_t *round, uint8_t ul_flag);
/// Function to retrieve number of CCE
uint16_t (*get_nCCE_max)(module_id_t Mod_id,uint8_t CC_id,int num_pdcch_symbols,int subframe);
uint16_t (*get_nCCE_max)(module_id_t Mod_id,uint8_t CC_id,int num_pdcch_symbols ,int subframe);
int (*get_nCCE_offset)(unsigned char L, int nCCE, int common_dci, unsigned short rnti, unsigned char subframe);
/// Function to retrieve number of PRB in an rb_alloc
uint32_t (*get_nb_rb)(uint8_t ra_header, uint32_t rb_alloc, int n_rb_dl);
/// Function to convert VRB to PRB for distributed allocation
int (*get_prb)(int N_RB_DL,int odd_slot,int vrb,int Ngap);
/// Function to retrieve transmission mode for UE
uint8_t (*get_transmission_mode)(module_id_t Mod_id,uint8_t CC_id,rnti_t rnti);
......@@ -311,8 +314,9 @@ typedef struct {
/// get the delta TF for Uplink Power Control Calculation
int16_t (*get_hundred_times_delta_TF) (module_id_t module_idP, uint8_t CC_id, rnti_t rnti, uint8_t harq_pid);
/// get target uplink received power
/// get target PUSCH received power
int16_t (*get_target_pusch_rx_power) (module_id_t module_idP, uint8_t CC_id);
/// get target PUSCH received power
int16_t (*get_target_pucch_rx_power) (module_id_t module_idP, uint8_t CC_id);
unsigned char is_cluster_head;
......
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