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Michael Black
OpenXG UE
Commits
433ce504
Commit
433ce504
authored
Sep 07, 2020
by
Robert Schmidt
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nr_fill_nfapi_dl_pdu(): MCS + other params configurable
parent
937c0318
Changes
3
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3 changed files
with
32 additions
and
15 deletions
+32
-15
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+13
-2
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+13
-12
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+6
-1
No files found.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
View file @
433ce504
...
@@ -446,12 +446,23 @@ void nr_schedule_ue_spec(module_id_t module_id,
...
@@ -446,12 +446,23 @@ void nr_schedule_ue_spec(module_id_t module_id,
int
pucch_sched
;
int
pucch_sched
;
nr_update_pucch_scheduling
(
module_id
,
UE_id
,
frame
,
slot
,
num_slots_per_tdd
,
&
pucch_sched
);
nr_update_pucch_scheduling
(
module_id
,
UE_id
,
frame
,
slot
,
num_slots_per_tdd
,
&
pucch_sched
);
NR_sched_pucch
*
pucch
=
&
UE_list
->
UE_sched_ctrl
[
UE_id
].
sched_pucch
[
pucch_sched
];
NR_sched_pucch
*
pucch
=
&
UE_list
->
UE_sched_ctrl
[
UE_id
].
sched_pucch
[
pucch_sched
];
const
int
nrOfLayers
=
1
;
const
uint8_t
mcs
=
9
;
const
uint8_t
numDmrsCdmGrpsNoData
=
1
;
const
nfapi_nr_dmrs_type_e
dmrsConfigType
=
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
dmrs_Type
==
NULL
?
0
:
1
;
const
int
TBS_bytes
=
nr_fill_nfapi_dl_pdu
(
module_id
,
const
int
TBS_bytes
=
nr_fill_nfapi_dl_pdu
(
module_id
,
UE_id
,
bwp_id
,
dl_req
,
dl_req
,
pucch
,
pucch
,
9
/* mcs */
,
nrOfLayers
,
mcs
,
bwpSize
,
bwpSize
,
0
/* bwpStart */
);
0
/* bwpStart */
,
numDmrsCdmGrpsNoData
,
dmrsConfigType
);
if
(
TBS_bytes
==
0
)
if
(
TBS_bytes
==
0
)
return
;
return
;
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @
433ce504
...
@@ -408,11 +408,16 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu,
...
@@ -408,11 +408,16 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu,
}
}
int
nr_fill_nfapi_dl_pdu
(
int
Mod_idP
,
int
nr_fill_nfapi_dl_pdu
(
int
Mod_idP
,
int
UE_id
,
int
bwp_id
,
nfapi_nr_dl_tti_request_body_t
*
dl_req
,
nfapi_nr_dl_tti_request_body_t
*
dl_req
,
NR_sched_pucch
*
pucch_sched
,
NR_sched_pucch
*
pucch_sched
,
int
nrOfLayers
,
uint8_t
mcs
,
uint8_t
mcs
,
uint16_t
rbSize
,
uint16_t
rbSize
,
uint16_t
rbStart
)
{
uint16_t
rbStart
,
uint8_t
numDmrsCdmGrpsNoData
,
nfapi_nr_dmrs_type_e
dmrsConfigType
)
{
gNB_MAC_INST
*
nr_mac
=
RC
.
nrmac
[
Mod_idP
];
gNB_MAC_INST
*
nr_mac
=
RC
.
nrmac
[
Mod_idP
];
NR_COMMON_channels_t
*
cc
=
nr_mac
->
common_channels
;
NR_COMMON_channels_t
*
cc
=
nr_mac
->
common_channels
;
NR_ServingCellConfigCommon_t
*
scc
=
cc
->
ServingCellConfigCommon
;
NR_ServingCellConfigCommon_t
*
scc
=
cc
->
ServingCellConfigCommon
;
...
@@ -420,10 +425,6 @@ int nr_fill_nfapi_dl_pdu(int Mod_idP,
...
@@ -420,10 +425,6 @@ int nr_fill_nfapi_dl_pdu(int Mod_idP,
nfapi_nr_dl_tti_request_pdu_t
*
dl_tti_pdcch_pdu
;
nfapi_nr_dl_tti_request_pdu_t
*
dl_tti_pdcch_pdu
;
nfapi_nr_dl_tti_request_pdu_t
*
dl_tti_pdsch_pdu
;
nfapi_nr_dl_tti_request_pdu_t
*
dl_tti_pdsch_pdu
;
int
bwp_id
=
1
;
int
UE_id
=
0
;
const
int
nrOfLayers
=
1
;
NR_UE_list_t
*
UE_list
=
&
RC
.
nrmac
[
Mod_idP
]
->
UE_list
;
NR_UE_list_t
*
UE_list
=
&
RC
.
nrmac
[
Mod_idP
]
->
UE_list
;
NR_CellGroupConfig_t
*
secondaryCellGroup
=
UE_list
->
secondaryCellGroup
[
UE_id
];
NR_CellGroupConfig_t
*
secondaryCellGroup
=
UE_list
->
secondaryCellGroup
[
UE_id
];
...
@@ -475,10 +476,10 @@ int nr_fill_nfapi_dl_pdu(int Mod_idP,
...
@@ -475,10 +476,10 @@ int nr_fill_nfapi_dl_pdu(int Mod_idP,
pdsch_pdu_rel15
->
transmissionScheme
=
0
;
pdsch_pdu_rel15
->
transmissionScheme
=
0
;
pdsch_pdu_rel15
->
refPoint
=
0
;
// Point A
pdsch_pdu_rel15
->
refPoint
=
0
;
// Point A
UE_list
->
mac_stats
[
UE_id
].
dlsch_rounds
[
UE_list
->
UE_sched_ctrl
[
UE_id
].
harq_processes
[
current_harq_pid
].
round
]
++
;
UE_list
->
mac_stats
[
UE_id
].
dlsch_rounds
[
UE_list
->
UE_sched_ctrl
[
UE_id
].
harq_processes
[
current_harq_pid
].
round
]
++
;
pdsch_pdu_rel15
->
dmrsConfigType
=
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
dmrs_Type
==
NULL
?
0
:
1
;
pdsch_pdu_rel15
->
dmrsConfigType
=
dmrsConfigType
;
pdsch_pdu_rel15
->
dlDmrsScramblingId
=
*
scc
->
physCellId
;
pdsch_pdu_rel15
->
dlDmrsScramblingId
=
*
scc
->
physCellId
;
pdsch_pdu_rel15
->
SCID
=
0
;
pdsch_pdu_rel15
->
SCID
=
0
;
pdsch_pdu_rel15
->
numDmrsCdmGrpsNoData
=
1
;
pdsch_pdu_rel15
->
numDmrsCdmGrpsNoData
=
numDmrsCdmGrpsNoData
;
pdsch_pdu_rel15
->
dmrsPorts
=
1
;
pdsch_pdu_rel15
->
dmrsPorts
=
1
;
pdsch_pdu_rel15
->
resourceAlloc
=
1
;
pdsch_pdu_rel15
->
resourceAlloc
=
1
;
pdsch_pdu_rel15
->
rbStart
=
rbStart
;
pdsch_pdu_rel15
->
rbStart
=
rbStart
;
...
@@ -523,7 +524,7 @@ int nr_fill_nfapi_dl_pdu(int Mod_idP,
...
@@ -523,7 +524,7 @@ int nr_fill_nfapi_dl_pdu(int Mod_idP,
// time domain assignment
// time domain assignment
dci_pdu_rel15
[
0
].
time_domain_assignment
.
val
=
time_domain_assignment
;
// row index used here instead of SLIV;
dci_pdu_rel15
[
0
].
time_domain_assignment
.
val
=
time_domain_assignment
;
// row index used here instead of SLIV;
// mcs and rv
// mcs and rv
dci_pdu_rel15
[
0
].
mcs
=
pdsch_pdu_rel15
->
mcsIndex
[
0
]
;
dci_pdu_rel15
[
0
].
mcs
=
mcs
;
dci_pdu_rel15
[
0
].
rv
=
pdsch_pdu_rel15
->
rvIndex
[
0
];
dci_pdu_rel15
[
0
].
rv
=
pdsch_pdu_rel15
->
rvIndex
[
0
];
// harq pid and ndi
// harq pid and ndi
dci_pdu_rel15
[
0
].
harq_pid
=
current_harq_pid
;
dci_pdu_rel15
[
0
].
harq_pid
=
current_harq_pid
;
...
@@ -614,14 +615,14 @@ int nr_fill_nfapi_dl_pdu(int Mod_idP,
...
@@ -614,14 +615,14 @@ int nr_fill_nfapi_dl_pdu(int Mod_idP,
const
uint16_t
N_PRB_oh
=
0
;
// overhead should be 0 for initialBWP
const
uint16_t
N_PRB_oh
=
0
;
// overhead should be 0 for initialBWP
uint8_t
N_PRB_DMRS
;
uint8_t
N_PRB_DMRS
;
if
(
pdsch_pdu_rel15
->
dmrsConfigType
==
NFAPI_NR_DMRS_TYPE1
)
{
if
(
dmrsConfigType
==
NFAPI_NR_DMRS_TYPE1
)
{
// if no data in dmrs cdm group is 1 only even REs have no data
// if no data in dmrs cdm group is 1 only even REs have no data
// if no data in dmrs cdm group is 2 both odd and even REs have no data
// if no data in dmrs cdm group is 2 both odd and even REs have no data
N_PRB_DMRS
=
pdsch_pdu_rel15
->
numDmrsCdmGrpsNoData
*
6
;
N_PRB_DMRS
=
numDmrsCdmGrpsNoData
*
6
;
}
else
{
}
else
{
N_PRB_DMRS
=
pdsch_pdu_rel15
->
numDmrsCdmGrpsNoData
*
4
;
N_PRB_DMRS
=
numDmrsCdmGrpsNoData
*
4
;
}
}
const
uint8_t
N_sh_symb
=
pdsch_pdu_rel15
->
NrOfSymbols
;
const
uint8_t
N_sh_symb
=
NrOfSymbols
;
const
uint8_t
table_idx
=
0
;
const
uint8_t
table_idx
=
0
;
const
uint16_t
R
=
nr_get_code_rate_dl
(
mcs
,
table_idx
);
const
uint16_t
R
=
nr_get_code_rate_dl
(
mcs
,
table_idx
);
...
...
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
View file @
433ce504
...
@@ -130,11 +130,16 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
...
@@ -130,11 +130,16 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
sub_frame_t
subframeP
);
sub_frame_t
subframeP
);
int
nr_fill_nfapi_dl_pdu
(
int
Mod_id
,
int
nr_fill_nfapi_dl_pdu
(
int
Mod_id
,
int
UE_id
,
int
bwp_id
,
nfapi_nr_dl_tti_request_body_t
*
dl_req
,
nfapi_nr_dl_tti_request_body_t
*
dl_req
,
NR_sched_pucch
*
pucch_sched
,
NR_sched_pucch
*
pucch_sched
,
int
nrOfLayers
,
uint8_t
mcs
,
uint8_t
mcs
,
uint16_t
rbSize
,
uint16_t
rbSize
,
uint16_t
rbStart
);
uint16_t
rbStart
,
uint8_t
numDmrsCdmGrpsNoData
,
nfapi_nr_dmrs_type_e
dmrsConfigType
);
int
configure_fapi_dl_pdu_phytest
(
int
Mod_id
,
int
configure_fapi_dl_pdu_phytest
(
int
Mod_id
,
nfapi_nr_dl_tti_request_body_t
*
dl_req
,
nfapi_nr_dl_tti_request_body_t
*
dl_req
,
...
...
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