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OpenXG UE
Commit 4581d5f7 authored by Rohit Gupta's avatar Rohit Gupta
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Merge branch 'develop' into feature-44-dedicated-drb

parents 60f49c0e cc514017
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Showing with 52 additions and 159 deletions
cmake_targets/autotests/run_exec_lte-softmodem_tests.py
View file @ 4581d5f7
......@@ -781,7 +781,7 @@ def handle_testcaseclass_softmodem (testcase, oldprogramList, logdirOAI5GRepo ,
task_eNB = task_eNB + 'array_exec_pid+=($!) \n'
task_eNB = task_eNB + 'echo eNB_traffic_exec PID = $! \n'
task_eNB = task_eNB + ' (date; sudo rm -f ' + logfile_pcap_tmp_eNB + ' ; sudo -E tshark -i any -s 65535 -a duration:' + str(timeout_cmd-10)+ ' -w ' + logfile_pcap_tmp_eNB+ ' ; sudo -E chown ' + user + ' ' + logfile_pcap_tmp_eNB + ' ; zip -j -9 ' + logfile_pcap_zip_eNB + ' ' + logfile_pcap_tmp_eNB + ' ) > ' + logfile_tshark_eNB + ' 2>&1 & \n '
task_eNB = task_eNB + ' (date; sudo rm -f ' + logfile_pcap_tmp_eNB + ' ; sudo -E tshark -i lo -s 65535 -a duration:' + str(timeout_cmd-10)+ ' -w ' + logfile_pcap_tmp_eNB+ ' ; sudo -E chown ' + user + ' ' + logfile_pcap_tmp_eNB + ' ; zip -j -9 ' + logfile_pcap_zip_eNB + ' ' + logfile_pcap_tmp_eNB + ' ) > ' + logfile_tshark_eNB + ' 2>&1 & \n '
task_eNB = task_eNB + 'array_exec_pid+=($!) \n'
task_eNB = task_eNB + 'echo eNB_tshark_exec PID = $! \n'
#terminate the eNB test case after timeout_cmd seconds
......@@ -1005,7 +1005,14 @@ def handle_testcaseclass_softmodem (testcase, oldprogramList, logdirOAI5GRepo ,
run_result_string = ' RUN_'+str(run) + ' = PASS'
else:
run_result_string = ' RUN_'+str(run) + ' = FAIL'
#If there is assertion, we mark the test case as failure as most likely eNB crashed
cmd = "grep -ilr \"assertion\" " + logdir_local_testcase + " | cat "
cmd_out = subprocess.check_output ([cmd], shell=True)
if not cmd_out:
run_result=0
run_result_string = ' RUN_'+str(run) + ' = FAIL(Assert)'
run_result_string = run_result_string + tput_run_string
test_result=test_result & run_result
......
openair1/PHY/LTE_TRANSPORT/dci_tools.c
View file @ 4581d5f7
......@@ -1126,12 +1126,8 @@ int generate_eNB_dlsch_params_from_dci(int frame,
dlsch[0]->harq_ids[subframe] = harq_pid;
if (dlsch0_harq->round == 0) {
/* necessary test? */
if (dlsch0_harq->status == SCH_IDLE)
remove_harq_pid_from_freelist(dlsch[0], harq_pid);
if (dlsch0_harq->round == 0)
dlsch0_harq->status = ACTIVE;
}
break;
......@@ -1265,9 +1261,6 @@ int generate_eNB_dlsch_params_from_dci(int frame,
if (dlsch0_harq->round == 0) {
/* necessary test? */
if (dlsch0_harq->status == SCH_IDLE)
remove_harq_pid_from_freelist(dlsch[0], harq_pid);
dlsch0_harq->status = ACTIVE;
// printf("Setting DLSCH process %d to ACTIVE\n",harq_pid);
// MCS and TBS don't change across HARQ rounds
......@@ -1635,19 +1628,11 @@ int generate_eNB_dlsch_params_from_dci(int frame,
}
// reset HARQ process if this is the first transmission
if (dlsch0_harq->round == 0) {
/* necessary test? */
if (dlsch0_harq->status == SCH_IDLE)
remove_harq_pid_from_freelist(dlsch0, harq_pid);
if (dlsch0_harq->round == 0)
dlsch0_harq->status = ACTIVE;
}
if (dlsch1_harq->round == 0) {
/* necessary test? */
if (dlsch1_harq->status == SCH_IDLE)
remove_harq_pid_from_freelist(dlsch1, harq_pid);
if (dlsch1_harq->round == 0)
dlsch1_harq->status = ACTIVE;
}
dlsch0->rnti = rnti;
dlsch1->rnti = rnti;
......@@ -2022,19 +2007,11 @@ int generate_eNB_dlsch_params_from_dci(int frame,
}
// reset HARQ process if this is the first transmission
if ((dlsch0->active==1) && (dlsch0_harq->round == 0)) {
/* necessary test? */
if (dlsch0_harq->status == SCH_IDLE)
remove_harq_pid_from_freelist(dlsch0, harq_pid);
if ((dlsch0->active==1) && (dlsch0_harq->round == 0))
dlsch0_harq->status = ACTIVE;
}
if ((dlsch1->active==1) && (dlsch1_harq->round == 0)) {
/* necessary test? */
if (dlsch1_harq->status == SCH_IDLE)
remove_harq_pid_from_freelist(dlsch1, harq_pid);
if ((dlsch1->active==1) && (dlsch1_harq->round == 0))
dlsch1_harq->status = ACTIVE;
}
dlsch0->rnti = rnti;
dlsch1->rnti = rnti;
......@@ -2174,23 +2151,16 @@ int generate_eNB_dlsch_params_from_dci(int frame,
// check if either TB is disabled (see 36-213 V8.6 p. 26)
if ((dlsch0_harq->rvidx == 1) && (dlsch0_harq->mcs == 0)) {
LOG_W(PHY, "what to do with respect to remove_harq_pid_from_freelist?\n");
if ((dlsch0_harq->rvidx == 1) && (dlsch0_harq->mcs == 0))
dlsch0_harq->status = DISABLED;
}
if ((dlsch1_harq->rvidx == 1) && (dlsch1_harq->mcs == 0)) {
LOG_W(PHY, "what to do with respect to remove_harq_pid_from_freelist?\n");
if ((dlsch1_harq->rvidx == 1) && (dlsch1_harq->mcs == 0))
dlsch1_harq->status = DISABLED;
}
dlsch0_harq->Nl = 1;
if (dlsch0_harq->round == 0) {
/* necessary test? */
if (dlsch0_harq->status == SCH_IDLE)
remove_harq_pid_from_freelist(dlsch0, harq_pid);
dlsch0_harq->status = ACTIVE;
// printf("Setting DLSCH process %d to ACTIVE\n",harq_pid);
}
......@@ -2355,17 +2325,11 @@ int generate_eNB_dlsch_params_from_dci(int frame,
if ((dlsch0_harq->round == 0) && (dlsch0->active == 1) ) {
/* necessary test? */
if (dlsch0_harq->status == SCH_IDLE)
remove_harq_pid_from_freelist(dlsch0, harq_pid);
dlsch0_harq->status = ACTIVE;
dlsch0_harq->mcs = mcs1;
}
if ((dlsch1_harq->round == 0) && (dlsch1->active == 1) ) {
/* necessary test? */
if (dlsch1_harq->status == SCH_IDLE)
remove_harq_pid_from_freelist(dlsch1, harq_pid);
dlsch1_harq->status = ACTIVE;
dlsch1_harq->mcs = mcs2;
}
......@@ -2529,9 +2493,6 @@ int generate_eNB_dlsch_params_from_dci(int frame,
if (dlsch0_harq->round == 0) {
/* necessary test? */
if (dlsch0_harq->status == SCH_IDLE)
remove_harq_pid_from_freelist(dlsch0, harq_pid);
dlsch0_harq->status = ACTIVE;
// printf("Setting DLSCH process %d to ACTIVE\n",harq_pid);
}
......@@ -2661,9 +2622,6 @@ int generate_eNB_dlsch_params_from_dci(int frame,
// dlsch0_harq->Ndi = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->ndi;
if (dlsch0_harq->round == 0) {
/* necessary test? */
if (dlsch0_harq->status == SCH_IDLE)
remove_harq_pid_from_freelist(dlsch0, harq_pid);
dlsch0_harq->status = ACTIVE;
// printf("Setting DLSCH process %d to ACTIVE\n",harq_pid);
}
......
openair1/PHY/LTE_TRANSPORT/defs.h
View file @ 4581d5f7
......@@ -258,13 +258,6 @@ typedef struct {
uint8_t error_threshold;
/// Pointers to 8 HARQ processes for the DLSCH
LTE_DL_eNB_HARQ_t *harq_processes[8];
/// circular list of free harq PIDs (the oldest come first)
/// (10 is arbitrary value, must be > to max number of DL HARQ processes in LTE)
int harq_pid_freelist[10];
/// the head position of the free list (if list is free then head=tail)
int head_freelist;
/// the tail position of the free list
int tail_freelist;
/// Number of soft channel bits
uint32_t G;
/// Codebook index for this dlsch (0,1,2,3)
......
openair1/PHY/LTE_TRANSPORT/dlsch_coding.c
View file @ 4581d5f7
......@@ -156,9 +156,6 @@ LTE_eNB_DLSCH_t *new_eNB_dlsch(unsigned char Kmimo,unsigned char Mdlharq,uint32_
for (i=0; i<10; i++)
dlsch->harq_ids[i] = Mdlharq;
dlsch->head_freelist = 0;
dlsch->tail_freelist = 0;
for (i=0; i<Mdlharq; i++) {
dlsch->harq_processes[i] = (LTE_DL_eNB_HARQ_t *)malloc16(sizeof(LTE_DL_eNB_HARQ_t));
LOG_T(PHY, "Required mem size %d (bw scaling %d), dlsch->harq_processes[%d] %p\n",
......@@ -199,8 +196,6 @@ LTE_eNB_DLSCH_t *new_eNB_dlsch(unsigned char Kmimo,unsigned char Mdlharq,uint32_
msg("Can't get harq_p %d\n",i);
exit_flag=3;
}
put_harq_pid_in_freelist(dlsch, i);
}
if (exit_flag==0) {
......
openair1/SCHED/defs.h
View file @ 4581d5f7
......@@ -400,9 +400,6 @@ uint32_t pdcch_alloc2ul_frame(LTE_DL_FRAME_PARMS *frame_parms,uint32_t frame, ui
uint16_t get_Np(uint8_t N_RB_DL,uint8_t nCCE,uint8_t plus1);
void put_harq_pid_in_freelist(LTE_eNB_DLSCH_t *DLSCH_ptr, int harq_pid);
void remove_harq_pid_from_freelist(LTE_eNB_DLSCH_t *DLSCH_ptr, int harq_pid);
int8_t find_ue(uint16_t rnti, PHY_VARS_eNB *phy_vars_eNB);
int32_t add_ue(int16_t rnti, PHY_VARS_eNB *phy_vars_eNB);
int mac_phy_remove_ue(module_id_t Mod_idP,rnti_t rnti);
......
openair1/SCHED/phy_mac_stub.c
View file @ 4581d5f7
......@@ -155,10 +155,10 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(50,10,3);
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->ndi = subframe / 5;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = subframe % 5;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_10MHz_TDD_1_6_t));
}
......@@ -233,10 +233,10 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(25,10,3);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = subframe % 5;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = subframe / 5;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rah = 0;
......@@ -266,10 +266,10 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(25,10,3);
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->harq_pid = subframe % 5;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
//((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->ndi = subframe / 5;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rah = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_5MHz_TDD_t));
......@@ -304,10 +304,10 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(50,10,3);
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = subframe % 5;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = subframe / 5;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rah = 0;
......@@ -338,10 +338,10 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(50,10,3);
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->harq_pid = subframe % 5;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
//((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->ndi = subframe / 5;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rah = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_10MHz_TDD_t));
......@@ -375,10 +375,10 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(100,10,3);
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->harq_pid = subframe % 5;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->ndi = subframe / 5;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rah = 0;
......@@ -409,10 +409,10 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(100,10,3);
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->harq_pid = subframe % 5;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
//((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->ndi = subframe / 5;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rah = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_20MHz_TDD_t));
......@@ -451,13 +451,13 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->tpmi = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rv1 = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->ndi1 = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->ndi1 = subframe / 5;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->mcs1 = openair_daq_vars.target_ue_dl_mcs;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rv2 = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->ndi2 = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->ndi2 = subframe / 5;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->mcs2 = openair_daq_vars.target_ue_dl_mcs;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->tb_swap = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->harq_pid = subframe % 5;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->TPC = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rballoc = openair_daq_vars.ue_dl_rb_alloc;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rah = 0;
......@@ -473,13 +473,13 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
DLSCH_alloc_pdu1E.tpmi = 5; //5=use feedback
DLSCH_alloc_pdu1E.rv = 0;
DLSCH_alloc_pdu1E.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
DLSCH_alloc_pdu1E.ndi = subframe / 5;
//DLSCH_alloc_pdu1E.mcs = cqi_to_mcs[phy_vars_eNB->eNB_UE_stats->DL_cqi[0]];
//DLSCH_alloc_pdu1E.mcs = (unsigned char) (taus()%28);
DLSCH_alloc_pdu1E.mcs = openair_daq_vars.target_ue_dl_mcs;
//DLSCH_alloc_pdu1E.mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
phy_vars_eNB->eNB_UE_stats[0].dlsch_mcs1 = DLSCH_alloc_pdu1E.mcs;
DLSCH_alloc_pdu1E.harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
DLSCH_alloc_pdu1E.harq_pid = subframe % 5;
DLSCH_alloc_pdu1E.dai = 0;
DLSCH_alloc_pdu1E.TPC = 0;
DLSCH_alloc_pdu1E.rballoc = openair_daq_vars.ue_dl_rb_alloc;
......
openair1/SCHED/phy_procedures_lte_eNb.c
View file @ 4581d5f7
......@@ -133,30 +133,6 @@ uint8_t is_SR_subframe(PHY_VARS_eNB *phy_vars_eNB,uint8_t UE_id,uint8_t sched_su
return(0);
}
void put_harq_pid_in_freelist(LTE_eNB_DLSCH_t *DLSCH_ptr, int harq_pid)
{
DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->tail_freelist] = harq_pid;
DLSCH_ptr->tail_freelist = (DLSCH_ptr->tail_freelist + 1) % 10;
}
void remove_harq_pid_from_freelist(LTE_eNB_DLSCH_t *DLSCH_ptr, int harq_pid)
{
if (DLSCH_ptr->head_freelist == DLSCH_ptr->tail_freelist) {
LOG_E(PHY, "%s:%d: you cannot read this!\n", __FILE__, __LINE__);
abort();
}
/* basic check, in case several threads deal with the free list at the same time
* in normal situations it should not happen, that's also why we don't use any
* locking mechanism to protect the free list
* to be refined in case things don't work properly
*/
if (harq_pid != DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist]) {
LOG_E(PHY, "%s:%d: critical error, get in touch with the authors\n", __FILE__, __LINE__);
abort();
}
DLSCH_ptr->head_freelist = (DLSCH_ptr->head_freelist + 1) % 10;
}
int32_t add_ue(int16_t rnti, PHY_VARS_eNB *phy_vars_eNB)
{
uint8_t i;
......@@ -221,12 +197,6 @@ int mac_phy_remove_ue(module_id_t Mod_idP,rnti_t rntiP) {
memset(&phy_vars_eNB->eNB_UE_stats[i],0,sizeof(LTE_eNB_UE_stats));
// mac_exit_wrapper("Removing UE");
/* clear the harq pid freelist */
phy_vars_eNB->dlsch_eNB[i][0]->head_freelist = 0;
phy_vars_eNB->dlsch_eNB[i][0]->tail_freelist = 0;
for (j = 0; j < 8; j++)
put_harq_pid_in_freelist(phy_vars_eNB->dlsch_eNB[i][0], j);
return(i);
}
}
......@@ -258,9 +228,8 @@ int get_ue_active_harq_pid(const uint8_t Mod_id,const uint8_t CC_id,const uint16
LTE_eNB_DLSCH_t *DLSCH_ptr;
LTE_eNB_ULSCH_t *ULSCH_ptr;
uint8_t ulsch_subframe,ulsch_frame;
uint8_t i;
int i;
int8_t UE_id = find_ue(rnti,PHY_vars_eNB_g[Mod_id][CC_id]);
int sf1=(10*frame)+subframe,sf2,sfdiff,sfdiff_max=7;
if (UE_id==-1) {
LOG_D(PHY,"Cannot find UE with rnti %x (Mod_id %d, CC_id %d)\n",rnti, Mod_id, CC_id);
......@@ -271,40 +240,19 @@ int get_ue_active_harq_pid(const uint8_t Mod_id,const uint8_t CC_id,const uint16
if (ul_flag == 0) {// this is a DL request
DLSCH_ptr = PHY_vars_eNB_g[Mod_id][CC_id]->dlsch_eNB[(uint32_t)UE_id][0];
// set to no available process first
*harq_pid = -1;
for (i=0; i<DLSCH_ptr->Mdlharq; i++) {
if (DLSCH_ptr->harq_processes[i]!=NULL) {
if (DLSCH_ptr->harq_processes[i]->status == ACTIVE) {
sf2 = (DLSCH_ptr->harq_processes[i]->frame*10) + DLSCH_ptr->harq_processes[i]->subframe;
if (sf2<=sf1)
sfdiff = sf1-sf2;
else // this happens when wrapping around 1024 frame barrier
sfdiff = 10240 + sf1-sf2;
LOG_D(PHY,"process %d is active, round %d (waiting %d)\n",i,DLSCH_ptr->harq_processes[i]->round,sfdiff);
if (sfdiff>sfdiff_max) { // this is an active process that is waiting longer than the others (and longer than 7 ms)
sfdiff_max = sfdiff;
*harq_pid = i;
*round = DLSCH_ptr->harq_processes[i]->round;
}
}
} else { // a process is not defined
LOG_E(PHY,"[eNB %d] DLSCH process %d for rnti %x (UE_id %d) not allocated\n",Mod_id,i,rnti,UE_id);
return(-1);
}
}
/* let's go synchronous for the moment - maybe we can change at some point */
i = (frame * 10 + subframe) % 8;
/* if no active harq pid, get the oldest in the freelist, if any */
if (*harq_pid == 255 && DLSCH_ptr->head_freelist != DLSCH_ptr->tail_freelist) {
*harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
if (DLSCH_ptr->harq_processes[i]->status == ACTIVE) {
*harq_pid = i;
*round = DLSCH_ptr->harq_processes[i]->round;
} else if (DLSCH_ptr->harq_processes[i]->status == SCH_IDLE) {
*harq_pid = i;
*round = 0;
LOG_D(PHY,"process %d is first free process\n", *harq_pid);
} else {
printf("%s:%d: bad state for harq process - PLEASE REPORT!!\n", __FILE__, __LINE__);
abort();
}
LOG_D(PHY,"get_ue_active_harq_pid DL => Frame %d, Subframe %d : harq_pid %d\n",
frame,subframe,*harq_pid);
} else { // This is a UL request
ULSCH_ptr = PHY_vars_eNB_g[Mod_id][CC_id]->ulsch_eNB[(uint32_t)UE_id];
......@@ -1906,7 +1854,6 @@ void process_HARQ_feedback(uint8_t UE_id,
dlsch_harq_proc->round = 0;
ue_stats->dlsch_l2_errors[dl_harq_pid[m]]++;
dlsch_harq_proc->status = SCH_IDLE;
put_harq_pid_in_freelist(dlsch, dl_harq_pid[m]);
dlsch->harq_ids[dl_subframe] = dlsch->Mdlharq;
}
} else {
......@@ -1923,7 +1870,6 @@ void process_HARQ_feedback(uint8_t UE_id,
// Received ACK so set round to 0 and set dlsch_harq_pid IDLE
dlsch_harq_proc->round = 0;
dlsch_harq_proc->status = SCH_IDLE;
put_harq_pid_in_freelist(dlsch, dl_harq_pid[m]);
dlsch->harq_ids[dl_subframe] = dlsch->Mdlharq;
ue_stats->total_TBS = ue_stats->total_TBS +
......@@ -2345,9 +2291,6 @@ void pucch_procedures(const unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_
phy_vars_eNB->eNB_UE_stats[UE_id].sr_received++;
if (phy_vars_eNB->first_sr[UE_id] == 1) { // this is the first request for uplink after Connection Setup, so clear HARQ process 0 use for Msg4
/* is this test necessary? */
if (phy_vars_eNB->dlsch_eNB[UE_id][0]->harq_processes[0]->status != SCH_IDLE)
put_harq_pid_in_freelist(phy_vars_eNB->dlsch_eNB[UE_id][0], 0);
phy_vars_eNB->first_sr[UE_id] = 0;
phy_vars_eNB->dlsch_eNB[UE_id][0]->harq_processes[0]->round=0;
phy_vars_eNB->dlsch_eNB[UE_id][0]->harq_processes[0]->status=SCH_IDLE;
......
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