Commit 56a4157b authored by Elena_Lukashova's avatar Elena_Lukashova

Adding HARQ support for TM4. No fallback to Alamouti yet.

Counting for the number of 2CWs or 1CW retransmissions.
Adding corresponding changes to the phy_scope.
parent 25304e46
...@@ -984,8 +984,8 @@ void phy_init_lte_ue__PDSCH( LTE_UE_PDSCH* const pdsch, const LTE_DL_FRAME_PARMS ...@@ -984,8 +984,8 @@ void phy_init_lte_ue__PDSCH( LTE_UE_PDSCH* const pdsch, const LTE_DL_FRAME_PARMS
pdsch->dl_ch_estimates_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); pdsch->dl_ch_estimates_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pdsch->dl_ch_mag0 = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); pdsch->dl_ch_mag0 = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pdsch->dl_ch_magb0 = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); pdsch->dl_ch_magb0 = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pdsch->dl_ch_mag1 = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); //pdsch->dl_ch_mag1 = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pdsch->dl_ch_magb1 = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); //pdsch->dl_ch_magb1 = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
// the allocated memory size is fixed: // the allocated memory size is fixed:
AssertFatal( frame_parms->nb_antennas_rx <= 2, "nb_antennas_rx > 2" ); AssertFatal( frame_parms->nb_antennas_rx <= 2, "nb_antennas_rx > 2" );
...@@ -999,8 +999,8 @@ void phy_init_lte_ue__PDSCH( LTE_UE_PDSCH* const pdsch, const LTE_DL_FRAME_PARMS ...@@ -999,8 +999,8 @@ void phy_init_lte_ue__PDSCH( LTE_UE_PDSCH* const pdsch, const LTE_DL_FRAME_PARMS
pdsch->dl_ch_estimates_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num ); pdsch->dl_ch_estimates_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
pdsch->dl_ch_mag0[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num ); pdsch->dl_ch_mag0[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
pdsch->dl_ch_magb0[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num ); pdsch->dl_ch_magb0[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
pdsch->dl_ch_mag1[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num ); //pdsch->dl_ch_mag1[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
pdsch->dl_ch_magb1[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num ); //pdsch->dl_ch_magb1[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
} }
} }
} }
...@@ -1187,6 +1187,9 @@ int phy_init_lte_ue(PHY_VARS_UE *phy_vars_ue, ...@@ -1187,6 +1187,9 @@ int phy_init_lte_ue(PHY_VARS_UE *phy_vars_ue,
for (l=0;l<8;l++) { //round for (l=0;l<8;l++) { //round
ue_pdsch_vars[eNB_id]->rxdataF_comp1[k][l] = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); ue_pdsch_vars[eNB_id]->rxdataF_comp1[k][l] = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
ue_pdsch_vars[eNB_id]->dl_ch_rho_ext[k][l] = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); ue_pdsch_vars[eNB_id]->dl_ch_rho_ext[k][l] = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
ue_pdsch_vars[eNB_id]->dl_ch_mag1[k][l] = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
ue_pdsch_vars[eNB_id]->dl_ch_magb1[k][l] = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
// ue_pdsch_vars[eNB_id]->clean_x1[k][l] = (int16_t*)malloc16_clear( sizeof(int32_t) * num); // ue_pdsch_vars[eNB_id]->clean_x1[k][l] = (int16_t*)malloc16_clear( sizeof(int32_t) * num);
for (int i=0; i<frame_parms->nb_antennas_rx; i++) for (int i=0; i<frame_parms->nb_antennas_rx; i++)
...@@ -1194,6 +1197,8 @@ int phy_init_lte_ue(PHY_VARS_UE *phy_vars_ue, ...@@ -1194,6 +1197,8 @@ int phy_init_lte_ue(PHY_VARS_UE *phy_vars_ue,
const int idx = (j<<1)+i; const int idx = (j<<1)+i;
ue_pdsch_vars[eNB_id]->dl_ch_rho_ext[k][l][idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num ); ue_pdsch_vars[eNB_id]->dl_ch_rho_ext[k][l][idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
ue_pdsch_vars[eNB_id]->rxdataF_comp1[k][l][idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num ); ue_pdsch_vars[eNB_id]->rxdataF_comp1[k][l][idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
ue_pdsch_vars[eNB_id]->dl_ch_mag1[k][l][idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
ue_pdsch_vars[eNB_id]->dl_ch_magb1[k][l][idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
} }
} }
} }
......
...@@ -1551,7 +1551,7 @@ int generate_eNB_dlsch_params_from_dci(int frame, ...@@ -1551,7 +1551,7 @@ int generate_eNB_dlsch_params_from_dci(int frame,
} }
if (frame_parms->nb_antennas_tx == 2) { if (frame_parms->nb_antennas_tx == 2) {
if (dlsch1->active == 1) { // both TBs are active if (dlsch0->active == 1 && dlsch1->active == 1) { // both TBs are active
dlsch0_harq->dl_power_off = 1; dlsch0_harq->dl_power_off = 1;
dlsch1_harq->dl_power_off = 1; dlsch1_harq->dl_power_off = 1;
...@@ -1581,7 +1581,7 @@ int generate_eNB_dlsch_params_from_dci(int frame, ...@@ -1581,7 +1581,7 @@ int generate_eNB_dlsch_params_from_dci(int frame,
break; break;
} }
} }
else { // only one is active else if (dlsch1->active == 0) { // only one is active
dlsch0_harq->dl_power_off = 1; dlsch0_harq->dl_power_off = 1;
dlsch0_harq->TBS= TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1]; dlsch0_harq->TBS= TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
switch (tpmi) { switch (tpmi) {
...@@ -1614,6 +1614,39 @@ int generate_eNB_dlsch_params_from_dci(int frame, ...@@ -1614,6 +1614,39 @@ int generate_eNB_dlsch_params_from_dci(int frame,
break; break;
} }
} }
else if (dlsch0->active == 0) { // only one is active
dlsch1_harq->dl_power_off = 1;
dlsch1_harq->TBS= TBStable[get_I_TBS(dlsch1_harq->mcs)][dlsch1_harq->nb_rb-1];
switch (tpmi) {
case 0 :
dlsch1_harq->mimo_mode = ALAMOUTI;
break;
case 1:
dlsch1_harq->mimo_mode = UNIFORM_PRECODING11;
dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,0,0);
break;
case 2:
dlsch1_harq->mimo_mode = UNIFORM_PRECODING1m1;
dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,1,0);
break;
case 3:
dlsch1_harq->mimo_mode = UNIFORM_PRECODING1j;
dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,2,0);
break;
case 4:
dlsch1_harq->mimo_mode = UNIFORM_PRECODING1mj;
dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,3,0);
break;
case 5:
dlsch1_harq->mimo_mode = PUSCH_PRECODING0;
dlsch1_harq->pmi_alloc = DL_pmi_single;
break;
case 6:
dlsch1_harq->mimo_mode = PUSCH_PRECODING1;
dlsch1_harq->pmi_alloc = DL_pmi_single;
break;
}
}
} else if (frame_parms->nb_antennas_tx == 4) { } else if (frame_parms->nb_antennas_tx == 4) {
// fill in later // fill in later
} }
...@@ -2670,6 +2703,20 @@ int generate_eNB_dlsch_params_from_dci(int frame, ...@@ -2670,6 +2703,20 @@ int generate_eNB_dlsch_params_from_dci(int frame,
printf("dlsch0 eNB: mimo_mode %d\n",dlsch0_harq->mimo_mode); printf("dlsch0 eNB: mimo_mode %d\n",dlsch0_harq->mimo_mode);
} }
if (dlsch1) {
printf("dlsch1 eNB: dlsch1 %p\n",dlsch1);
printf("dlsch1 eNB: rnti %x\n",dlsch1->rnti);
printf("dlsch1 eNB: NBRB %d\n",dlsch1_harq->nb_rb);
printf("dlsch1 eNB: rballoc %x\n",dlsch1_harq->rb_alloc[0]);
printf("dlsch1 eNB: harq_pid %d\n",harq_pid);
printf("dlsch1 eNB: round %d\n",dlsch1_harq->round);
printf("dlsch1 eNB: rvidx %d\n",dlsch1_harq->rvidx);
printf("dlsch1 eNB: TBS %d (NPRB %d)\n",dlsch1_harq->TBS,NPRB);
printf("dlsch1 eNB: mcs %d\n",dlsch1_harq->mcs);
printf("dlsch1 eNB: tpmi %d\n",tpmi);
printf("dlsch1 eNB: mimo_mode %d\n",dlsch1_harq->mimo_mode);
}
#endif #endif
// compute DL power control parameters // compute DL power control parameters
...@@ -4730,10 +4777,11 @@ int generate_ue_dlsch_params_from_dci(int frame, ...@@ -4730,10 +4777,11 @@ int generate_ue_dlsch_params_from_dci(int frame,
return(-1); return(-1);
} }
if (frame_type == TDD) /*if (frame_type == TDD)
tbswap = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tb_swap; tbswap = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tb_swap;
else else
tbswap = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tb_swap; tbswap = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tb_swap;*/
if (tbswap == 0) { if (tbswap == 0) {
dlsch0 = dlsch[0]; dlsch0 = dlsch[0];
...@@ -4802,11 +4850,14 @@ int generate_ue_dlsch_params_from_dci(int frame, ...@@ -4802,11 +4850,14 @@ int generate_ue_dlsch_params_from_dci(int frame,
// check if either TB is disabled (see 36-213 V8.6 p. 26) // check if either TB is disabled (see 36-213 V8.6 p. 26)
if ((dlsch0_harq->rvidx == 1) && (dlsch0_harq->mcs == 0)) { if ((dlsch0_harq->rvidx == 1) && (dlsch0_harq->mcs == 0)) {
dlsch0_harq->status = DISABLED; dlsch0_harq->status = DISABLED;
dlsch0->active = 0;
} }
if ((dlsch1_harq->rvidx == 1) && (dlsch1_harq->mcs == 0)) { if ((dlsch1_harq->rvidx == 1) && (dlsch1_harq->mcs == 0)) {
dlsch1_harq->status = DISABLED; dlsch1_harq->status = DISABLED;
dlsch1->active = 0;
} }
dlsch0_harq->Nl = 1; dlsch0_harq->Nl = 1;
...@@ -4815,7 +4866,7 @@ int generate_ue_dlsch_params_from_dci(int frame, ...@@ -4815,7 +4866,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
// dlsch0->layer_index = tbswap; // dlsch0->layer_index = tbswap;
// dlsch1->layer_index = 1-tbswap; // dlsch1->layer_index = 1-tbswap;
if (dlsch1->active==1) { //two codewords if (dlsch0->active==1 && dlsch1->active==1) { //two TB
dlsch0_harq->dl_power_off = 1; dlsch0_harq->dl_power_off = 1;
dlsch1_harq->dl_power_off = 1; dlsch1_harq->dl_power_off = 1;
switch (tpmi) { switch (tpmi) {
...@@ -4840,8 +4891,7 @@ int generate_ue_dlsch_params_from_dci(int frame, ...@@ -4840,8 +4891,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
default: default:
break; break;
} }
} } else if (dlsch1_harq->status == DISABLED) {
else {
dlsch0_harq->dl_power_off = 1; dlsch0_harq->dl_power_off = 1;
switch (tpmi) { switch (tpmi) {
case 0 : case 0 :
...@@ -4875,6 +4925,40 @@ int generate_ue_dlsch_params_from_dci(int frame, ...@@ -4875,6 +4925,40 @@ int generate_ue_dlsch_params_from_dci(int frame,
return(-1); return(-1);
break; break;
} }
} else if (dlsch0_harq->status == DISABLED) {
dlsch1_harq->dl_power_off = 1;
switch (tpmi) {
case 0 :
dlsch1_harq->mimo_mode = ALAMOUTI;
break;
case 1:
dlsch1_harq->mimo_mode = UNIFORM_PRECODING11;
dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,0, 0);
break;
case 2:
dlsch1_harq->mimo_mode = UNIFORM_PRECODING1m1;
dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,1, 0);
break;
case 3:
dlsch1_harq->mimo_mode = UNIFORM_PRECODING1j;
dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,2, 0);
break;
case 4:
dlsch1_harq->mimo_mode = UNIFORM_PRECODING1mj;
dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,3, 0);
break;
case 5:
dlsch1_harq->mimo_mode = PUSCH_PRECODING0;
// pmi stored from ulsch allocation routine
dlsch1_harq->pmi_alloc = dlsch0->pmi_alloc;
//LOG_I(PHY,"XXX using PMI %x\n",pmi2hex_2Ar1(dlsch0_harq->pmi_alloc));
break;
case 6:
dlsch1_harq->mimo_mode = PUSCH_PRECODING1;
LOG_E(PHY,"Unsupported TPMI\n");
return(-1);
break;
}
} }
if (frame_parms->mode1_flag == 1) if (frame_parms->mode1_flag == 1)
...@@ -4882,11 +4966,11 @@ int generate_ue_dlsch_params_from_dci(int frame, ...@@ -4882,11 +4966,11 @@ int generate_ue_dlsch_params_from_dci(int frame,
if (dlsch0->active == 1) { if (dlsch0->active == 1) {
if ((ndi1!=dlsch0_harq->DCINdi) || if ((ndi1!=dlsch0_harq->DCINdi) || (dlsch0_harq->first_tx==1)) {
(dlsch0_harq->first_tx==1)) {
dlsch0_harq->round = 0; dlsch0_harq->round = 0;
dlsch0_harq->status = ACTIVE; dlsch0_harq->status = ACTIVE;
dlsch0_harq->DCINdi = ndi1; dlsch0_harq->DCINdi = ndi1;
if (dlsch0_harq->first_tx==1) { if (dlsch0_harq->first_tx==1) {
LOG_D(PHY,"Format 2 DCI First TX0: Clearing flag\n"); LOG_D(PHY,"Format 2 DCI First TX0: Clearing flag\n");
dlsch0_harq->first_tx = 0; dlsch0_harq->first_tx = 0;
...@@ -4905,8 +4989,7 @@ int generate_ue_dlsch_params_from_dci(int frame, ...@@ -4905,8 +4989,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
} }
if (dlsch1->active == 1) { if (dlsch1->active == 1) {
if ((ndi2!=dlsch1_harq->DCINdi) || if ((ndi2!=dlsch1_harq->DCINdi) || (dlsch1_harq->first_tx==1)) {
(dlsch1_harq->first_tx==1)) {
dlsch1_harq->round = 0; dlsch1_harq->round = 0;
dlsch1_harq->status = ACTIVE; dlsch1_harq->status = ACTIVE;
dlsch1_harq->DCINdi = ndi2; dlsch1_harq->DCINdi = ndi2;
...@@ -4926,7 +5009,7 @@ int generate_ue_dlsch_params_from_dci(int frame, ...@@ -4926,7 +5009,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
} }
} }
dlsch0_harq->mcs = mcs1; // dlsch0_harq->mcs = mcs1;
if (dlsch0_harq->nb_rb>1) { if (dlsch0_harq->nb_rb>1) {
dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1]; dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
...@@ -4936,7 +5019,6 @@ int generate_ue_dlsch_params_from_dci(int frame, ...@@ -4936,7 +5019,6 @@ int generate_ue_dlsch_params_from_dci(int frame,
dlsch0_harq->Qm = (mcs1-28)<<1; dlsch0_harq->Qm = (mcs1-28)<<1;
else else
LOG_E(PHY,"invalid mcs1 %d\n",mcs1); LOG_E(PHY,"invalid mcs1 %d\n",mcs1);
} else } else
dlsch0_harq->TBS =0; dlsch0_harq->TBS =0;
...@@ -4952,7 +5034,7 @@ int generate_ue_dlsch_params_from_dci(int frame, ...@@ -4952,7 +5034,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
} }
dlsch1_harq->DCINdi = ndi2; dlsch1_harq->DCINdi = ndi2;
dlsch1_harq->mcs = mcs2; // dlsch1_harq->mcs = mcs2;
if (dlsch1_harq->nb_rb>1) { if (dlsch1_harq->nb_rb>1) {
dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][dlsch1_harq->nb_rb-1]; dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][dlsch1_harq->nb_rb-1];
......
...@@ -734,7 +734,7 @@ int rx_pdsch(PHY_VARS_UE *phy_vars_ue, ...@@ -734,7 +734,7 @@ int rx_pdsch(PHY_VARS_UE *phy_vars_ue,
((dlsch0_harq->mimo_mode >=DUALSTREAM_UNIFORM_PRECODING1) && ((dlsch0_harq->mimo_mode >=DUALSTREAM_UNIFORM_PRECODING1) &&
(dlsch0_harq->mimo_mode <=DUALSTREAM_PUSCH_PRECODING))) { (dlsch0_harq->mimo_mode <=DUALSTREAM_PUSCH_PRECODING))) {
rxdataF_comp_ptr = lte_ue_pdsch_vars[eNB_id]->rxdataF_comp1[harq_pid][round]; rxdataF_comp_ptr = lte_ue_pdsch_vars[eNB_id]->rxdataF_comp1[harq_pid][round];
dl_ch_mag_ptr = lte_ue_pdsch_vars[eNB_id]->dl_ch_mag1; dl_ch_mag_ptr = lte_ue_pdsch_vars[eNB_id]->dl_ch_mag1[harq_pid][round];
} }
else { else {
rxdataF_comp_ptr = lte_ue_pdsch_vars[eNB_id_i]->rxdataF_comp0; rxdataF_comp_ptr = lte_ue_pdsch_vars[eNB_id_i]->rxdataF_comp0;
...@@ -1011,7 +1011,7 @@ int rx_pdsch(PHY_VARS_UE *phy_vars_ue, ...@@ -1011,7 +1011,7 @@ int rx_pdsch(PHY_VARS_UE *phy_vars_ue,
dlsch_16qam_llr(frame_parms, dlsch_16qam_llr(frame_parms,
rxdataF_comp_ptr, rxdataF_comp_ptr,
lte_ue_pdsch_vars[eNB_id]->llr[1], lte_ue_pdsch_vars[eNB_id]->llr[1],
lte_ue_pdsch_vars[eNB_id]->dl_ch_mag1, lte_ue_pdsch_vars[eNB_id]->dl_ch_mag1[harq_pid][round],
symbol,first_symbol_flag,nb_rb, symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,subframe,symbol), adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,subframe,symbol),
lte_ue_pdsch_vars[eNB_id]->llr128_2ndstream); lte_ue_pdsch_vars[eNB_id]->llr128_2ndstream);
...@@ -1024,8 +1024,8 @@ int rx_pdsch(PHY_VARS_UE *phy_vars_ue, ...@@ -1024,8 +1024,8 @@ int rx_pdsch(PHY_VARS_UE *phy_vars_ue,
dlsch_64qam_llr(frame_parms, dlsch_64qam_llr(frame_parms,
rxdataF_comp_ptr, rxdataF_comp_ptr,
lte_ue_pdsch_vars[eNB_id]->llr[1], lte_ue_pdsch_vars[eNB_id]->llr[1],
lte_ue_pdsch_vars[eNB_id]->dl_ch_mag1, lte_ue_pdsch_vars[eNB_id]->dl_ch_mag1[harq_pid][round],
lte_ue_pdsch_vars[eNB_id]->dl_ch_magb1, lte_ue_pdsch_vars[eNB_id]->dl_ch_magb1[harq_pid][round],
symbol,first_symbol_flag,nb_rb, symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,subframe,symbol), adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,subframe,symbol),
lte_ue_pdsch_vars[eNB_id]->llr128_2ndstream); lte_ue_pdsch_vars[eNB_id]->llr128_2ndstream);
...@@ -1900,9 +1900,9 @@ void dlsch_channel_compensation_TM34(LTE_DL_FRAME_PARMS *frame_parms, ...@@ -1900,9 +1900,9 @@ void dlsch_channel_compensation_TM34(LTE_DL_FRAME_PARMS *frame_parms,
int **rxdataF_ext = lte_ue_pdsch_vars->rxdataF_ext; int **rxdataF_ext = lte_ue_pdsch_vars->rxdataF_ext;
int **dl_ch_estimates_ext = lte_ue_pdsch_vars->dl_ch_estimates_ext; int **dl_ch_estimates_ext = lte_ue_pdsch_vars->dl_ch_estimates_ext;
int **dl_ch_mag0 = lte_ue_pdsch_vars->dl_ch_mag0; int **dl_ch_mag0 = lte_ue_pdsch_vars->dl_ch_mag0;
int **dl_ch_mag1 = lte_ue_pdsch_vars->dl_ch_mag1; int **dl_ch_mag1 = lte_ue_pdsch_vars->dl_ch_mag1[harq_pid][round];
int **dl_ch_magb0 = lte_ue_pdsch_vars->dl_ch_magb0; int **dl_ch_magb0 = lte_ue_pdsch_vars->dl_ch_magb0;
int **dl_ch_magb1 = lte_ue_pdsch_vars->dl_ch_magb1; int **dl_ch_magb1 = lte_ue_pdsch_vars->dl_ch_magb1[harq_pid][round];
int **rxdataF_comp0 = lte_ue_pdsch_vars->rxdataF_comp0; int **rxdataF_comp0 = lte_ue_pdsch_vars->rxdataF_comp0;
int **rxdataF_comp1 = lte_ue_pdsch_vars->rxdataF_comp1[harq_pid][round]; int **rxdataF_comp1 = lte_ue_pdsch_vars->rxdataF_comp1[harq_pid][round];
unsigned char *pmi_ext = lte_ue_pdsch_vars->pmi_ext; unsigned char *pmi_ext = lte_ue_pdsch_vars->pmi_ext;
...@@ -2290,9 +2290,9 @@ void dlsch_channel_compensation_TM34(LTE_DL_FRAME_PARMS *frame_parms, ...@@ -2290,9 +2290,9 @@ void dlsch_channel_compensation_TM34(LTE_DL_FRAME_PARMS *frame_parms,
int **rxdataF_ext = lte_ue_pdsch_vars->rxdataF_ext; int **rxdataF_ext = lte_ue_pdsch_vars->rxdataF_ext;
int **dl_ch_estimates_ext = lte_ue_pdsch_vars->dl_ch_estimates_ext; int **dl_ch_estimates_ext = lte_ue_pdsch_vars->dl_ch_estimates_ext;
int **dl_ch_mag0 = lte_ue_pdsch_vars->dl_ch_mag0; int **dl_ch_mag0 = lte_ue_pdsch_vars->dl_ch_mag0;
int **dl_ch_mag1 = lte_ue_pdsch_vars->dl_ch_mag1; int **dl_ch_mag1 = lte_ue_pdsch_vars->dl_ch_mag1[harq_pid][round];
int **dl_ch_magb0 = lte_ue_pdsch_vars->dl_ch_magb0; int **dl_ch_magb0 = lte_ue_pdsch_vars->dl_ch_magb0;
int **dl_ch_magb1 = lte_ue_pdsch_vars->dl_ch_magb1; int **dl_ch_magb1 = lte_ue_pdsch_vars->dl_ch_magb1[harq_pid][round];
int **rxdataF_comp0 = lte_ue_pdsch_vars->rxdataF_comp0; int **rxdataF_comp0 = lte_ue_pdsch_vars->rxdataF_comp0;
int **rxdataF_comp1 = lte_ue_pdsch_vars->rxdataF_comp1[harq_pid][round]; int **rxdataF_comp1 = lte_ue_pdsch_vars->rxdataF_comp1[harq_pid][round];
...@@ -2968,9 +2968,9 @@ void dlsch_detection_mrc_TM34(LTE_DL_FRAME_PARMS *frame_parms, ...@@ -2968,9 +2968,9 @@ void dlsch_detection_mrc_TM34(LTE_DL_FRAME_PARMS *frame_parms,
int **dl_ch_rho_ext =lte_ue_pdsch_vars->dl_ch_rho_ext[harq_pid][round]; //for second stream int **dl_ch_rho_ext =lte_ue_pdsch_vars->dl_ch_rho_ext[harq_pid][round]; //for second stream
int **dl_ch_rho2_ext =lte_ue_pdsch_vars->dl_ch_rho2_ext; int **dl_ch_rho2_ext =lte_ue_pdsch_vars->dl_ch_rho2_ext;
int **dl_ch_mag0 = lte_ue_pdsch_vars->dl_ch_mag0; int **dl_ch_mag0 = lte_ue_pdsch_vars->dl_ch_mag0;
int **dl_ch_mag1 = lte_ue_pdsch_vars->dl_ch_mag1; int **dl_ch_mag1 = lte_ue_pdsch_vars->dl_ch_mag1[harq_pid][round];
int **dl_ch_magb0 = lte_ue_pdsch_vars->dl_ch_magb0; int **dl_ch_magb0 = lte_ue_pdsch_vars->dl_ch_magb0;
int **dl_ch_magb1 = lte_ue_pdsch_vars->dl_ch_magb1; int **dl_ch_magb1 = lte_ue_pdsch_vars->dl_ch_magb1[harq_pid][round];
if (frame_parms->nb_antennas_rx>1) { if (frame_parms->nb_antennas_rx>1) {
...@@ -3107,7 +3107,7 @@ void dlsch_channel_level(int **dl_ch_estimates_ext, ...@@ -3107,7 +3107,7 @@ void dlsch_channel_level(int **dl_ch_estimates_ext,
short rb; short rb;
unsigned char aatx,aarx,nre=12,symbol_mod; unsigned char aatx,aarx,nre=12,symbol_mod;
__m128i *dl_ch128,avg128D; __m128i *dl_ch128, avg128D;
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol; symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
......
...@@ -624,9 +624,9 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form, ...@@ -624,9 +624,9 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
pdsch_comp1 = (int16_t*) (phy_vars_ue->lte_ue_pdsch_vars[eNB_id]->rxdataF_comp1[0][0])[0]; pdsch_comp1 = (int16_t*) (phy_vars_ue->lte_ue_pdsch_vars[eNB_id]->rxdataF_comp1[0][0])[0];
//pdsch_comp1 = (int16_t*) (phy_vars_ue->lte_ue_pdsch_vars[eNB_id]->dl_ch_rho_ext[0][0])[0]; //pdsch_comp1 = (int16_t*) (phy_vars_ue->lte_ue_pdsch_vars[eNB_id]->dl_ch_rho_ext[0][0])[0];
pdsch_mag0 = (int16_t*) phy_vars_ue->lte_ue_pdsch_vars[eNB_id]->dl_ch_mag0[0]; pdsch_mag0 = (int16_t*) phy_vars_ue->lte_ue_pdsch_vars[eNB_id]->dl_ch_mag0[0];
pdsch_mag1 = (int16_t*) phy_vars_ue->lte_ue_pdsch_vars[eNB_id]->dl_ch_mag1[0]; pdsch_mag1 = (int16_t*) (phy_vars_ue->lte_ue_pdsch_vars[eNB_id]->dl_ch_mag1[0][0])[0];
pdsch_magb0 = (int16_t*) phy_vars_ue->lte_ue_pdsch_vars[eNB_id]->dl_ch_magb0[0]; pdsch_magb0 = (int16_t*) phy_vars_ue->lte_ue_pdsch_vars[eNB_id]->dl_ch_magb0[0];
pdsch_magb1 = (int16_t*) phy_vars_ue->lte_ue_pdsch_vars[eNB_id]->dl_ch_magb1[0]; pdsch_magb1 = (int16_t*) (phy_vars_ue->lte_ue_pdsch_vars[eNB_id]->dl_ch_magb1[0][0])[0];
fl_freeze_form(form->lte_phy_scope_ue); fl_freeze_form(form->lte_phy_scope_ue);
......
...@@ -678,6 +678,13 @@ typedef struct { ...@@ -678,6 +678,13 @@ typedef struct {
time_stats_t dlsch_tc_intl2_stats; time_stats_t dlsch_tc_intl2_stats;
time_stats_t tx_prach; time_stats_t tx_prach;
//for SIC
time_stats_t dlsch_encoding_SIC_stats;
time_stats_t dlsch_scrambling_SIC_stats;
time_stats_t dlsch_modulation_SIC_stats;
time_stats_t dlsch_llr_stripping_unit_SIC_stats;
time_stats_t dlsch_unscrambling_SIC_stats;
#if ENABLE_RAL #if ENABLE_RAL
hash_table_t *ral_thresholds_timed; hash_table_t *ral_thresholds_timed;
SLIST_HEAD(ral_thresholds_gen_poll_s, ral_threshold_phy_t) ral_thresholds_gen_polled[RAL_LINK_PARAM_GEN_MAX]; SLIST_HEAD(ral_thresholds_gen_poll_s, ral_threshold_phy_t) ral_thresholds_gen_polled[RAL_LINK_PARAM_GEN_MAX];
......
...@@ -819,7 +819,7 @@ typedef struct { ...@@ -819,7 +819,7 @@ typedef struct {
/// \brief Magnitude of Downlink Channel second layer (16QAM level/First 64QAM level). /// \brief Magnitude of Downlink Channel second layer (16QAM level/First 64QAM level).
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx /// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_DL[ /// - second index: ? [0..168*N_RB_DL[
int32_t **dl_ch_mag1; int32_t **dl_ch_mag1[8][8];
/// \brief Magnitude of Downlink Channel, first layer (2nd 64QAM level). /// \brief Magnitude of Downlink Channel, first layer (2nd 64QAM level).
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx /// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_DL[ /// - second index: ? [0..168*N_RB_DL[
...@@ -827,7 +827,7 @@ typedef struct { ...@@ -827,7 +827,7 @@ typedef struct {
/// \brief Magnitude of Downlink Channel second layer (2nd 64QAM level). /// \brief Magnitude of Downlink Channel second layer (2nd 64QAM level).
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx /// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_DL[ /// - second index: ? [0..168*N_RB_DL[
int32_t **dl_ch_magb1; int32_t **dl_ch_magb1[8][8];
/// \brief Cross-correlation of two eNB signals. /// \brief Cross-correlation of two eNB signals.
/// - first index: rx antenna [0..nb_antennas_rx[ /// - first index: rx antenna [0..nb_antennas_rx[
/// - second index: symbol [0..] /// - second index: symbol [0..]
......
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