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OpenXG UE
Commit a64f70b3 authored by Florian Kaltenberger's avatar Florian Kaltenberger
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Merge branch 'nr_ue_fapi_improvements' into 'develop-nr' 

Nr ue fapi improvements

See merge request oai/openairinterface5g!618
parents 43591877 b842d7d7
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Showing with 163 additions and 270 deletions
executables/nr-ue.c
View file @ a64f70b3
...@@ -350,39 +350,42 @@ static void UE_synch(void *arg) { ...@@ -350,39 +350,42 @@ static void UE_synch(void *arg) {
} }
void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
nr_dcireq_t dcireq;
nr_scheduled_response_t scheduled_response;
// Process Rx data for one sub-frame // Process Rx data for one sub-frame
if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_DOWNLINK_SLOT) { if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_DOWNLINK_SLOT) {
//clean previous FAPI MESSAGE //TODO: all of this has to be moved to the MAC!!!
UE->rx_ind.number_pdus = 0; dcireq.module_id = UE->Mod_id;
UE->dci_ind.number_of_dcis = 0; dcireq.gNB_index = 0;
//clean previous FAPI MESSAGE dcireq.cc_id = 0;
// call L2 for DL_CONFIG (DCI) dcireq.frame = proc->frame_rx;
UE->dcireq.module_id = UE->Mod_id; dcireq.slot = proc->nr_tti_rx;
UE->dcireq.gNB_index = 0; nr_ue_dcireq(&dcireq); //to be replaced with function pointer later
UE->dcireq.cc_id = 0;
UE->dcireq.frame = proc->frame_rx; scheduled_response.dl_config = &dcireq.dl_config_req;
UE->dcireq.slot = proc->nr_tti_rx; scheduled_response.ul_config = NULL;
nr_ue_dcireq(&UE->dcireq); //to be replaced with function pointer later scheduled_response.tx_request = NULL;
NR_UE_MAC_INST_t *UE_mac = get_mac_inst(0); scheduled_response.module_id = UE->Mod_id;
UE_mac->scheduled_response.dl_config = &UE->dcireq.dl_config_req; scheduled_response.CC_id = 0;
UE_mac->scheduled_response.ul_config = NULL; scheduled_response.frame = proc->frame_rx;
UE_mac->scheduled_response.tx_request = NULL; scheduled_response.slot = proc->nr_tti_rx;
UE_mac->scheduled_response.module_id = UE->Mod_id; nr_ue_scheduled_response(&scheduled_response);
UE_mac->scheduled_response.CC_id = 0;
UE_mac->scheduled_response.frame = proc->frame_rx;
UE_mac->scheduled_response.slot = proc->nr_tti_rx;
nr_ue_scheduled_response(&UE_mac->scheduled_response);
//write_output("uerxdata_frame.m", "uerxdata_frame", UE->common_vars.rxdata[0], UE->frame_parms.samples_per_frame, 1, 1);
#ifdef UE_SLOT_PARALLELISATION #ifdef UE_SLOT_PARALLELISATION
phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL ); phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
#else #else
uint64_t a=rdtsc(); uint64_t a=rdtsc();
phy_procedures_nrUE_RX( UE, proc, 0, 1, UE->mode, UE_mac->phy_config.config_req.pbch_config); phy_procedures_nrUE_RX( UE, proc, 0, 1, UE->mode);
LOG_D(PHY,"phy_procedures_nrUE_RX: slot:%d, time %lu\n", proc->nr_tti_rx, (rdtsc()-a)/3500); LOG_D(PHY,"phy_procedures_nrUE_RX: slot:%d, time %lu\n", proc->nr_tti_rx, (rdtsc()-a)/3500);
//printf(">>> nr_ue_pdcch_procedures ended\n"); //printf(">>> nr_ue_pdcch_procedures ended\n");
#endif #endif
} }
// no UL for now
/*
if (UE->mac_enabled==1) { if (UE->mac_enabled==1) {
// trigger L2 to run ue_scheduler thru IF module // trigger L2 to run ue_scheduler thru IF module
// [TODO] mapping right after NR initial sync // [TODO] mapping right after NR initial sync
...@@ -395,6 +398,7 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { ...@@ -395,6 +398,7 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
UE->if_inst->ul_indication(&UE->ul_indication); UE->if_inst->ul_indication(&UE->ul_indication);
} }
} }
*/
} }
/*! /*!
......
maketags
View file @ a64f70b3
#!/bin/sh #!/bin/sh
echo "building ctags for openair1 and openair2 ..." echo "building ctags for openair1 and openair2 ..."
ctags -e -R --exclude=openair1/DOCS/ --exclude=openair2/DOCS/ --exclude=openair1/SIMULATION/ --exclude=targets/DOCS/ --exclude=targets/PROJECTS/ openair1 openair2 openair3 targets cmake_targets common nfapi ctags -e -R --exclude=openair1/DOCS/ --exclude=openair2/DOCS/ --exclude=openair1/SIMULATION/ --exclude=targets/DOCS/ --exclude=targets/PROJECTS/ openair1 openair2 openair3 targets cmake_targets common nfapi executables
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
View file @ a64f70b3
...@@ -237,9 +237,9 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue, ...@@ -237,9 +237,9 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
uint32_t Tbslbrm = 950984; uint32_t Tbslbrm = 950984;
uint16_t nb_rb = 30; uint16_t nb_rb = 30;
double Coderate = 0.0; double Coderate = 0.0;
nfapi_nr_config_request_t *cfg = &phy_vars_ue->nrUE_config; //nfapi_nr_config_request_t *cfg = &phy_vars_ue->nrUE_config;
uint8_t dmrs_type = cfg->pdsch_config.dmrs_type.value; //uint8_t dmrs_type = cfg->pdsch_config.dmrs_type.value;
uint8_t nb_re_dmrs = (dmrs_type==NFAPI_NR_DMRS_TYPE1)?6:4; uint8_t nb_re_dmrs = 6; //(dmrs_type==NFAPI_NR_DMRS_TYPE1)?6:4;
uint16_t length_dmrs = 1; //cfg->pdsch_config.dmrs_max_length.value; uint16_t length_dmrs = 1; //cfg->pdsch_config.dmrs_max_length.value;
uint32_t i,j; uint32_t i,j;
......
openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
View file @ a64f70b3
...@@ -566,8 +566,8 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue, ...@@ -566,8 +566,8 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
} }
uint32_t payload = 0; uint32_t payload = 0;
uint8_t xtra_byte = 0; //uint8_t xtra_byte = 0;
xtra_byte = (out>>24)&0xff; nr_ue_pbch_vars->xtra_byte = (out>>24)&0xff;
for (int i=0; i<NR_POLAR_PBCH_PAYLOAD_BITS; i++) for (int i=0; i<NR_POLAR_PBCH_PAYLOAD_BITS; i++)
payload |= ((out>>i)&1)<<(NR_POLAR_PBCH_PAYLOAD_BITS-i-1); payload |= ((out>>i)&1)<<(NR_POLAR_PBCH_PAYLOAD_BITS-i-1);
...@@ -575,18 +575,18 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue, ...@@ -575,18 +575,18 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
for (int i=0; i<3; i++) for (int i=0; i<3; i++)
decoded_output[i] = (uint8_t)((payload>>((3-i)<<3))&0xff); decoded_output[i] = (uint8_t)((payload>>((3-i)<<3))&0xff);
n_hf = ((xtra_byte>>4)&0x01); // computing the half frame index from the extra byte n_hf = ((nr_ue_pbch_vars->xtra_byte>>4)&0x01); // computing the half frame index from the extra byte
ssb_index = i_ssb; // ssb index corresponds to i_ssb for Lmax = 4,8 ssb_index = i_ssb; // ssb index corresponds to i_ssb for Lmax = 4,8
if (Lmax == 64) { // for Lmax = 64 ssb index 4th,5th and 6th bits are in extra byte if (Lmax == 64) { // for Lmax = 64 ssb index 4th,5th and 6th bits are in extra byte
for (int i=0; i<3; i++) for (int i=0; i<3; i++)
ssb_index += (((xtra_byte>>(7-i))&0x01)<<(3+i)); ssb_index += (((nr_ue_pbch_vars->xtra_byte>>(7-i))&0x01)<<(3+i));
} }
ue->symbol_offset = nr_get_ssb_start_symbol(frame_parms, ssb_index, n_hf); ue->symbol_offset = nr_get_ssb_start_symbol(frame_parms, ssb_index, n_hf);
#ifdef DEBUG_PBCH #ifdef DEBUG_PBCH
printf("xtra_byte %x payload %x\n", xtra_byte, payload); printf("xtra_byte %x payload %x\n", nr_ue_pbch_vars->xtra_byte, payload);
for (int i=0; i<(NR_POLAR_PBCH_PAYLOAD_BITS>>3); i++) { for (int i=0; i<(NR_POLAR_PBCH_PAYLOAD_BITS>>3); i++) {
// printf("unscrambling pbch_a[%d] = %x \n", i,pbch_a[i]); // printf("unscrambling pbch_a[%d] = %x \n", i,pbch_a[i]);
...@@ -594,19 +594,25 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue, ...@@ -594,19 +594,25 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
} }
#endif #endif
ue->dl_indication.rx_ind = &ue->rx_ind; // hang on rx_ind instance nr_downlink_indication_t dl_indication;
ue->dl_indication.proc=proc; fapi_nr_rx_indication_t rx_ind;
//ue->rx_ind.sfn_slot = 0; //should be set by higher-1-layer, i.e. clean_and_set_if_instance()
ue->rx_ind.rx_indication_body[0].pdu_type = FAPI_NR_RX_PDU_TYPE_MIB; dl_indication.rx_ind = &rx_ind; // hang on rx_ind instance
ue->rx_ind.rx_indication_body[0].mib_pdu.pdu = &decoded_output[0]; dl_indication.dci_ind = NULL;
ue->rx_ind.rx_indication_body[0].mib_pdu.additional_bits = xtra_byte; dl_indication.proc=proc; // needed to signal back the frame number -> FIXME
ue->rx_ind.rx_indication_body[0].mib_pdu.ssb_index = i_ssb; // confirm with TCL dl_indication.module_id=0;
ue->rx_ind.rx_indication_body[0].mib_pdu.ssb_length = Lmax; // confirm with TCL dl_indication.cc_id=proc->CC_id;
ue->rx_ind.rx_indication_body[0].mib_pdu.cell_id = frame_parms->Nid_cell; // confirm with TCL
ue->rx_ind.number_pdus = 1; rx_ind.rx_indication_body[0].pdu_type = FAPI_NR_RX_PDU_TYPE_MIB;
rx_ind.rx_indication_body[0].mib_pdu.pdu = &decoded_output[0]; //not good as it is pointing to a memory that can change
rx_ind.rx_indication_body[0].mib_pdu.additional_bits = nr_ue_pbch_vars->xtra_byte;
rx_ind.rx_indication_body[0].mib_pdu.ssb_index = i_ssb; // confirm with TCL
rx_ind.rx_indication_body[0].mib_pdu.ssb_length = Lmax; // confirm with TCL
rx_ind.rx_indication_body[0].mib_pdu.cell_id = frame_parms->Nid_cell; // confirm with TCL
rx_ind.number_pdus = 1;
if (ue->if_inst && ue->if_inst->dl_indication) if (ue->if_inst && ue->if_inst->dl_indication)
ue->if_inst->dl_indication(&ue->dl_indication); ue->if_inst->dl_indication(&dl_indication);
return 0; return 0;
} }
openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
View file @ a64f70b3
...@@ -50,15 +50,12 @@ int generate_ue_ulsch_params(PHY_VARS_NR_UE *UE, ...@@ -50,15 +50,12 @@ int generate_ue_ulsch_params(PHY_VARS_NR_UE *UE,
unsigned char harq_pid){ unsigned char harq_pid){
int N_PRB_oh, N_RE_prime, cwd_idx, length_dmrs, Nid_cell; int N_PRB_oh, N_RE_prime, cwd_idx, length_dmrs, Nid_cell;
int nb_rb, Nsymb_pusch, first_rb, nb_codewords; int nb_rb, Nsymb_pusch, first_rb, nb_codewords,mcs,rvidx;
uint16_t n_rnti; uint16_t n_rnti;
fapi_nr_dci_pdu_rel15_t *ul_dci_pdu;
NR_UE_ULSCH_t *ulsch_ue; NR_UE_ULSCH_t *ulsch_ue;
NR_UL_UE_HARQ_t *harq_process_ul_ue; NR_UL_UE_HARQ_t *harq_process_ul_ue;
ul_dci_pdu = &UE->dci_ind.dci_list[0].dci;
//--------------------------Temporary configuration-----------------------------// //--------------------------Temporary configuration-----------------------------//
length_dmrs = 1; length_dmrs = 1;
n_rnti = 0x1234; n_rnti = 0x1234;
...@@ -66,7 +63,9 @@ int generate_ue_ulsch_params(PHY_VARS_NR_UE *UE, ...@@ -66,7 +63,9 @@ int generate_ue_ulsch_params(PHY_VARS_NR_UE *UE,
nb_rb = 50; nb_rb = 50;
first_rb = 30; first_rb = 30;
Nsymb_pusch = 12; Nsymb_pusch = 12;
nb_codewords = (ul_dci_pdu->precod_nbr_layers>4)?2:1; nb_codewords = 1;
mcs = 9;
rvidx = 0;
//------------------------------------------------------------------------------// //------------------------------------------------------------------------------//
for (cwd_idx = 0; cwd_idx < nb_codewords; cwd_idx++) { for (cwd_idx = 0; cwd_idx < nb_codewords; cwd_idx++) {
...@@ -87,19 +86,19 @@ int generate_ue_ulsch_params(PHY_VARS_NR_UE *UE, ...@@ -87,19 +86,19 @@ int generate_ue_ulsch_params(PHY_VARS_NR_UE *UE,
if (harq_process_ul_ue) { if (harq_process_ul_ue) {
harq_process_ul_ue->mcs = ul_dci_pdu->mcs; harq_process_ul_ue->mcs = mcs;
harq_process_ul_ue->Nl = ul_dci_pdu->precod_nbr_layers; harq_process_ul_ue->Nl = nb_codewords;
harq_process_ul_ue->nb_rb = nb_rb; harq_process_ul_ue->nb_rb = nb_rb;
harq_process_ul_ue->first_rb = first_rb; harq_process_ul_ue->first_rb = first_rb;
harq_process_ul_ue->number_of_symbols = Nsymb_pusch; harq_process_ul_ue->number_of_symbols = Nsymb_pusch;
harq_process_ul_ue->num_of_mod_symbols = N_RE_prime*nb_rb*nb_codewords; harq_process_ul_ue->num_of_mod_symbols = N_RE_prime*nb_rb*nb_codewords;
harq_process_ul_ue->rvidx = ul_dci_pdu->rv; harq_process_ul_ue->rvidx = rvidx;
harq_process_ul_ue->TBS = nr_compute_tbs(ul_dci_pdu->mcs, harq_process_ul_ue->TBS = nr_compute_tbs(harq_process_ul_ue->mcs,
nb_rb, nb_rb,
Nsymb_pusch, Nsymb_pusch,
ulsch_ue->nb_re_dmrs, ulsch_ue->nb_re_dmrs,
length_dmrs, length_dmrs,
ul_dci_pdu->precod_nbr_layers); harq_process_ul_ue->Nl);
} }
......
openair1/PHY/defs_nr_UE.h
View file @ a64f70b3
...@@ -822,6 +822,8 @@ typedef struct { ...@@ -822,6 +822,8 @@ typedef struct {
/// \brief Pointer to PBCH decoded output. /// \brief Pointer to PBCH decoded output.
/// - first index: ? [0..63] (hard coded) /// - first index: ? [0..63] (hard coded)
uint8_t *decoded_output; uint8_t *decoded_output;
/// \brief PBCH additional bits
uint8_t xtra_byte;
/// \brief Total number of PDU errors. /// \brief Total number of PDU errors.
uint32_t pdu_errors; uint32_t pdu_errors;
/// \brief Total number of PDU errors 128 frames ago. /// \brief Total number of PDU errors 128 frames ago.
...@@ -923,18 +925,22 @@ typedef struct { ...@@ -923,18 +925,22 @@ typedef struct {
NR_UE_COMMON common_vars; NR_UE_COMMON common_vars;
nr_ue_if_module_t *if_inst; nr_ue_if_module_t *if_inst;
nfapi_nr_config_request_t nrUE_config;
nr_downlink_indication_t dl_indication; //nfapi_nr_config_request_t nrUE_config; <-- don't use config type for gNB!!!
nr_uplink_indication_t ul_indication; fapi_nr_config_request_t nrUE_config;
// the following structures are not part of PHY_vars_UE anymore as it is not thread safe. They are now on the stack of the functions that actually need them
//nr_downlink_indication_t dl_indication;
//nr_uplink_indication_t ul_indication;
/// UE FAPI DCI request /// UE FAPI DCI request
nr_dcireq_t dcireq; //nr_dcireq_t dcireq;
// pointers to the next 2 strcutres are also included in dl_indictation // pointers to the next 2 strcutres are also included in dl_indictation
/// UE FAPI indication for DLSCH reception /// UE FAPI indication for DLSCH reception
fapi_nr_rx_indication_t rx_ind; //fapi_nr_rx_indication_t rx_ind;
/// UE FAPI indication for DCI reception /// UE FAPI indication for DCI reception
fapi_nr_dci_indication_t dci_ind; //fapi_nr_dci_indication_t dci_ind;
// point to the current rxTx thread index // point to the current rxTx thread index
uint8_t current_thread_id[40]; uint8_t current_thread_id[40];
......
openair1/SCHED_NR_UE/defs.h
View file @ a64f70b3
...@@ -123,7 +123,7 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t e ...@@ -123,7 +123,7 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t e
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying @param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
@param phy_vars_rn pointer to RN variables @param phy_vars_rn pointer to RN variables
*/ */
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t do_pdcch_flag,runmode_t mode,fapi_nr_pbch_config_t pbch_config); int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t do_pdcch_flag,runmode_t mode);
int phy_procedures_slot_parallelization_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type); int phy_procedures_slot_parallelization_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type);
......
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
View file @ a64f70b3
...@@ -49,10 +49,10 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ ...@@ -49,10 +49,10 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
uint8_t cc_id = scheduled_response->CC_id; uint8_t cc_id = scheduled_response->CC_id;
uint32_t i; uint32_t i;
int slot = scheduled_response->slot; int slot = scheduled_response->slot;
uint8_t thread_id = PHY_vars_UE_g[module_id][cc_id]->current_thread_id[slot];
if(scheduled_response != NULL){ if(scheduled_response != NULL){
// Note: we have to handle the thread IDs for this. To be revisited completely. // Note: we have to handle the thread IDs for this. To be revisited completely.
uint8_t thread_id = PHY_vars_UE_g[module_id][cc_id]->current_thread_id[slot];
NR_UE_PDCCH *pdcch_vars2 = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0]; NR_UE_PDCCH *pdcch_vars2 = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0];
NR_UE_DLSCH_t *dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[thread_id][0][0]; NR_UE_DLSCH_t *dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[thread_id][0][0];
NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[thread_id][0][0]; NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[thread_id][0][0];
...@@ -147,6 +147,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ ...@@ -147,6 +147,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
ulsch0->harq_processes[current_harq_pid]->mcs = pusch_config_pdu->mcs; ulsch0->harq_processes[current_harq_pid]->mcs = pusch_config_pdu->mcs;
ulsch0->harq_processes[current_harq_pid]->DCINdi = pusch_config_pdu->ndi; ulsch0->harq_processes[current_harq_pid]->DCINdi = pusch_config_pdu->ndi;
ulsch0->harq_processes[current_harq_pid]->rvidx = pusch_config_pdu->rv; ulsch0->harq_processes[current_harq_pid]->rvidx = pusch_config_pdu->rv;
ulsch0->harq_processes[current_harq_pid]->Nl = pusch_config_pdu->n_layers;
ulsch0->f_pusch = pusch_config_pdu->absolute_delta_PUSCH; ulsch0->f_pusch = pusch_config_pdu->absolute_delta_PUSCH;
} }
if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUCCH){ if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUCCH){
...@@ -213,6 +214,8 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ ...@@ -213,6 +214,8 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){ int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){
fapi_nr_config_request_t nrUE_config = PHY_vars_UE_g[phy_config->Mod_id][phy_config->CC_id]->nrUE_config;
if(phy_config != NULL){ if(phy_config != NULL){
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_PBCH){ if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_PBCH){
LOG_I(MAC,"[L1][IF module][PHY CONFIG]\n"); LOG_I(MAC,"[L1][IF module][PHY CONFIG]\n");
...@@ -227,6 +230,8 @@ int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){ ...@@ -227,6 +230,8 @@ int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){
LOG_I(MAC,"half frame bit: %d\n", phy_config->config_req.pbch_config.half_frame_bit); LOG_I(MAC,"half frame bit: %d\n", phy_config->config_req.pbch_config.half_frame_bit);
LOG_I(MAC,"-------------------------------\n"); LOG_I(MAC,"-------------------------------\n");
memcpy(&nrUE_config.pbch_config,&phy_config->config_req.pbch_config,sizeof(fapi_nr_pbch_config_t));
} }
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON){ if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON){
......
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @ a64f70b3
...@@ -2467,7 +2467,6 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t g ...@@ -2467,7 +2467,6 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t g
NR_DL_FRAME_PARMS *frame_parms=&ue->frame_parms; NR_DL_FRAME_PARMS *frame_parms=&ue->frame_parms;
fapi_nr_dci_pdu_rel15_t *ul_dci_pdu;
NR_UE_ULSCH_t *ulsch_ue; NR_UE_ULSCH_t *ulsch_ue;
NR_UL_UE_HARQ_t *harq_process_ul_ue; NR_UL_UE_HARQ_t *harq_process_ul_ue;
//int32_t ulsch_start=0; //int32_t ulsch_start=0;
...@@ -2483,7 +2482,6 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t g ...@@ -2483,7 +2482,6 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t g
start_meas(&ue->phy_proc_tx); start_meas(&ue->phy_proc_tx);
#endif #endif
ul_dci_pdu = &ue->dci_ind.dci_list[0].dci;
harq_pid = 0; //temporary implementation harq_pid = 0; //temporary implementation
...@@ -2497,7 +2495,7 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t g ...@@ -2497,7 +2495,7 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t g
harq_process_ul_ue = ulsch_ue->harq_processes[harq_pid]; harq_process_ul_ue = ulsch_ue->harq_processes[harq_pid];
TBS = nr_compute_tbs(ul_dci_pdu->mcs, harq_process_ul_ue->nb_rb, ulsch_ue->Nsymb_pusch, ulsch_ue->nb_re_dmrs, ulsch_ue->length_dmrs, ul_dci_pdu->precod_nbr_layers); TBS = nr_compute_tbs( harq_process_ul_ue->mcs, harq_process_ul_ue->nb_rb, ulsch_ue->Nsymb_pusch, ulsch_ue->nb_re_dmrs, ulsch_ue->length_dmrs, harq_process_ul_ue->Nl);
//-----------------------------------------------------// //-----------------------------------------------------//
// to be removed later when MAC is ready // to be removed later when MAC is ready
...@@ -2527,7 +2525,7 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t g ...@@ -2527,7 +2525,7 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t g
nr_ue_pusch_common_procedures(ue, nr_ue_pusch_common_procedures(ue,
slot_tx, slot_tx,
ul_dci_pdu->precod_nbr_layers, harq_process_ul_ue->Nl,
&ue->frame_parms); &ue->frame_parms);
...@@ -2740,7 +2738,7 @@ void nr_ue_pbch_procedures(uint8_t eNB_id, ...@@ -2740,7 +2738,7 @@ void nr_ue_pbch_procedures(uint8_t eNB_id,
ue->pbch_vars[eNB_id], ue->pbch_vars[eNB_id],
&ue->frame_parms, &ue->frame_parms,
eNB_id, eNB_id,
ue->rx_ind.rx_indication_body[0].mib_pdu.ssb_index, ue->nrUE_config.pbch_config.ssb_index,
SISO, SISO,
ue->high_speed_flag); ue->high_speed_flag);
...@@ -2871,6 +2869,10 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id, ...@@ -2871,6 +2869,10 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,
nr_tti_rx,nb_searchspace_total); nr_tti_rx,nb_searchspace_total);
#endif #endif
//FK: we define dci_ind and dl_indication as local variables, this way the call to the mac should be thread safe
fapi_nr_dci_indication_t dci_ind;
nr_downlink_indication_t dl_indication;
// p in TS 38.212 Subclause 10.1, for each active BWP the UE can deal with 3 different CORESETs (including coresetId 0 for common search space) // p in TS 38.212 Subclause 10.1, for each active BWP the UE can deal with 3 different CORESETs (including coresetId 0 for common search space)
//int nb_coreset_total = NR_NBR_CORESET_ACT_BWP; //int nb_coreset_total = NR_NBR_CORESET_ACT_BWP;
unsigned int dci_cnt=0; unsigned int dci_cnt=0;
...@@ -3063,7 +3065,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id, ...@@ -3063,7 +3065,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,
//emos_dump_UE.dci_cnt[nr_tti_rx] = dci_cnt; //emos_dump_UE.dci_cnt[nr_tti_rx] = dci_cnt;
#endif #endif
ue->dci_ind.number_of_dcis = dci_cnt; dci_ind.number_of_dcis = dci_cnt;
for (int i=0; i<dci_cnt; i++) { for (int i=0; i<dci_cnt; i++) {
/* /*
...@@ -3103,12 +3105,12 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id, ...@@ -3103,12 +3105,12 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,
LOG_D(PHY,"<-NR_PDCCH_PHY_PROCEDURES_UE (nr_ue_pdcch_procedures)-> dci_format=%d, rnti=%d, dci_length=%d, dci_pdu[0]=0x%lx, dci_pdu[1]=0x%lx\n",dci_alloc_rx[i].format,dci_alloc_rx[i].rnti,dci_alloc_rx[i].dci_length,dci_alloc_rx[i].dci_pdu[0],dci_alloc_rx[i].dci_pdu[1]); LOG_D(PHY,"<-NR_PDCCH_PHY_PROCEDURES_UE (nr_ue_pdcch_procedures)-> dci_format=%d, rnti=%d, dci_length=%d, dci_pdu[0]=0x%lx, dci_pdu[1]=0x%lx\n",dci_alloc_rx[i].format,dci_alloc_rx[i].rnti,dci_alloc_rx[i].dci_length,dci_alloc_rx[i].dci_pdu[0],dci_alloc_rx[i].dci_pdu[1]);
memset(&ue->dci_ind.dci_list[i].dci,0,sizeof(fapi_nr_dci_pdu_rel15_t)); memset(&dci_ind.dci_list[i].dci,0,sizeof(fapi_nr_dci_pdu_rel15_t));
ue->dci_ind.dci_list[i].rnti = dci_alloc_rx[i].rnti; dci_ind.dci_list[i].rnti = dci_alloc_rx[i].rnti;
ue->dci_ind.dci_list[i].dci_format = dci_alloc_rx[i].format; dci_ind.dci_list[i].dci_format = dci_alloc_rx[i].format;
ue->dci_ind.dci_list[i].n_CCE = dci_alloc_rx[i].firstCCE; dci_ind.dci_list[i].n_CCE = dci_alloc_rx[i].firstCCE;
ue->dci_ind.dci_list[i].N_CCE = (int)dci_alloc_rx[i].L; dci_ind.dci_list[i].N_CCE = (int)dci_alloc_rx[i].L;
status = nr_extract_dci_info(ue, status = nr_extract_dci_info(ue,
eNB_id, eNB_id,
...@@ -3116,7 +3118,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id, ...@@ -3116,7 +3118,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,
dci_alloc_rx[i].dci_length, dci_alloc_rx[i].dci_length,
dci_alloc_rx[i].rnti, dci_alloc_rx[i].rnti,
dci_alloc_rx[i].dci_pdu, dci_alloc_rx[i].dci_pdu,
&ue->dci_ind.dci_list[i].dci, &dci_ind.dci_list[i].dci,
dci_fields_sizes_cnt[i], dci_fields_sizes_cnt[i],
dci_alloc_rx[i].format, dci_alloc_rx[i].format,
nr_tti_rx, nr_tti_rx,
...@@ -3158,16 +3160,16 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id, ...@@ -3158,16 +3160,16 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,
} // end for loop dci_cnt } // end for loop dci_cnt
// fill dl_indication message // fill dl_indication message
ue->dl_indication.module_id = ue->Mod_id; dl_indication.module_id = ue->Mod_id;
ue->dl_indication.cc_id = ue->CC_id; dl_indication.cc_id = ue->CC_id;
ue->dl_indication.gNB_index = eNB_id; dl_indication.gNB_index = eNB_id;
ue->dl_indication.frame = frame_rx; dl_indication.frame = frame_rx;
ue->dl_indication.slot = nr_tti_rx; dl_indication.slot = nr_tti_rx;
ue->dl_indication.rx_ind = NULL; //no data, only dci for now dl_indication.rx_ind = NULL; //no data, only dci for now
ue->dl_indication.dci_ind = &ue->dci_ind; dl_indication.dci_ind = &dci_ind;
// send to mac // send to mac
ue->if_inst->dl_indication(&ue->dl_indication); ue->if_inst->dl_indication(&dl_indication);
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
stop_meas(&ue->dlsch_rx_pdcch_stats); stop_meas(&ue->dlsch_rx_pdcch_stats);
...@@ -3314,165 +3316,6 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id, ...@@ -3314,165 +3316,6 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,
#endif #endif
#if 0
void ue_pmch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc,int eNB_id,int abstraction_flag) {
int nr_tti_rx = proc->nr_tti_rx;
int frame_rx = proc->frame_rx;
int pmch_mcs=-1;
#if defined(Rel10) || defined(Rel14)
int CC_id = ue->CC_id;
#endif
uint8_t sync_area=255;
uint8_t mcch_active;
int l;
int ret=0;
if (is_pmch_subframe(frame_rx,nr_tti_rx,&ue->frame_parms)) {
LOG_D(PHY,"ue calling pmch nr_tti_rx ..\n ");
LOG_D(PHY,"[UE %d] Frame %d, nr_tti_rx %d: Querying for PMCH demodulation\n",
ue->Mod_id,(nr_tti_rx==9?-1:0)+frame_rx,nr_tti_rx);
#if defined(Rel10) || defined(Rel14)
/*pmch_mcs = mac_xface->ue_query_mch(ue->Mod_id,
CC_id,
frame_rx,
nr_tti_rx,
eNB_id,
&sync_area,
&mcch_active);*/
#else
pmch_mcs=-1;
#endif
if (pmch_mcs>=0) {
LOG_D(PHY,"[UE %d] Frame %d, nr_tti_rx %d: Programming PMCH demodulation for mcs %d\n",ue->Mod_id,frame_rx,nr_tti_rx,pmch_mcs);
fill_UE_dlsch_MCH(ue,pmch_mcs,1,0,0);
if (abstraction_flag == 0 ) {
for (l=2; l<12; l++) {
slot_fep_mbsfn(ue,
l,
nr_tti_rx,
0,0);//ue->rx_offset,0);
}
for (l=2; l<12; l++) {
rx_pmch(ue,
0,
nr_tti_rx,
l);
}
ue->dlsch_MCH[0]->harq_processes[0]->G = get_G(&ue->frame_parms,
ue->dlsch_MCH[0]->harq_processes[0]->nb_rb,
ue->dlsch_MCH[0]->harq_processes[0]->rb_alloc_even,
ue->dlsch_MCH[0]->harq_processes[0]->Qm,
1,
2,
frame_rx,
nr_tti_rx,
0);
dlsch_unscrambling(&ue->frame_parms,1,ue->dlsch_MCH[0],
ue->dlsch_MCH[0]->harq_processes[0]->G,
ue->pdsch_vars_MCH[0]->llr[0],0,nr_tti_rx<<1);
#ifdef UE_DLSCH_PARALLELISATION
ret = dlsch_decoding_mthread(ue,proc, eNB_id,
ue->pdsch_vars_MCH[0]->llr[0],
&ue->frame_parms,
ue->dlsch_MCH[0],
ue->dlsch_MCH[0]->harq_processes[0],
frame_rx,
nr_tti_rx,
0,
0,1);
#else
ret = dlsch_decoding(ue,
ue->pdsch_vars_MCH[0]->llr[0],
&ue->frame_parms,
ue->dlsch_MCH[0],
ue->dlsch_MCH[0]->harq_processes[0],
frame_rx,
nr_tti_rx,
0,
0,1);
printf("start pmch dlsch decoding\n");
#endif
} else { // abstraction
#ifdef PHY_ABSTRACTION
ret = dlsch_decoding_emul(ue,
nr_tti_rx,
5, // PMCH
eNB_id);
#endif
}
if (mcch_active == 1)
ue->dlsch_mcch_trials[sync_area][0]++;
else
ue->dlsch_mtch_trials[sync_area][0]++;
if (ret == (1+ue->dlsch_MCH[0]->max_turbo_iterations)) {
if (mcch_active == 1)
ue->dlsch_mcch_errors[sync_area][0]++;
else
ue->dlsch_mtch_errors[sync_area][0]++;
LOG_D(PHY,"[UE %d] Frame %d, nr_tti_rx %d: PMCH in error (%d,%d), not passing to L2 (TBS %d, iter %d,G %d)\n",
ue->Mod_id,
frame_rx,nr_tti_rx,
ue->dlsch_mcch_errors[sync_area][0],
ue->dlsch_mtch_errors[sync_area][0],
ue->dlsch_MCH[0]->harq_processes[0]->TBS>>3,
ue->dlsch_MCH[0]->max_turbo_iterations,
ue->dlsch_MCH[0]->harq_processes[0]->G);
dump_mch(ue,0,ue->dlsch_MCH[0]->harq_processes[0]->G,nr_tti_rx);
#ifdef DEBUG_DLSCH
for (int i=0; i<ue->dlsch_MCH[0]->harq_processes[0]->TBS>>3; i++) {
LOG_T(PHY,"%02x.",ue->dlsch_MCH[0]->harq_processes[0]->c[0][i]);
}
LOG_T(PHY,"\n");
#endif
if (nr_tti_rx==9)
//mac_xface->macphy_exit("Why are we exiting here?");
} else { // decoding successful
#if defined(Rel10) || defined(Rel14)
if (mcch_active == 1) {
/*mac_xface->ue_send_mch_sdu(ue->Mod_id,
CC_id,
frame_rx,
ue->dlsch_MCH[0]->harq_processes[0]->b,
ue->dlsch_MCH[0]->harq_processes[0]->TBS>>3,
eNB_id,// not relevant in eMBMS context
sync_area);*/
ue->dlsch_mcch_received[sync_area][0]++;
if (ue->dlsch_mch_received_sf[nr_tti_rx%5][0] == 1 ) {
ue->dlsch_mch_received_sf[nr_tti_rx%5][0]=0;
} else {
ue->dlsch_mch_received[0]+=1;
ue->dlsch_mch_received_sf[nr_tti_rx][0]=1;
}
}
#endif // Rel10 || Rel14
} // decoding sucessful
} // pmch_mcs>=0
} // is_pmch_subframe=true
}
#endif
void copy_harq_proc_struct(NR_DL_UE_HARQ_t *harq_processes_dest, NR_DL_UE_HARQ_t *current_harq_processes) void copy_harq_proc_struct(NR_DL_UE_HARQ_t *harq_processes_dest, NR_DL_UE_HARQ_t *current_harq_processes)
{ {
...@@ -3703,9 +3546,9 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, ...@@ -3703,9 +3546,9 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
NR_UE_PDSCH *pdsch_vars; NR_UE_PDSCH *pdsch_vars;
uint8_t is_cw0_active = 0; uint8_t is_cw0_active = 0;
uint8_t is_cw1_active = 0; uint8_t is_cw1_active = 0;
nfapi_nr_config_request_t *cfg = &ue->nrUE_config; //nfapi_nr_config_request_t *cfg = &ue->nrUE_config;
uint8_t dmrs_type = cfg->pdsch_config.dmrs_type.value; //uint8_t dmrs_type = cfg->pdsch_config.dmrs_type.value;
uint8_t nb_re_dmrs = (dmrs_type==NFAPI_NR_DMRS_TYPE1)?6:4; uint8_t nb_re_dmrs = 6; //(dmrs_type==NFAPI_NR_DMRS_TYPE1)?6:4;
uint16_t length_dmrs = 1; //cfg->pdsch_config.dmrs_max_length.value; uint16_t length_dmrs = 1; //cfg->pdsch_config.dmrs_max_length.value;
uint16_t nb_symb_sch = 9; uint16_t nb_symb_sch = 9;
...@@ -4244,20 +4087,20 @@ void *UE_thread_slot1_dl_processing(void *arg) { ...@@ -4244,20 +4087,20 @@ void *UE_thread_slot1_dl_processing(void *arg) {
#endif #endif
int is_pbch_in_slot(fapi_nr_pbch_config_t pbch_config, int frame, int slot, int periodicity, uint16_t slots_per_frame) { int is_pbch_in_slot(fapi_nr_pbch_config_t *pbch_config, int frame, int slot, int periodicity, uint16_t slots_per_frame) {
int ssb_slot_decoded = (pbch_config.ssb_index)/2; int ssb_slot_decoded = (pbch_config->ssb_index)/2;
if (periodicity == 5) { if (periodicity == 5) {
// check for pbch in corresponding slot each half frame // check for pbch in corresponding slot each half frame
if (pbch_config.half_frame_bit) if (pbch_config->half_frame_bit)
return(slot == ssb_slot_decoded || slot == ssb_slot_decoded - slots_per_frame/2); return(slot == ssb_slot_decoded || slot == ssb_slot_decoded - slots_per_frame/2);
else else
return(slot == ssb_slot_decoded || slot == ssb_slot_decoded + slots_per_frame/2); return(slot == ssb_slot_decoded || slot == ssb_slot_decoded + slots_per_frame/2);
} }
else { else {
// if the current frame is supposed to contain ssb // if the current frame is supposed to contain ssb
if (!((frame-(pbch_config.system_frame_number))%(periodicity/10))) if (!((frame-(pbch_config->system_frame_number))%(periodicity/10)))
return(slot == ssb_slot_decoded); return(slot == ssb_slot_decoded);
else else
return 0; return 0;
...@@ -4266,8 +4109,7 @@ int is_pbch_in_slot(fapi_nr_pbch_config_t pbch_config, int frame, int slot, int ...@@ -4266,8 +4109,7 @@ int is_pbch_in_slot(fapi_nr_pbch_config_t pbch_config, int frame, int slot, int
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id, int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,
uint8_t do_pdcch_flag,runmode_t mode, uint8_t do_pdcch_flag,runmode_t mode) {
fapi_nr_pbch_config_t pbch_config) {
...@@ -4284,6 +4126,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN ...@@ -4284,6 +4126,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
uint8_t nb_symb_pdcch = pdcch_vars->coreset[0].duration; uint8_t nb_symb_pdcch = pdcch_vars->coreset[0].duration;
uint8_t ssb_periodicity = 10;// ue->ssb_periodicity; // initialized to 5ms in nr_init_ue for scenarios where UE is not configured (otherwise acquired by cell configuration from gNB or LTE) uint8_t ssb_periodicity = 10;// ue->ssb_periodicity; // initialized to 5ms in nr_init_ue for scenarios where UE is not configured (otherwise acquired by cell configuration from gNB or LTE)
uint8_t dci_cnt = 0; uint8_t dci_cnt = 0;
fapi_nr_pbch_config_t *pbch_config = &ue->nrUE_config.pbch_config;
LOG_D(PHY," ****** start RX-Chain for Frame.Slot %d.%d ****** \n", frame_rx%1024, nr_tti_rx); LOG_D(PHY," ****** start RX-Chain for Frame.Slot %d.%d ****** \n", frame_rx%1024, nr_tti_rx);
...@@ -4466,7 +4309,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN ...@@ -4466,7 +4309,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
start_meas(&ue->dlsch_channel_estimation_stats); start_meas(&ue->dlsch_channel_estimation_stats);
#endif #endif
nr_pbch_channel_estimation(ue,0,nr_tti_rx,(ue->symbol_offset+i)%(ue->frame_parms.symbols_per_slot),i-1,(pbch_config.ssb_index)&7,pbch_config.half_frame_bit); nr_pbch_channel_estimation(ue,0,nr_tti_rx,(ue->symbol_offset+i)%(ue->frame_parms.symbols_per_slot),i-1,(pbch_config->ssb_index)&7,pbch_config->half_frame_bit);
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
stop_meas(&ue->dlsch_channel_estimation_stats); stop_meas(&ue->dlsch_channel_estimation_stats);
#endif #endif
......
openair1/SIMULATION/NR_PHY/dlsim.c
View file @ a64f70b3
...@@ -685,6 +685,8 @@ int main(int argc, char **argv) ...@@ -685,6 +685,8 @@ int main(int argc, char **argv)
UE_mac->phy_config.config_req.pbch_config.ssb_index = 0; UE_mac->phy_config.config_req.pbch_config.ssb_index = 0;
UE_mac->phy_config.config_req.pbch_config.half_frame_bit = 0; UE_mac->phy_config.config_req.pbch_config.half_frame_bit = 0;
nr_ue_phy_config_request(&UE_mac->phy_config);
for (SNR=snr0; SNR<snr1; SNR+=.2) { for (SNR=snr0; SNR<snr1; SNR+=.2) {
n_errors = 0; n_errors = 0;
...@@ -735,8 +737,7 @@ int main(int argc, char **argv) ...@@ -735,8 +737,7 @@ int main(int argc, char **argv)
&UE_proc, &UE_proc,
0, 0,
do_pdcch_flag, do_pdcch_flag,
normal_txrx, normal_txrx);
UE_mac->phy_config.config_req.pbch_config);
if (n_trials==1) { if (n_trials==1) {
LOG_M("rxsigF0.m","rxsF0", UE->common_vars.common_vars_rx_data_per_thread[0].rxdataF[0],slot_length_complex_samples_no_prefix,1,1); LOG_M("rxsigF0.m","rxsF0", UE->common_vars.common_vars_rx_data_per_thread[0].rxdataF[0],slot_length_complex_samples_no_prefix,1,1);
...@@ -744,7 +745,7 @@ int main(int argc, char **argv) ...@@ -744,7 +745,7 @@ int main(int argc, char **argv)
LOG_M("rxsigF1.m","rxsF1", UE->common_vars.common_vars_rx_data_per_thread[0].rxdataF[1],slot_length_complex_samples_no_prefix,1,1); LOG_M("rxsigF1.m","rxsF1", UE->common_vars.common_vars_rx_data_per_thread[0].rxdataF[1],slot_length_complex_samples_no_prefix,1,1);
} }
if (UE->dci_ind.number_of_dcis==0) n_errors++; if (UE_mac->dl_config_request.number_pdus==0) n_errors++;
} }
} //noise trials } //noise trials
......
openair1/SIMULATION/NR_PHY/pbchsim.c
View file @ a64f70b3
...@@ -637,10 +637,10 @@ int main(int argc, char **argv) ...@@ -637,10 +637,10 @@ int main(int argc, char **argv)
uint8_t gNB_xtra_byte=0; uint8_t gNB_xtra_byte=0;
for (int i=0; i<8; i++) for (int i=0; i<8; i++)
gNB_xtra_byte |= ((gNB->pbch.pbch_a>>(31-i))&1)<<(7-i); gNB_xtra_byte |= ((gNB->pbch.pbch_a>>(31-i))&1)<<(7-i);
payload_ret = (UE->rx_ind.rx_indication_body->mib_pdu.additional_bits == gNB_xtra_byte); payload_ret = (UE->pbch_vars[0]->xtra_byte == gNB_xtra_byte);
for (i=0;i<3;i++){ for (i=0;i<3;i++){
payload_ret += (UE->rx_ind.rx_indication_body->mib_pdu.pdu[i] == gNB->pbch_pdu[2-i]); payload_ret += (UE->pbch_vars[0]->decoded_output[i] == gNB->pbch_pdu[2-i]);
//printf("pdu byte %d gNB: 0x%02x UE: 0x%02x\n",i,gNB->pbch_pdu[i], UE->rx_ind.rx_indication_body->mib_pdu.pdu[i]); //printf("pdu byte %d gNB: 0x%02x UE: 0x%02x\n",i,gNB->pbch_pdu[i], UE->rx_ind.rx_indication_body->mib_pdu.pdu[i]);
} }
//printf("xtra byte gNB: 0x%02x UE: 0x%02x\n",gNB_xtra_byte, UE->rx_ind.rx_indication_body->mib_pdu.additional_bits); //printf("xtra byte gNB: 0x%02x UE: 0x%02x\n",gNB_xtra_byte, UE->rx_ind.rx_indication_body->mib_pdu.additional_bits);
...@@ -656,7 +656,6 @@ int main(int argc, char **argv) ...@@ -656,7 +656,6 @@ int main(int argc, char **argv)
if (((float)n_errors/(float)n_trials <= target_error_rate) && (n_errors_payload==0)) { if (((float)n_errors/(float)n_trials <= target_error_rate) && (n_errors_payload==0)) {
printf("PBCH test OK\n"); printf("PBCH test OK\n");
printf("Synchronization obtained for i_ssb = %d\n",UE->rx_ind.rx_indication_body[0].mib_pdu.ssb_index);
break; break;
} }
......
openair1/SIMULATION/NR_PHY/ulsim.c
View file @ a64f70b3
...@@ -55,6 +55,7 @@ ...@@ -55,6 +55,7 @@
#include "PHY/TOOLS/tools_defs.h" #include "PHY/TOOLS/tools_defs.h"
#include "PHY/NR_TRANSPORT/nr_sch_dmrs.h" #include "PHY/NR_TRANSPORT/nr_sch_dmrs.h"
#include "PHY/phy_vars.h" #include "PHY/phy_vars.h"
#include "SCHED_NR_UE/fapi_nr_ue_l1.h"
//#include "PHY/MODULATION/modulation_common.h" //#include "PHY/MODULATION/modulation_common.h"
//#include "common/config/config_load_configmodule.h" //#include "common/config/config_load_configmodule.h"
...@@ -170,6 +171,7 @@ int main(int argc, char **argv) { ...@@ -170,6 +171,7 @@ int main(int argc, char **argv) {
int start_symbol = NR_SYMBOLS_PER_SLOT - nb_symb_sch; int start_symbol = NR_SYMBOLS_PER_SLOT - nb_symb_sch;
uint16_t nb_rb = 50; uint16_t nb_rb = 50;
uint8_t Imcs = 9; uint8_t Imcs = 9;
uint8_t precod_nbr_layers = 1;
int gNB_id = 0; int gNB_id = 0;
int ap; int ap;
int tx_offset; int tx_offset;
...@@ -182,7 +184,6 @@ int main(int argc, char **argv) { ...@@ -182,7 +184,6 @@ int main(int argc, char **argv) {
cpuf = get_cpu_freq_GHz(); cpuf = get_cpu_freq_GHz();
fapi_nr_dci_pdu_rel15_t *ul_dci_pdu;
UE_nr_rxtx_proc_t UE_proc; UE_nr_rxtx_proc_t UE_proc;
...@@ -444,11 +445,6 @@ int main(int argc, char **argv) { ...@@ -444,11 +445,6 @@ int main(int argc, char **argv) {
} }
} }
ul_dci_pdu = &UE->dci_ind.dci_list[0].dci;
ul_dci_pdu->mcs = Imcs;
ul_dci_pdu->rv = 0;
ul_dci_pdu->precod_nbr_layers = 1;
unsigned char harq_pid = 0; unsigned char harq_pid = 0;
unsigned int TBS = 8424; unsigned int TBS = 8424;
...@@ -459,14 +455,14 @@ int main(int argc, char **argv) { ...@@ -459,14 +455,14 @@ int main(int argc, char **argv) {
mod_order = nr_get_Qm(Imcs, 1); mod_order = nr_get_Qm(Imcs, 1);
available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, 1); available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, 1);
TBS = nr_compute_tbs(Imcs, nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, ul_dci_pdu->precod_nbr_layers); TBS = nr_compute_tbs(Imcs, nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, precod_nbr_layers);
NR_gNB_ULSCH_t *ulsch_gNB = gNB->ulsch[UE_id+1][0]; NR_gNB_ULSCH_t *ulsch_gNB = gNB->ulsch[UE_id+1][0];
nfapi_nr_ul_config_ulsch_pdu *rel15_ul = &ulsch_gNB->harq_processes[harq_pid]->ulsch_pdu; nfapi_nr_ul_config_ulsch_pdu *rel15_ul = &ulsch_gNB->harq_processes[harq_pid]->ulsch_pdu;
NR_UE_ULSCH_t **ulsch_ue = UE->ulsch[0][0]; NR_UE_ULSCH_t **ulsch_ue = UE->ulsch[0][0];
// --------- setting rel15_ul parameters ---------- // --------- setting rel15_ul parameters for gNB --------
rel15_ul->rnti = n_rnti; rel15_ul->rnti = n_rnti;
rel15_ul->ulsch_pdu_rel15.start_rb = start_rb; rel15_ul->ulsch_pdu_rel15.start_rb = start_rb;
rel15_ul->ulsch_pdu_rel15.number_rbs = nb_rb; rel15_ul->ulsch_pdu_rel15.number_rbs = nb_rb;
...@@ -477,9 +473,41 @@ int main(int argc, char **argv) { ...@@ -477,9 +473,41 @@ int main(int argc, char **argv) {
rel15_ul->ulsch_pdu_rel15.Qm = mod_order; rel15_ul->ulsch_pdu_rel15.Qm = mod_order;
rel15_ul->ulsch_pdu_rel15.mcs = Imcs; rel15_ul->ulsch_pdu_rel15.mcs = Imcs;
rel15_ul->ulsch_pdu_rel15.rv = 0; rel15_ul->ulsch_pdu_rel15.rv = 0;
rel15_ul->ulsch_pdu_rel15.n_layers = ul_dci_pdu->precod_nbr_layers; rel15_ul->ulsch_pdu_rel15.ndi = 0;
rel15_ul->ulsch_pdu_rel15.n_layers = precod_nbr_layers;
/////////////////////////////////////////////////// ///////////////////////////////////////////////////
nr_scheduled_response_t scheduled_response;
fapi_nr_ul_config_request_t ul_config;
//fapi_nr_tx_request_t tx_request;
scheduled_response.module_id = 0;
scheduled_response.CC_id = 0;
scheduled_response.frame = frame;
scheduled_response.slot = slot;
scheduled_response.dl_config = NULL;
scheduled_response.ul_config = &ul_config;
scheduled_response.dl_config = NULL;
ul_config.sfn_slot = slot;
ul_config.number_pdus = 1;
ul_config.ul_config_list[0].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
ul_config.ul_config_list[0].ulsch_config_pdu.rnti = n_rnti;
ul_config.ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.number_rbs = nb_rb;
ul_config.ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.start_rb = start_rb;
ul_config.ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.number_symbols = nb_symb_sch;
ul_config.ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.start_symbol = start_symbol;
ul_config.ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.mcs = Imcs;
ul_config.ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.ndi = 0;
ul_config.ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.rv = 0;
ul_config.ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.n_layers = precod_nbr_layers;
//there are plenty of other parameters that we don't seem to be using for now. e.g.
//ul_config.ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.absolute_delta_PUSCH = 0;
// set FAPI parameters for UE, put them in the scheduled response and call
//nr_ue_scheduled_response(&scheduled_response);
unsigned char *estimated_output_bit; unsigned char *estimated_output_bit;
unsigned char *test_input_bit; unsigned char *test_input_bit;
unsigned int errors_bit = 0; unsigned int errors_bit = 0;
......
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
View file @ a64f70b3
...@@ -72,14 +72,15 @@ int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, fapi_nr ...@@ -72,14 +72,15 @@ int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, fapi_nr
// L2 Abstraction Layer // L2 Abstraction Layer
int8_t handle_dlsch (module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_indication_t *dci_ind, uint8_t *pduP, uint32_t pdu_len){ int8_t handle_dlsch (module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_indication_t *dci_ind, uint8_t *pduP, uint32_t pdu_len){
// return 0; return 0;
/*
return nr_ue_process_dlsch( module_id, return nr_ue_process_dlsch( module_id,
cc_id, cc_id,
gNB_index, gNB_index,
dci_ind, dci_ind,
pduP, pduP,
pdu_len); pdu_len);
*/
} }
int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){ int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
...@@ -156,6 +157,9 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info){ ...@@ -156,6 +157,9 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
(dl_info->dci_ind->dci_list+i)->rnti, (dl_info->dci_ind->dci_list+i)->rnti,
(dl_info->dci_ind->dci_list+i)->dci_format)) << FAPI_NR_DCI_IND; (dl_info->dci_ind->dci_list+i)->dci_format)) << FAPI_NR_DCI_IND;
AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is void!\n" );
nr_ue_if_module_inst[module_id]->scheduled_response(&mac->scheduled_response);
/*switch((dl_info->dci_ind->dci_list+i)->dci_type){ /*switch((dl_info->dci_ind->dci_list+i)->dci_type){
case FAPI_NR_DCI_TYPE_0_0: case FAPI_NR_DCI_TYPE_0_0:
...@@ -242,9 +246,6 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info){ ...@@ -242,9 +246,6 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
dl_info->rx_ind = NULL; dl_info->rx_ind = NULL;
dl_info->dci_ind = NULL; dl_info->dci_ind = NULL;
AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is void!\n" );
nr_ue_if_module_inst[module_id]->scheduled_response(&mac->scheduled_response);
return 0; return 0;
} }
......
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h
View file @ a64f70b3
...@@ -65,6 +65,7 @@ typedef struct { ...@@ -65,6 +65,7 @@ typedef struct {
frame_t frame; frame_t frame;
/// slot /// slot
int slot; int slot;
/// proc is needed to signal back decoded frame number to PHY. However, this is not really FAPI procedure and should be done differently
UE_nr_rxtx_proc_t * proc; UE_nr_rxtx_proc_t * proc;
/// NR UE FAPI-like P7 message, direction: L1 to L2 /// NR UE FAPI-like P7 message, direction: L1 to L2
......
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