bitmap for scheduling dlsch and ulsch in phytest and a bugfix in dlsch coding

openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c

@@ -273,7 +273,7 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms,
   LOG_D(PHY,"new_gNB_dlsch exit flag %d, size of  %ld\n",
 	exit_flag, sizeof(NR_gNB_DLSCH_t));
 
-  free_gNB_dlsch(dlsch,N_RB);
+  free_gNB_dlsch(&dlsch,N_RB);
 
   return(NULL);
 
@@ -323,7 +323,7 @@ int nr_dlsch_encoding(unsigned char *a,
 
   unsigned int G;
   unsigned int crc=1;
-  uint8_t harq_pid = dlsch->harq_ids[frame&2][slot];
+  uint8_t harq_pid = dlsch->harq_ids[frame%2][slot];
   AssertFatal(harq_pid<8 && harq_pid>=0,"illegal harq_pid %d\b",harq_pid);
   nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &dlsch->harq_processes[harq_pid]->pdsch_pdu.pdsch_pdu_rel15;
   uint16_t nb_rb = rel15->rbSize;

openair2/GNB_APP/RRC_nr_paramsvalues.h

@@ -301,7 +301,7 @@
 {GNB_CONFIG_STRING_PRACHMSG1FDM,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM,defint64val:NR_RACH_ConfigGeneric__msg1_FDM_one,TYPE_INT64,0/*72*/},\
 {GNB_CONFIG_STRING_PRACHMSG1FREQUENCYSTART,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart,defint64val:0,TYPE_INT64,0/*73*/},\
 {GNB_CONFIG_STRING_ZEROCORRELATIONZONECONFIG,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig,defint64val:13,TYPE_INT64,0/*74*/},\
-{GNB_CONFIG_STRING_PREAMBLERECEIVEDTARGETPOWER,NULL,0,iptr:&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleReceivedTargetPower,defintval:-118,TYPE_INT32,0/*75*/},\
+{GNB_CONFIG_STRING_PREAMBLERECEIVEDTARGETPOWER,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleReceivedTargetPower,defintval:-118,TYPE_INT64,0/*75*/},\
 {GNB_CONFIG_STRING_PREAMBLETRANSMAX,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleTransMax,defint64val:NR_RACH_ConfigGeneric__preambleTransMax_n10,TYPE_INT64,0/*76*/},\
 {GNB_CONFIG_STRING_POWERRAMPINGSTEP,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.powerRampingStep,defint64val:NR_RACH_ConfigGeneric__powerRampingStep_dB2,TYPE_INT64,0/*77*/},\
 {GNB_CONFIG_STRING_RARESPONSEWINDOW,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.ra_ResponseWindow,defint64val:NR_RACH_ConfigGeneric__ra_ResponseWindow_sl20,TYPE_INT64,0/*78*/},\

openair2/LAYER2/NR_MAC_gNB/config.c

@@ -50,7 +50,7 @@ extern RAN_CONTEXT_t RC;
 //extern int l2_init_gNB(void);
 extern void mac_top_init_gNB(void);
 extern uint8_t nfapi_mode;
-
+uint8_t nr_slots_per_frame[5] = {10, 20, 40, 80, 160};
 
 void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigCommon_t *scc) {
 
@@ -281,6 +281,7 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm
   else LOG_I(PHY,"TDD has been properly configurated\n");
   }
 
+  RC.nrmac[Mod_idP]->common_channels[0].num_slots_per_tdd = (nr_slots_per_frame[*scc->ssbSubcarrierSpacing])>>(7-cfg->tdd_table.tdd_period.value);
 
 /*
   // PDCCH-ConfigCommon

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c

@@ -308,6 +308,14 @@ void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
 }
 */
 
+bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot){
+
+  if((bitmap>>slot)&0x01)
+    return true;
+  else
+    return false;
+}
+
 void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
                                frame_t frame_rxP,
                                sub_frame_t slot_rxP,
@@ -320,6 +328,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
   int               CC_id;
 
   NR_COMMON_channels_t *cc      = RC.nrmac[module_idP]->common_channels;
+
   //nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config = NULL;
 
   start_meas(&RC.nrmac[module_idP]->eNB_scheduler);
@@ -328,10 +337,27 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
   pdcp_run(&ctxt);
   //rrc_rx_tx(&ctxt, CC_id);
 
-  
   RC.nrmac[module_idP]->frame    = frame_rxP;
   RC.nrmac[module_idP]->slot     = slot_rxP;
 
+  uint64_t *dlsch_in_slot_bitmap = &RC.nrmac[module_idP]->dlsch_in_slot_bitmap;  // static bitmap signaling which slot in a tdd period contains dlsch
+  uint64_t *ulsch_in_slot_bitmap = &RC.nrmac[module_idP]->ulsch_in_slot_bitmap;  // static bitmap signaling which slot in a tdd period contains ulsch
+
+  // hardcoding dlsch to be in slot 1
+  if (phy_test && !(slot_txP%cc->num_slots_per_tdd)) {
+    if(slot_txP==0)
+      *dlsch_in_slot_bitmap = 0x02;
+    else
+      *dlsch_in_slot_bitmap = 0x00;
+  }
+
+  // hardcoding ulsch to be in slot 8
+  if (phy_test && !(slot_rxP%cc->num_slots_per_tdd)) {
+    if(slot_rxP==0)
+      *ulsch_in_slot_bitmap = 0x100;
+    else
+      *ulsch_in_slot_bitmap = 0x00;
+  }
 
   // Check if there are downlink symbols in the slot, 
   if (is_nr_DL_slot(cc->ServingCellConfigCommon,slot_txP)) {
@@ -370,7 +396,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
     }
 
     // Phytest scheduling
-  if (phy_test && slot_txP==1){
+    if (phy_test && (is_xlsch_in_slot(*dlsch_in_slot_bitmap,slot_txP%cc->num_slots_per_tdd))) {
         nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP,NULL);
     }
 
@@ -383,7 +409,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
   } //is_nr_DL_slot
 
   if (is_nr_UL_slot(cc->ServingCellConfigCommon,slot_rxP)) { 
-    if (phy_test && slot_rxP==8){
+    if (phy_test && (is_xlsch_in_slot(*ulsch_in_slot_bitmap,slot_rxP%cc->num_slots_per_tdd))){
       nr_schedule_uss_ulsch_phytest(module_idP, frame_rxP, slot_rxP);
     }
   }

openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h

@@ -98,6 +98,8 @@ typedef struct {
   uint8_t vrb_map_UL[100];
   /// number of subframe allocation pattern available for MBSFN sync area
   uint8_t num_sf_allocation_pattern;
+  /// number of slots per TDD period
+  uint8_t num_slots_per_tdd;
 } NR_COMMON_channels_t;
 
 /*! \brief scheduling control information set through an API (not used)*/
@@ -153,6 +155,9 @@ typedef struct gNB_MAC_INST_s {
   nfapi_nr_tx_data_request_t       TX_req[NFAPI_CC_MAX];
   NR_UE_list_t UE_list;
 
+  uint64_t dlsch_in_slot_bitmap;  // static bitmap signaling which slot in a tdd period contains dlsch
+  uint64_t ulsch_in_slot_bitmap;  // static bitmap signaling which slot in a tdd period contains ulsch
+
   /// UL handle
   uint32_t ul_handle;