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OpenXG UE
Commit fb5bad9b authored by Florian Kaltenberger's avatar Florian Kaltenberger
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removing superflous parameter usrp_clrsrc from command line

parent e0190d8a
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Showing with 4 additions and 46 deletions
executables/nr-softmodem-common.h
View file @ fb5bad9b
...@@ -58,7 +58,7 @@ ...@@ -58,7 +58,7 @@
#define CONFIG_HLP_UELOOP "get softmodem (UE) to loop through memory instead of acquiring from HW\n" #define CONFIG_HLP_UELOOP "get softmodem (UE) to loop through memory instead of acquiring from HW\n"
#define CONFIG_HLP_PHYTST "test UE phy layer, mac disabled\n" #define CONFIG_HLP_PHYTST "test UE phy layer, mac disabled\n"
#define CONFIG_HLP_DMAMAP "sets flag for improved EXMIMO UE performance\n" #define CONFIG_HLP_DMAMAP "sets flag for improved EXMIMO UE performance\n"
#define CONFIG_HLP_EXCCLK "tells hardware to use an external clock reference\n" #define CONFIG_HLP_EXCCLK "tells hardware to use a clock reference (0:internal(default), 1:external, 2:gpsdo)\n"
#define CONFIG_HLP_USIM "use XOR autentication algo in case of test usim mode\n" #define CONFIG_HLP_USIM "use XOR autentication algo in case of test usim mode\n"
#define CONFIG_HLP_NOSNGLT "Disables single-thread mode in lte-softmodem\n" #define CONFIG_HLP_NOSNGLT "Disables single-thread mode in lte-softmodem\n"
#define CONFIG_HLP_TADV "Set timing_advance\n" #define CONFIG_HLP_TADV "Set timing_advance\n"
...@@ -91,7 +91,6 @@ ...@@ -91,7 +91,6 @@
#define CONFIG_HLP_DISABLNBIOT "disable nb-iot, even if defined in config\n" #define CONFIG_HLP_DISABLNBIOT "disable nb-iot, even if defined in config\n"
#define CONFIG_HLP_USRP_ARGS "set the arguments to identify USRP (same syntax as in UHD)\n" #define CONFIG_HLP_USRP_ARGS "set the arguments to identify USRP (same syntax as in UHD)\n"
#define CONFIG_HLP_USRP_CLK_SRC "USRP clock source: 'internal' or 'external'\n"
#define CONFIG_HLP_FLOG "Enable online log \n" #define CONFIG_HLP_FLOG "Enable online log \n"
#define CONFIG_HLP_LOGL "Set the global log level, valide options: (9:trace, 8/7:debug, 6:info, 4:warn, 3:error)\n" #define CONFIG_HLP_LOGL "Set the global log level, valide options: (9:trace, 8/7:debug, 6:info, 4:warn, 3:error)\n"
......
executables/nr-uesoftmodem.c
View file @ fb5bad9b
...@@ -225,7 +225,6 @@ int emulate_rf = 0; ...@@ -225,7 +225,6 @@ int emulate_rf = 0;
tpool_t *Tpool; tpool_t *Tpool;
char *usrp_args=NULL; char *usrp_args=NULL;
char *usrp_clksrc=NULL;
/* forward declarations */ /* forward declarations */
void set_default_frame_parms(NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]); void set_default_frame_parms(NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]);
...@@ -657,24 +656,6 @@ void init_openair0(void) { ...@@ -657,24 +656,6 @@ void init_openair0(void) {
if (usrp_args) openair0_cfg[card].sdr_addrs = usrp_args; if (usrp_args) openair0_cfg[card].sdr_addrs = usrp_args;
if (usrp_clksrc) {
if (strcmp(usrp_clksrc, "internal") == 0) {
openair0_cfg[card].clock_source = internal;
LOG_D(PHY, "USRP clock source set as internal\n");
} else if (strcmp(usrp_clksrc, "external") == 0) {
openair0_cfg[card].clock_source = external;
LOG_D(PHY, "USRP clock source set as external\n");
} else if (strcmp(usrp_clksrc, "gpsdo") == 0) {
openair0_cfg[card].clock_source = gpsdo;
LOG_D(PHY, "USRP clock source set as gpsdo\n");
} else {
openair0_cfg[card].clock_source = internal;
LOG_I(PHY, "USRP clock source unknown ('%s'). defaulting to internal\n", usrp_clksrc);
}
} else {
openair0_cfg[card].clock_source = internal;
LOG_I(PHY, "USRP clock source not specified. defaulting to internal\n");
}
} }
} }
......
executables/nr-uesoftmodem.h
View file @ fb5bad9b
...@@ -50,8 +50,7 @@ ...@@ -50,8 +50,7 @@
{"ue-max-power", NULL, 0, iptr:&(tx_max_power[0]), defintval:90, TYPE_INT, 0}, \ {"ue-max-power", NULL, 0, iptr:&(tx_max_power[0]), defintval:90, TYPE_INT, 0}, \
{"r" , CONFIG_HLP_PRB, 0, iptr:&(frame_parms[0]->N_RB_DL), defintval:25, TYPE_UINT, 0}, \ {"r" , CONFIG_HLP_PRB, 0, iptr:&(frame_parms[0]->N_RB_DL), defintval:25, TYPE_UINT, 0}, \
{"dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \ {"dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \
{"usrp-args", CONFIG_HLP_USRP_ARGS, 0, strptr:(char **)&usrp_args, defstrval:"type=b200", TYPE_STRING, 0}, \ {"usrp-args", CONFIG_HLP_USRP_ARGS, 0, strptr:(char **)&usrp_args, defstrval:"type=b200", TYPE_STRING, 0} \
{"usrp-clksrc", CONFIG_HLP_USRP_CLK_SRC,0, strptr:(char **)&usrp_clksrc, defstrval:"internal", TYPE_STRING, 0} \
} }
#define DEFAULT_DLF 2680000000 #define DEFAULT_DLF 2680000000
......
targets/RT/USER/lte-softmodem.h
View file @ fb5bad9b
...@@ -65,7 +65,7 @@ ...@@ -65,7 +65,7 @@
#define CONFIG_HLP_UELOOP "get softmodem (UE) to loop through memory instead of acquiring from HW\n" #define CONFIG_HLP_UELOOP "get softmodem (UE) to loop through memory instead of acquiring from HW\n"
#define CONFIG_HLP_PHYTST "test UE phy layer, mac disabled\n" #define CONFIG_HLP_PHYTST "test UE phy layer, mac disabled\n"
#define CONFIG_HLP_DMAMAP "sets flag for improved EXMIMO UE performance\n" #define CONFIG_HLP_DMAMAP "sets flag for improved EXMIMO UE performance\n"
#define CONFIG_HLP_CLK "tells hardware to use a clock reference (0:internal, 1:external, 2:gpsdo)\n" #define CONFIG_HLP_CLK "tells hardware to use a clock reference (0:internal(default), 1:external, 2:gpsdo)\n"
#define CONFIG_HLP_USIM "use XOR autentication algo in case of test usim mode\n" #define CONFIG_HLP_USIM "use XOR autentication algo in case of test usim mode\n"
#define CONFIG_HLP_NOSNGLT "Disables single-thread mode in lte-softmodem\n" #define CONFIG_HLP_NOSNGLT "Disables single-thread mode in lte-softmodem\n"
#define CONFIG_HLP_TADV "Set timing_advance\n" #define CONFIG_HLP_TADV "Set timing_advance\n"
...@@ -99,7 +99,6 @@ ...@@ -99,7 +99,6 @@
#define CONFIG_HLP_DISABLNBIOT "disable nb-iot, even if defined in config\n" #define CONFIG_HLP_DISABLNBIOT "disable nb-iot, even if defined in config\n"
#define CONFIG_HLP_USRP_ARGS "set the arguments to identify USRP (same syntax as in UHD)\n" #define CONFIG_HLP_USRP_ARGS "set the arguments to identify USRP (same syntax as in UHD)\n"
#define CONFIG_HLP_USRP_CLK_SRC "USRP clock source: 'internal' or 'external'\n"
/***************************************************************************************************************************************/ /***************************************************************************************************************************************/
/* command line options definitions, CMDLINE_XXXX_DESC macros are used to initialize paramdef_t arrays which are then used as argument /* command line options definitions, CMDLINE_XXXX_DESC macros are used to initialize paramdef_t arrays which are then used as argument
...@@ -150,8 +149,7 @@ ...@@ -150,8 +149,7 @@
{"num-ues", NULL, 0, u8ptr:&(NB_UE_INST), defuintval:1, TYPE_UINT8, 0}, \ {"num-ues", NULL, 0, u8ptr:&(NB_UE_INST), defuintval:1, TYPE_UINT8, 0}, \
{"r" , CONFIG_HLP_PRB, 0, u8ptr:&(frame_parms[0]->N_RB_DL), defintval:25, TYPE_UINT8, 0}, \ {"r" , CONFIG_HLP_PRB, 0, u8ptr:&(frame_parms[0]->N_RB_DL), defintval:25, TYPE_UINT8, 0}, \
{"dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \ {"dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \
{"usrp-args", CONFIG_HLP_USRP_ARGS, 0, strptr:(char **)&usrp_args, defstrval:"type=b200", TYPE_STRING, 0}, \ {"usrp-args", CONFIG_HLP_USRP_ARGS, 0, strptr:(char **)&usrp_args, defstrval:"type=b200", TYPE_STRING, 0} \
{"usrp-clksrc", CONFIG_HLP_USRP_CLK_SRC,0, strptr:(char **)&usrp_clksrc, defstrval:"internal", TYPE_STRING, 0} \
} }
#define DEFAULT_DLF 2680000000 #define DEFAULT_DLF 2680000000
......
targets/RT/USER/lte-uesoftmodem.c
View file @ fb5bad9b
...@@ -224,7 +224,6 @@ char *parallel_config = NULL; ...@@ -224,7 +224,6 @@ char *parallel_config = NULL;
char *worker_config = NULL; char *worker_config = NULL;
char* usrp_args=NULL; char* usrp_args=NULL;
char* usrp_clksrc=NULL;
static THREAD_STRUCT thread_struct; static THREAD_STRUCT thread_struct;
void set_parallel_conf(char *parallel_conf) void set_parallel_conf(char *parallel_conf)
...@@ -745,24 +744,6 @@ void init_openair0(LTE_DL_FRAME_PARMS *frame_parms,int rxgain) { ...@@ -745,24 +744,6 @@ void init_openair0(LTE_DL_FRAME_PARMS *frame_parms,int rxgain) {
} }
if (usrp_args) openair0_cfg[card].sdr_addrs = usrp_args; if (usrp_args) openair0_cfg[card].sdr_addrs = usrp_args;
if (usrp_clksrc) {
if (strcmp(usrp_clksrc, "internal") == 0) {
openair0_cfg[card].clock_source = internal;
LOG_D(PHY, "USRP clock source set as internal\n");
} else if (strcmp(usrp_clksrc, "external") == 0) {
openair0_cfg[card].clock_source = external;
LOG_D(PHY, "USRP clock source set as external\n");
} else if (strcmp(usrp_clksrc, "gpsdo") == 0) {
openair0_cfg[card].clock_source = gpsdo;
LOG_D(PHY, "USRP clock source set as gpsdo\n");
} else {
openair0_cfg[card].clock_source = internal;
LOG_I(PHY, "USRP clock source unknown ('%s'). defaulting to internal\n", usrp_clksrc);
}
} else {
openair0_cfg[card].clock_source = internal;
LOG_I(PHY, "USRP clock source not specified. defaulting to internal\n");
}
} }
} }
......
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