Commit 0d9d4f55 authored by francescomani's avatar francescomani

further improvements in tda lists

parent 91f8f887
......@@ -87,6 +87,7 @@ typedef struct {
typedef struct {
uint16_t rnti;
uint8_t dci_format;
uint8_t CoreSetType;
int ss_type;
// n_CCE index of first CCE for PDCCH reception
int n_CCE;
......
......@@ -935,6 +935,7 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
dci_ind->dci_list[dci_ind->number_of_dcis].N_CCE = L;
dci_ind->dci_list[dci_ind->number_of_dcis].dci_format = rel15->dci_format_options[k];
dci_ind->dci_list[dci_ind->number_of_dcis].ss_type = rel15->dci_type_options[k];
dci_ind->dci_list[dci_ind->number_of_dcis].CoreSetType = rel15->coreset.CoreSetType;
int n_rb, rb_offset;
get_coreset_rballoc(rel15->coreset.frequency_domain_resource, &n_rb, &rb_offset);
dci_ind->dci_list[dci_ind->number_of_dcis].cset_start = rel15->BWPStart + rb_offset;
......
......@@ -603,5 +603,17 @@ typedef struct NR_UE_UL_BWP {
int max_fb_time;
} NR_UE_UL_BWP_t;
typedef enum {
typeA = 0,
typeB = 1
} mappingType_t;
typedef struct NR_ul_tda_info {
mappingType_t mapping_type;
int startSymbolIndex;
int nrOfSymbols;
long k2;
} NR_ul_tda_info_t;
#endif /*__LAYER2_MAC_H__ */
......@@ -419,6 +419,82 @@ const char table_38211_6_3_1_5_5[22][4][2] = {
{{'1', '1'}, {'o', 'o'}, {'j', 'o'}, {'1', 'n'}} // tpmi 21
};
const uint8_t table_6_1_2_1_1_2[16][4]={
{0,0,0,14}, // row index 1
{0,0,0,12}, // row index 2
{0,0,0,10}, // row index 3
{1,0,2,10}, // row index 4
{1,0,4,10}, // row index 5
{1,0,4,8}, // row index 6
{1,0,4,6}, // row index 7
{0,1,0,14}, // row index 8
{0,1,0,12}, // row index 9
{0,1,0,10}, // row index 10
{0,2,0,14}, // row index 11
{0,2,0,12}, // row index 12
{0,2,0,10}, // row index 13
{1,0,8,6}, // row index 14
{0,3,0,14}, // row index 15
{0,3,0,10} // row index 16
};
const uint8_t table_6_1_2_1_1_3[16][4]={
{0,0,0,8}, // row index 1
{0,0,0,12}, // row index 2
{0,0,0,10}, // row index 3
{1,0,2,10}, // row index 4
{1,0,4,4}, // row index 5
{1,0,4,8}, // row index 6
{1,0,4,6}, // row index 7
{0,1,0,8}, // row index 8
{0,1,0,12}, // row index 9
{0,1,0,10}, // row index 10
{0,2,0,6}, // row index 11
{0,2,0,12}, // row index 12
{0,2,0,10}, // row index 13
{1,0,8,4}, // row index 14
{0,3,0,8}, // row index 15
{0,3,0,10} // row index 16
};
NR_ul_tda_info_t get_ul_tda_info(NR_PUSCH_TimeDomainResourceAllocationList_t *tdalist,
int tda_index,
int scs,
int normal_CP)
{
NR_ul_tda_info_t tda_info = {0};
int j = scs == 0 ? 1 : scs;
if(tdalist) {
if(tda_index >= tdalist->list.count) {
LOG_E(MAC, "TDA index from DCI %d exceeds TDA list array size %d\n", tda_index, tdalist->list.count);
return tda_info;
}
NR_PUSCH_TimeDomainResourceAllocation_t *tda = tdalist->list.array[tda_index];
tda_info.mapping_type = tda->mappingType;
tda_info.k2 = tda->k2 ? *tda->k2 : j;
int S, L;
SLIV2SL(tda->startSymbolAndLength, &S, &L);
tda_info.startSymbolIndex = S;
tda_info.nrOfSymbols = L;
}
else {
if(normal_CP) {
tda_info.mapping_type = table_6_1_2_1_1_2[tda_index][0];
tda_info.k2 = table_6_1_2_1_1_2[tda_index][1] + j;
tda_info.startSymbolIndex = table_6_1_2_1_1_2[tda_index][2];
tda_info.nrOfSymbols = table_6_1_2_1_1_2[tda_index][3];
}
else {
tda_info.mapping_type = table_6_1_2_1_1_3[tda_index][0];
tda_info.k2 = table_6_1_2_1_1_3[tda_index][1] + j;
tda_info.startSymbolIndex = table_6_1_2_1_1_3[tda_index][2];
tda_info.nrOfSymbols = table_6_1_2_1_1_3[tda_index][3];
}
}
return tda_info;
}
void get_info_from_tda_tables(int default_abc,
int tda,
int dmrs_TypeA_Position,
......@@ -3130,6 +3206,39 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config,
return nbits;
}
NR_PDSCH_TimeDomainResourceAllocationList_t *get_dl_tdalist(const NR_UE_DL_BWP_t *DL_BWP,
int controlResourceSetId,
int ss_type,
nr_rnti_type_t rnti_type)
{
if(!DL_BWP) return NULL;
// see table 5.1.2.1.1-1 in 38.214
if((rnti_type == NR_RNTI_CS || rnti_type == NR_RNTI_C || rnti_type == NR_RNTI_MCS_C) &&
!(ss_type == NR_SearchSpace__searchSpaceType_PR_common && controlResourceSetId == 0) &&
(DL_BWP->pdsch_Config && DL_BWP->pdsch_Config->pdsch_TimeDomainAllocationList))
return DL_BWP->pdsch_Config->pdsch_TimeDomainAllocationList->choice.setup;
else
return DL_BWP->tdaList;
}
NR_PUSCH_TimeDomainResourceAllocationList_t *get_ul_tdalist(const NR_UE_UL_BWP_t *UL_BWP,
int controlResourceSetId,
int ss_type,
nr_rnti_type_t rnti_type)
{
if((rnti_type == NR_RNTI_CS || rnti_type == NR_RNTI_C || rnti_type == NR_RNTI_MCS_C) &&
!(ss_type == NR_SearchSpace__searchSpaceType_PR_common && controlResourceSetId == 0) &&
(UL_BWP->pusch_Config && UL_BWP->pusch_Config->pusch_TimeDomainAllocationList))
return UL_BWP->pusch_Config->pusch_TimeDomainAllocationList->choice.setup;
else
return UL_BWP->tdaList;
}
uint16_t get_rb_bwp_dci(nr_dci_format_t format,
int ss_type,
uint16_t cset0_bwp_size,
......@@ -3181,23 +3290,18 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
}
const NR_BWP_UplinkDedicated_t *ubwpd = NULL;
const NR_BWP_UplinkCommon_t *ubwpc = NULL;
NR_PDSCH_Config_t *pdsch_Config = DL_BWP ? DL_BWP->pdsch_Config : NULL;
NR_PUSCH_Config_t *pusch_Config = NULL;
NR_PUSCH_Config_t *pusch_Config = UL_BWP ? UL_BWP->pusch_Config : NULL;
NR_PUCCH_Config_t *pucch_Config = NULL;
NR_SRS_Config_t *srs_config = NULL;
if(bwp_id > 0) {
AssertFatal(cg!=NULL,"Cellgroup is null and bwp_id!=0");
ubwpd = uplinkConfig ? uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_id-1]->bwp_Dedicated : NULL;
ubwpc = uplinkConfig ? uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_id-1]->bwp_Common : NULL;
pucch_Config = (ubwpd->pucch_Config) ? ubwpd->pucch_Config->choice.setup : NULL;
pusch_Config = (ubwpd->pusch_Config) ? ubwpd->pusch_Config->choice.setup : NULL;
srs_config = (ubwpd->srs_Config) ? ubwpd->srs_Config->choice.setup : NULL;
} else if (cg) {
ubwpc = initialUplinkBWP;
ubwpd = uplinkConfig ? uplinkConfig->initialUplinkBWP : NULL;
pucch_Config = (ubwpd && ubwpd->pucch_Config) ? ubwpd->pucch_Config->choice.setup : NULL;
pusch_Config = (ubwpd && ubwpd->pusch_Config) ? ubwpd->pusch_Config->choice.setup : NULL;
srs_config = (ubwpd && ubwpd->srs_Config) ? ubwpd->srs_Config->choice.setup: NULL;
}
......@@ -3269,14 +3373,11 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
LOG_D(NR_MAC,"PUSCH Frequency Domain Assignment nbits %d, N_RB %d\n",dci_pdu->frequency_domain_assignment.nbits,N_RB);
size += dci_pdu->frequency_domain_assignment.nbits;
// Time domain assignment
if (pusch_Config==NULL || pusch_Config->pusch_TimeDomainAllocationList==NULL) {
if (ubwpc->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList==NULL)
num_entries = 16; // num of entries in default table
else
num_entries = ubwpc->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.count;
}
NR_PUSCH_TimeDomainResourceAllocationList_t *tdalistul = get_ul_tdalist(UL_BWP, coreset->controlResourceSetId, ss_type, rnti_type);
if (tdalistul)
num_entries = tdalistul->list.count;
else
num_entries = pusch_Config->pusch_TimeDomainAllocationList->choice.setup->list.count;
num_entries = 16; // num of entries in default table
dci_pdu->time_domain_assignment.nbits = (int)ceil(log2(num_entries));
LOG_D(NR_MAC,"PUSCH Time Domain Allocation nbits %d, pusch_Config %p\n",dci_pdu->time_domain_assignment.nbits,pusch_Config);
size += dci_pdu->time_domain_assignment.nbits;
......@@ -3423,9 +3524,9 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
dci_pdu->frequency_domain_assignment.nbits = ((int)ceil(log2((N_RB * (N_RB + 1)) >> 1)) > numRBG) ? (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)) + 1 : numRBG + 1;
size += dci_pdu->frequency_domain_assignment.nbits;
LOG_D(NR_MAC,"dci_pdu->frequency_domain_assignment.nbits %d (N_RB %d)\n",dci_pdu->frequency_domain_assignment.nbits,N_RB);
// Time domain assignment (see table 5.1.2.1.1-1 in 38.214)
if (DL_BWP->tdaList)
num_entries = DL_BWP->tdaList->list.count;
NR_PDSCH_TimeDomainResourceAllocationList_t *tdalist = get_dl_tdalist(DL_BWP, coreset->controlResourceSetId, ss_type, rnti_type);
if (tdalist)
num_entries = tdalist->list.count;
else
num_entries = 16; // num of entries in default table
dci_pdu->time_domain_assignment.nbits = (int)ceil(log2(num_entries));
......
......@@ -51,11 +51,6 @@ typedef enum {
pusch_len2 = 2
} pusch_maxLength_t;
typedef enum {
typeA = 0,
typeB = 1
} mappingType_t;
uint32_t get_Y(const NR_SearchSpace_t *ss, int slot, rnti_t rnti);
uint8_t get_BG(uint32_t A, uint16_t R);
......@@ -89,6 +84,21 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config,
const uint8_t *nrOfLayers,
uint32_t *val);
NR_PDSCH_TimeDomainResourceAllocationList_t *get_dl_tdalist(const NR_UE_DL_BWP_t *DL_BWP,
int controlResourceSetId,
int ss_type,
nr_rnti_type_t rnti_type);
NR_PUSCH_TimeDomainResourceAllocationList_t *get_ul_tdalist(const NR_UE_UL_BWP_t *UL_BWP,
int controlResourceSetId,
int ss_type,
nr_rnti_type_t rnti_type);
NR_ul_tda_info_t get_ul_tda_info(NR_PUSCH_TimeDomainResourceAllocationList_t *tdalist,
int tda_index,
int scs,
int normal_CP);
uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
const NR_BWP_UplinkCommon_t *initialUplinkBWP,
const NR_UE_DL_BWP_t *DL_BWP,
......
......@@ -548,11 +548,13 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac,
NR_BWP_t dl_genericParameters = {0};
NR_BWP_t ul_genericParameters = {0};
NR_BWP_DownlinkCommon_t *bwp_dlcommon = NULL;
NR_BWP_UplinkCommon_t *bwp_ulcommon = NULL;
if(scc) {
DL_BWP->bwp_id = 0;
UL_BWP->bwp_id = 0;
bwp_dlcommon = &scc->downlinkConfigCommon.initialDownlinkBWP;
bwp_ulcommon = &scc->uplinkConfigCommon->initialUplinkBWP;
dl_genericParameters = bwp_dlcommon->genericParameters;
if(scc->uplinkConfigCommon)
ul_genericParameters = scc->uplinkConfigCommon->initialUplinkBWP.genericParameters;
......@@ -562,6 +564,8 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac,
DL_BWP->pdsch_Config = NULL;
if(bwp_dlcommon->pdsch_ConfigCommon)
DL_BWP->tdaList = bwp_dlcommon->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
if(bwp_ulcommon->pusch_ConfigCommon)
UL_BWP->tdaList = bwp_ulcommon->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
}
if(cell_group_config) {
......@@ -575,9 +579,11 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac,
if(mac->scc) {
bwp_dlcommon = mac->scc->downlinkConfigCommon->initialDownlinkBWP;
bwp_ulcommon = mac->scc->uplinkConfigCommon->initialUplinkBWP;
}
if(mac->scc_SIB) {
bwp_dlcommon = &mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP;
bwp_ulcommon = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP;
}
NR_BWP_Downlink_t *bwp_downlink = NULL;
const struct NR_ServingCellConfig__downlinkBWP_ToAddModList *bwpList = spCellConfigDedicated->downlinkBWP_ToAddModList;
......@@ -595,11 +601,8 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac,
dl_genericParameters = bwp_dlcommon->genericParameters;
DL_BWP->pdsch_Config = spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup;
}
if(DL_BWP->pdsch_Config &&
DL_BWP->pdsch_Config->pdsch_TimeDomainAllocationList)
DL_BWP->tdaList = DL_BWP->pdsch_Config->pdsch_TimeDomainAllocationList->choice.setup;
else
DL_BWP->tdaList = bwp_dlcommon->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
DL_BWP->tdaList = bwp_dlcommon->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
UL_BWP->tdaList = bwp_ulcommon->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
NR_BWP_Uplink_t *bwp_uplink = NULL;
const struct NR_UplinkConfig__uplinkBWP_ToAddModList *ubwpList = spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList;
......@@ -611,14 +614,11 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac,
}
AssertFatal(bwp_uplink != NULL,"Couldn't find ULBWP corresponding to BWP ID %ld\n",UL_BWP->bwp_id);
ul_genericParameters = bwp_uplink->bwp_Common->genericParameters;
UL_BWP->pusch_Config = bwp_uplink->bwp_Dedicated->pusch_Config->choice.setup;
}
else {
if(mac->scc) {
ul_genericParameters = mac->scc->uplinkConfigCommon->initialUplinkBWP->genericParameters;
}
if(mac->scc_SIB) {
ul_genericParameters = mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters;
}
UL_BWP->pusch_Config = spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pusch_Config->choice.setup;
ul_genericParameters = bwp_ulcommon->genericParameters;
}
}
else
......
......@@ -261,15 +261,11 @@ void get_bwp_info(NR_UE_MAC_INST_t *mac,
NR_BWP_DownlinkCommon_t *get_bwp_downlink_common(NR_UE_MAC_INST_t *mac, NR_BWP_Id_t dl_bwp_id);
NR_PUSCH_TimeDomainResourceAllocationList_t *choose_ul_tda_list(const NR_PUSCH_Config_t *pusch_Config,NR_PUSCH_ConfigCommon_t *pusch_ConfigCommon);
int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList,
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList,
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu,
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
int *mappingtype,
uint8_t time_domain_ind,
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
int *mapping_type,
uint8_t time_domain_ind,
int default_abc,
bool use_default);
......@@ -474,7 +470,7 @@ int16_t compute_nr_SSB_PL(NR_UE_MAC_INST_t *mac, short ssb_rsrp_dBm);
// - in which ULSCH should be scheduled. K2 is configured in RRC configuration.
// PUSCH Msg3 scheduler:
// - scheduled by RAR UL grant according to 8.3 of TS 38.213
int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac, uint8_t is_Msg3, frame_t current_frame, int current_slot, frame_t *frame_tx, int *slot_tx, uint8_t tda_id);
int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac, uint8_t is_Msg3, frame_t current_frame, int current_slot, frame_t *frame_tx, int *slot_tx, long k2);
int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti);
......@@ -487,6 +483,7 @@ int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti);
// - 6.4.1.1.1 of TS 38.211
// - 6.3.1.7 of 38.211
int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
NR_ul_tda_info_t *tda_info,
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu,
dci_pdu_rel15_t *dci,
RAR_grant_t *rar_grant,
......
......@@ -237,19 +237,6 @@ NR_BWP_DownlinkCommon_t *get_bwp_downlink_common(NR_UE_MAC_INST_t *mac, NR_BWP_I
return bwp_Common;
}
NR_PUSCH_TimeDomainResourceAllocationList_t *choose_ul_tda_list(const NR_PUSCH_Config_t *pusch_Config,NR_PUSCH_ConfigCommon_t *pusch_ConfigCommon) {
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList=NULL;
if (pusch_Config &&
pusch_Config->pusch_TimeDomainAllocationList)
pusch_TimeDomainAllocationList = pusch_Config->pusch_TimeDomainAllocationList->choice.setup;
else if (pusch_ConfigCommon->pusch_TimeDomainAllocationList)
pusch_TimeDomainAllocationList = pusch_ConfigCommon->pusch_TimeDomainAllocationList;
return(pusch_TimeDomainAllocationList);
}
int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti){
RA_config_t *ra = &mac->ra;
......@@ -469,60 +456,19 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p
}
int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList,
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList,
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu,
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
int *mapping_type,
uint8_t time_domain_ind,
int default_abc,
bool use_default){
bool use_default)
{
int dmrs_typeA_pos = (mac->scc != NULL) ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position;
// uint8_t k_offset=0;
int sliv_S=0;
int sliv_L=0;
uint8_t mu_pusch = 1;
// definition table j Table 6.1.2.1.1-4
uint8_t j = (mu_pusch==3)?3:(mu_pusch==2)?2:1;
uint8_t table_6_1_2_1_1_2_time_dom_res_alloc_A[16][3]={ // for PUSCH from TS 38.214 subclause 6.1.2.1.1
{j, 0,14}, // row index 1
{j, 0,12}, // row index 2
{j, 0,10}, // row index 3
{j, 2,10}, // row index 4
{j, 4,10}, // row index 5
{j, 4,8}, // row index 6
{j, 4,6}, // row index 7
{j+1,0,14}, // row index 8
{j+1,0,12}, // row index 9
{j+1,0,10}, // row index 10
{j+2,0,14}, // row index 11
{j+2,0,12}, // row index 12
{j+2,0,10}, // row index 13
{j, 8,6}, // row index 14
{j+3,0,14}, // row index 15
{j+3,0,10} // row index 16
};
/*uint8_t table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[16][3]={ // for PUSCH from TS 38.214 subclause 6.1.2.1.1
{j, 0,8}, // row index 1
{j, 0,12}, // row index 2
{j, 0,10}, // row index 3
{j, 2,10}, // row index 4
{j, 4,4}, // row index 5
{j, 4,8}, // row index 6
{j, 4,6}, // row index 7
{j+1,0,8}, // row index 8
{j+1,0,12}, // row index 9
{j+1,0,10}, // row index 10
{j+2,0,6}, // row index 11
{j+2,0,12}, // row index 12
{j+2,0,10}, // row index 13
{j, 8,4}, // row index 14
{j+3,0,8}, // row index 15
{j+3,0,10} // row index 16
};*/
/*
* TS 38.214 subclause 5.1.2.1 Resource allocation in time domain (downlink)
......@@ -563,39 +509,6 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
dlsch_config_pdu->number_symbols = sliv_L;
dlsch_config_pdu->start_symbol = sliv_S;
}
} /*
* TS 38.214 subclause 6.1.2.1 Resource allocation in time domain (uplink)
*/
if(pusch_config_pdu != NULL){
if (pusch_TimeDomainAllocationList && use_default==false) {
if (time_domain_ind >= pusch_TimeDomainAllocationList->list.count) {
LOG_E(NR_MAC, "time_domain_ind %d >= pusch->TimeDomainAllocationList->list.count %d\n",
time_domain_ind, pusch_TimeDomainAllocationList->list.count);
pusch_config_pdu->start_symbol_index=0;
pusch_config_pdu->nr_of_symbols=0;
return -1;
}
LOG_D(NR_MAC,"Filling Time-Domain Allocation from pusch_TimeDomainAllocationList\n");
int startSymbolAndLength = pusch_TimeDomainAllocationList->list.array[time_domain_ind]->startSymbolAndLength;
int S,L;
SLIV2SL(startSymbolAndLength,&S,&L);
pusch_config_pdu->start_symbol_index=S;
pusch_config_pdu->nr_of_symbols=L;
}
else {
LOG_D(NR_MAC,"Filling Time-Domain Allocation from tables\n");
// k_offset = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][0];
sliv_S = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][1];
sliv_L = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][2];
// k_offset = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][0];
// sliv_S = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][1];
// sliv_L = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][2];
pusch_config_pdu->nr_of_symbols = sliv_L;
pusch_config_pdu->start_symbol_index = sliv_S;
}
LOG_D(NR_MAC,"start_symbol = %i\n", pusch_config_pdu->start_symbol_index);
LOG_D(NR_MAC,"number_symbols = %i\n", pusch_config_pdu->nr_of_symbols);
}
return 0;
}
......@@ -621,6 +534,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
uint16_t rnti = dci_ind->rnti;
uint8_t dci_format = dci_ind->dci_format;
int coreset_type = dci_ind->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG; // 0 for coreset0, 1 otherwise
int ret = 0;
int pucch_res_set_cnt = 0, valid = 0;
frame_t frame_tx = 0;
......@@ -636,6 +550,10 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
int default_abc = 1;
LOG_D(MAC, "In %s: Processing received DCI format %s\n", __FUNCTION__, dci_formats[dci_format]);
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL;
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL;
int normal_CP = current_UL_BWP->cyclicprefix ? 0 : 1;
NR_ul_tda_info_t tda_info = {0};
switch(dci_format){
case NR_UL_DCI_FORMAT_0_0: {
......@@ -660,7 +578,12 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
// - SUL_IND_0_0
// Schedule PUSCH
ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, dci->time_domain_assignment.val);
pusch_TimeDomainAllocationList = get_ul_tdalist(current_UL_BWP, coreset_type, dci_ind->ss_type, get_rnti_type(mac, rnti));
tda_info = get_ul_tda_info(pusch_TimeDomainAllocationList, dci->time_domain_assignment.val, current_UL_BWP->scs, normal_CP);
if(tda_info.nrOfSymbols == 0)
ret = -1;
else
ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, tda_info.k2);
if (ret != -1){
......@@ -679,9 +602,10 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
pthread_mutex_unlock(&ul_config->mutex_ul_config);
// Config PUSCH PDU
ret = nr_config_pusch_pdu(mac, pusch_config_pdu, dci, NULL, rnti, &dci_format);
ret = nr_config_pusch_pdu(mac, &tda_info, pusch_config_pdu, dci, NULL, rnti, &dci_format);
}
else
LOG_E(MAC,"Cannot schedule PUSCH\n");
break;
}
......@@ -720,7 +644,12 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
// - SRS_RESOURCE_IND
// Schedule PUSCH
ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, dci->time_domain_assignment.val);
pusch_TimeDomainAllocationList = get_ul_tdalist(current_UL_BWP, coreset_type, dci_ind->ss_type, get_rnti_type(mac, rnti));
tda_info = get_ul_tda_info(pusch_TimeDomainAllocationList, dci->time_domain_assignment.val, current_UL_BWP->scs, normal_CP);
if(tda_info.nrOfSymbols == 0)
ret = -1;
else
ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, tda_info.k2);
if (ret != -1){
......@@ -741,8 +670,10 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
pthread_mutex_unlock(&ul_config->mutex_ul_config);
// Config PUSCH PDU
ret = nr_config_pusch_pdu(mac, pusch_config_pdu, dci, NULL, rnti, &dci_format);
} else AssertFatal(1==0,"Cannot schedule PUSCH\n");
ret = nr_config_pusch_pdu(mac, &tda_info, pusch_config_pdu, dci, NULL, rnti, &dci_format);
}
else
LOG_E(MAC,"Cannot schedule PUSCH\n");
break;
}
......@@ -837,13 +768,11 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
return -1;
}
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = (rnti == SI_RNTI) ? NULL : current_DL_BWP->tdaList;
int mappingtype;
/* TIME_DOM_RESOURCE_ASSIGNMENT */
if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,pdsch_TimeDomainAllocationList,
NULL,dlsch_config_pdu_1_0,&mappingtype,
pdsch_TimeDomainAllocationList = get_dl_tdalist(current_DL_BWP, coreset_type, dci_ind->ss_type, get_rnti_type(mac, rnti));
if (nr_ue_process_dci_time_dom_resource_assignment(mac,pdsch_TimeDomainAllocationList,
dlsch_config_pdu_1_0,&mappingtype,
dci->time_domain_assignment.val,
default_abc,rnti==SI_RNTI) < 0) {
LOG_W(MAC, "[%d.%d] Invalid time_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot);
......@@ -1082,9 +1011,10 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
}
/* TIME_DOM_RESOURCE_ASSIGNMENT */
int mappingtype;
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = current_DL_BWP->tdaList;
if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,pdsch_TimeDomainAllocationList,
NULL,dlsch_config_pdu_1_1,&mappingtype,
pdsch_TimeDomainAllocationList = get_dl_tdalist(current_DL_BWP, coreset_type, dci_ind->ss_type, get_rnti_type(mac, rnti));
if (nr_ue_process_dci_time_dom_resource_assignment(mac,pdsch_TimeDomainAllocationList,
dlsch_config_pdu_1_1,&mappingtype,
dci->time_domain_assignment.val,0,false) < 0) {
LOG_W(MAC, "[%d.%d] Invalid time_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot);
return -1;
......@@ -1382,25 +1312,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
break;
}
if(rnti == SI_RNTI){
// }else if(rnti == mac->ra_rnti){
}else if(rnti == P_RNTI){
}else{ // c-rnti
/// check if this is pdcch order
//dci->random_access_preamble_index;
//dci->ss_pbch_index;
//dci->prach_mask_index;
/// else normal DL-SCH grant
}
return ret;
}
int8_t nr_ue_process_csirs_measurements(module_id_t module_id,
......@@ -1535,19 +1447,22 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac,
LOG_E(MAC,"PUCCH Unsupported code block group for serving cell config\n");
return;
}
NR_PUSCH_Config_t *pusch_Config = current_UL_BWP ? current_UL_BWP->pusch_Config : NULL;
if (pusch_Config) {
pusch_id = pusch_Config->dataScramblingIdentityPUSCH;
if (pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA != NULL)
id0 = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup->transformPrecodingDisabled->scramblingID0;
else if (pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB != NULL)
id0 = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->transformPrecodingDisabled->scramblingID0;
}
NR_PUCCH_Config_t *pucch_Config;
if (bwp_id>0 &&
mac->ULbwp[bwp_id-1] &&
mac->ULbwp[bwp_id-1]->bwp_Dedicated &&
mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config &&
mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup) {
NR_PUSCH_Config_t *pusch_Config = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup;
pusch_id = pusch_Config->dataScramblingIdentityPUSCH;
if (pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA != NULL)
id0 = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup->transformPrecodingDisabled->scramblingID0;
else if (pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB != NULL)
id0 = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->transformPrecodingDisabled->scramblingID0;
else *id0 = mac->physCellId;
pucch_Config = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup;
}
else if (bwp_id==0 &&
......@@ -1610,8 +1525,8 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac,
pucch_pdu->n_bit = O_uci+O_SR;
pucch_pdu->nr_of_symbols = pucchres->format.choice.format2->nrofSymbols;
pucch_pdu->start_symbol_index = pucchres->format.choice.format2->startingSymbolIndex;
pucch_pdu->data_scrambling_id = pusch_id!= NULL ? *pusch_id : mac->physCellId;
pucch_pdu->dmrs_scrambling_id = id0!= NULL ? *id0 : mac->physCellId;
pucch_pdu->data_scrambling_id = pusch_id != NULL ? *pusch_id : mac->physCellId;
pucch_pdu->dmrs_scrambling_id = id0 != NULL ? *id0 : mac->physCellId;
pucch_pdu->prb_size = compute_pucch_prb_size(2,pucchres->format.choice.format2->nrofPRBs,
O_uci+O_SR,O_CSI,pucch_Config->format2->choice.setup->maxCodeRate,
2,pucchres->format.choice.format2->nrofSymbols,8);
......@@ -1621,7 +1536,7 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac,
pucch_pdu->n_bit = O_uci+O_SR;
pucch_pdu->nr_of_symbols = pucchres->format.choice.format3->nrofSymbols;
pucch_pdu->start_symbol_index = pucchres->format.choice.format3->startingSymbolIndex;
pucch_pdu->data_scrambling_id = pusch_id!= NULL ? *pusch_id : mac->physCellId;
pucch_pdu->data_scrambling_id = pusch_id != NULL ? *pusch_id : mac->physCellId;
if (pucch_Config->format3 == NULL) {
pucch_pdu->pi_2bpsk = 0;
pucch_pdu->add_dmrs_flag = 0;
......@@ -4041,7 +3956,15 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t
#endif
// Schedule Msg3
ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, rar_grant.Msg3_t_alloc);
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
int normal_CP = current_UL_BWP->cyclicprefix ? 0 : 1;
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = get_ul_tdalist(current_UL_BWP, *ra->ss->controlResourceSetId, ra->ss->searchSpaceType->present, NR_RNTI_RA);
NR_ul_tda_info_t tda_info = get_ul_tda_info(pusch_TimeDomainAllocationList, rar_grant.Msg3_t_alloc, current_UL_BWP->scs, normal_CP);
if(tda_info.nrOfSymbols == 0) {
LOG_E(MAC, "Cannot schedule Msg3. Something wrong in TDA information\n");
return -1;
}
ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, tda_info.k2);
if (ret != -1){
......@@ -4069,7 +3992,7 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t
pthread_mutex_unlock(&ul_config->mutex_ul_config);
// Config Msg3 PDU
nr_config_pusch_pdu(mac, pusch_config_pdu, NULL, &rar_grant, rnti, NULL);
nr_config_pusch_pdu(mac, &tda_info, pusch_config_pdu, NULL, &rar_grant, rnti, NULL);
}
} else {
......
......@@ -100,49 +100,6 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response,
}
/*
* This function returns the slot offset K2 corresponding to a given time domain
* indication value from RRC configuration.
*/
long get_k2(NR_UE_MAC_INST_t *mac, uint8_t time_domain_ind) {
long k2 = -1;
NR_BWP_Id_t ul_bwp_id = mac->current_UL_BWP.bwp_id;
// Get K2 from RRC configuration
NR_PUSCH_Config_t *pusch_config= ul_bwp_id > 0 && mac->ULbwp[ul_bwp_id-1] ? mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup : NULL;
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL;
if (pusch_config && pusch_config->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = pusch_config->pusch_TimeDomainAllocationList->choice.setup;
}
else if (ul_bwp_id > 0 &&
mac->ULbwp[ul_bwp_id-1] &&
mac->ULbwp[ul_bwp_id-1]->bwp_Common&&
mac->ULbwp[ul_bwp_id-1]->bwp_Common->pusch_ConfigCommon&&
mac->ULbwp[ul_bwp_id-1]->bwp_Common->pusch_ConfigCommon->choice.setup &&
mac->ULbwp[ul_bwp_id-1]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac->ULbwp[ul_bwp_id-1]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
}
else if (mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList)
pusch_TimeDomainAllocationList=mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
else AssertFatal(1==0,"need to fall back to default PUSCH time-domain allocations\n");
if (pusch_TimeDomainAllocationList) {
if (time_domain_ind >= pusch_TimeDomainAllocationList->list.count) {
LOG_E(NR_MAC, "time_domain_ind %d >= pusch->TimeDomainAllocationList->list.count %d\n",
time_domain_ind, pusch_TimeDomainAllocationList->list.count);
return -1;
}
k2 = *pusch_TimeDomainAllocationList->list.array[time_domain_ind]->k2;
}
AssertFatal(k2 >= DURATION_RX_TO_TX,
"Slot offset K2 (%ld) cannot be less than DURATION_RX_TO_TX (%d). K2 set according to min_rxtxtime in config file.\n",
k2,DURATION_RX_TO_TX);
LOG_D(NR_MAC, "get_k2(): k2 is %ld\n", k2);
return k2;
}
/*
* This function returns the UL config corresponding to a given UL slot
* from MAC instance .
......@@ -182,8 +139,7 @@ fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int sl
void ul_layers_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci) {
NR_ServingCellConfigCommon_t *scc = mac->scc;
NR_BWP_Id_t ul_bwp_id = mac->current_UL_BWP.bwp_id;
NR_BWP_UplinkDedicated_t *ubwpd=NULL;
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
NR_SRS_Config_t *srs_config = NULL;
if (mac->cg &&
......@@ -191,15 +147,10 @@ void ul_layers_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_con
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP) {
ubwpd = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP;
srs_config = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->srs_Config->choice.setup;
}
NR_PUSCH_Config_t *pusch_Config = ul_bwp_id > 0 && mac->ULbwp[ul_bwp_id-1] ?
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup :
(ubwpd?
ubwpd->pusch_Config->choice.setup:
NULL);
NR_PUSCH_Config_t *pusch_Config = current_UL_BWP->pusch_Config;
long transformPrecoder;
if (pusch_Config && pusch_Config->transformPrecoder)
......@@ -339,19 +290,9 @@ void ul_layers_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_con
void ul_ports_config(NR_UE_MAC_INST_t *mac, int *n_front_load_symb, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci) {
uint8_t rank = pusch_config_pdu->nrOfLayers;
NR_BWP_Id_t ul_bwp_id = mac->current_UL_BWP.bwp_id;
NR_ServingCellConfigCommon_t *scc = mac->scc;
NR_BWP_UplinkDedicated_t *ubwpd=NULL;
if (mac->cg &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP)
ubwpd = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP;
NR_PUSCH_Config_t *pusch_Config = ul_bwp_id > 0 && mac->ULbwp[ul_bwp_id-1] ? mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup : (ubwpd?ubwpd->pusch_Config->choice.setup:NULL);
NR_PUSCH_Config_t *pusch_Config = mac->current_UL_BWP.pusch_Config;
AssertFatal(pusch_Config!=NULL,"pusch_Config shouldn't be null\n");
long transformPrecoder;
......@@ -536,6 +477,7 @@ void ul_ports_config(NR_UE_MAC_INST_t *mac, int *n_front_load_symb, nfapi_nr_ue_
// - 6.4.1.1.1 of TS 38.211
// - 6.3.1.7 of 38.211
int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
NR_ul_tda_info_t *tda_info,
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu,
dci_pdu_rel15_t *dci,
RAR_grant_t *rar_grant,
......@@ -545,8 +487,6 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
int f_alloc;
int mask;
int StartSymbolIndex;
int NrOfSymbols;
uint8_t nb_dmrs_re_per_rb;
uint16_t l_prime_mask = 0;
......@@ -555,7 +495,6 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
int rnti_type = get_rnti_type(mac, rnti);
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
NR_BWP_Id_t ul_bwp_id = current_UL_BWP->bwp_id;
// Common configuration
pusch_config_pdu->dmrs_config_type = pusch_dmrs_type1;
......@@ -569,30 +508,11 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_dmrs_AdditionalPosition_t add_pos = pusch_dmrs_pos2;
int dmrslength = 1;
NR_PUSCH_Config_t *pusch_Config = current_UL_BWP->pusch_Config;
if (rar_grant) {
// Note: for Msg3 or MsgA PUSCH transmission the N_PRB_oh is always set to 0
NR_BWP_Uplink_t *ubwp = ul_bwp_id > 0 ? mac->ULbwp[ul_bwp_id - 1] : NULL;
NR_BWP_UplinkDedicated_t *ibwp;
int startSymbolAndLength,mappingtype;
NR_PUSCH_Config_t *pusch_Config=NULL;
if (mac->cg && ubwp &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP) {
ibwp = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP;
pusch_Config = ibwp->pusch_Config->choice.setup;
startSymbolAndLength = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[rar_grant->Msg3_t_alloc]->startSymbolAndLength;
mappingtype = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[rar_grant->Msg3_t_alloc]->mappingType;
}
else {
startSymbolAndLength = initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[rar_grant->Msg3_t_alloc]->startSymbolAndLength;
mappingtype = initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[rar_grant->Msg3_t_alloc]->mappingType;
}
int ibwp_start = current_UL_BWP->initial_BWPStart;
int ibwp_size = current_UL_BWP->initial_BWPSize;
int abwp_start = current_UL_BWP->BWPStart;
......@@ -623,12 +543,11 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
//pusch_config_pdu->rb_start += ibwp_start - abwp_start;
// Time domain allocation
SLIV2SL(startSymbolAndLength, &StartSymbolIndex, &NrOfSymbols);
pusch_config_pdu->start_symbol_index = StartSymbolIndex;
pusch_config_pdu->nr_of_symbols = NrOfSymbols;
pusch_config_pdu->start_symbol_index = tda_info->startSymbolIndex;
pusch_config_pdu->nr_of_symbols = tda_info->nrOfSymbols;
l_prime_mask = get_l_prime(NrOfSymbols, mappingtype, add_pos, dmrslength, StartSymbolIndex, mac->scc ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position);
LOG_D(NR_MAC, "MSG3 start_sym:%d NR Symb:%d mappingtype:%d, DMRS_MASK:%x\n", pusch_config_pdu->start_symbol_index, pusch_config_pdu->nr_of_symbols, mappingtype, l_prime_mask);
l_prime_mask = get_l_prime(tda_info->nrOfSymbols, tda_info->mapping_type, add_pos, dmrslength, tda_info->startSymbolIndex, mac->scc ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position);
LOG_D(NR_MAC, "MSG3 start_sym:%d NR Symb:%d mappingtype:%d, DMRS_MASK:%x\n", pusch_config_pdu->start_symbol_index, pusch_config_pdu->nr_of_symbols, tda_info->mapping_type, l_prime_mask);
#ifdef DEBUG_MSG3
LOG_D(NR_MAC, "In %s BWP assignment (BWP (start %d, size %d) \n", __FUNCTION__, pusch_config_pdu->bwp_start, pusch_config_pdu->bwp_size);
......@@ -683,8 +602,6 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->bwp_start = current_UL_BWP->BWPStart;
pusch_config_pdu->bwp_size = current_UL_BWP->BWPSize;
const NR_PUSCH_Config_t *pusch_Config = ubwpd? ubwpd->pusch_Config->choice.setup : NULL;
// Basic sanity check for MCS value to check for a false or erroneous DCI
if (dci->mcs > 28) {
LOG_W(NR_MAC, "MCS value %d out of bounds! Possibly due to false DCI. Ignoring DCI!\n", dci->mcs);
......@@ -716,10 +633,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
}
NR_PUSCH_ConfigCommon_t *pusch_ConfigCommon = ubwpc->pusch_ConfigCommon->choice.setup;
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = choose_ul_tda_list(pusch_Config,pusch_ConfigCommon);
int mappingtype = pusch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType;
int mappingtype = tda_info->mapping_type;
NR_DMRS_UplinkConfig_t *NR_DMRS_ulconfig = NULL;
if(pusch_Config) {
......@@ -774,10 +688,9 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
if (nr_ue_process_dci_freq_dom_resource_assignment(pusch_config_pdu, NULL, current_UL_BWP->BWPSize, 0, dci->frequency_domain_assignment.val) < 0){
return -1;
}
/* TIME_DOM_RESOURCE_ASSIGNMENT */
if (nr_ue_process_dci_time_dom_resource_assignment(mac, pusch_TimeDomainAllocationList, NULL, pusch_config_pdu, NULL, NULL, dci->time_domain_assignment.val,0,false) < 0) {
return -1;
}
pusch_config_pdu->start_symbol_index = tda_info->startSymbolIndex;
pusch_config_pdu->nr_of_symbols = tda_info->nrOfSymbols;
/* FREQ_HOPPING_FLAG */
if ((pusch_Config!=NULL) && (pusch_Config->frequencyHopping!=NULL) && (pusch_Config->resourceAllocation != NR_PUSCH_Config__resourceAllocation_resourceAllocationType0)){
......@@ -866,17 +779,13 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->tbslbrm = 0;
/* PTRS */
if (ul_bwp_id > 0 &&
mac->ULbwp[ul_bwp_id-1] &&
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated &&
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pusch_Config &&
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup &&
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB &&
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS) {
if (pusch_Config &&
pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB &&
pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS) {
if (pusch_config_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_disabled) {
nfapi_nr_ue_ptrs_ports_t ptrs_ports_list;
pusch_config_pdu->pusch_ptrs.ptrs_ports_list = &ptrs_ports_list;
valid_ptrs_setup = set_ul_ptrs_values(mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup,
valid_ptrs_setup = set_ul_ptrs_values(pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup,
pusch_config_pdu->rb_size, pusch_config_pdu->mcs_index, pusch_config_pdu->mcs_table,
&pusch_config_pdu->pusch_ptrs.ptrs_freq_density,&pusch_config_pdu->pusch_ptrs.ptrs_time_density,
&pusch_config_pdu->pusch_ptrs.ptrs_ports_list->ptrs_re_offset,&pusch_config_pdu->pusch_ptrs.num_ptrs_ports,
......@@ -1565,24 +1474,22 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac,
int current_slot,
frame_t *frame_tx,
int *slot_tx,
uint8_t tda_id){
long k2){
AssertFatal(k2 >= DURATION_RX_TO_TX,
"Slot offset K2 (%ld) cannot be less than DURATION_RX_TO_TX (%d). K2 set according to min_rxtxtime in config file.\n",
k2,DURATION_RX_TO_TX);
int delta = 0;
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
NR_BWP_Id_t ul_bwp_id = current_UL_BWP->bwp_id;
// Get the numerology to calculate the Tx frame and slot
int mu = current_UL_BWP->scs;
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = ul_bwp_id > 0 && mac->ULbwp[ul_bwp_id-1] ?
mac->ULbwp[ul_bwp_id-1]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList:
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
// k2 as per 3GPP TS 38.214 version 15.9.0 Release 15 ch 6.1.2.1.1
// PUSCH time domain resource allocation is higher layer configured from uschTimeDomainAllocationList in either pusch-ConfigCommon
int k2;
if (is_Msg3) {
k2 = *pusch_TimeDomainAllocationList->list.array[tda_id]->k2;
switch (mu) {
case 0:
......@@ -1599,9 +1506,9 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac,
break;
}
AssertFatal((k2+delta) >= DURATION_RX_TO_TX,
"Slot offset (%d) for Msg3 cannot be less than DURATION_RX_TO_TX (%d)\n",
k2+delta,DURATION_RX_TO_TX);
AssertFatal((k2 + delta) >= DURATION_RX_TO_TX,
"Slot offset (%ld) for Msg3 cannot be less than DURATION_RX_TO_TX (%d)\n",
k2 + delta, DURATION_RX_TO_TX);
*slot_tx = (current_slot + k2 + delta) % nr_slots_per_frame[mu];
if (current_slot + k2 + delta > nr_slots_per_frame[mu]){
......@@ -1612,10 +1519,8 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac,
} else {
// Get slot offset K2 which will be used to calculate TX slot
k2 = get_k2(mac, tda_id);
if (k2 < 0) { // This can happen when a false DCI is received
LOG_W(PHY,"%d.%d. Received k2 %d, tda_id %d\n",current_frame,current_slot,k2,tda_id);
LOG_W(PHY,"%d.%d. Received k2 %ld\n", current_frame, current_slot, k2);
return -1;
}
......@@ -1625,7 +1530,7 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac,
}
LOG_D(NR_MAC, "In %s: currently at [%d.%d] UL transmission in [%d.%d] (k2 %d delta %d)\n", __FUNCTION__, current_frame, current_slot, *frame_tx, *slot_tx, k2, delta);
LOG_D(NR_MAC, "In %s: currently at [%d.%d] UL transmission in [%d.%d] (k2 %ld delta %d)\n", __FUNCTION__, current_frame, current_slot, *frame_tx, *slot_tx, k2, delta);
return 0;
......
......@@ -1161,12 +1161,12 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
BWPSize = type0_PDCCH_CSS_config->num_rbs;
}
NR_ControlResourceSet_t *coreset = ra->coreset;
const int coresetid = coreset->controlResourceSetId;
// Calculate number of symbols
int time_domain_assignment = get_dl_tda(nr_mac, scc, slotP);
NR_tda_info_t tda_info = nr_get_pdsch_tda_info(dl_bwp,
time_domain_assignment);
NR_ControlResourceSet_t *coreset = ra->coreset;
NR_PDSCH_TimeDomainResourceAllocationList_t *tda_list = get_dl_tdalist(dl_bwp, coresetid, ss->searchSpaceType->present, NR_RNTI_RA);
NR_tda_info_t tda_info = nr_get_pdsch_tda_info(tda_list, time_domain_assignment);
AssertFatal(coreset!=NULL,"Coreset cannot be null for RA-Msg2\n");
......@@ -1208,7 +1208,6 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
// look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it. This is especially
// important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them
const int coresetid = coreset->controlResourceSetId;
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][coresetid];
if (!pdcch_pdu_rel15) {
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
......@@ -1480,7 +1479,8 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
}
uint8_t time_domain_assignment = get_dl_tda(nr_mac, scc, slotP);
NR_tda_info_t msg4_tda = nr_get_pdsch_tda_info(dl_bwp, time_domain_assignment);
NR_PDSCH_TimeDomainResourceAllocationList_t *tda_list = get_dl_tdalist(dl_bwp, coreset->controlResourceSetId, ss->searchSpaceType->present, NR_RNTI_TC);
NR_tda_info_t msg4_tda = nr_get_pdsch_tda_info(tda_list, time_domain_assignment);
NR_pdsch_dmrs_t dmrs_info = get_dl_dmrs_params(scc,
dl_bwp,
&msg4_tda,
......
......@@ -411,7 +411,9 @@ bool allocate_dl_retransmission(module_id_t module_id,
/* Check first whether the old TDA can be reused
* this helps allocate retransmission when TDA changes (e.g. new nrOfSymbols > old nrOfSymbols) */
NR_tda_info_t temp_tda = nr_get_pdsch_tda_info(dl_bwp, tda);
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = get_dl_tdalist(dl_bwp, coresetid, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C);
NR_tda_info_t temp_tda = nr_get_pdsch_tda_info(pdsch_TimeDomainAllocationList, tda);
bool reuse_old_tda = (retInfo->tda_info.startSymbolIndex == temp_tda.startSymbolIndex) && (retInfo->tda_info.nrOfSymbols <= temp_tda.nrOfSymbols);
LOG_D(NR_MAC, "[UE %x] %s old TDA, %s number of layers\n",
UE->rnti,
......@@ -729,7 +731,8 @@ void pf_dl(module_id_t module_id,
sched_pdsch->time_domain_allocation = get_dl_tda(mac, scc, slot);
AssertFatal(sched_pdsch->time_domain_allocation>=0,"Unable to find PDSCH time domain allocation in list\n");
sched_pdsch->tda_info = nr_get_pdsch_tda_info(dl_bwp, sched_pdsch->time_domain_allocation);
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = get_dl_tdalist(dl_bwp, coresetid, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C);
sched_pdsch->tda_info = nr_get_pdsch_tda_info(pdsch_TimeDomainAllocationList, sched_pdsch->time_domain_allocation);
NR_tda_info_t *tda_info = &sched_pdsch->tda_info;
const uint16_t slbitmap = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
......@@ -798,13 +801,12 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
NR_UE_DL_BWP_t *current_BWP = &UE->current_DL_BWP;
const int tda = get_dl_tda(RC.nrmac[module_id], scc, slot);
int startSymbolIndex, nrOfSymbols;
const struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = current_BWP->tdaList;
const int coresetid = sched_ctrl->coreset->controlResourceSetId;
const struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = get_dl_tdalist(current_BWP, coresetid, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C);
AssertFatal(tda < tdaList->list.count, "time_domain_allocation %d>=%d\n", tda, tdaList->list.count);
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
const int coresetid = sched_ctrl->coreset->controlResourceSetId;
const uint16_t bwpSize = coresetid == 0 ? RC.nrmac[module_id]->cset0_bwp_size : current_BWP->BWPSize;
const uint16_t BWPStart = coresetid == 0 ? RC.nrmac[module_id]->cset0_bwp_start : current_BWP->BWPStart;
......
......@@ -59,7 +59,8 @@ void nr_preprocessor_phytest(module_id_t module_id,
const int CC_id = 0;
const int tda = get_dl_tda(RC.nrmac[module_id], scc, slot);
NR_tda_info_t tda_info = nr_get_pdsch_tda_info(dl_bwp, tda);
NR_PDSCH_TimeDomainResourceAllocationList_t *tdalist = get_dl_tdalist(dl_bwp, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C);
NR_tda_info_t tda_info = nr_get_pdsch_tda_info(tdalist, tda);
sched_ctrl->sched_pdsch.tda_info = tda_info;
sched_ctrl->sched_pdsch.time_domain_allocation = tda;
......
......@@ -563,11 +563,10 @@ bool nr_find_nb_rb(uint16_t Qm,
return *tbs >= bytes && *nb_rb <= nb_rb_max;
}
NR_tda_info_t nr_get_pdsch_tda_info(const NR_UE_DL_BWP_t *dl_bwp,
NR_tda_info_t nr_get_pdsch_tda_info(const NR_PDSCH_TimeDomainResourceAllocationList_t *tdaList,
const int tda) {
NR_tda_info_t tda_info = {0};
NR_PDSCH_TimeDomainResourceAllocationList_t *tdaList = dl_bwp->tdaList;
AssertFatal(tda < tdaList->list.count, "time_domain_allocation %d>=%d\n", tda, tdaList->list.count);
tda_info.mapping_type = tdaList->list.array[tda]->mappingType;
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
......@@ -1177,7 +1176,6 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
*dci_pdu = 0;
uint16_t alt_size = 0;
uint16_t N_RB;
const int controlResourceSetId = *ss->controlResourceSetId;
if(current_DL_BWP) {
N_RB = get_rb_bwp_dci(dci_format,
ss->searchSpaceType->present,
......
......@@ -307,7 +307,7 @@ long get_K2(NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList,
int time_domain_assignment,
int mu);
NR_tda_info_t nr_get_pdsch_tda_info(const NR_UE_DL_BWP_t *dl_bwp,
NR_tda_info_t nr_get_pdsch_tda_info(const NR_PDSCH_TimeDomainResourceAllocationList_t *tdaList,
const int tda);
NR_tda_info_t nr_get_pusch_tda_info(const NR_UE_UL_BWP_t *ul_bwp,
......
......@@ -667,6 +667,7 @@ static void fill_dci_from_dl_config(nr_downlink_indication_t*dl_ind, fapi_nr_dl_
if (rel15_dci->dci_length_options[j] == dl_ind->dci_ind->dci_list[k].payloadSize) {
dl_ind->dci_ind->dci_list[k].dci_format = rel15_dci->dci_format_options[j];
dl_ind->dci_ind->dci_list[k].ss_type = rel15_dci->dci_type_options[j];
dl_ind->dci_ind->dci_list[k].CoreSetType = rel15_dci->coreset.CoreSetType;
LOG_D(NR_PHY, "format assigned dl_ind->dci_ind->dci_list[k].dci_format %d\n",
dl_ind->dci_ind->dci_list[k].dci_format);
}
......
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