Merge branch 'nr_pdcch' into nr_pdsch

cmake_targets/CMakeLists.txt

@@ -1177,6 +1177,8 @@ set(PHY_SRC_COMMON
   ${OPENAIR1_DIR}/PHY/LTE_REFSIG/lte_dl_mbsfn.c
   ${OPENAIR1_DIR}/PHY/LTE_REFSIG/lte_ul_ref.c
   ${OPENAIR1_DIR}/PHY/CODING/lte_segmentation.c
+  ${OPENAIR1_DIR}/PHY/CODING/nr_segmentation.c
+  ${OPENAIR1_DIR}/PHY/CODING/nr_compute_tbs.c
   ${OPENAIR1_DIR}/PHY/CODING/ccoding_byte.c
   ${OPENAIR1_DIR}/PHY/CODING/ccoding_byte_lte.c
   ${OPENAIR1_DIR}/PHY/CODING/3gpplte_sse.c

openair1/PHY/CODING/coding_defs.h

@@ -430,4 +430,20 @@ uint32_t crcbit (uint8_t * ,
 int16_t reverseBits(int32_t ,int32_t);
 void phy_viterbi_dot11(int8_t *,uint8_t *,uint16_t);
 
+int32_t nr_segmentation(unsigned char *input_buffer,
+                     unsigned char **output_buffers,
+                     unsigned int B,
+                     unsigned int *C,
+                     unsigned int *Kplus,
+                     unsigned int *Kminus,
+					 unsigned int *Zout,
+                     unsigned int *F);
+
+uint32_t nr_compute_tbs(uint8_t mcs,
+						uint16_t nb_rb,
+						uint16_t nb_symb_sch,
+						uint8_t nb_re_dmrs,
+						uint16_t length_dmrs,
+						uint8_t Nl);
+
 #endif

openair1/PHY/CODING/nr_compute_tbs.c

+/*
+ * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.
+ * The OpenAirInterface Software Alliance licenses this file to You under
+ * the OAI Public License, Version 1.1  (the "License"); you may not use this file
+ * except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.openairinterface.org/?page_id=698
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *-------------------------------------------------------------------------------
+ * For more information about the OpenAirInterface (OAI) Software Alliance:
+ *      contact@openairinterface.org
+ */
+
+/* file: nr_compute_tbs.c
+   purpose: Compute NR TBS
+   author: Hongzhi WANG (TCL)
+*/
+#include "PHY/defs_nr_UE.h"
+//#include "SCHED/extern.h"
+
+#define INDEX_MAX_TBS_TABLE (93)
+//Table 5.1.3.1-1
+uint16_t Mcsindextable1[29][3] = {{2,120,0.2344},
+           	   	   	   	   	   	 {2,157,0.3066},
+								 {2,193,0.3770},
+								 {2,251,0.4902},
+								 {2,308,0.6016},
+								 {2,379,0.7402},
+								 {2,449,0.8770},
+								 {2,526,1.0273},
+								 {2,602,1.1758},
+								 {2,679,1.3262},
+								 {4,340,1.3281},
+								 {4,378,1.4766},
+								 {4,434,1.6953},
+								 {4,490,1.9141},
+								 {4,553,2.1602},
+								 {4,616,2.4063},
+								 {4,658,2.5703},
+								 {6,438,2.5664},
+								 {6,466,2.7305},
+								 {6,517,3.0293},
+								 {6,567,3.3223},
+								 {6,616,3.6094},
+								 {6,666,3.9023},
+								 {6,719,4.2129},
+								 {6,772,4.5234},
+								 {6,822,4.8164},
+								 {6,873,5.1152},
+								 {6,910,5.3320},
+								 {6,948,5.5547}};
+//Table 5.1.2.2-2
+uint16_t Tbstable_nr[INDEX_MAX_TBS_TABLE] = {24,32,40,48,56,64,72,80,88,96,104,112,120,128,136,144,152,160,168,176,184,192,208,224,240,256,272,288,304,320,336,352,368,384,408,432,456,480,504,528,552,576,608,640,672,704,736,768,808,848,888,928,984,1032,1064,1128,1160,1192,1224,1256,1288,1320,1352,1416,1480,1544,1608,1672,1736,1800,1864,1928,2024,2088,2152,2216,2280,2408,2472,2536,2600,2664,2728,2792,2856,2976,3104,3240,3368,3496,3624,3752,3824};
+
+uint32_t nr_compute_tbs(uint8_t mcs,
+						uint16_t nb_rb,
+						uint16_t nb_symb_sch,
+						uint8_t nb_re_dmrs,
+						uint16_t length_dmrs,
+						uint8_t Nl)
+{
+	uint16_t nbp_re, nb_re, nb_dmrs_prb, nb_rb_oh, Ninfo,Np_info,n,Qm,R,C;
+	uint32_t nr_tbs;
+
+	nb_rb_oh = 0; //set to 0 if not configured by higher layer
+	Qm = Mcsindextable1[mcs][0];
+	R  = Mcsindextable1[mcs][1];
+	nb_dmrs_prb = nb_re_dmrs*length_dmrs;
+
+	nbp_re = 12 * nb_symb_sch - nb_dmrs_prb - nb_rb_oh;
+
+	nb_re = min(156, nbp_re) * nb_rb;
+
+    // Intermediate number of information bits
+    Ninfo = (nb_re * R * Qm * Nl)/1024;
+
+    //printf("Ninfo %d nbp_re %d nb_re %d Qm %d, R %d\n", Ninfo, nbp_re, nb_re, Qm, R);
+
+    if (Ninfo <=3824) {
+
+    	n = max(3, floor(log2(Ninfo)) - 6);
+        Np_info = max(24, pow(n,2) * floor(Ninfo/pow(n,2)));
+
+        for (int i=0; i<INDEX_MAX_TBS_TABLE; i++) {
+        	if (Tbstable_nr[i] >= Np_info){
+        		nr_tbs = Tbstable_nr[i];
+        		break;
+        	}
+        }
+    }
+    else {
+    	n = floor(log2(Ninfo-24)) - 5;
+        Np_info = max(3840, pow(n,2) * round((Ninfo - 24)/pow(n,2)));
+
+        if (R <= 1024/4) {
+            C = ceil( (Np_info + 24)/3816 );
+            nr_tbs = 8 * C * ceil( (Np_info + 24)/(8*C) ) - 24;
+        }
+        else {
+            if (Np_info > 8424){
+                C = ceil( (Np_info + 24)/8424 );
+                nr_tbs = 8 * C * ceil( (Np_info + 24)/(8*C) ) - 24;
+            }
+            else
+            	nr_tbs = 8 * ceil( (Np_info + 24)/8 ) - 24;
+
+        }
+
+    }
+
+	return nr_tbs;
+}

openair1/PHY/CODING/nr_segmentation.c

@@ -24,8 +24,8 @@
    author: Hongzhi WANG (TCL)
    date: 12.09.2017
 */
-#include "PHY/defs.h"
-#include "SCHED/extern.h"
+#include "PHY/defs_nr_UE.h"
+//#include "SCHED/extern.h"
 
 //#define DEBUG_SEGMENTATION
 

openair1/PHY/NR_TRANSPORT/nr_dci.c

@@ -34,7 +34,7 @@
 
 //#define DEBUG_PDCCH_DMRS
 //#define DEBUG_DCI
-//#define DEBUG_POLAR_PARAMS
+//#define DEBUG_CHANNEL_CODING
 #define PDCCH_TEST_POLAR_TEMP_FIX
 
 extern short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT];
@@ -163,11 +163,13 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
                             nfapi_nr_config_request_t config)
 {
 
-  int16_t mod_dmrs[3][NR_MAX_PDCCH_DMRS_LENGTH>>1]; // 3 for the max coreset duration
+  int16_t mod_dmrs[NR_MAX_CSET_DURATION][NR_MAX_PDCCH_DMRS_LENGTH>>1]; // 3 for the max coreset duration
   uint8_t idx=0;
   uint16_t a;
   int k,l,k_prime,dci_idx, dmrs_idx;
   nr_cce_t cce;
+  nr_reg_t reg;
+  nr_reg_t reg_mapping_list[NR_MAX_PDCCH_AGG_LEVEL*NR_NB_REG_PER_CCE];
 
   /*First iteration: single DCI*/
   NR_gNB_DCI_ALLOC_t dci_alloc = pdcch_vars.dci_alloc[0];
@@ -205,7 +207,8 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
   /// DCI payload processing
     // CRC attachment + Scrambling + Channel coding + Rate matching
   uint32_t encoder_output[NR_MAX_DCI_SIZE_DWORD];
-  uint16_t n_RNTI = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_params.rnti : 0;
+  uint16_t n_RNTI = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? ((pdcch_params.scrambling_id)?pdcch_params.rnti:0) : 0;
+  uint16_t Nid = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_params.scrambling_id : config.sch_config.physical_cell_id.value;
 #ifdef PDCCH_TEST_POLAR_TEMP_FIX
   t_nrPolar_paramsPtr currentPtr = NULL;//, polarParams = NULL;
   nr_polar_init(&currentPtr, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
@@ -216,17 +219,21 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
 #endif
   polar_encoder_dci(dci_alloc.dci_pdu, encoder_output, currentPtr, n_RNTI);
 
-#ifdef DEBUG_POLAR_PARAMS
+#ifdef DEBUG_CHANNEL_CODING
   printf("DCI PDU: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
     		  dci_alloc.dci_pdu[0], dci_alloc.dci_pdu[1], dci_alloc.dci_pdu[2], dci_alloc.dci_pdu[3]);
   printf("Encoded Payload: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
 		  encoder_output[0], encoder_output[1], encoder_output[2], encoder_output[3]);
 #endif
 
+  /// Scrambling
+  uint32_t scrambled_output[NR_MAX_DCI_SIZE_DWORD];
+  nr_pdcch_scrambling(encoder_output, encoded_length, Nid, n_RNTI, scrambled_output);
+
     // QPSK modulation
   int16_t mod_dci[NR_MAX_DCI_SIZE>>1];
   for (int i=0; i<encoded_length>>1; i++) {
-    idx = (((encoder_output[i<<1]>>(i<<1))&1)<<1) ^ ((encoder_output[(i<<1)+1]>>((i<<1)+1))&1);
+    idx = ((((scrambled_output[(i<<1)>>5])>>((i<<1)&0x1f))&1)<<1) ^ (((scrambled_output[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1);
     mod_dci[i<<1] = nr_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
     mod_dci[(i<<1)+1] = nr_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
 #ifdef DEBUG_DCI
@@ -243,24 +250,60 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
     if (cset_start_sc >= frame_parms.ofdm_symbol_size)
       cset_start_sc -= frame_parms.ofdm_symbol_size;
 
-    if (pdcch_params.precoder_granularity == NFAPI_NR_CSET_SAME_AS_REG_BUNDLE) {
 
+    /*Reorder REG list for a freq first mapping*/
+    uint8_t symb_idx[NR_MAX_CSET_DURATION] = {0,0,0};
+    uint8_t nb_regs = dci_alloc.L*NR_NB_REG_PER_CCE;
+    uint8_t regs_per_symb = nb_regs/cset_nsymb;
     for (int cce_idx=0; cce_idx<dci_alloc.L; cce_idx++){
       cce = dci_alloc.cce_list[cce_idx];
       for (int reg_idx=0; reg_idx<NR_NB_REG_PER_CCE; reg_idx++) {
-            k = cset_start_sc + cce.reg_list[reg_idx].start_sc_idx;
+        reg = cce.reg_list[reg_idx];
+        reg_mapping_list[reg.symb_idx*regs_per_symb + symb_idx[reg.symb_idx]++] = reg;
+      }
+    }
+#ifdef DEBUG_DCI
+printf("\n Ordered REG list:\n");
+for (int i=0; i<nb_regs; i++)
+  printf("%d\t",reg_mapping_list[i].reg_idx );
+printf("\n");
+#endif
+
+    if (pdcch_params.precoder_granularity == NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS) {
+    /*in this case the DMRS are mapped on all the coreset*/
+      for (l=cset_start_symb; l<cset_start_symb+ cset_nsymb; l++) {
+        dmrs_idx = 0;
+        k = cset_start_sc + 1;
+        while (dmrs_idx<3*pdcch_params.n_rb) {
+          ((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dmrs[l][dmrs_idx<<1]) >> 15;
+          ((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
+          k+=4;
           if (k >= frame_parms.ofdm_symbol_size)
             k -= frame_parms.ofdm_symbol_size;
-            l = cset_start_symb + cce.reg_list[reg_idx].symb_idx;
-            dmrs_idx = (cce.reg_list[reg_idx].reg_idx/cset_nsymb)*3;
+          dmrs_idx++;
+        }
+      }    
+    }
+
+    /*Now mapping the encoded DCI based on newly constructed REG list
+     * and the DMRS for the precoder granularity same as REG bundle*/
+    for (int reg_idx=0; reg_idx<nb_regs; reg_idx++) {
+      reg = reg_mapping_list[reg_idx];
+      k = cset_start_sc + reg.start_sc_idx;
+      if (k >= frame_parms.ofdm_symbol_size)
+          k -= frame_parms.ofdm_symbol_size;
+      l = cset_start_symb + reg.symb_idx;
+      dmrs_idx = (reg.reg_idx/cset_nsymb)*3;
       k_prime = 0;
       for (int m=0; m<NR_NB_SC_PER_RB; m++) {
-              if ( m == (k_prime<<2)+1) { // DMRS
+        if ( m == (k_prime<<2)+1) { // DMRS if not already mapped
+          if (pdcch_params.precoder_granularity == NFAPI_NR_CSET_SAME_AS_REG_BUNDLE) {
             ((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dmrs[l][dmrs_idx<<1]) >> 15;
             ((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
             k_prime++;
             dmrs_idx++;
           }
+        }
         else { // DCI payload
           ((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dci[dci_idx<<1]) >> 15;
           ((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dci[(dci_idx<<1) + 1]) >> 15;
@@ -272,12 +315,6 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
       }
     }
   }
-    }
-
-    else { //NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS
-    }
-
-  }
 
 #ifdef DEBUG_DCI
   write_output("txdataF_dci.m", "txdataF_dci", txdataF[0], frame_parms.samples_per_frame_wCP>>1, 1, 1);

openair1/PHY/NR_TRANSPORT/nr_dci_tools.c

@@ -31,7 +31,7 @@
  */
 
 #include "nr_dci.h"
-//#define DEBUG_NFAPI_NR_RNTI_RA
+
 
 void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t* dci_alloc, uint16_t n_shift, uint8_t m) {
 
@@ -131,20 +131,6 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
         case NFAPI_NR_RNTI_RA:
         	// Freq domain assignment
         	fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
-        	#ifdef DEBUG_NFAPI_NR_RNTI_RA
-        	printf("frequency_domain_assignment = %05d = %#010x\n"
-        			"     time_domain_assignment = %05d = %#010x\n"
-        			"         vrb_to_prb_mapping = %05d = %#010x\n"
-        			"                        MCS = %05d = %#010x\n"
-        			"                 tb_scaling = %05d = %#010x\n"
-        			"                       N_RB = %05d = %#010x\n"
-        			"                      fsize = %05d = %#010x\n",
-					pdu_rel15->frequency_domain_assignment,pdu_rel15->frequency_domain_assignment,
-					pdu_rel15->time_domain_assignment,pdu_rel15->time_domain_assignment,
-					pdu_rel15->vrb_to_prb_mapping,pdu_rel15->vrb_to_prb_mapping,
-					pdu_rel15->mcs,pdu_rel15->mcs,pdu_rel15->tb_scaling,pdu_rel15->tb_scaling,
-					N_RB,N_RB,fsize,fsize);
-        	#endif
         	for (int i=0; i<fsize; i++)
         		*dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<pos++;
         	// Time domain assignment
@@ -181,49 +167,4 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
   nr_fill_cce_list(dci_alloc, n_shift, cand_idx);
   LOG_I(PHY, "DCI type %d payload (size %d) generated on candidate %d\n", dci_alloc->pdcch_params.dci_format, dci_alloc->size, cand_idx);
 
-  
-
-/*	if (rel15->dci_format == NFAPI_NR_DL_DCI_FORMAT_1_0) {
-		dci_alloc->format = NFAPI_NR_DL_DCI_FORMAT_1_0;
-		dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_dl ,cfg);
-		if (rel15->rnti_type == NFAPI_NR_RNTI_C
-		 || rel15->rnti_type == NFAPI_NR_RNTI_CS
-		 || rel15->rnti_type == NFAPI_NR_RNTI_new) {
-
-		} else if (rel15->rnti_type == NFAPI_NR_RNTI_P) {
-
-		} else if (rel15->rnti_type == NFAPI_NR_RNTI_SI) {
-
-		} else if (rel15->rnti_type == NFAPI_NR_RNTI_RA) {
-
-		} else if (rel15->rnti_type == NFAPI_NR_RNTI_TC) {
-
-		} else {
-			AssertFatal(1==0, "[nr_fill_dci_and_dlsch] Incorrect DCI Format(%d) and RNTI Type(%d) combination",rel15->dci_format, rel15->rnti_type);
-		}
-	} else if (rel15->dci_format == NFAPI_NR_UL_DCI_FORMAT_0_0) {
-		dci_alloc->format = NFAPI_NR_UL_DCI_FORMAT_0_0;
-		dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_ul ,cfg);
-	} else if (rel15->dci_format == NFAPI_NR_DL_DCI_FORMAT_1_1) {
-		dci_alloc->format = NFAPI_NR_DL_DCI_FORMAT_1_1;
-		dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_dl ,cfg);
-	} else if (rel15->dci_format == NFAPI_NR_UL_DCI_FORMAT_0_1) {
-		dci_alloc->format = NFAPI_NR_UL_DCI_FORMAT_0_1;
-		dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_ul ,cfg);
-	} else if (rel15->dci_format == NFAPI_NR_DL_DCI_FORMAT_2_0) {
-		dci_alloc->format = NFAPI_NR_DL_DCI_FORMAT_2_0;
-		dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_dl ,cfg);
-	} else if (rel15->dci_format == NFAPI_NR_DL_DCI_FORMAT_2_1) {
-		dci_alloc->format = NFAPI_NR_DL_DCI_FORMAT_2_1;
-		dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_dl ,cfg);
-	} else if (rel15->dci_format == NFAPI_NR_DL_DCI_FORMAT_2_2) {
-		dci_alloc->format = NFAPI_NR_DL_DCI_FORMAT_2_2;
-		dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_dl ,cfg);
-	} else if (rel15->dci_format == NFAPI_NR_DL_DCI_FORMAT_2_3) {
-		dci_alloc->format = NFAPI_NR_DL_DCI_FORMAT_2_3;
-		dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_dl ,cfg);
-	} else {
-		AssertFatal(1==0, "[nr_fill_dci_and_dlsch] Incorrect DCI Format(%d)",rel15->dci_format);
-	}*/
-
 }

openair1/PHY/defs_nr_common.h

@@ -79,6 +79,7 @@
 #define NR_MAX_NUM_BWP 4
 
 #define NR_MAX_PDCCH_AGG_LEVEL 16
+#define NR_MAX_CSET_DURATION 3
 
 typedef enum {
   NR_MU_0=0,
@@ -126,7 +127,7 @@ typedef struct NR_BWP_PARMS {
 
 typedef struct {
   uint8_t reg_idx;
-  uint8_t start_sc_idx;
+  uint16_t start_sc_idx;
   uint8_t symb_idx;
 } nr_reg_t;