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Commit 361dfc3c authored by Robert Schmidt's avatar Robert Schmidt
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Merge remote-tracking branch 'origin/NR_UL_256QAM_new' into integration_2023_w16b

parents 8482cb62 db2aa3c8
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cmake_targets/autotests/test_case_list.xml
View file @ 361dfc3c
......@@ -351,22 +351,24 @@
</testCase>
<testCase id="nr_ulsim.misc">
<desc>nr_ulsim Test cases. (Test1: MCS 9, 106 PRBs),
(Test2: MCS 16, 50 PRBs),
(Test3: MCS 28, 50 PRBs),
(Test4: MCS 9, 217 PRBs),
(Test5: MCS 9, 273 PRBs),
(Test6: PUSCH Type A, 2 DMRS Symbols),
(Test7: PUSCH Type A, 3 DMRS, 4 PTRS, 5 Interpolated Symbols),
(Test8: PUSCH Type B, 3 DMRS, 2 PTRS, 7 Interpolated Symbols),
(Test9: PUSCH Type B, 3 DMRS, 2 PTRS, 3 Interpolated Symbols),
(Test10: 25 PRBs, 15 kHz SCS),
(Test11: MCS 0, low SNR performance)
(Test12: MCS 28, 106 PRBs, Time shift 8)</desc>
<desc>nr_ulsim Test cases. (Test1: MCS 9 106 PRBs),
(Test2: MCS 16 50 PRBs),
(Test3: MCS 28 50 PRBs),
(Test4: MCS 27 50 PRBs 256QAM),
(Test5: MCS 9 217 PRBs),
(Test6: MCS 9 273 PRBs),
(Test7: PUSCH Type A, 2 DMRS Symbols),
(Test8: PUSCH Type A, 3 DMRS, 4 PTRS, 5 Interpolated Symbols),
(Test9: PUSCH Type B, 3 DMRS, 2 PTRS, 7 Interpolated Symbols),
(Test10: PUSCH Type B, 3 DMRS, 2 PTRS, 3 Interpolated Symbols),
(Test11: 25 PRBs, 15 kHz SCS),
(Test12: MCS 0, low SNR performance)
(Test13: MCS 28, 106 PRBs, Time shift 8)</desc>
<main_exec>nr_ulsim</main_exec>
<main_exec_args>-n100 -m9 -r106 -s5
-n100 -m16 -s10
-n100 -m28 -s20
-n100 -m27 -s25 -q1
-n100 -m9 -R217 -r217 -s5
-n100 -m9 -R273 -r273 -s5
-n100 -s5 -U 0,1,1,1
......@@ -376,7 +378,7 @@
-n100 -u0 -m0 -R25 -r25 -i 1,0
-n100 -m0 -S -0.6 -i 1,0
-n100 -m 28 -R106 -r106 -t90 -s24 -S24 -d 8</main_exec_args>
<tags>test1 test2 test3 test4 test5 test6 test7 test8 test9 test10 test11 test12</tags>
<tags>test1 test2 test3 test4 test5 test6 test7 test8 test9 test10 test11 test12 test13</tags>
<search_expr_true>PUSCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
......
doc/FEATURE_SET.md
View file @ 361dfc3c
......@@ -259,6 +259,7 @@ The following features are valid for the gNB and the 5G-NR UE.
- PTRS support
- Support for 1, 2 and 4 TX antennas
- Support for up to 2 layers (currently limited to DMRS configuration type 2)
- Support for 256 QAM
* NR-CSIRS Generation of sequence at PHY
* NR-PUSCH (including Segmentation, LDPC encoding, rate matching, scrambling, modulation, RB mapping, etc).
- PUSCH mapping type A and B
......@@ -267,6 +268,7 @@ The following features are valid for the gNB and the 5G-NR UE.
- PTRS support
- Support for up to 2 RX antenna
- Support for up to 2 layers
- Support for 256 QAM
* NR-PUCCH
- Format 0 (2 bits, for ACK/NACK and SR)
- Format 2 (up to 11 bits, mainly for CSI feedback)
......
openair1/PHY/INIT/nr_init.c
View file @ 361dfc3c
......@@ -706,23 +706,24 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB)
pusch->rxdataF_comp = (int32_t **)malloc16(n_buf * sizeof(int32_t *));
pusch->ul_ch_mag0 = (int32_t **)malloc16(n_buf * sizeof(int32_t *));
pusch->ul_ch_magb0 = (int32_t **)malloc16(n_buf * sizeof(int32_t *));
pusch->ul_ch_magc0 = (int32_t **)malloc16(n_buf * sizeof(int32_t *));
pusch->ul_ch_mag = (int32_t **)malloc16(n_buf * sizeof(int32_t *));
pusch->ul_ch_magb = (int32_t **)malloc16(n_buf * sizeof(int32_t *));
pusch->ul_ch_magc = (int32_t **)malloc16(n_buf * sizeof(int32_t *));
pusch->rho = (int32_t ***)malloc16(Prx * sizeof(int32_t **));
pusch->llr_layers = (int16_t **)malloc16(max_ul_mimo_layers * sizeof(int32_t *));
for (i=0; i<Prx; i++) {
for (i = 0; i < Prx; i++) {
pusch->rxdataF_ext[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * nb_re_pusch2 * fp->symbols_per_slot);
pusch->rho[i] = (int32_t **)malloc16_clear(NR_MAX_NB_LAYERS * NR_MAX_NB_LAYERS * sizeof(int32_t *));
for (int j=0; j< max_ul_mimo_layers; j++) {
for (int k=0; k<max_ul_mimo_layers; k++) {
for (int j = 0; j < max_ul_mimo_layers; j++) {
for (int k = 0; k < max_ul_mimo_layers; k++) {
pusch->rho[i][j * max_ul_mimo_layers + k] =
(int32_t *)malloc16_clear(sizeof(int32_t) * nb_re_pusch2 * fp->symbols_per_slot);
}
}
}
for (i=0; i<n_buf; i++) {
for (i = 0; i < n_buf; i++) {
pusch->ul_ch_estimates[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * fp->ofdm_symbol_size * fp->symbols_per_slot);
pusch->ul_ch_estimates_ext[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * nb_re_pusch2 * fp->symbols_per_slot);
pusch->ul_ch_estimates_time[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * fp->ofdm_symbol_size);
......@@ -730,8 +731,10 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB)
pusch->rxdataF_comp[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * nb_re_pusch2 * fp->symbols_per_slot);
pusch->ul_ch_mag0[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * nb_re_pusch2 * fp->symbols_per_slot);
pusch->ul_ch_magb0[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * nb_re_pusch2 * fp->symbols_per_slot);
pusch->ul_ch_magc0[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * nb_re_pusch2 * fp->symbols_per_slot);
pusch->ul_ch_mag[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * nb_re_pusch2 * fp->symbols_per_slot);
pusch->ul_ch_magb[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * nb_re_pusch2 * fp->symbols_per_slot);
pusch->ul_ch_magc[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * nb_re_pusch2 * fp->symbols_per_slot);
}
for (i=0; i< max_ul_mimo_layers; i++) {
......@@ -869,8 +872,10 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
free_and_zero(pusch_vars->rxdataF_comp[i]);
free_and_zero(pusch_vars->ul_ch_mag0[i]);
free_and_zero(pusch_vars->ul_ch_magb0[i]);
free_and_zero(pusch_vars->ul_ch_magc0[i]);
free_and_zero(pusch_vars->ul_ch_mag[i]);
free_and_zero(pusch_vars->ul_ch_magb[i]);
free_and_zero(pusch_vars->ul_ch_magc[i]);
}
free_and_zero(pusch_vars->llr_layers);
free_and_zero(pusch_vars->rxdataF_ext);
......@@ -882,8 +887,10 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
free_and_zero(pusch_vars->rxdataF_comp);
free_and_zero(pusch_vars->ul_ch_mag0);
free_and_zero(pusch_vars->ul_ch_magb0);
free_and_zero(pusch_vars->ul_ch_magc0);
free_and_zero(pusch_vars->ul_ch_mag);
free_and_zero(pusch_vars->ul_ch_magb);
free_and_zero(pusch_vars->ul_ch_magc);
free_and_zero(pusch_vars->rho);
free_and_zero(pusch_vars->llr);
......
openair1/PHY/NR_TRANSPORT/nr_transport_proto.h
View file @ 361dfc3c
......@@ -176,8 +176,9 @@ void nr_ulsch_channel_level(int **ul_ch_estimates_ext,
/** \brief This function performs channel compensation (matched filtering) on the received RBs for this allocation. In addition, it computes the squared-magnitude of the channel with weightings for 16QAM/64QAM detection as well as dual-stream detection (cross-correlation)
@param rxdataF_ext Frequency-domain received signal in RBs to be demodulated
@param ul_ch_estimates_ext Frequency-domain channel estimates in RBs to be demodulated
@param ul_ch_mag First Channel magnitudes (16QAM/64QAM)
@param ul_ch_magb Second weighted Channel magnitudes (64QAM)
@param ul_ch_mag First Channel magnitudes (16QAM/64QAM/256QAM)
@param ul_ch_magb Second weighted Channel magnitudes (64QAM/256QAM)
@param ul_ch_magc Third weighted Channel magnitudes (256QAM)
@param rxdataF_comp Compensated received waveform
@param frame_parms Pointer to frame descriptor
@param symbol Symbol on which to operate
......@@ -189,6 +190,7 @@ void nr_ulsch_channel_compensation(int **rxdataF_ext,
int **ul_ch_estimates_ext,
int **ul_ch_mag,
int **ul_ch_magb,
int **ul_ch_magc,
int **rxdataF_comp,
int ***rho,
NR_DL_FRAME_PARMS *frame_parms,
......@@ -250,6 +252,23 @@ void nr_ulsch_64qam_llr(int32_t *rxdataF_comp,
uint32_t nb_re,
uint8_t symbol);
/** \brief This function generates log-likelihood ratios (decoder input) for single-stream 256 QAM received waveforms.
@param rxdataF_comp Compensated channel output
@param ul_ch_mag uplink channel magnitude multiplied by the 1st amplitude threshold in QAM 256
@param ul_ch_magb uplink channel magnitude multiplied by the 2bd amplitude threshold in QAM 256
@param ul_ch_magc uplink channel magnitude multiplied by the 3rd amplitude threshold in QAM 256
@param ulsch_llr llr output
@param nb_re number of REs for this allocation
@param symbol OFDM symbol index in sub-frame
*/
void nr_ulsch_256qam_llr(int32_t *rxdataF_comp,
int32_t **ul_ch_mag,
int32_t **ul_ch_magb,
int32_t **ul_ch_magc,
int16_t *ulsch_llr,
uint32_t nb_rb,
uint32_t nb_re,
uint8_t symbol);
/** \brief This function computes the log-likelihood ratios for 4, 16, and 64 QAM
@param rxdataF_comp Compensated channel output
......@@ -263,6 +282,7 @@ void nr_ulsch_64qam_llr(int32_t *rxdataF_comp,
void nr_ulsch_compute_llr(int32_t *rxdataF_comp,
int32_t *ul_ch_mag,
int32_t *ul_ch_magb,
int32_t *ul_ch_magc,
int16_t *ulsch_llr,
uint32_t nb_rb,
uint32_t nb_re,
......
openair1/PHY/NR_TRANSPORT/nr_ulsch_llr_computation.c
View file @ 361dfc3c
......@@ -352,10 +352,118 @@ void nr_ulsch_64qam_llr(int32_t *rxdataF_comp,
#endif
}
void nr_ulsch_256qam_llr(int32_t *rxdataF_comp,
int32_t *ul_ch_mag,
int32_t *ul_ch_magb,
int32_t *ul_ch_magc,
int16_t *ulsch_llr,
uint32_t nb_rb,
uint32_t nb_re,
uint8_t symbol)
{
int off = ((nb_rb&1) == 1)? 4:0;
simde__m256i *rxF = (simde__m256i*)rxdataF_comp;
simde__m256i *ch_mag,*ch_magb,*ch_magc;
register simde__m256i xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6;
simde__m256i *llr256=(simde__m256i*)ulsch_llr;
ch_mag = (simde__m256i*)&ul_ch_mag[(symbol*(off+(nb_rb*12)))];
ch_magb = (simde__m256i*)&ul_ch_magb[(symbol*(off+(nb_rb*12)))];
ch_magc = (simde__m256i*)&ul_ch_magc[(symbol*(off+(nb_rb*12)))];
int len_mod8 = nb_re&7;
int nb_re256 = nb_re>>3; // length in 256-bit words (8 REs)
for (int i=0; i<nb_re256; i++) {
xmm0 = simde_mm256_abs_epi16(rxF[i]); // registers of even index in xmm0-> |y_R|, registers of odd index in xmm0-> |y_I|
xmm0 = simde_mm256_subs_epi16(ch_mag[i],xmm0); // registers of even index in xmm0-> |y_R|-|h|^2, registers of odd index in xmm0-> |y_I|-|h|^2
// xmmtmpD2 contains 16 LLRs
xmm1 = simde_mm256_abs_epi16(xmm0);
xmm1 = simde_mm256_subs_epi16(ch_magb[i],xmm1); // contains 16 LLRs
xmm2 = simde_mm256_abs_epi16(xmm1);
xmm2 = simde_mm256_subs_epi16(ch_magc[i],xmm2); // contains 16 LLRs
// rxF[i] A0 A1 A2 A3 A4 A5 A6 A7 bits 7,6
// xmm0 B0 B1 B2 B3 B4 B5 B6 B7 bits 5,4
// xmm1 C0 C1 C2 C3 C4 C5 C6 C7 bits 3,2
// xmm2 D0 D1 D2 D3 D4 D5 D6 D7 bits 1,0
xmm3 = simde_mm256_unpacklo_epi32(rxF[i],xmm0); // A0 B0 A1 B1 A4 B4 A5 B5
xmm4 = simde_mm256_unpackhi_epi32(rxF[i],xmm0); // A2 B2 A3 B3 A6 B6 A7 B7
xmm5 = simde_mm256_unpacklo_epi32(xmm1,xmm2); // C0 D0 C1 D1 C4 D4 C5 D5
xmm6 = simde_mm256_unpackhi_epi32(xmm1,xmm2); // C2 D2 C3 D3 C6 D6 C7 D7
xmm0 = simde_mm256_unpacklo_epi64(xmm3,xmm5); // A0 B0 C0 D0 A4 B4 C4 D4
xmm1 = simde_mm256_unpackhi_epi64(xmm3,xmm5); // A1 B1 C1 D1 A5 B5 C5 D5
xmm2 = simde_mm256_unpacklo_epi64(xmm4,xmm6); // A2 B2 C2 D2 A6 B6 C6 D6
xmm3 = simde_mm256_unpackhi_epi64(xmm4,xmm6); // A3 B3 C3 D3 A7 B7 C7 D7
llr256[0] = simde_mm256_permute2x128_si256(xmm0, xmm1, 0x20); // A0 B0 C0 D0 A1 B1 C1 D1
llr256[1] = simde_mm256_permute2x128_si256(xmm2, xmm3, 0x20); // A2 B2 C2 D2 A3 B3 C3 D3
llr256[2] = simde_mm256_permute2x128_si256(xmm0, xmm1, 0x31); // A4 B4 C4 D4 A5 B5 C5 D5
llr256[3] = simde_mm256_permute2x128_si256(xmm2, xmm3, 0x31); // A6 B6 C6 D6 A7 B7 C7 D7
llr256+=4;
}
simde__m128i *llr128 = (simde__m128i*)llr256;
if (len_mod8 >= 4) {
int nb_re128 = nb_re>>2;
simde__m128i xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6;
simde__m128i *rxF = (simde__m128i*)rxdataF_comp;
simde__m128i *ch_mag = (simde__m128i*)&ul_ch_mag[(symbol*(off+(nb_rb*12)))];
simde__m128i *ch_magb = (simde__m128i*)&ul_ch_magb[(symbol*(off+(nb_rb*12)))];
simde__m128i *ch_magc = (simde__m128i*)&ul_ch_magc[(symbol*(off+(nb_rb*12)))];
xmm0 = simde_mm_abs_epi16(rxF[nb_re128-1]); // registers of even index in xmm0-> |y_R|, registers of odd index in xmm0-> |y_I|
xmm0 = simde_mm_subs_epi16(ch_mag[nb_re128-1],xmm0); // registers of even index in xmm0-> |y_R|-|h|^2, registers of odd index in xmm0-> |y_I|-|h|^2
// xmmtmpD2 contains 8 LLRs
xmm1 = simde_mm_abs_epi16(xmm0);
xmm1 = simde_mm_subs_epi16(ch_magb[nb_re128-1],xmm1); // contains 8 LLRs
xmm2 = simde_mm_abs_epi16(xmm1);
xmm2 = simde_mm_subs_epi16(ch_magc[nb_re128-1],xmm2); // contains 8 LLRs
// rxF[i] A0 A1 A2 A3
// xmm0 B0 B1 B2 B3
// xmm1 C0 C1 C2 C3
// xmm2 D0 D1 D2 D3
xmm3 = simde_mm_unpacklo_epi32(rxF[nb_re128-1],xmm0); // A0 B0 A1 B1
xmm4 = simde_mm_unpackhi_epi32(rxF[nb_re128-1],xmm0); // A2 B2 A3 B3
xmm5 = simde_mm_unpacklo_epi32(xmm1,xmm2); // C0 D0 C1 D1
xmm6 = simde_mm_unpackhi_epi32(xmm1,xmm2); // C2 D2 C3 D3
llr128[0] = simde_mm_unpacklo_epi64(xmm3,xmm5); // A0 B0 C0 D0
llr128[1] = simde_mm_unpackhi_epi64(xmm3,xmm5); // A1 B1 C1 D1
llr128[2] = simde_mm_unpacklo_epi64(xmm4,xmm6); // A2 B2 C2 D2
llr128[3] = simde_mm_unpackhi_epi64(xmm4,xmm6); // A3 B3 C3 D3
llr128+=4;
}
if (len_mod8 == 6) {
int nb_re64 = nb_re>>1;
simde__m64 *llr64 = (simde__m64 *)llr128;
simde__m64 xmm0,xmm1,xmm2;
simde__m64 *rxF = (simde__m64*)rxdataF_comp;
simde__m64 *ch_mag = (simde__m64*)&ul_ch_mag[(symbol*(off+(nb_rb*12)))];
simde__m64 *ch_magb = (simde__m64*)&ul_ch_magb[(symbol*(off+(nb_rb*12)))];
simde__m64 *ch_magc = (simde__m64*)&ul_ch_magc[(symbol*(off+(nb_rb*12)))];
xmm0 = simde_mm_abs_pi16(rxF[nb_re64-1]); // registers of even index in xmm0-> |y_R|, registers of odd index in xmm0-> |y_I|
xmm0 = simde_mm_subs_pi16(ch_mag[nb_re-1],xmm0); // registers of even index in xmm0-> |y_R|-|h|^2, registers of odd index in xmm0-> |y_I|-|h|^2
// xmmtmpD2 contains 4 LLRs
xmm1 = simde_mm_abs_pi16(xmm0);
xmm1 = simde_mm_subs_pi16(ch_magb[nb_re64-1],xmm1); // contains 4 LLRs
xmm2 = simde_mm_abs_pi16(xmm1);
xmm2 = simde_mm_subs_pi16(ch_magc[nb_re64-1],xmm2); // contains 4 LLRs
// rxF[i] A0 A1
// xmm0 B0 B1
// xmm1 C0 C1
// xmm2 D0 D1
llr64[0] = simde_m_punpckldq(rxF[nb_re64-1],xmm0); // A0 B0
llr64[2] = simde_m_punpckhdq(rxF[nb_re64-1],xmm0); // A1 B1
llr64[1] = simde_m_punpckldq(xmm1,xmm2); // C0 D0
llr64[3] = simde_m_punpckhdq(xmm1,xmm2); // C1 D1
}
}
void nr_ulsch_compute_llr(int32_t *rxdataF_comp,
int32_t *ul_ch_mag,
int32_t *ul_ch_magb,
int32_t *ul_ch_magc,
int16_t *ulsch_llr,
uint32_t nb_rb,
uint32_t nb_re,
......@@ -386,8 +494,18 @@ void nr_ulsch_compute_llr(int32_t *rxdataF_comp,
nb_re,
symbol);
break;
case 8:
nr_ulsch_256qam_llr(rxdataF_comp,
ul_ch_mag,
ul_ch_magb,
ul_ch_magc,
ulsch_llr,
nb_rb,
nb_re,
symbol);
break;
default:
LOG_E(PHY,"nr_ulsch_compute_llr: invalid Qm value, symbol = %d, Qm = %d\n",symbol, mod_order);
AssertFatal(1==0,"nr_ulsch_compute_llr: invalid Qm value, symbol = %d, Qm = %d\n",symbol, mod_order);
break;
}
}
openair1/PHY/defs_gNB.h
View file @ 361dfc3c
......@@ -353,28 +353,40 @@ typedef struct {
/// - first index: rx antenna id [0..nb_antennas_rx[
/// - second index: ? [0..12*N_RB_UL*frame_parms->symbols_per_tti[
int32_t **ul_ch_magb;
/// \brief Magnitude of the UL channel estimates scaled for 4th bit level thresholds in LLR computation
/// - first index: rx antenna id [0..nb_antennas_rx[
/// - second index: ? [0..12*N_RB_UL*frame_parms->symbols_per_tti[
int32_t **ul_ch_magc;
/// \brief Cross-correlation of two UE signals.
/// - first index: rx antenna [0..nb_antennas_rx[
/// - second index: symbol [0..]
int32_t ***rho;
/// \f$\log_2(\max|H_i|^2)\f$
int16_t log2_maxh;
/// \brief Magnitude of Uplink Channel first layer (16QAM level/First 64QAM level).
/// \brief Magnitude of Uplink Channel first layer (16QAM level/First 64QAM level/First 256QAM level).
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_UL[
int32_t **ul_ch_mag0;
/// \brief Magnitude of Uplink Channel second layer (16QAM level/First 64QAM level).
/// \brief Magnitude of Uplink Channel second layer (16QAM level/First 64QAM level/First 256QAM level).
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_UL[
int32_t **ul_ch_mag1[8][8];
/// \brief Magnitude of Uplink Channel, first layer (2nd 64QAM level).
/// \brief Magnitude of Uplink Channel, first layer (2nd 64QAM/256QAM level).
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_UL[
int32_t **ul_ch_magb0;
/// \brief Magnitude of Uplink Channel second layer (2nd 64QAM level).
/// \brief Magnitude of Uplink Channel second layer (2nd 64QAM/256QAM level).
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_UL[
int32_t **ul_ch_magb1[8][8];
/// \brief Magnitude of Uplink Channel, first layer (3rd 256QAM level).
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_UL[
int32_t **ul_ch_magc0;
/// \brief Magnitude of Uplink Channel second layer (3rd 256QAM level).
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_UL[
int32_t **ul_ch_magc1[8][8];
/// measured RX power based on DRS
int ulsch_power[8];
/// total signal over antennas
......
openair1/SIMULATION/NR_PHY/dlsim.c
View file @ 361dfc3c
......@@ -707,7 +707,7 @@ int main(int argc, char **argv)
NR_UE_NR_Capability_t* UE_Capability_nr = CALLOC(1,sizeof(NR_UE_NR_Capability_t));
prepare_sim_uecap(UE_Capability_nr,scc,mu,
N_RB_DL,g_mcsTableIdx);
N_RB_DL,g_mcsTableIdx,0);
// TODO do a UECAP for phy-sim
const gNB_RrcConfigurationReq conf = {
......
openair1/SIMULATION/NR_PHY/ulschsim.c
View file @ 361dfc3c
......@@ -169,6 +169,7 @@ int main(int argc, char **argv)
uint8_t Imcs = 9;
uint8_t Nl = 1;
uint8_t max_ldpc_iterations = 5;
uint8_t mcs_table = 0;
double DS_TDL = .03;
......@@ -182,7 +183,7 @@ int main(int argc, char **argv)
randominit(0);
//while ((c = getopt(argc, argv, "df:hpg:i:j:n:l:m:r:s:S:y:z:M:N:F:R:P:")) != -1) {
while ((c = getopt(argc, argv, "hg:n:s:S:py:z:M:N:R:F:m:l:r:W:")) != -1) {
while ((c = getopt(argc, argv, "hg:n:s:S:py:z:M:N:R:F:m:l:q:r:W:")) != -1) {
switch (c) {
/*case 'f':
write_output_file = 1;
......@@ -346,6 +347,10 @@ int main(int argc, char **argv)
nb_symb_sch = atoi(optarg);
break;
case 'q':
mcs_table = atoi(optarg);
break;
case 'r':
nb_rb = atoi(optarg);
break;
......@@ -476,8 +481,8 @@ int main(int argc, char **argv)
if ((Nl==4)||(Nl==3))
nb_re_dmrs = nb_re_dmrs*2;
mod_order = nr_get_Qm_ul(Imcs, 0);
code_rate = nr_get_code_rate_ul(Imcs, 0);
mod_order = nr_get_Qm_ul(Imcs, mcs_table);
code_rate = nr_get_code_rate_ul(Imcs, mcs_table);
available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, Nl);
TBS = nr_compute_tbs(mod_order,code_rate, nb_rb, nb_symb_sch, nb_re_dmrs*length_dmrs, 0, 0, Nl);
......@@ -513,6 +518,7 @@ int main(int argc, char **argv)
N_RE_prime = NR_NB_SC_PER_RB*nb_symb_sch - nb_re_dmrs - N_PRB_oh;
ulsch_ue->pusch_pdu.rnti = n_rnti;
ulsch_ue->pusch_pdu.mcs_table = mcs_table;
ulsch_ue->pusch_pdu.mcs_index = Imcs;
ulsch_ue->pusch_pdu.nrOfLayers = Nl;
ulsch_ue->pusch_pdu.rb_size = nb_rb;
......
openair1/SIMULATION/NR_PHY/ulsim.c
View file @ 361dfc3c
......@@ -631,6 +631,10 @@ int main(int argc, char **argv)
NR_ServingCellConfig_t *scd = calloc(1,sizeof(NR_ServingCellConfig_t));
prepare_scd(scd);
NR_UE_NR_Capability_t* UE_Capability_nr = CALLOC(1,sizeof(NR_UE_NR_Capability_t));
prepare_sim_uecap(UE_Capability_nr,scc,mu,
N_RB_UL,0,mcs_table);
// TODO do a UECAP for phy-sim
const gNB_RrcConfigurationReq conf = {
.pdsch_AntennaPorts = { .N1 = 1, .N2 = 1, .XP = 1 },
......@@ -640,7 +644,8 @@ int main(int argc, char **argv)
.do_SRS = 0,
.force_256qam_off = false
};
NR_CellGroupConfig_t *secondaryCellGroup = get_default_secondaryCellGroup(scc, scd, NULL, 0, 1, &conf, 0);
NR_CellGroupConfig_t *secondaryCellGroup = get_default_secondaryCellGroup(scc, scd, UE_Capability_nr, 0, 1, &conf, 0);
/* RRC parameter validation for secondaryCellGroup */
fix_scd(scd);
......
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
View file @ 361dfc3c
......@@ -3836,7 +3836,7 @@ uint8_t get_pusch_mcs_table(long *mcs_Table,
if (*mcs_Table == NR_PUSCH_Config__mcs_Table_qam256)
return 1;
else
return (2+(is_tp<<1));
return (2 + (is_tp << 1));
}
else {
if ((*mcs_Table == NR_PUSCH_Config__mcs_Table_qam256) &&
......@@ -3847,14 +3847,12 @@ uint8_t get_pusch_mcs_table(long *mcs_Table,
if ((*mcs_Table == NR_PUSCH_Config__mcs_Table_qam64LowSE) &&
(target_ss == NR_SearchSpace__searchSpaceType_PR_ue_Specific) &&
((rnti_type == NR_RNTI_C ) || (rnti_type == NR_RNTI_SP_CSI)))
return (2+(is_tp<<1));
return (2 + (is_tp << 1));
if (rnti_type == NR_RNTI_MCS_C)
return (2+(is_tp<<1));
AssertFatal(1==0,"Invalid configuration to set MCS table");
return (2 + (is_tp << 1));
}
}
else
return (0+(is_tp*3));
return (0 + (is_tp * 3));
}
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
View file @ 361dfc3c
......@@ -1662,7 +1662,8 @@ void pf_ul(module_id_t module_id,
}
const NR_bler_options_t *bo = &nrmac->ul_bler;
const int max_mcs = bo->max_mcs; /* no per-user maximum MCS yet */
const int max_mcs_table = (current_BWP->mcs_table == 0 || current_BWP->mcs_table == 2) ? 28 : 27;
const int max_mcs = min(bo->max_mcs, max_mcs_table); /* no per-user maximum MCS yet */
if (bo->harq_round_max == 1)
sched_pusch->mcs = max_mcs;
else
......@@ -2102,7 +2103,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
sched_ctrl->last_ul_slot = sched_pusch->slot;
LOG_D(NR_MAC,
"ULSCH/PUSCH: %4d.%2d RNTI %04x UL sched %4d.%2d DCI L %d start %2d RBS %3d startSymbol %2d nb_symbol %2d dmrs_pos %x MCS %2d nrOfLayers %2d num_dmrs_cdm_grps_no_data %2d TBS %4d HARQ PID %2d round %d RV %d NDI %d est %6d sched %6d est BSR %6d TPC %d\n",
"ULSCH/PUSCH: %4d.%2d RNTI %04x UL sched %4d.%2d DCI L %d start %2d RBS %3d startSymbol %2d nb_symbol %2d dmrs_pos %x MCS Table %2d MCS %2d nrOfLayers %2d num_dmrs_cdm_grps_no_data %2d TBS %4d HARQ PID %2d round %d RV %d NDI %d est %6d sched %6d est BSR %6d TPC %d\n",
frame,
slot,
rnti,
......@@ -2114,6 +2115,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
sched_pusch->tda_info.startSymbolIndex,
sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.ul_dmrs_symb_pos,
current_BWP->mcs_table,
sched_pusch->mcs,
sched_pusch->nrOfLayers,
sched_pusch->dmrs_info.num_dmrs_cdm_grps_no_data,
......
openair2/RRC/NR/nr_rrc_config.c
View file @ 361dfc3c
......@@ -619,7 +619,8 @@ void prepare_sim_uecap(NR_UE_NR_Capability_t *cap,
NR_ServingCellConfigCommon_t *scc,
int numerology,
int rbsize,
int mcs_table) {
int mcs_table_dl,
int mcs_table_ul) {
NR_Phy_Parameters_t *phy_Parameters = &cap->phy_Parameters;
int band = *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0];
......@@ -627,10 +628,15 @@ void prepare_sim_uecap(NR_UE_NR_Capability_t *cap,
nr_bandnr->bandNR = band;
asn1cSeqAdd(&cap->rf_Parameters.supportedBandListNR.list,
nr_bandnr);
if (mcs_table == 1) {
NR_BandNR_t *bandNRinfo = cap->rf_Parameters.supportedBandListNR.list.array[0];
if (mcs_table_ul == 1) {
bandNRinfo->pusch_256QAM = CALLOC(1,sizeof(*bandNRinfo->pusch_256QAM));
*bandNRinfo->pusch_256QAM = NR_BandNR__pusch_256QAM_supported;
}
if (mcs_table_dl == 1) {
int bw = get_supported_band_index(numerology, band, rbsize);
if (band>256) {
NR_BandNR_t *bandNRinfo = cap->rf_Parameters.supportedBandListNR.list.array[0];
bandNRinfo->pdsch_256QAM_FR2 = CALLOC(1,sizeof(*bandNRinfo->pdsch_256QAM_FR2));
*bandNRinfo->pdsch_256QAM_FR2 = NR_BandNR__pdsch_256QAM_FR2_supported;
}
......@@ -949,11 +955,54 @@ static void scheduling_request_config(const NR_ServingCellConfigCommon_t *scc, N
asn1cSeqAdd(&pucch_Config->schedulingRequestResourceToAddModList->list,schedulingRequestResourceConfig);
}
static void set_ul_mcs_table(const NR_UE_NR_Capability_t *cap,
const NR_ServingCellConfigCommon_t *scc,
NR_PUSCH_Config_t *pusch_Config)
{
if (cap == NULL){
pusch_Config->mcs_Table = NULL;
return;
}
int band;
if (scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList)
band = *scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0];
else
band = *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0];
bool supported = false;
for (int i=0;i<cap->rf_Parameters.supportedBandListNR.list.count;i++) {
NR_BandNR_t *bandNRinfo = cap->rf_Parameters.supportedBandListNR.list.array[i];
if(bandNRinfo->bandNR == band && bandNRinfo->pusch_256QAM) {
supported = true;
break;
}
}
if (supported) {
if(pusch_Config->transformPrecoder == NULL ||
*pusch_Config->transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) {
if(pusch_Config->mcs_Table == NULL)
pusch_Config->mcs_Table = calloc(1, sizeof(*pusch_Config->mcs_Table));
*pusch_Config->mcs_Table = NR_PUSCH_Config__mcs_Table_qam256;
}
else {
if(pusch_Config->mcs_TableTransformPrecoder == NULL)
pusch_Config->mcs_TableTransformPrecoder = calloc(1, sizeof(*pusch_Config->mcs_TableTransformPrecoder));
*pusch_Config->mcs_TableTransformPrecoder = NR_PUSCH_Config__mcs_TableTransformPrecoder_qam256;
}
}
else {
pusch_Config->mcs_Table = NULL;
pusch_Config->mcs_TableTransformPrecoder = NULL;
}
}
static void set_dl_mcs_table(int scs,
const NR_UE_NR_Capability_t *cap,
NR_BWP_DownlinkDedicated_t *bwp_Dedicated,
const NR_ServingCellConfigCommon_t *scc)
{
if (cap == NULL){
bwp_Dedicated->pdsch_Config->choice.setup->mcs_Table = NULL;
return;
......@@ -992,7 +1041,9 @@ static void set_dl_mcs_table(int scs,
bwp_Dedicated->pdsch_Config->choice.setup->mcs_Table = NULL;
}
static struct NR_SetupRelease_PUSCH_Config *config_pusch(NR_PUSCH_Config_t *pusch_Config)
static struct NR_SetupRelease_PUSCH_Config *config_pusch(NR_PUSCH_Config_t *pusch_Config,
const NR_ServingCellConfigCommon_t *scc,
const NR_UE_NR_Capability_t *uecap)
{
struct NR_SetupRelease_PUSCH_Config *setup_puschconfig = calloc(1, sizeof(*setup_puschconfig));
setup_puschconfig->present = NR_SetupRelease_PUSCH_Config_PR_setup;
......@@ -1057,8 +1108,7 @@ static struct NR_SetupRelease_PUSCH_Config *config_pusch(NR_PUSCH_Config_t *pusc
pusch_Config->resourceAllocation = NR_PUSCH_Config__resourceAllocation_resourceAllocationType1;
pusch_Config->pusch_TimeDomainAllocationList = NULL;
pusch_Config->pusch_AggregationFactor = NULL;
pusch_Config->mcs_Table = NULL;
pusch_Config->mcs_TableTransformPrecoder = NULL;
set_ul_mcs_table(uecap, scc, pusch_Config);
pusch_Config->transformPrecoder = NULL;
if (!pusch_Config->codebookSubset)
pusch_Config->codebookSubset = calloc(1, sizeof(*pusch_Config->codebookSubset));
......@@ -1261,7 +1311,7 @@ static void config_uplinkBWP(NR_BWP_Uplink_t *ubwp,
bwp_loop < servingcellconfigdedicated->uplinkConfig->uplinkBWP_ToAddModList->list.count) {
pusch_Config = servingcellconfigdedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_loop]->bwp_Dedicated->pusch_Config->choice.setup;
}
ubwp->bwp_Dedicated->pusch_Config = config_pusch(pusch_Config);
ubwp->bwp_Dedicated->pusch_Config = config_pusch(pusch_Config, scc, configuration->force_256qam_off ? NULL : uecap);
long maxMIMO_Layers = servingcellconfigdedicated &&
servingcellconfigdedicated->uplinkConfig
......@@ -2057,7 +2107,7 @@ static NR_SpCellConfig_t *get_initial_SpCellConfig(int uid,
config_pucch_resset1(pucch_Config, NULL);
set_pucch_power_config(pucch_Config, configuration->do_CSIRS);
initialUplinkBWP->pusch_Config = config_pusch(NULL);
initialUplinkBWP->pusch_Config = config_pusch(NULL, scc, NULL);
long maxMIMO_Layers = uplinkConfig && uplinkConfig->pusch_ServingCellConfig
&& uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1
......@@ -2385,6 +2435,10 @@ void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig,
configuration->force_256qam_off ? NULL : uecap,
bwp_Dedicated,
scc);
NR_BWP_UplinkDedicated_t *ul_bwp_Dedicated = SpCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP;
set_ul_mcs_table(configuration->force_256qam_off ? NULL : uecap, scc, ul_bwp_Dedicated->pusch_Config->choice.setup);
struct NR_ServingCellConfig__downlinkBWP_ToAddModList *DL_BWP_list =
SpCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList;
struct NR_UplinkConfig__uplinkBWP_ToAddModList *UL_BWP_list = uplinkConfig->uplinkBWP_ToAddModList;
......@@ -2395,12 +2449,13 @@ void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig,
set_dl_mcs_table(scs, configuration->force_256qam_off ? NULL : uecap, bwp->bwp_Dedicated, scc);
}
}
if (configuration->do_SRS && UL_BWP_list) {
if (UL_BWP_list) {
for (int i = 0; i < UL_BWP_list->list.count; i++) {
NR_BWP_Uplink_t *ul_bwp = UL_BWP_list->list.array[i];
int bwp_size = NRRIV2BW(ul_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
if (ul_bwp->bwp_Dedicated->pusch_Config) {
NR_PUSCH_Config_t *pusch_Config = ul_bwp->bwp_Dedicated->pusch_Config->choice.setup;
set_ul_mcs_table(configuration->force_256qam_off ? NULL : uecap, scc, pusch_Config);
if (pusch_Config->maxRank == NULL) {
pusch_Config->maxRank = calloc(1, sizeof(*pusch_Config->maxRank));
}
......@@ -2609,7 +2664,7 @@ NR_CellGroupConfig_t *get_default_secondaryCellGroup(const NR_ServingCellConfigC
pusch_Config =
servingcellconfigdedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup;
}
initialUplinkBWP->pusch_Config = config_pusch(pusch_Config);
initialUplinkBWP->pusch_Config = config_pusch(pusch_Config, servingcellconfigcommon, uecap);
long maxMIMO_Layers =
servingcellconfigdedicated->uplinkConfig && servingcellconfigdedicated->uplinkConfig->pusch_ServingCellConfig
......
openair2/RRC/NR/nr_rrc_config.h
View file @ 361dfc3c
......@@ -44,8 +44,8 @@ void prepare_sim_uecap(NR_UE_NR_Capability_t *cap,
NR_ServingCellConfigCommon_t *scc,
int numerology,
int rbsize,
int mcs_table);
int mcs_table_dl,
int mcs_table_ul);
NR_BCCH_BCH_Message_t *get_new_MIB_NR(const NR_ServingCellConfigCommon_t *scc);
void free_MIB_NR(NR_BCCH_BCH_Message_t *mib);
......@@ -80,5 +80,4 @@ NR_CellGroupConfig_t *get_default_secondaryCellGroup(const NR_ServingCellConfigC
const gNB_RrcConfigurationReq *configuration,
int uid);
#endif
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