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OpenXG-RAN
Commit 53c617cd authored by Niccolò Iardella's avatar Niccolò Iardella Committed by Robert Schmidt
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Move slicing configuration variables in header files

parent 490e2456
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openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
View file @ 53c617cd
...@@ -44,6 +44,7 @@ ...@@ -44,6 +44,7 @@
#include "RRC/L2_INTERFACE/openair_rrc_L2_interface.h" #include "RRC/L2_INTERFACE/openair_rrc_L2_interface.h"
//#include "LAYER2/MAC/pre_processor.c" //#include "LAYER2/MAC/pre_processor.c"
#include "eNB_scheduler_dlsch.h"
#include "pdcp.h" #include "pdcp.h"
#include "SIMULATION/TOOLS/sim.h" // for taus #include "SIMULATION/TOOLS/sim.h" // for taus
...@@ -68,44 +69,6 @@ ...@@ -68,44 +69,6 @@
extern RAN_CONTEXT_t RC; extern RAN_CONTEXT_t RC;
extern uint8_t nfapi_mode; extern uint8_t nfapi_mode;
// number of active slices for past and current time
int n_active_slices = 1;
int n_active_slices_current = 1;
// RB share for each slice for past and current time
float avg_slice_percentage=0.25;
float slice_percentage[MAX_NUM_SLICES] = {1.0, 0.0, 0.0, 0.0};
float slice_percentage_current[MAX_NUM_SLICES] = {1.0, 0.0, 0.0, 0.0};
float total_slice_percentage = 0;
float total_slice_percentage_current = 0;
// Frequency ranges for slice positioning
int slice_position[MAX_NUM_SLICES*2] = {0, N_RBG_MAX, 0, N_RBG_MAX, 0, N_RBG_MAX, 0, N_RBG_MAX};
int slice_position_current[MAX_NUM_SLICES*2] = {0, N_RBG_MAX, 0, N_RBG_MAX, 0, N_RBG_MAX, 0, N_RBG_MAX};
// MAX MCS for each slice for past and current time
int slice_maxmcs[MAX_NUM_SLICES] = { 28, 28, 28, 28 };
int slice_maxmcs_current[MAX_NUM_SLICES] = { 28, 28, 28, 28 };
int update_dl_scheduler[MAX_NUM_SLICES] = { 1, 1, 1, 1 };
int update_dl_scheduler_current[MAX_NUM_SLICES] = { 1, 1, 1, 1 };
// name of available scheduler
char *dl_scheduler_type[MAX_NUM_SLICES] =
{ "schedule_ue_spec",
"schedule_ue_spec",
"schedule_ue_spec",
"schedule_ue_spec"
};
// The lists of criteria that enforce the sorting policies of the slices
uint32_t sorting_policy[MAX_NUM_SLICES] = {0x01234, 0x01234, 0x01234, 0x01234};
uint32_t sorting_policy_current[MAX_NUM_SLICES] = {0x01234, 0x01234, 0x01234, 0x01234};
// pointer to the slice specific scheduler
slice_scheduler_dl slice_sched_dl[MAX_NUM_SLICES] = {0};
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------
void void
add_ue_dlsch_info(module_id_t module_idP, add_ue_dlsch_info(module_id_t module_idP,
......
openair2/LAYER2/MAC/eNB_scheduler_dlsch.h 0 → 100644
View file @ 53c617cd
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file LAYER2/MAC/eNB_scheduler_dlsch.h
* \brief DLSCH Scheduler policy variables used during different phases of scheduling
* \author Navid Nikaein and Niccolo' Iardella
* \date 2018
* \version 0.2
* \email navid.nikaein@eurecom.fr
*/
/** @defgroup _oai2 openair2 Reference Implementation
* @ingroup _ref_implementation_
* @{
*/
/*@}*/
#ifndef __LAYER2_MAC_ENB_SCHEDULER_DLSCH_H__
#define __LAYER2_MAC_ENB_SCHEDULER_DLSCH_H__
// number of active slices for past and current time
int n_active_slices = 1;
int n_active_slices_current = 1;
// RB share for each slice for past and current time
float avg_slice_percentage=0.25;
float slice_percentage[MAX_NUM_SLICES] = {1.0, 0.0, 0.0, 0.0};
float slice_percentage_current[MAX_NUM_SLICES] = {1.0, 0.0, 0.0, 0.0};
float total_slice_percentage = 0;
float total_slice_percentage_current = 0;
// Frequency ranges for slice positioning
int slice_position[MAX_NUM_SLICES*2] = {0, N_RBG_MAX, 0, N_RBG_MAX, 0, N_RBG_MAX, 0, N_RBG_MAX};
int slice_position_current[MAX_NUM_SLICES*2] = {0, N_RBG_MAX, 0, N_RBG_MAX, 0, N_RBG_MAX, 0, N_RBG_MAX};
// MAX MCS for each slice for past and current time
int slice_maxmcs[MAX_NUM_SLICES] = { 28, 28, 28, 28 };
int slice_maxmcs_current[MAX_NUM_SLICES] = { 28, 28, 28, 28 };
int update_dl_scheduler[MAX_NUM_SLICES] = { 1, 1, 1, 1 };
int update_dl_scheduler_current[MAX_NUM_SLICES] = { 1, 1, 1, 1 };
// name of available scheduler
char *dl_scheduler_type[MAX_NUM_SLICES] =
{ "schedule_ue_spec",
"schedule_ue_spec",
"schedule_ue_spec",
"schedule_ue_spec"
};
// The lists of criteria that enforce the sorting policies of the slices
uint32_t sorting_policy[MAX_NUM_SLICES] = {0x01234, 0x01234, 0x01234, 0x01234};
uint32_t sorting_policy_current[MAX_NUM_SLICES] = {0x01234, 0x01234, 0x01234, 0x01234};
// pointer to the slice specific scheduler
slice_scheduler_dl slice_sched_dl[MAX_NUM_SLICES] = {0};
#endif //__LAYER2_MAC_ENB_SCHEDULER_DLSCH_H__
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
View file @ 53c617cd
...@@ -4536,7 +4536,7 @@ harq_indication(module_id_t mod_idP, int CC_idP, frame_t frameP, ...@@ -4536,7 +4536,7 @@ harq_indication(module_id_t mod_idP, int CC_idP, frame_t frameP,
// Flexran Slicing functions // Flexran Slicing functions
uint16_t flexran_nb_rbs_allowed_slice(float rb_percentage, int total_rbs) uint16_t nb_rbs_allowed_slice(float rb_percentage, int total_rbs)
{ {
return (uint16_t) floor(rb_percentage * total_rbs); return (uint16_t) floor(rb_percentage * total_rbs);
} }
......
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
View file @ 53c617cd
...@@ -48,6 +48,7 @@ ...@@ -48,6 +48,7 @@
#include "assertions.h" #include "assertions.h"
//#include "LAYER2/MAC/pre_processor.c" //#include "LAYER2/MAC/pre_processor.c"
#include "eNB_scheduler_ulsch.h"
#include "pdcp.h" #include "pdcp.h"
#if defined(ENABLE_ITTI) #if defined(ENABLE_ITTI)
...@@ -72,46 +73,14 @@ extern uint16_t sfnsf_add_subframe(uint16_t frameP, uint16_t subframeP, int offs ...@@ -72,46 +73,14 @@ extern uint16_t sfnsf_add_subframe(uint16_t frameP, uint16_t subframeP, int offs
extern int oai_nfapi_ul_config_req(nfapi_ul_config_request_t *ul_config_req); extern int oai_nfapi_ul_config_req(nfapi_ul_config_request_t *ul_config_req);
extern uint8_t nfapi_mode; extern uint8_t nfapi_mode;
extern uint8_t nfapi_mode;
// This table holds the allowable PRB sizes for ULSCH transmissions // This table holds the allowable PRB sizes for ULSCH transmissions
uint8_t rb_table[34] = uint8_t rb_table[34] =
{ 1, 2, 3, 4, 5, 6, 8, 9, 10, 12, 15, 16, 18, 20, 24, 25, 27, 30, 32, { 1, 2, 3, 4, 5, 6, 8, 9, 10, 12, 15, 16, 18, 20, 24, 25, 27, 30, 32,
36, 40, 45, 48, 50, 54, 60, 64, 72, 75, 80, 81, 90, 96, 100 36, 40, 45, 48, 50, 54, 60, 64, 72, 75, 80, 81, 90, 96, 100
}; };
/* number of active slices for past and current time*/
int n_active_slices_uplink = 1;
int n_active_slices_current_uplink = 1;
/* RB share for each slice for past and current time*/
float avg_slice_percentage_uplink=0.25;
float slice_percentage_uplink[MAX_NUM_SLICES] = {1.0, 0.0, 0.0, 0.0};
float slice_percentage_current_uplink[MAX_NUM_SLICES] = {1.0, 0.0, 0.0, 0.0};
float total_slice_percentage_uplink = 0;
float total_slice_percentage_current_uplink = 0;
// MAX MCS for each slice for past and current time
int slice_maxmcs_uplink[MAX_NUM_SLICES] = {20, 20, 20, 20};
int slice_maxmcs_current_uplink[MAX_NUM_SLICES] = {20,20,20,20};
/*resource blocks allowed*/
uint16_t nb_rbs_allowed_slice_uplink[MAX_NUM_CCs][MAX_NUM_SLICES];
/*Slice Update */
int update_ul_scheduler[MAX_NUM_SLICES] = {1, 1, 1, 1};
int update_ul_scheduler_current[MAX_NUM_SLICES] = {1, 1, 1, 1};
/* name of available scheduler*/
char *ul_scheduler_type[MAX_NUM_SLICES] = {"schedule_ulsch_rnti",
"schedule_ulsch_rnti",
"schedule_ulsch_rnti",
"schedule_ulsch_rnti"
};
extern mui_t rrc_eNB_mui; extern mui_t rrc_eNB_mui;
/* Slice Function Pointer */
slice_scheduler_ul slice_sched_ul[MAX_NUM_SLICES] = {0};
void void
rx_sdu(const module_id_t enb_mod_idP, rx_sdu(const module_id_t enb_mod_idP,
const int CC_idP, const int CC_idP,
......
openair2/LAYER2/MAC/eNB_scheduler_ulsch.h 0 → 100644
View file @ 53c617cd
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file LAYER2/MAC/eNB_scheduler_ulsch.h
* \brief ULSCH Scheduler policy variables used during different phases of scheduling
* \author Navid Nikaein and Niccolo' Iardella
* \date 2018
* \version 0.2
* \email navid.nikaein@eurecom.fr
*/
/** @defgroup _oai2 openair2 Reference Implementation
* @ingroup _ref_implementation_
* @{
*/
/*@}*/
#ifndef __LAYER2_MAC_ENB_SCHEDULER_ULSCH_H__
#define __LAYER2_MAC_ENB_SCHEDULER_ULSCH_H__
/* number of active slices for past and current time*/
int n_active_slices_uplink = 1;
int n_active_slices_current_uplink = 1;
/* RB share for each slice for past and current time*/
float avg_slice_percentage_uplink=0.25;
float slice_percentage_uplink[MAX_NUM_SLICES] = {1.0, 0.0, 0.0, 0.0};
float slice_percentage_current_uplink[MAX_NUM_SLICES] = {1.0, 0.0, 0.0, 0.0};
float total_slice_percentage_uplink = 0;
float total_slice_percentage_current_uplink = 0;
// MAX MCS for each slice for past and current time
int slice_maxmcs_uplink[MAX_NUM_SLICES] = {20, 20, 20, 20};
int slice_maxmcs_current_uplink[MAX_NUM_SLICES] = {20,20,20,20};
/*resource blocks allowed*/
uint16_t nb_rbs_allowed_slice_uplink[NFAPI_CC_MAX][MAX_NUM_SLICES];
/*Slice Update */
int update_ul_scheduler[MAX_NUM_SLICES] = {1, 1, 1, 1};
int update_ul_scheduler_current[MAX_NUM_SLICES] = {1, 1, 1, 1};
/* name of available scheduler*/
char *ul_scheduler_type[MAX_NUM_SLICES] = {"schedule_ulsch_rnti",
"schedule_ulsch_rnti",
"schedule_ulsch_rnti",
"schedule_ulsch_rnti"
};
/* Slice Function Pointer */
slice_scheduler_ul slice_sched_ul[MAX_NUM_SLICES] = {0};
#endif //__LAYER2_MAC_ENB_SCHEDULER_ULSCH_H__
openair2/LAYER2/MAC/mac_proto.h
View file @ 53c617cd
...@@ -237,14 +237,14 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id, ...@@ -237,14 +237,14 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
int min_rb_unit[NFAPI_CC_MAX], int min_rb_unit[NFAPI_CC_MAX],
uint8_t total_ue_count[NFAPI_CC_MAX], uint8_t total_ue_count[NFAPI_CC_MAX],
uint16_t nb_rbs_required[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB], uint16_t nb_rbs_required[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB],
uint16_t nb_rbs_required_remaining_1[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB]); uint16_t nb_rbs_accounted[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB]);
void dlsch_scheduler_pre_processor_positioning(module_id_t Mod_id, void dlsch_scheduler_pre_processor_positioning(module_id_t Mod_id,
slice_id_t slice_id, slice_id_t slice_id,
int min_rb_unit[NFAPI_CC_MAX], int min_rb_unit[NFAPI_CC_MAX],
uint8_t total_ue_count[NFAPI_CC_MAX], uint8_t total_ue_count[NFAPI_CC_MAX],
uint16_t nb_rbs_required[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB], uint16_t nb_rbs_required[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB],
uint16_t nb_rbs_required_remaining_1[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB], uint16_t nb_rbs_accounted[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB],
uint8_t rballoc_sub[NFAPI_CC_MAX][N_RBG_MAX], uint8_t rballoc_sub[NFAPI_CC_MAX][N_RBG_MAX],
uint8_t MIMO_mode_indicator[NFAPI_CC_MAX][N_RBG_MAX]); uint8_t MIMO_mode_indicator[NFAPI_CC_MAX][N_RBG_MAX]);
...@@ -252,10 +252,10 @@ void dlsch_scheduler_pre_processor_allocate(module_id_t Mod_id, ...@@ -252,10 +252,10 @@ void dlsch_scheduler_pre_processor_allocate(module_id_t Mod_id,
int UE_id, int UE_id,
uint8_t CC_id, uint8_t CC_id,
int N_RBG, int N_RBG,
int transmission_mode, int tm,
int min_rb_unit, int min_rb_unit,
uint16_t nb_rbs_required[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB], uint16_t nb_rbs_required[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB],
uint16_t nb_rbs_required_remaining[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB], uint16_t nb_rbs_remaining[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB],
unsigned char rballoc_sub[NFAPI_CC_MAX][N_RBG_MAX], unsigned char rballoc_sub[NFAPI_CC_MAX][N_RBG_MAX],
uint8_t slice_allocation_mask[NFAPI_CC_MAX][N_RBG_MAX], uint8_t slice_allocation_mask[NFAPI_CC_MAX][N_RBG_MAX],
unsigned char MIMO_mode_indicator[NFAPI_CC_MAX][N_RBG_MAX]); unsigned char MIMO_mode_indicator[NFAPI_CC_MAX][N_RBG_MAX]);
...@@ -1256,8 +1256,7 @@ void pre_scd_nb_rbs_required( module_id_t module_idP, ...@@ -1256,8 +1256,7 @@ void pre_scd_nb_rbs_required( module_id_t module_idP,
#endif #endif
/*Slice related functions */ /*Slice related functions */
uint16_t flexran_nb_rbs_allowed_slice(float rb_percentage, int total_rbs); uint16_t nb_rbs_allowed_slice(float rb_percentage, int total_rbs);
int ue_slice_membership(int UE_id, int slice_id); int ue_slice_membership(int UE_id, int slice_id);
/* from here: prototypes to get rid of compilation warnings: doc to be written by function author */ /* from here: prototypes to get rid of compilation warnings: doc to be written by function author */
......
openair2/LAYER2/MAC/pre_processor.c
View file @ 53c617cd
...@@ -271,7 +271,8 @@ assign_rbs_required(module_id_t Mod_id, ...@@ -271,7 +271,8 @@ assign_rbs_required(module_id_t Mod_id,
to_prb(RC.mac[Mod_id]->common_channels[CC_id]. to_prb(RC.mac[Mod_id]->common_channels[CC_id].
mib->message.dl_Bandwidth); mib->message.dl_Bandwidth);
UE_list->UE_sched_ctrl[UE_id].max_rbs_allowed_slice[CC_id][slice_id]= flexran_nb_rbs_allowed_slice(slice_percentage[slice_id],N_RB_DL); UE_list->UE_sched_ctrl[UE_id].max_rbs_allowed_slice[CC_id][slice_id] =
nb_rbs_allowed_slice(slice_percentage[slice_id], N_RB_DL);
/* calculating required number of RBs for each UE */ /* calculating required number of RBs for each UE */
while (TBS < while (TBS <
...@@ -477,39 +478,108 @@ void decode_slice_positioning(module_id_t Mod_idP, ...@@ -477,39 +478,108 @@ void decode_slice_positioning(module_id_t Mod_idP,
// This fuction sorts the UE in order their dlsch buffer and CQI // This fuction sorts the UE in order their dlsch buffer and CQI
void sort_UEs(module_id_t Mod_idP, slice_id_t slice_id, int frameP, sub_frame_t subframeP) void sort_UEs(module_id_t Mod_idP, slice_id_t slice_id, int frameP, sub_frame_t subframeP)
{ {
int i; int i;
int list[MAX_MOBILES_PER_ENB]; int list[MAX_MOBILES_PER_ENB];
int list_size = 0; int list_size = 0;
int rnti; struct sort_ue_dl_params params = {Mod_idP, frameP, subframeP, slice_id};
struct sort_ue_dl_params params = { Mod_idP, frameP, subframeP, slice_id };
UE_list_t *UE_list = &RC.mac[Mod_idP]->UE_list; UE_list_t *UE_list = &RC.mac[Mod_idP]->UE_list;
for (i = 0; i < MAX_MOBILES_PER_ENB; i++) { for (i = 0; i < MAX_MOBILES_PER_ENB; i++) {
if (UE_list->active[i] == FALSE) if (UE_list->active[i] == FALSE) continue;
continue; if (UE_RNTI(Mod_idP, i) == NOT_A_RNTI) continue;
if ((rnti = UE_RNTI(Mod_idP, i)) == NOT_A_RNTI) if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1) continue;
continue; if (!ue_slice_membership(i, slice_id)) continue;
if (!ue_slice_membership(i, slice_id))
continue;
list[list_size] = i; list[list_size] = i;
list_size++; list_size++;
} }
decode_sorting_policy(Mod_idP, slice_id); decode_sorting_policy(Mod_idP, slice_id);
qsort_r(list, list_size, sizeof(int), ue_dl_compare, &params);
if (list_size) {
for (i = 0; i < list_size - 1; ++i)
UE_list->next[list[i]] = list[i + 1];
UE_list->next[list[list_size - 1]] = -1;
UE_list->head = list[0];
} else {
UE_list->head = -1;
}
qsort_r(list, list_size, sizeof(int), ue_dl_compare, &params); #if 0
if (list_size) {
for (i = 0; i < list_size - 1; i++) int UE_id1, UE_id2;
UE_list->next[list[i]] = list[i + 1]; int pCC_id1, pCC_id2;
UE_list->next[list[list_size - 1]] = -1; int cqi1, cqi2, round1, round2;
UE_list->head = list[0]; int i = 0, ii = 0; //,j=0;
} else { rnti_t rnti1, rnti2;
UE_list->head = -1;
UE_list_t *UE_list = &RC.mac[Mod_idP]->UE_list;
for (i = UE_list->head; i >= 0; i = UE_list->next[i]) {
for (ii = UE_list->next[i]; ii >= 0; ii = UE_list->next[ii]) {
UE_id1 = i;
rnti1 = UE_RNTI(Mod_idP, UE_id1);
if (rnti1 == NOT_A_RNTI)
continue;
if (UE_list->UE_sched_ctrl[UE_id1].ul_out_of_sync == 1)
continue;
pCC_id1 = UE_PCCID(Mod_idP, UE_id1);
cqi1 = maxcqi(Mod_idP, UE_id1); //
round1 = maxround(Mod_idP, rnti1, frameP, subframeP, 0);
UE_id2 = ii;
rnti2 = UE_RNTI(Mod_idP, UE_id2);
if (rnti2 == NOT_A_RNTI)
continue;
if (UE_list->UE_sched_ctrl[UE_id2].ul_out_of_sync == 1)
continue;
cqi2 = maxcqi(Mod_idP, UE_id2);
round2 = maxround(Mod_idP, rnti2, frameP, subframeP, 0); //mac_xface->get_ue_active_harq_pid(Mod_id,rnti2,subframe,&harq_pid2,&round2,0);
pCC_id2 = UE_PCCID(Mod_idP, UE_id2);
if (round2 > round1) { // Check first if one of the UEs has an active HARQ process which needs service and swap order
swap_UEs(UE_list, UE_id1, UE_id2, 0);
} else if (round2 == round1) {
// RK->NN : I guess this is for fairness in the scheduling. This doesn't make sense unless all UEs have the same configuration of logical channels. This should be done on the sum of all information that has to be sent. And still it wouldn't ensure fairness. It should be based on throughput seen by each UE or maybe using the head_sdu_creation_time, i.e. swap UEs if one is waiting longer for service.
// for(j=0;j<MAX_NUM_LCID;j++){
// if (eNB_mac_inst[Mod_id][pCC_id1].UE_template[UE_id1].dl_buffer_info[j] <
// eNB_mac_inst[Mod_id][pCC_id2].UE_template[UE_id2].dl_buffer_info[j]){
// first check the buffer status for SRB1 and SRB2
if ((UE_list->UE_template[pCC_id1][UE_id1].
dl_buffer_info[1] +
UE_list->UE_template[pCC_id1][UE_id1].
dl_buffer_info[2]) <
(UE_list->UE_template[pCC_id2][UE_id2].
dl_buffer_info[1] +
UE_list->UE_template[pCC_id2][UE_id2].
dl_buffer_info[2])) {
swap_UEs(UE_list, UE_id1, UE_id2, 0);
} else if (UE_list->UE_template[pCC_id1]
[UE_id1].dl_buffer_head_sdu_creation_time_max <
UE_list->UE_template[pCC_id2]
[UE_id2].dl_buffer_head_sdu_creation_time_max) {
swap_UEs(UE_list, UE_id1, UE_id2, 0);
} else if (UE_list->UE_template[pCC_id1][UE_id1].
dl_buffer_total <
UE_list->UE_template[pCC_id2][UE_id2].
dl_buffer_total) {
swap_UEs(UE_list, UE_id1, UE_id2, 0);
} else if (cqi1 < cqi2) {
swap_UEs(UE_list, UE_id1, UE_id2, 0);
}
}
} }
}
#endif
} }
void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id, void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
...@@ -519,7 +589,7 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id, ...@@ -519,7 +589,7 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
int min_rb_unit[NFAPI_CC_MAX], int min_rb_unit[NFAPI_CC_MAX],
uint8_t total_ue_count[NFAPI_CC_MAX], uint8_t total_ue_count[NFAPI_CC_MAX],
uint16_t nb_rbs_required[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB], uint16_t nb_rbs_required[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB],
uint16_t nb_rbs_required_remaining_1[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB]) uint16_t nb_rbs_accounted[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB])
{ {
int UE_id, CC_id; int UE_id, CC_id;
int i; int i;
...@@ -541,16 +611,15 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id, ...@@ -541,16 +611,15 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
average_rbs_per_user[CC_id] = 0; average_rbs_per_user[CC_id] = 0;
} }
// loop over all active UEs // Find total UE count, and account the RBs required for retransmissions
for (UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) { for (UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) {
rnti = UE_RNTI(Mod_id, UE_id); rnti = UE_RNTI(Mod_id, UE_id);
if (rnti == NOT_A_RNTI) if (rnti == NOT_A_RNTI) continue;
continue; if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) continue;
if (!ue_slice_membership(UE_id, slice_id)) if (!ue_slice_membership(UE_id, slice_id)) continue;
continue;
for (i = 0; i < UE_num_active_CC(UE_list, UE_id); i++) { for (i = 0; i < UE_num_active_CC(UE_list, UE_id); ++i) {
CC_id = UE_list->ordered_CCids[i][UE_id]; CC_id = UE_list->ordered_CCids[i][UE_id];
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id]; ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
cc = &RC.mac[Mod_id]->common_channels[CC_id]; cc = &RC.mac[Mod_id]->common_channels[CC_id];
...@@ -579,12 +648,9 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id, ...@@ -579,12 +648,9 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
for (UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) { for (UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) {
rnti = UE_RNTI(Mod_id, UE_id); rnti = UE_RNTI(Mod_id, UE_id);
if (rnti == NOT_A_RNTI) if (rnti == NOT_A_RNTI) continue;
continue; if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) continue;
if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) if (!ue_slice_membership(UE_id, slice_id)) continue;
continue;
if (!ue_slice_membership(UE_id, slice_id))
continue;
for (i = 0; i < UE_num_active_CC(UE_list, UE_id); i++) { for (i = 0; i < UE_num_active_CC(UE_list, UE_id); i++) {
CC_id = UE_list->ordered_CCids[i][UE_id]; CC_id = UE_list->ordered_CCids[i][UE_id];
...@@ -603,8 +669,7 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id, ...@@ -603,8 +669,7 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
// recalculate based on the what is left after retransmission // recalculate based on the what is left after retransmission
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id]; ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
ue_sched_ctl->max_rbs_allowed_slice[CC_id][slice_id] = ue_sched_ctl->max_rbs_allowed_slice[CC_id][slice_id] = nb_rbs_allowed_slice(slice_percentage[slice_id], N_RB_DL);
flexran_nb_rbs_allowed_slice(slice_percentage[slice_id], N_RB_DL);
if (total_ue_count[CC_id] == 0) { if (total_ue_count[CC_id] == 0) {
average_rbs_per_user[CC_id] = 0; average_rbs_per_user[CC_id] = 0;
...@@ -612,8 +677,8 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id, ...@@ -612,8 +677,8 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
(ue_sched_ctl->max_rbs_allowed_slice[CC_id][slice_id])) { (ue_sched_ctl->max_rbs_allowed_slice[CC_id][slice_id])) {
average_rbs_per_user[CC_id] = average_rbs_per_user[CC_id] =
(uint16_t) floor(ue_sched_ctl->max_rbs_allowed_slice[CC_id][slice_id] / total_ue_count[CC_id]); (uint16_t) floor(ue_sched_ctl->max_rbs_allowed_slice[CC_id][slice_id] / total_ue_count[CC_id]);
} else { } else {
// consider the total number of use that can be scheduled UE // consider the total number of use that can be scheduled UE
average_rbs_per_user[CC_id] = min_rb_unit[CC_id]; average_rbs_per_user[CC_id] = min_rb_unit[CC_id];
} }
} }
...@@ -639,9 +704,9 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id, ...@@ -639,9 +704,9 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
// control channel or retransmission // control channel or retransmission
/* TODO: do we have to check for retransmission? */ /* TODO: do we have to check for retransmission? */
if (mac_eNB_get_rrc_status(Mod_id, rnti) < RRC_RECONFIGURED || round != 8) { if (mac_eNB_get_rrc_status(Mod_id, rnti) < RRC_RECONFIGURED || round != 8) {
nb_rbs_required_remaining_1[CC_id][UE_id] = nb_rbs_required[CC_id][UE_id]; nb_rbs_accounted[CC_id][UE_id] = nb_rbs_required[CC_id][UE_id];
} else { } else {
nb_rbs_required_remaining_1[CC_id][UE_id] = cmin(average_rbs_per_user[CC_id], nb_rbs_required[CC_id][UE_id]); nb_rbs_accounted[CC_id][UE_id] = cmin(average_rbs_per_user[CC_id], nb_rbs_required[CC_id][UE_id]);
} }
} }
} }
...@@ -652,7 +717,7 @@ void dlsch_scheduler_pre_processor_positioning(module_id_t Mod_id, ...@@ -652,7 +717,7 @@ void dlsch_scheduler_pre_processor_positioning(module_id_t Mod_id,
int min_rb_unit[NFAPI_CC_MAX], int min_rb_unit[NFAPI_CC_MAX],
uint8_t total_ue_count[NFAPI_CC_MAX], uint8_t total_ue_count[NFAPI_CC_MAX],
uint16_t nb_rbs_required[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB], uint16_t nb_rbs_required[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB],
uint16_t nb_rbs_required_remaining_1[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB], uint16_t nb_rbs_accounted[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB],
uint8_t rballoc_sub[NFAPI_CC_MAX][N_RBG_MAX], uint8_t rballoc_sub[NFAPI_CC_MAX][N_RBG_MAX],
uint8_t MIMO_mode_indicator[NFAPI_CC_MAX][N_RBG_MAX]) { uint8_t MIMO_mode_indicator[NFAPI_CC_MAX][N_RBG_MAX]) {
...@@ -682,11 +747,11 @@ void dlsch_scheduler_pre_processor_positioning(module_id_t Mod_id, ...@@ -682,11 +747,11 @@ void dlsch_scheduler_pre_processor_positioning(module_id_t Mod_id,
if (r1 == 0) { if (r1 == 0) {
nb_rbs_required_remaining[CC_id][UE_id] = nb_rbs_required_remaining[CC_id][UE_id] =
nb_rbs_required_remaining_1[CC_id][UE_id]; nb_rbs_accounted[CC_id][UE_id];
} else { // rb required based only on the buffer - rb allocated in the 1st round + extra reaming rb form the 1st round } else { // rb required based only on the buffer - rb allocated in the 1st round + extra reaming rb form the 1st round
nb_rbs_required_remaining[CC_id][UE_id] = nb_rbs_required_remaining[CC_id][UE_id] =
nb_rbs_required[CC_id][UE_id] - nb_rbs_required[CC_id][UE_id] -
nb_rbs_required_remaining_1[CC_id][UE_id] + nb_rbs_accounted[CC_id][UE_id] +
nb_rbs_required_remaining[CC_id][UE_id]; nb_rbs_required_remaining[CC_id][UE_id];
if (nb_rbs_required_remaining[CC_id][UE_id] < 0) if (nb_rbs_required_remaining[CC_id][UE_id] < 0)
abort(); abort();
...@@ -697,7 +762,7 @@ void dlsch_scheduler_pre_processor_positioning(module_id_t Mod_id, ...@@ -697,7 +762,7 @@ void dlsch_scheduler_pre_processor_positioning(module_id_t Mod_id,
"round %d : nb_rbs_required_remaining[%d][%d]= %d (remaining_1 %d, required %d, pre_nb_available_rbs %d, N_RBG %d, rb_unit %d)\n", "round %d : nb_rbs_required_remaining[%d][%d]= %d (remaining_1 %d, required %d, pre_nb_available_rbs %d, N_RBG %d, rb_unit %d)\n",
r1, CC_id, UE_id, r1, CC_id, UE_id,
nb_rbs_required_remaining[CC_id][UE_id], nb_rbs_required_remaining[CC_id][UE_id],
nb_rbs_required_remaining_1[CC_id][UE_id], nb_rbs_accounted[CC_id][UE_id],
nb_rbs_required[CC_id][UE_id], nb_rbs_required[CC_id][UE_id],
UE_list->UE_sched_ctrl[UE_id].pre_nb_available_rbs[CC_id], UE_list->UE_sched_ctrl[UE_id].pre_nb_available_rbs[CC_id],
N_RBG[CC_id], N_RBG[CC_id],
...@@ -713,8 +778,6 @@ void dlsch_scheduler_pre_processor_positioning(module_id_t Mod_id, ...@@ -713,8 +778,6 @@ void dlsch_scheduler_pre_processor_positioning(module_id_t Mod_id,
CC_id = UE_list->ordered_CCids[i][UE_id]; CC_id = UE_list->ordered_CCids[i][UE_id];
// if there are UEs with traffic // if there are UEs with traffic
if (total_ue_count[CC_id] > 0) { if (total_ue_count[CC_id] > 0) {
// ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
// round = ue_sched_ctl->round[CC_id][harq_pid];
rnti = UE_RNTI(Mod_id, UE_id); rnti = UE_RNTI(Mod_id, UE_id);
...@@ -725,9 +788,6 @@ void dlsch_scheduler_pre_processor_positioning(module_id_t Mod_id, ...@@ -725,9 +788,6 @@ void dlsch_scheduler_pre_processor_positioning(module_id_t Mod_id,
continue; continue;
transmission_mode = get_tmode(Mod_id, CC_id, UE_id); transmission_mode = get_tmode(Mod_id, CC_id, UE_id);
// mac_xface->get_ue_active_harq_pid(Mod_id,CC_id,rnti,frameP,subframeP,&harq_pid,&round,0);
// rrc_status = mac_eNB_get_rrc_status(Mod_id,rnti);
/* 1st allocate for the retx */
// retransmission in data channels // retransmission in data channels
// control channel in the 1st transmission // control channel in the 1st transmission
...@@ -746,166 +806,166 @@ void dlsch_scheduler_pre_processor_positioning(module_id_t Mod_id, ...@@ -746,166 +806,166 @@ void dlsch_scheduler_pre_processor_positioning(module_id_t Mod_id,
MIMO_mode_indicator); MIMO_mode_indicator);
#ifdef TM5 #ifdef TM5
// data chanel TM5: to be revisited // data chanel TM5: to be revisited
if ((round == 0) && if ((round == 0) &&
(transmission_mode == 5) && (transmission_mode == 5) &&
(ue_sched_ctl->dl_pow_off[CC_id] != 1)) { (ue_sched_ctl->dl_pow_off[CC_id] != 1)) {
for (j = 0; j < N_RBG[CC_id]; j += 2) { for (j = 0; j < N_RBG[CC_id]; j += 2) {
if ((((j == (N_RBG[CC_id] - 1)) if ((((j == (N_RBG[CC_id] - 1))
&& (rballoc_sub[CC_id][j] == 0) && (rballoc_sub[CC_id][j] == 0)
&& (ue_sched_ctl->
rballoc_sub_UE[CC_id][j] == 0))
|| ((j < (N_RBG[CC_id] - 1))
&& (rballoc_sub[CC_id][j + 1] == 0)
&&
(ue_sched_ctl->rballoc_sub_UE
[CC_id][j + 1] == 0)))
&& (nb_rbs_remaining[CC_id][UE_id]
> 0)) {
for (i = UE_list->next[UE_id + 1]; i >= 0;
i = UE_list->next[i]) {
UE_id2 = i;
rnti2 = UE_RNTI(Mod_id, UE_id2);
ue_sched_ctl2 =
&UE_list->UE_sched_ctrl[UE_id2];
round2 = ue_sched_ctl2->round[CC_id];
if (rnti2 == NOT_A_RNTI)
continue;
if (UE_list->
UE_sched_ctrl
[UE_id2].ul_out_of_sync == 1)
continue;
eNB_UE_stats2 =
UE_list->
eNB_UE_stats[CC_id][UE_id2];
//mac_xface->get_ue_active_harq_pid(Mod_id,CC_id,rnti2,frameP,subframeP,&harq_pid2,&round2,0);
if ((mac_eNB_get_rrc_status
(Mod_id,
rnti2) >= RRC_RECONFIGURED)
&& (round2 == 0)
&&
(get_tmode(Mod_id, CC_id, UE_id2)
== 5)
&& (ue_sched_ctl-> && (ue_sched_ctl->
rballoc_sub_UE[CC_id][j] == 0)) dl_pow_off[CC_id] != 1)) {
|| ((j < (N_RBG[CC_id] - 1))
&& (rballoc_sub[CC_id][j + 1] == 0) if ((((j == (N_RBG[CC_id] - 1))
&&
(ue_sched_ctl->rballoc_sub_UE
[CC_id][j + 1] == 0)))
&& (nb_rbs_required_remaining[CC_id][UE_id]
> 0)) {
for (i = UE_list->next[UE_id + 1]; i >= 0;
i = UE_list->next[i]) {
UE_id2 = i;
rnti2 = UE_RNTI(Mod_id, UE_id2);
ue_sched_ctl2 =
&UE_list->UE_sched_ctrl[UE_id2];
round2 = ue_sched_ctl2->round[CC_id];
if (rnti2 == NOT_A_RNTI)
continue;
if (UE_list->
UE_sched_ctrl
[UE_id2].ul_out_of_sync == 1)
continue;
eNB_UE_stats2 =
UE_list->
eNB_UE_stats[CC_id][UE_id2];
//mac_xface->get_ue_active_harq_pid(Mod_id,CC_id,rnti2,frameP,subframeP,&harq_pid2,&round2,0);
if ((mac_eNB_get_rrc_status
(Mod_id,
rnti2) >= RRC_RECONFIGURED)
&& (round2 == 0)
&&
(get_tmode(Mod_id, CC_id, UE_id2)
== 5)
&& (ue_sched_ctl->
dl_pow_off[CC_id] != 1)) {
if ((((j == (N_RBG[CC_id] - 1))
&&
(ue_sched_ctl->rballoc_sub_UE
[CC_id][j] == 0))
|| ((j < (N_RBG[CC_id] - 1))
&&
(ue_sched_ctl->
rballoc_sub_UE[CC_id][j +
1]
== 0)))
&& &&
(nb_rbs_required_remaining (ue_sched_ctl->rballoc_sub_UE
[CC_id] [CC_id][j] == 0))
[UE_id2] > 0)) { || ((j < (N_RBG[CC_id] - 1))
&&
if ((((eNB_UE_stats2-> (ue_sched_ctl->
DL_pmi_single ^ rballoc_sub_UE[CC_id][j +
eNB_UE_stats1-> 1]
DL_pmi_single) == 0)))
<< (14 - j)) & 0xc000) == 0x4000) { //MU-MIMO only for 25 RBs configuration &&
(nb_rbs_remaining
rballoc_sub[CC_id][j] = 1; [CC_id]
ue_sched_ctl-> [UE_id2] > 0)) {
rballoc_sub_UE[CC_id]
[j] = 1; if ((((eNB_UE_stats2->
ue_sched_ctl2-> DL_pmi_single ^
rballoc_sub_UE[CC_id] eNB_UE_stats1->
[j] = 1; DL_pmi_single)
MIMO_mode_indicator[CC_id] << (14 - j)) & 0xc000) == 0x4000) { //MU-MIMO only for 25 RBs configuration
[j] = 0;
rballoc_sub[CC_id][j] = 1;
if (j < N_RBG[CC_id] - 1) { ue_sched_ctl->
rballoc_sub[CC_id][j + rballoc_sub_UE[CC_id]
1] = [j] = 1;
1; ue_sched_ctl2->
ue_sched_ctl-> rballoc_sub_UE[CC_id]
rballoc_sub_UE [j] = 1;
[CC_id][j + 1] = 1; MIMO_mode_indicator[CC_id]
ue_sched_ctl2->rballoc_sub_UE [j] = 0;
[CC_id][j + 1] = 1;
MIMO_mode_indicator if (j < N_RBG[CC_id] - 1) {
[CC_id][j + 1] rballoc_sub[CC_id][j +
= 0; 1] =
} 1;
ue_sched_ctl->
ue_sched_ctl-> rballoc_sub_UE
dl_pow_off[CC_id] [CC_id][j + 1] = 1;
= 0; ue_sched_ctl2->rballoc_sub_UE
ue_sched_ctl2-> [CC_id][j + 1] = 1;
dl_pow_off[CC_id] MIMO_mode_indicator
= 0; [CC_id][j + 1]
= 0;
}
if ((j == N_RBG[CC_id] - 1)
&& ((N_RB_DL == 25) ue_sched_ctl->
|| (N_RB_DL == dl_pow_off[CC_id]
50))) { = 0;
ue_sched_ctl2->
nb_rbs_required_remaining dl_pow_off[CC_id]
[CC_id][UE_id] = = 0;
nb_rbs_required_remaining
[CC_id][UE_id] -
min_rb_unit[CC_id] if ((j == N_RBG[CC_id] - 1)
+ 1; && ((N_RB_DL == 25)
ue_sched_ctl->pre_nb_available_rbs || (N_RB_DL ==
[CC_id] = 50))) {
ue_sched_ctl->pre_nb_available_rbs
[CC_id] + nb_rbs_remaining
min_rb_unit[CC_id] [CC_id][UE_id] =
- 1; nb_rbs_remaining
nb_rbs_required_remaining [CC_id][UE_id] -
[CC_id][UE_id2] = min_rb_unit[CC_id]
nb_rbs_required_remaining + 1;
[CC_id][UE_id2] - ue_sched_ctl->pre_nb_available_rbs
min_rb_unit[CC_id] [CC_id] =
+ 1; ue_sched_ctl->pre_nb_available_rbs
ue_sched_ctl2->pre_nb_available_rbs [CC_id] +
[CC_id] = min_rb_unit[CC_id]
ue_sched_ctl2->pre_nb_available_rbs - 1;
[CC_id] + nb_rbs_remaining
min_rb_unit[CC_id] [CC_id][UE_id2] =
- 1; nb_rbs_remaining
} else { [CC_id][UE_id2] -
min_rb_unit[CC_id]
nb_rbs_required_remaining + 1;
[CC_id][UE_id] = ue_sched_ctl2->pre_nb_available_rbs
nb_rbs_required_remaining [CC_id] =
[CC_id][UE_id] - 4; ue_sched_ctl2->pre_nb_available_rbs
ue_sched_ctl->pre_nb_available_rbs [CC_id] +
[CC_id] = min_rb_unit[CC_id]
ue_sched_ctl->pre_nb_available_rbs - 1;
[CC_id] + 4; } else {
nb_rbs_required_remaining
[CC_id][UE_id2] = nb_rbs_remaining
nb_rbs_required_remaining [CC_id][UE_id] =
[CC_id][UE_id2] - nb_rbs_remaining
4; [CC_id][UE_id] - 4;
ue_sched_ctl2->pre_nb_available_rbs ue_sched_ctl->pre_nb_available_rbs
[CC_id] = [CC_id] =
ue_sched_ctl2->pre_nb_available_rbs ue_sched_ctl->pre_nb_available_rbs
[CC_id] + 4; [CC_id] + 4;
} nb_rbs_remaining
[CC_id][UE_id2] =
break; nb_rbs_remaining
} [CC_id][UE_id2] -
} 4;
} ue_sched_ctl2->pre_nb_available_rbs
} [CC_id] =
} ue_sched_ctl2->pre_nb_available_rbs
} [CC_id] + 4;
} }
break;
}
}
}
}
}
}
}
#endif #endif
} // total_ue_count } // total_ue_count
} // CC } // CC
...@@ -1284,10 +1344,10 @@ dlsch_scheduler_pre_processor_allocate(module_id_t Mod_id, ...@@ -1284,10 +1344,10 @@ dlsch_scheduler_pre_processor_allocate(module_id_t Mod_id,
int UE_id, int UE_id,
uint8_t CC_id, uint8_t CC_id,
int N_RBG, int N_RBG,
int transmission_mode, int tm,
int min_rb_unit, int min_rb_unit,
uint16_t nb_rbs_required[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB], uint16_t nb_rbs_required[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB],
uint16_t nb_rbs_required_remaining[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB], uint16_t nb_rbs_remaining[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB],
unsigned char rballoc_sub[NFAPI_CC_MAX][N_RBG_MAX], unsigned char rballoc_sub[NFAPI_CC_MAX][N_RBG_MAX],
uint8_t slice_allocation_mask[NFAPI_CC_MAX][N_RBG_MAX], uint8_t slice_allocation_mask[NFAPI_CC_MAX][N_RBG_MAX],
unsigned char MIMO_mode_indicator[NFAPI_CC_MAX][N_RBG_MAX]) unsigned char MIMO_mode_indicator[NFAPI_CC_MAX][N_RBG_MAX])
...@@ -1300,51 +1360,38 @@ dlsch_scheduler_pre_processor_allocate(module_id_t Mod_id, ...@@ -1300,51 +1360,38 @@ dlsch_scheduler_pre_processor_allocate(module_id_t Mod_id,
for (i = 0; i < N_RBG; i++) { for (i = 0; i < N_RBG; i++) {
if (rballoc_sub[CC_id][i] != 0) if (rballoc_sub[CC_id][i] != 0) continue;
continue; if (ue_sched_ctl->rballoc_sub_UE[CC_id][i] != 0) continue;
if (ue_sched_ctl->rballoc_sub_UE[CC_id][i] != 0) if (nb_rbs_remaining[CC_id][UE_id] <= 0) continue;
continue; if (ue_sched_ctl->pre_nb_available_rbs[CC_id] >= nb_rbs_required[CC_id][UE_id]) continue;
if (nb_rbs_required_remaining[CC_id][UE_id] <= 0) if (ue_sched_ctl->dl_pow_off[CC_id] == 0) continue;
continue; if (slice_allocation_mask[CC_id][i] == 0) continue;
if (ue_sched_ctl->pre_nb_available_rbs[CC_id] >= nb_rbs_required[CC_id][UE_id])
continue;
if (ue_sched_ctl->dl_pow_off[CC_id] == 0)
continue;
if (slice_allocation_mask[CC_id][i] == 0)
continue;
// if ((rballoc_sub[CC_id][i] == 0) &&
// (ue_sched_ctl->rballoc_sub_UE[CC_id][i] == 0) &&
// (nb_rbs_required_remaining[CC_id][UE_id] > 0) &&
// (ue_sched_ctl->pre_nb_available_rbs[CC_id] < nb_rbs_required[CC_id][UE_id])) {
// // if this UE is not scheduled for TM5
// if (ue_sched_ctl->dl_pow_off[CC_id] != 0) {
if ((i == N_RBG - 1) && ((N_RB_DL == 25) || (N_RB_DL == 50))) { if ((i == N_RBG - 1) && ((N_RB_DL == 25) || (N_RB_DL == 50))) {
if (nb_rbs_required_remaining[CC_id][UE_id] >= min_rb_unit - 1) { // Allocating last, smaller RBG
if (nb_rbs_remaining[CC_id][UE_id] >= min_rb_unit - 1) {
rballoc_sub[CC_id][i] = 1; rballoc_sub[CC_id][i] = 1;
ue_sched_ctl->rballoc_sub_UE[CC_id][i] = 1; ue_sched_ctl->rballoc_sub_UE[CC_id][i] = 1;
MIMO_mode_indicator[CC_id][i] = 1; MIMO_mode_indicator[CC_id][i] = 1;
if (transmission_mode == 5) { if (tm == 5) {
ue_sched_ctl->dl_pow_off[CC_id] = 1; ue_sched_ctl->dl_pow_off[CC_id] = 1;
} }
nb_rbs_required_remaining[CC_id][UE_id] = nb_rbs_required_remaining[CC_id][UE_id] - min_rb_unit + 1; nb_rbs_remaining[CC_id][UE_id] = nb_rbs_remaining[CC_id][UE_id] - min_rb_unit + 1;
ue_sched_ctl->pre_nb_available_rbs[CC_id] = ue_sched_ctl->pre_nb_available_rbs[CC_id] + min_rb_unit - 1; ue_sched_ctl->pre_nb_available_rbs[CC_id] = ue_sched_ctl->pre_nb_available_rbs[CC_id] + min_rb_unit - 1;
} }
} else { } else {
if (nb_rbs_required_remaining[CC_id][UE_id] >= min_rb_unit) { // Allocating a standard-sized RBG
if (nb_rbs_remaining[CC_id][UE_id] >= min_rb_unit) {
rballoc_sub[CC_id][i] = 1; rballoc_sub[CC_id][i] = 1;
ue_sched_ctl->rballoc_sub_UE[CC_id][i] = 1; ue_sched_ctl->rballoc_sub_UE[CC_id][i] = 1;
MIMO_mode_indicator[CC_id][i] = 1; MIMO_mode_indicator[CC_id][i] = 1;
if (transmission_mode == 5) { if (tm == 5) {
ue_sched_ctl->dl_pow_off[CC_id] = 1; ue_sched_ctl->dl_pow_off[CC_id] = 1;
} }
nb_rbs_required_remaining[CC_id][UE_id] = nb_rbs_required_remaining[CC_id][UE_id] - min_rb_unit; nb_rbs_remaining[CC_id][UE_id] = nb_rbs_remaining[CC_id][UE_id] - min_rb_unit;
ue_sched_ctl->pre_nb_available_rbs[CC_id] = ue_sched_ctl->pre_nb_available_rbs[CC_id] + min_rb_unit; ue_sched_ctl->pre_nb_available_rbs[CC_id] = ue_sched_ctl->pre_nb_available_rbs[CC_id] + min_rb_unit;
} }
} }
// } // dl_pow_off[CC_id][UE_id] ! = 0
// }
} }
} }
...@@ -1442,7 +1489,8 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP, ...@@ -1442,7 +1489,8 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
N_RB_UL = to_prb(RC.mac[module_idP]->common_channels[CC_id].ul_Bandwidth); N_RB_UL = to_prb(RC.mac[module_idP]->common_channels[CC_id].ul_Bandwidth);
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id]; ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_id] = flexran_nb_rbs_allowed_slice(slice_percentage_uplink[slice_id],N_RB_UL); ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_id] =
nb_rbs_allowed_slice(slice_percentage_uplink[slice_id], N_RB_UL);
if (total_ue_count[CC_id] == 0) { if (total_ue_count[CC_id] == 0) {
average_rbs_per_user[CC_id] = 0; average_rbs_per_user[CC_id] = 0;
...@@ -1614,7 +1662,8 @@ assign_max_mcs_min_rb(module_id_t module_idP, int slice_id, int frameP, ...@@ -1614,7 +1662,8 @@ assign_max_mcs_min_rb(module_id_t module_idP, int slice_id, int frameP,
Ncp = RC.mac[module_idP]->common_channels[CC_id].Ncp; Ncp = RC.mac[module_idP]->common_channels[CC_id].Ncp;
N_RB_UL = to_prb(RC.mac[module_idP]->common_channels[CC_id].ul_Bandwidth); N_RB_UL = to_prb(RC.mac[module_idP]->common_channels[CC_id].ul_Bandwidth);
ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_id] = flexran_nb_rbs_allowed_slice(slice_percentage_uplink[slice_id],N_RB_UL); ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_id] =
nb_rbs_allowed_slice(slice_percentage_uplink[slice_id], N_RB_UL);
int bytes_to_schedule = UE_template->estimated_ul_buffer - UE_template->scheduled_ul_bytes; int bytes_to_schedule = UE_template->estimated_ul_buffer - UE_template->scheduled_ul_bytes;
if (bytes_to_schedule < 0) bytes_to_schedule = 0; if (bytes_to_schedule < 0) bytes_to_schedule = 0;
......
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