Commit 7e3cb7a3 authored by francescomani's avatar francescomani

adapting coreset0 parameter

parent b93cb714
...@@ -362,7 +362,7 @@ uint32_t schedule_control_sib1(module_id_t module_id, ...@@ -362,7 +362,7 @@ uint32_t schedule_control_sib1(module_id_t module_id,
const uint16_t bwpSize = type0_PDCCH_CSS_config->num_rbs; const uint16_t bwpSize = type0_PDCCH_CSS_config->num_rbs;
int rbStart = type0_PDCCH_CSS_config->cset_start_rb; int rbStart = type0_PDCCH_CSS_config->cset_start_rb;
printf("%d %d\n",bwpSize,rbStart);
// TODO: There are exceptions to this in table 5.1.2.1.1-4,5 (Default time domain allocation tables B, C) // TODO: There are exceptions to this in table 5.1.2.1.1-4,5 (Default time domain allocation tables B, C)
int mappingtype = (startSymbolIndex <= 3)? typeA: typeB; int mappingtype = (startSymbolIndex <= 3)? typeA: typeB;
......
...@@ -40,7 +40,7 @@ gNBs = ...@@ -40,7 +40,7 @@ gNBs =
pdcch_ConfigSIB1 = ( pdcch_ConfigSIB1 = (
{ {
controlResourceSetZero = 12; controlResourceSetZero = 11;
searchSpaceZero = 0; searchSpaceZero = 0;
} }
); );
......
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