diff --git a/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf b/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf
index 29c6c6aa033e2dedd427068b04ccbf3b545c5050..9866498e986bd4b445c4f8e2b16fdc561705751a 100644
--- a/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf
+++ b/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf
@@ -157,12 +157,12 @@ gNBs =
         restrictedSetConfig                                         = 0,
 
       # pusch-ConfigCommon (up to 16 elements)
-        initialULBWPk2_0                      = 6;
+        initialULBWPk2_0                      = 2;
         initialULBWPmappingType_0             = 1
         # this is SS=2 L=13
         initialULBWPstartSymbolAndLength_0    = 41;
 
-        initialULBWPk2_1                      = 6;
+        initialULBWPk2_1                      = 2;
         initialULBWPmappingType_1             = 1;
         # this is SS=0 L=4
         initialULBWPstartSymbolAndLength_1    = 52;
diff --git a/openair1/PHY/NR_TRANSPORT/pucch_rx.c b/openair1/PHY/NR_TRANSPORT/pucch_rx.c
index 1e92b6ba013dc036d895835f177231a662ed22df..385041876dff6c43f98bd7b20d4c397b8c013977 100644
--- a/openair1/PHY/NR_TRANSPORT/pucch_rx.c
+++ b/openair1/PHY/NR_TRANSPORT/pucch_rx.c
@@ -359,6 +359,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
     if (temp>xrtmag) {
       xrtmag_next = xrtmag;
       xrtmag=temp;
+      LOG_D(PHY,"Sequence %d xrtmag %ld xrtmag_next %ld\n", i, xrtmag, xrtmag_next);
       maxpos=i;
       uci_stats->current_pucch0_stat0 = 0;
       int64_t temp2=0,temp3=0;;
@@ -369,6 +370,8 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
       uci_stats->current_pucch0_stat0= dB_fixed64(temp2);
       if (l==2) uci_stats->current_pucch0_stat1= dB_fixed64(temp3);
     }
+    else if (temp>xrtmag_next)
+      xrtmag_next = temp;
   }
 
   av_corr/=nr_sequences/l;
@@ -429,7 +432,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
     uci_pdu->harq->harq_confidence_level = no_conf ? 1 : 0;
     uci_pdu->harq->harq_list = (nfapi_nr_harq_t*)malloc(1);
     uci_pdu->harq->harq_list[0].harq_value = index&0x01;
-    LOG_D(PHY, "[DLSCH/PDSCH/PUCCH] %d.%d HARQ value %d with confidence level (0 is good, 1 is bad) %d xrt_mag %d srt_mag_next %d n0 %d (%d,%d) pucch0_thres %d, cqi %d, SNRtimes10 %d\n",
+    LOG_I(PHY, "[DLSCH/PDSCH/PUCCH] %d.%d HARQ value %d with confidence level (0 is good, 1 is bad) %d xrt_mag %d srt_mag_next %d n0 %d (%d,%d) pucch0_thres %d, cqi %d, SNRtimes10 %d\n",
           frame,slot,uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level,xrtmag_dBtimes10,xrtmag_next_dBtimes10,max_n0,uci_stats->pucch0_n00,uci_stats->pucch0_n01,uci_stats->pucch0_thres,cqi,SNRtimes10);
     if (pucch_pdu->sr_flag == 1) {
       uci_pdu->sr = calloc(1,sizeof(*uci_pdu->sr));
@@ -446,8 +449,8 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
     uci_pdu->harq->harq_list = (nfapi_nr_harq_t*)malloc(2);
     uci_pdu->harq->harq_list[1].harq_value = index&0x01;
     uci_pdu->harq->harq_list[0].harq_value = (index>>1)&0x01;
-    LOG_D(PHY, "[DLSCH/PDSCH/PUCCH] %d.%d HARQ values %d and %d with confidence level (0 is good, 1 is bad) %d, xrt_mag %d xrt_mag_next %d\n",
-          frame,slot,uci_pdu->harq->harq_list[1].harq_value,uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level,xrtmag_dBtimes10,xrtmag_next_dBtimes10);
+    LOG_I(PHY, "[DLSCH/PDSCH/PUCCH] %d.%d HARQ values %d and %d with confidence level (0 is good, 1 is bad) %d, xrt_mag %d xrt_mag_next %d n0 %d (%d,%d) pucch0_thres %d, cqi %d, SNRtimes10 %d\n",
+          frame,slot,uci_pdu->harq->harq_list[1].harq_value,uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level,xrtmag_dBtimes10,xrtmag_next_dBtimes10,max_n0,uci_stats->pucch0_n00,uci_stats->pucch0_n01,uci_stats->pucch0_thres,cqi,SNRtimes10);
     if (pucch_pdu->sr_flag == 1) {
       uci_pdu->sr = calloc(1,sizeof(*uci_pdu->sr));
       uci_pdu->sr->sr_indication = (index>3) ? 1 : 0;
diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
index 0ae37d752d73c01609470f84effea5b7ef8f4772..27037446d20b19ac81a5c9734dcf97b5fef1f4f2 100644
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
@@ -1771,8 +1771,6 @@ void nr_check_Msg4_Ack(module_id_t module_id, int CC_id, frame_t frame, sub_fram
       ra->Msg4_frame = (frame + 1) % 1024;
       ra->Msg4_slot = 1;
       ra->state = Msg4;
-      UE_info->active[UE_id] = false;
-      UE_info->Msg4_ACKed[UE_id] = false;
     }
   }
 }
diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
index c8bbfd2bbedc7fbeb3fce3737814f0af4ef607f4..74d72136b47cb6d3926436543d32e727d6aa1ea0 100644
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
@@ -899,7 +899,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
     harq->is_waiting = true;
     UE_info->mac_stats[UE_id].dlsch_rounds[harq->round]++;
 
-    LOG_D(NR_MAC,
+    LOG_I(NR_MAC,
           "%4d.%2d [DLSCH/PDSCH/PUCCH] UE %d RNTI %04x DCI L %d start %3d RBs %3d startSymbol %2d nb_symbol %2d dmrspos %x MCS %2d TBS %4d HARQ PID %2d round %d RV %d NDI %d dl_data_to_ULACK %d (%d.%d) TPC %d\n",
           frame,
           slot,
@@ -1076,7 +1076,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
     dci_payload.dmrs_sequence_initialization.val = pdsch_pdu->SCID;
     LOG_D(NR_MAC,
           "%4d.%2d DCI type 1 payload: freq_alloc %d (%d,%d,%d), "
-          "time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d tpc %d\n",
+          "time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d tpc %d ti %d\n",
           frame,
           slot,
           dci_payload.frequency_domain_assignment.val,
@@ -1089,7 +1089,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
           dci_payload.tb_scaling,
           dci_payload.ndi,
           dci_payload.rv,
-          dci_payload.tpc);
+          dci_payload.tpc,
+          pucch->timing_indicator);
 
     const long f = sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats;
     int dci_format;
diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
index ac017f6a678224e2b6bfe450ae9b461c1606a92b..0fb06dfb4e6b4a60395d50230ca90544baa82db7 100644
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
@@ -2090,6 +2090,7 @@ void get_pdsch_to_harq_feedback(int Mod_idP,
                                 int UE_id,
                                 int bwp_id,
                                 NR_SearchSpace__searchSpaceType_PR ss_type,
+                                int *max_fb_time,
                                 uint8_t *pdsch_to_harq_feedback) {
 
   NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
@@ -2127,8 +2128,11 @@ void get_pdsch_to_harq_feedback(int Mod_idP,
 
   // common search type uses DCI format 1_0
   if (ss_type == NR_SearchSpace__searchSpaceType_PR_common) {
-    for (int i=0; i<8; i++)
+    for (int i=0; i<8; i++) {
       pdsch_to_harq_feedback[i] = i+1;
+      if(pdsch_to_harq_feedback[i]>*max_fb_time)
+        *max_fb_time = pdsch_to_harq_feedback[i];
+    }
   }
   else {
 
@@ -2150,14 +2154,20 @@ void get_pdsch_to_harq_feedback(int Mod_idP,
 
 
     if (ss->searchSpaceType->choice.ue_Specific->dci_Formats == NR_SearchSpace__searchSpaceType__ue_Specific__dci_Formats_formats0_0_And_1_0) {
-      for (int i=0; i<8; i++)
+      for (int i=0; i<8; i++) {
         pdsch_to_harq_feedback[i] = i+1;
+        if(pdsch_to_harq_feedback[i]>*max_fb_time)
+          *max_fb_time = pdsch_to_harq_feedback[i];
+      }
     }
     else {
       AssertFatal(ubwpd!=NULL,"ubwpd shouldn't be null here\n");
       if(ubwpd->pucch_Config->choice.setup->dl_DataToUL_ACK != NULL) {
-        for (int i=0; i<8; i++)
+        for (int i=0; i<8; i++) {
           pdsch_to_harq_feedback[i] = *ubwpd->pucch_Config->choice.setup->dl_DataToUL_ACK->list.array[i];
+          if(pdsch_to_harq_feedback[i]>*max_fb_time)
+            *max_fb_time = pdsch_to_harq_feedback[i];
+        }
       }
       else
         AssertFatal(0==1,"There is no allocated dl_DataToUL_ACK for pdsch to harq feedback\n");
diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
index c17641b2fb4d1a345e400081c8f57119c6ebd306..469f7bb3a1dd9c839afced87c80ac55008df183b 100644
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
@@ -1169,15 +1169,15 @@ int nr_acknack_scheduling(int mod_id,
                           frame_t frame,
                           sub_frame_t slot,
                           int r_pucch,
-                          int is_common)
-{
+                          int is_common) {
+
   const NR_ServingCellConfigCommon_t *scc = RC.nrmac[mod_id]->common_channels->ServingCellConfigCommon;
   const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
   const NR_TDD_UL_DL_Pattern_t *tdd = &scc->tdd_UL_DL_ConfigurationCommon->pattern1;
-  const int nr_ulmix_slots = tdd->nrofUplinkSlots + (tdd->nrofUplinkSymbols != 0);
   const int nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0;
   const int nr_slots_period = tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots;
   const int first_ul_slot_tdd = tdd->nrofDownlinkSlots + nr_slots_period * (slot / nr_slots_period);
+  const int first_ul_slot_period = first_ul_slot_tdd%nr_slots_period;
   const int CC_id = 0;
   NR_sched_pucch_t *csi_pucch;
 
@@ -1211,7 +1211,10 @@ int nr_acknack_scheduling(int mod_id,
     nr_fill_nfapi_pucch(mod_id, frame, slot, pucch, UE_id);
     memset(pucch, 0, sizeof(*pucch));
     pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f;
-    pucch->ul_slot = (s + 1) % n_slots_frame;
+    if(((s + 1)%nr_slots_period) == 0)
+      pucch->ul_slot = (s + 1 + first_ul_slot_period) % n_slots_frame;
+    else
+      pucch->ul_slot = (s + 1) % n_slots_frame;
     // we assume that only two indices over the array sched_pucch exist
     csi_pucch = &sched_ctrl->sched_pucch[1];
     // skip the CSI PUCCH if it is present and if in the next frame/slot
@@ -1223,19 +1226,15 @@ int nr_acknack_scheduling(int mod_id,
         && !csi_pucch->simultaneous_harqcsi) {
       nr_fill_nfapi_pucch(mod_id, frame, slot, csi_pucch, UE_id);
       memset(csi_pucch, 0, sizeof(*csi_pucch));
-      pucch->frame = s >= n_slots_frame - 2 ?  (f + 1) % 1024 : f;
-      pucch->ul_slot = (s + 2) % n_slots_frame;
+      pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f;
+      if(((s + 1)%nr_slots_period) == 0)
+        pucch->ul_slot = (s + 1 + first_ul_slot_period) % n_slots_frame;
+      else
+        pucch->ul_slot = (s + 1) % n_slots_frame;
     }
   }
 
-  LOG_D(NR_MAC,"pucch_acknak 1. DL %d.%d, UL_ACK %d.%d, DAI_C %d\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->dai_c);
-  /* if the UE's next PUCCH occasion is after the possible UL slots (within the
-   * same frame) or wrapped around to the next frame, then we assume there is
-   * no possible PUCCH allocation anymore */
-  if ((pucch->frame == frame
-       && (pucch->ul_slot >= first_ul_slot_tdd + nr_ulmix_slots))
-      || (pucch->frame == frame + 1))
-    return -1;
+  LOG_I(NR_MAC,"pucch_acknak 1. DL %d.%d, UL_ACK %d.%d, DAI_C %d\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->dai_c);
 
   // this is hardcoded for now as ue specific only if we are not on the initialBWP (to be fixed to allow ue_Specific also on initialBWP
   NR_CellGroupConfig_t *cg = RC.nrmac[mod_id]->UE_info.CellGroup[UE_id];
@@ -1253,15 +1252,14 @@ int nr_acknack_scheduling(int mod_id,
   int bwp_Id = 0;
   if (sched_ctrl->active_ubwp) bwp_Id = sched_ctrl->active_ubwp->bwp_Id;
 
-  get_pdsch_to_harq_feedback(mod_id, UE_id, bwp_Id, ss_type, pdsch_to_harq_feedback);
-
+  int max_fb_time = 0;
+  get_pdsch_to_harq_feedback(mod_id, UE_id, bwp_Id, ss_type, &max_fb_time, pdsch_to_harq_feedback);
+  int max_absslot = frame*n_slots_frame + slot + max_fb_time;
 
   LOG_D(NR_MAC,"pucch_acknak 1b. DL %d.%d, UL_ACK %d.%d, DAI_C %d\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->dai_c);
   /* there is a HARQ. Check whether we can use it for this ACKNACK */
   if (pucch->dai_c > 0) {
     /* this UE already has a PUCCH occasion */
-    DevAssert(pucch->frame == frame);
-
     // Find the right timing_indicator value.
     int i = 0;
     while (i < 8) {
@@ -1278,48 +1276,67 @@ int nr_acknack_scheduling(int mod_id,
       nr_fill_nfapi_pucch(mod_id, frame, slot, pucch, UE_id);
       memset(pucch, 0, sizeof(*pucch));
       pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f;
-      pucch->ul_slot = (s + 1) % n_slots_frame;
+      if(((s + 1)%nr_slots_period) == 0)
+        pucch->ul_slot = (s + 1 + first_ul_slot_period) % n_slots_frame;
+      else
+        pucch->ul_slot = (s + 1) % n_slots_frame;
       return nr_acknack_scheduling(mod_id, UE_id, frame, slot, r_pucch,is_common);
     }
 
     pucch->timing_indicator = i;
     pucch->dai_c++;
     // retain old resource indicator, and we are good
-    LOG_D(NR_MAC,"pucch_acknak : %d.%d. DAI > 0, pucch allocated for %d.%d\n",frame,slot,pucch->frame,pucch->ul_slot);
+    LOG_I(NR_MAC,"pucch_acknak : %d.%d. DAI > 0, pucch allocated for %d.%d (index %d)\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->timing_indicator);
     return 0;
   }
 
   LOG_D(NR_MAC,"pucch_acknak : %d.%d DAI = 0, looking for new pucch occasion\n",frame,slot);
   /* we need to find a new PUCCH occasion */
 
-  /* if time information is outdated (e.g., last PUCCH occasion in last frame),
-   * set to first possible UL occasion in this frame. Note that if such UE is
-   * scheduled a lot and used all AckNacks, pucch->frame might have been
-   * wrapped around to next frame */
-  if (frame != pucch->frame || pucch->ul_slot < first_ul_slot_tdd) {
+  /*Inizialization of timing information*/
+  if (pucch->frame == 0 && pucch->ul_slot == 0) {
     AssertFatal(pucch->sr_flag + pucch->dai_c == 0,
                 "expected no SR/AckNack for UE %d in %4d.%2d, but has %d/%d for %4d.%2d\n",
                 UE_id, frame, slot, pucch->sr_flag, pucch->dai_c, pucch->frame, pucch->ul_slot);
-    AssertFatal(frame + 1 != pucch->frame,
-                "frame wrap around not handled in %s() yet\n",
-                __func__);
     pucch->frame = frame;
     pucch->ul_slot = first_ul_slot_tdd;
   }
 
-  // advance ul_slot if it is not reachable by UE
-  int pucch_slot,ind_found=-1;
-  for (int i=0;i<8;i++) {
-    pucch_slot = slot + pdsch_to_harq_feedback[i];
-    if ((pucch_slot%nr_slots_period) >= tdd->nrofDownlinkSlots) {
-       pucch->ul_slot = max(pucch->ul_slot, pucch_slot);
-       ind_found=i;
-       break;
+  // Find the right timing_indicator value.
+  int ind_found = -1;
+  // while we are within the feedback limits and it has not been
+  while ((pucch->frame*n_slots_frame + pucch->ul_slot) <= max_absslot) {
+    int i = 0;
+    while (i < 8) {
+      LOG_D(NR_MAC,"pdsch_to_harq_feedback[%d] = %d (pucch->ul_slot %d - slot %d)\n",
+            i,pdsch_to_harq_feedback[i],pucch->ul_slot,slot);
+      if (pdsch_to_harq_feedback[i] == pucch->ul_slot - slot) {
+        ind_found = i;
+        break;
+      }
+      ++i;
     }
+    if (ind_found!=-1)
+      break;
+    // advance to the next ul slot
+    const int f = pucch->frame;
+    const int s = pucch->ul_slot;
+    pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f;
+    if(((s + 1)%nr_slots_period) == 0)
+      pucch->ul_slot = (s + 1 + first_ul_slot_period) % n_slots_frame;
+    else
+      pucch->ul_slot = (s + 1) % n_slots_frame;
+  }
+  if (ind_found==-1) {
+    LOG_W(NR_MAC,
+          "%4d.%2d could not find pdsch_to_harq_feedback for UE %d: earliest "
+          "ack slot %d\n",
+          frame,
+          slot,
+          UE_id,
+          pucch->ul_slot);
+    return -1;
   }
-  if (pucch->ul_slot >= n_slots_frame) pucch->frame++;
-  pucch->ul_slot = pucch->ul_slot % n_slots_frame;
-  AssertFatal(ind_found!=-1,"couldn't find a valid UL_ACK slot for PUCCH, shouldn't happen\n");
 
   // is there already CSI in this slot?
   csi_pucch = &sched_ctrl->sched_pucch[1];
@@ -1340,7 +1357,10 @@ int nr_acknack_scheduling(int mod_id,
       const int s = pucch->ul_slot;
       memset(pucch, 0, sizeof(*pucch));
       pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f;
-      pucch->ul_slot = (s + 1) % n_slots_frame;
+      if(((s + 1)%nr_slots_period) == 0)
+        pucch->ul_slot = (s + 1 + first_ul_slot_period) % n_slots_frame;
+      else
+        pucch->ul_slot = (s + 1) % n_slots_frame;
       return nr_acknack_scheduling(mod_id, UE_id, frame, slot, r_pucch,is_common);
     }
     // multiplexing harq and csi in a pucch
@@ -1353,7 +1373,7 @@ int nr_acknack_scheduling(int mod_id,
 
   pucch->timing_indicator = ind_found; // index in the list of timing indicators
 
-  LOG_D(NR_MAC,"pucch_acknak 2. DAI 0 DL %d.%d, UL_ACK %d.%d (index %d)\n",frame,slot,pucch->frame,pucch->ul_slot,ind_found);
+  LOG_I(NR_MAC,"pucch_acknak 2. DAI 0 DL %d.%d, UL_ACK %d.%d (index %d)\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->timing_indicator);
 
   pucch->dai_c++;
   pucch->resource_indicator = 0; // each UE has dedicated PUCCH resources
diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
index d864810404bda6cf39d7a9ccb8fea90bb9d3df2c..9845e07a01c91894761d50823a2c32c62658d69a 100644
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
@@ -1044,7 +1044,7 @@ void pf_ul(module_id_t module_id,
   gNB_MAC_INST *nrmac = RC.nrmac[module_id];
   NR_ServingCellConfigCommon_t *scc = nrmac->common_channels[CC_id].ServingCellConfigCommon;
   NR_UE_info_t *UE_info = &nrmac->UE_info;
-  const int min_rb = 52;
+  const int min_rb = 5;
   float coeff_ue[MAX_MOBILES_PER_GNB];
   // UEs that could be scheduled
   int ue_array[MAX_MOBILES_PER_GNB];
diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h
index ea5bed9ca9be0ace8b6f1307a369f08778fd72e0..321476d513cf2eb5d236cc3c08453cb0f20671fa 100644
--- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h
@@ -212,6 +212,7 @@ void get_pdsch_to_harq_feedback(int Mod_idP,
                                 int UE_id,
                                 int bwp_id,
                                 NR_SearchSpace__searchSpaceType_PR ss_type,
+                                int *max_fb_time,
                                 uint8_t *pdsch_to_harq_feedback);
   
 void nr_configure_css_dci_initial(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu,
diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf
index e58fec043bce0a4f856afcfac2f28822168d2039..c9bffb895b9146d73309671c3d58dc30d99751ce 100644
--- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf
+++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf
@@ -231,8 +231,12 @@ MACRLCs = (
         tr_s_preference             = "local_L1";
         tr_n_preference             = "local_RRC";
         ulsch_max_slots_inactivity  = 10;
-        pusch_TargetSNRx10          = 200;
+        pusch_TargetSNRx10          = 150;
         pucch_TargetSNRx10          = 200;
+
+        #pusch_TargetSNRx10 = 200;
+        #pucch_TargetSNRx10 = 150;
+        #ulsch_max_slots_inactivity=20;
     }
 );
 
@@ -240,8 +244,10 @@ L1s = (
     {
 	num_cc = 1;
 	tr_n_preference = "local_mac";
-	pusch_proc_threads = 8;
-  ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0
+	pusch_proc_threads = 2;
+    prach_dtx_threshold = 120;
+    pucch0_dtx_threshold = 200;
+	ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0
     }
 );