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Michael Black
OpenXG-RAN
Commits
8a5319fc
Commit
8a5319fc
authored
Apr 29, 2021
by
rmagueta
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Fix tda and nr_schedule_ue_spec after merge
parent
7a07d57a
Changes
4
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4 changed files
with
17 additions
and
14 deletions
+17
-14
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
+6
-6
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+5
-2
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+2
-2
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+4
-4
No files found.
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
View file @
8a5319fc
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
View file @
8a5319fc
...
...
@@ -449,7 +449,7 @@ bool allocate_dl_retransmission(module_id_t module_id,
const
uint8_t
num_dmrs_cdm_grps_no_data
=
ps
->
nrOfSymbols
==
2
?
1
:
2
;
int
rbSize
=
0
;
const
int
tda
=
sched_ctrl
->
active_bwp
?
RC
.
nrmac
[
module_id
]
->
preferred_dl_tda
[
sched_ctrl
->
active_bwp
->
bwp_Id
][
slot
]
:
0
;
const
int
tda
=
sched_ctrl
->
active_bwp
?
RC
.
nrmac
[
module_id
]
->
preferred_dl_tda
[
sched_ctrl
->
active_bwp
->
bwp_Id
][
slot
]
:
1
;
if
(
tda
==
retInfo
->
time_domain_allocation
)
{
/* Check that there are enough resources for retransmission */
while
(
rbSize
<
retInfo
->
rbSize
)
{
...
...
@@ -666,7 +666,7 @@ void pf_dl(module_id_t module_id,
max_rbSize
++
;
/* MCS has been set above */
const
int
tda
=
sched_ctrl
->
active_bwp
?
RC
.
nrmac
[
module_id
]
->
preferred_dl_tda
[
sched_ctrl
->
active_bwp
->
bwp_Id
][
slot
]
:
0
;
const
int
tda
=
sched_ctrl
->
active_bwp
?
RC
.
nrmac
[
module_id
]
->
preferred_dl_tda
[
sched_ctrl
->
active_bwp
->
bwp_Id
][
slot
]
:
1
;
NR_sched_pdsch_t
*
sched_pdsch
=
&
sched_ctrl
->
sched_pdsch
;
NR_pdsch_semi_static_t
*
ps
=
&
sched_ctrl
->
pdsch_semi_static
;
const
uint8_t
num_dmrs_cdm_grps_no_data
=
ps
->
nrOfSymbols
==
2
?
1
:
2
;
...
...
@@ -1208,5 +1208,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
gNB_mac
->
TX_req
[
CC_id
].
Number_of_PDUs
++
;
gNB_mac
->
TX_req
[
CC_id
].
SFN
=
frame
;
gNB_mac
->
TX_req
[
CC_id
].
Slot
=
slot
;
/* mark UE as scheduled */
sched_pdsch
->
rbSize
=
0
;
}
}
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @
8a5319fc
...
...
@@ -359,7 +359,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
NR_pdsch_semi_static_t
*
ps
=
&
sched_ctrl
->
pdsch_semi_static
;
sched_pdsch
->
rbStart
=
rbStart
;
sched_pdsch
->
rbSize
=
rbSize
;
const
int
tda
=
sched_ctrl
->
active_bwp
?
RC
.
nrmac
[
module_id
]
->
preferred_dl_tda
[
sched_ctrl
->
active_bwp
->
bwp_Id
][
slot
]
:
0
;
const
int
tda
=
sched_ctrl
->
active_bwp
?
RC
.
nrmac
[
module_id
]
->
preferred_dl_tda
[
sched_ctrl
->
active_bwp
->
bwp_Id
][
slot
]
:
1
;
const
uint8_t
num_dmrs_cdm_grps_no_data
=
1
;
if
(
ps
->
time_domain_allocation
!=
tda
||
ps
->
numDmrsCdmGrpsNoData
!=
num_dmrs_cdm_grps_no_data
)
nr_set_pdsch_semi_static
(
...
...
@@ -409,7 +409,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE_info
->
UE_sched_ctrl
[
UE_id
];
const
int
tda
=
sched_ctrl
->
active_ubwp
?
RC
.
nrmac
[
module_id
]
->
preferred_ul_tda
[
sched_ctrl
->
active_ubwp
->
bwp_Id
][
slot
]
:
0
;
const
int
tda
=
sched_ctrl
->
active_ubwp
?
RC
.
nrmac
[
module_id
]
->
preferred_ul_tda
[
sched_ctrl
->
active_ubwp
->
bwp_Id
][
slot
]
:
1
;
if
(
tda
<
0
)
return
false
;
const
struct
NR_PUSCH_TimeDomainResourceAllocationList
*
tdaList
=
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
View file @
8a5319fc
...
...
@@ -801,7 +801,7 @@ bool allocate_ul_retransmission(module_id_t module_id,
const
uint16_t
bwpSize
=
NRRIV2PRBOFFSET
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
);
const
uint8_t
num_dmrs_cdm_grps_no_data
=
sched_ctrl
->
active_bwp
?
1
:
2
;
const
int
tda
=
sched_ctrl
->
active_ubwp
?
RC
.
nrmac
[
module_id
]
->
preferred_ul_tda
[
sched_ctrl
->
active_ubwp
->
bwp_Id
][
slot
]
:
0
;
const
int
tda
=
sched_ctrl
->
active_ubwp
?
RC
.
nrmac
[
module_id
]
->
preferred_ul_tda
[
sched_ctrl
->
active_ubwp
->
bwp_Id
][
slot
]
:
1
;
if
(
tda
==
retInfo
->
time_domain_allocation
)
{
/* Check the resource is enough for retransmission */
while
(
rbStart
<
bwpSize
&&
!
rballoc_mask
[
rbStart
])
...
...
@@ -999,7 +999,7 @@ void pf_ul(module_id_t module_id,
const
uint8_t
num_dmrs_cdm_grps_no_data
=
sched_ctrl
->
active_ubwp
?
1
:
2
;
const
long
f
=
sched_ctrl
->
search_space
->
searchSpaceType
->
choice
.
ue_Specific
->
dci_Formats
;
const
int
dci_format
=
sched_ctrl
->
active_ubwp
?
(
f
?
NR_UL_DCI_FORMAT_0_1
:
NR_UL_DCI_FORMAT_0_0
)
:
NR_UL_DCI_FORMAT_0_0
;
const
int
tda
=
sched_ctrl
->
active_ubwp
?
nrmac
->
preferred_ul_tda
[
sched_ctrl
->
active_ubwp
->
bwp_Id
][
slot
]
:
0
;
const
int
tda
=
sched_ctrl
->
active_ubwp
?
nrmac
->
preferred_ul_tda
[
sched_ctrl
->
active_ubwp
->
bwp_Id
][
slot
]
:
1
;
if
(
ps
->
time_domain_allocation
!=
tda
||
ps
->
dci_format
!=
dci_format
||
ps
->
num_dmrs_cdm_grps_no_data
!=
num_dmrs_cdm_grps_no_data
)
...
...
@@ -1095,7 +1095,7 @@ void pf_ul(module_id_t module_id,
const
uint8_t
num_dmrs_cdm_grps_no_data
=
sched_ctrl
->
active_ubwp
?
1
:
2
;
const
long
f
=
sched_ctrl
->
search_space
->
searchSpaceType
->
choice
.
ue_Specific
->
dci_Formats
;
const
int
dci_format
=
sched_ctrl
->
active_ubwp
?
(
f
?
NR_UL_DCI_FORMAT_0_1
:
NR_UL_DCI_FORMAT_0_0
)
:
NR_UL_DCI_FORMAT_0_0
;
const
int
tda
=
sched_ctrl
->
active_ubwp
?
nrmac
->
preferred_ul_tda
[
sched_ctrl
->
active_ubwp
->
bwp_Id
][
slot
]
:
0
;
const
int
tda
=
sched_ctrl
->
active_ubwp
?
nrmac
->
preferred_ul_tda
[
sched_ctrl
->
active_ubwp
->
bwp_Id
][
slot
]
:
1
;
if
(
ps
->
time_domain_allocation
!=
tda
||
ps
->
dci_format
!=
dci_format
||
ps
->
num_dmrs_cdm_grps_no_data
!=
num_dmrs_cdm_grps_no_data
)
...
...
@@ -1145,7 +1145,7 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
* schedule now (slot + k2 is not UL slot) */
int
UE_id
=
UE_info
->
list
.
head
;
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE_info
->
UE_sched_ctrl
[
UE_id
];
const
int
tda
=
sched_ctrl
->
active_ubwp
?
nr_mac
->
preferred_ul_tda
[
sched_ctrl
->
active_ubwp
->
bwp_Id
][
slot
]
:
0
;
const
int
tda
=
sched_ctrl
->
active_ubwp
?
nr_mac
->
preferred_ul_tda
[
sched_ctrl
->
active_ubwp
->
bwp_Id
][
slot
]
:
1
;
if
(
tda
<
0
)
return
false
;
int
K2
=
get_K2
(
scc
,
sched_ctrl
->
active_ubwp
,
tda
,
mu
);
...
...
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