Commit a75834ca authored by Hongzhi Wang's avatar Hongzhi Wang

Merge branch 'nr_initialsync' of...

Merge branch 'nr_initialsync' of https://gitlab.eurecom.fr/oai/openairinterface5g into nr_initialsync
parents d33269a8 a7081fed
[AD9371]
ad9371-phy.in_voltage2_rf_port_select = OFF
ad9371-phy.in_voltage2_hardwaregain = -156.000000 dB
ad9371-phy.in_voltage2_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_voltage0_lo_leakage_tracking_en = 0
ad9371-phy.out_voltage0_hardwaregain = 0.000000 dB
ad9371-phy.out_voltage0_quadrature_tracking_en = 1
ad9371-phy.out_voltage1_hardwaregain = 0.000000 dB
ad9371-phy.out_voltage1_lo_leakage_tracking_en = 0
ad9371-phy.out_voltage1_quadrature_tracking_en = 1
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_altvoltage1_TX_LO_frequency = 2560000000
ad9371-phy.out_altvoltage2_RX_SN_LO_frequency = 2680000000
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage0_gain_control_mode = manual
ad9371-phy.in_voltage0_quadrature_tracking_en = 1
ad9371-phy.in_voltage0_hardwaregain = 30.000000 dB
ad9371-phy.in_voltage0_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage1_quadrature_tracking_en = 1
ad9371-phy.in_voltage1_hardwaregain = 30.000000 dB
ad9371-phy.in_voltage1_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage1_gain_control_mode = manual
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_altvoltage0_RX_LO_frequency = 2680000000
ad9371-phy.calibrate_rx_qec_en = 0
ad9371-phy.calibrate_tx_lol_en = 0
ad9371-phy.calibrate_vswr_en = 0
ad9371-phy.calibrate_tx_qec_en = 0
ad9371-phy.calibrate_clgc_en = 0
ad9371-phy.ensm_mode = radio_on
ad9371-phy.calibrate_tx_lol_ext_en = 0
ad9371-phy.calibrate_dpd_en = 0
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_scale = 0.501160
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_frequency = 1999718
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_frequency = 1000327
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_frequency = 7999809
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_frequency = 7999809
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_phase = 0
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_phase = 0
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_frequency = 19998117
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_phase = 0
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_frequency = 1000327
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_phase = 0
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_scale = 0.501160
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_frequency = 1999718
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_frequency = 19998117
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_scale = 0.000000
load_myk_profile_file = /targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/profileNR40MHz.txt
dds_mode_tx1 = 1
dds_mode_tx2 = 1
dac_buf_filename = /usr/local/lib/osc/waveforms/LTE20.mat
tx_channel_0 = 1
tx_channel_1 = 1
tx_channel_2 = 0
tx_channel_3 = 0
global_settings_show = 1
tx_show = 1
rx_show = 1
obs_show = 1
fpga_show = 1
[ADRV9371_ZC706]
# NO_DEBUG=0; DEBUG=1
debug_mode = 0
# 20MHz 40MHz 80MHz=1; 10MHz=2; 5MHz=4
interpolation_decimation_factor = 1
# is taken into account only if "ad9371-phy.in_voltage0_gain_control_mode = manual"
rx_gain_offset = 43
...@@ -850,7 +850,6 @@ int main( int argc, char **argv ) { ...@@ -850,7 +850,6 @@ int main( int argc, char **argv ) {
//randominit (0); //randominit (0);
set_taus_seed (0); set_taus_seed (0);
if (UE_flag==1) {
printf("configuring for UE\n"); printf("configuring for UE\n");
set_comp_log(HW, LOG_DEBUG, LOG_HIGH, 1); set_comp_log(HW, LOG_DEBUG, LOG_HIGH, 1);
...@@ -866,14 +865,9 @@ int main( int argc, char **argv ) { ...@@ -866,14 +865,9 @@ int main( int argc, char **argv ) {
set_comp_log(NAS, LOG_INFO, LOG_HIGH, 1); set_comp_log(NAS, LOG_INFO, LOG_HIGH, 1);
# endif # endif
#endif #endif
}
if (ouput_vcd) { if (ouput_vcd)
if (UE_flag==1)
VCD_SIGNAL_DUMPER_INIT("/tmp/openair_dump_UE.vcd"); VCD_SIGNAL_DUMPER_INIT("/tmp/openair_dump_UE.vcd");
else
VCD_SIGNAL_DUMPER_INIT("/tmp/openair_dump_eNB.vcd");
}
//if (opp_enabled ==1) { //if (opp_enabled ==1) {
// reset_opp_meas(); // reset_opp_meas();
...@@ -882,11 +876,7 @@ int main( int argc, char **argv ) { ...@@ -882,11 +876,7 @@ int main( int argc, char **argv ) {
#if defined(ENABLE_ITTI) #if defined(ENABLE_ITTI)
if (UE_flag == 1) {
log_set_instance_type (LOG_INSTANCE_UE); log_set_instance_type (LOG_INSTANCE_UE);
} else {
log_set_instance_type (LOG_INSTANCE_ENB);
}
itti_init(TASK_MAX, THREAD_MAX, MESSAGES_ID_MAX, tasks_info, messages_info, messages_definition_xml, itti_dump_file); itti_init(TASK_MAX, THREAD_MAX, MESSAGES_ID_MAX, tasks_info, messages_info, messages_definition_xml, itti_dump_file);
...@@ -1167,7 +1157,7 @@ int main( int argc, char **argv ) { ...@@ -1167,7 +1157,7 @@ int main( int argc, char **argv ) {
// start the main thread // start the main thread
if (UE_flag == 1) { //if (UE_flag == 1) {
init_UE(1); init_UE(1);
number_of_cards = 1; number_of_cards = 1;
...@@ -1175,7 +1165,7 @@ int main( int argc, char **argv ) { ...@@ -1175,7 +1165,7 @@ int main( int argc, char **argv ) {
PHY_vars_UE_g[0][CC_id]->rf_map.card=0; PHY_vars_UE_g[0][CC_id]->rf_map.card=0;
PHY_vars_UE_g[0][CC_id]->rf_map.chain=CC_id+chain_offset; PHY_vars_UE_g[0][CC_id]->rf_map.chain=CC_id+chain_offset;
} }
} //}
// connect the TX/RX buffers // connect the TX/RX buffers
if (UE_flag==1) { if (UE_flag==1) {
...@@ -1252,10 +1242,9 @@ int main( int argc, char **argv ) { ...@@ -1252,10 +1242,9 @@ int main( int argc, char **argv ) {
// *** Handle per CC_id openair0 // *** Handle per CC_id openair0
if (UE_flag==1) {
if (PHY_vars_UE_g[0][0]->rfdevice.trx_end_func) if (PHY_vars_UE_g[0][0]->rfdevice.trx_end_func)
PHY_vars_UE_g[0][0]->rfdevice.trx_end_func(&PHY_vars_UE_g[0][0]->rfdevice); PHY_vars_UE_g[0][0]->rfdevice.trx_end_func(&PHY_vars_UE_g[0][0]->rfdevice);
}
if (ouput_vcd) if (ouput_vcd)
VCD_SIGNAL_DUMPER_CLOSE(); VCD_SIGNAL_DUMPER_CLOSE();
......
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