Commit bd42f37a authored by Bruno Mongazon-Cazavet's avatar Bruno Mongazon-Cazavet

Merge branch 'develop' into iqfixes_nrue

parents 15852ca0 d379bbae
...@@ -159,9 +159,9 @@ ...@@ -159,9 +159,9 @@
<main_exec_args>-n100 -R106 -b106 -s5 <main_exec_args>-n100 -R106 -b106 -s5
-n100 -R217 -b217 -s5 -n100 -R217 -b217 -s5
-n100 -R273 -b273 -s5 -n100 -R273 -b273 -s5
-n100 -s1 -t25 -n100 -s1 -S2 -t25
-n100 -s1 -t33 -n100 -s1 -S2 -t33
-n100 -s1 -t50 -n100 -s5 -S7 -t50
-n100 -m0 -e0 -R25 -b25 -i 2 1 0</main_exec_args> -n100 -m0 -e0 -R25 -b25 -i 2 1 0</main_exec_args>
<tags>test1 test2 test3 test4 test5 test6 test7</tags> <tags>test1 test2 test3 test4 test5 test6 test7</tags>
<search_expr_true>PDSCH test OK</search_expr_true> <search_expr_true>PDSCH test OK</search_expr_true>
...@@ -193,15 +193,17 @@ ...@@ -193,15 +193,17 @@
(Test3: 106 MCS-TABLE 256 QAM MCS Index 26), (Test3: 106 MCS-TABLE 256 QAM MCS Index 26),
(Test4: MCS 0, low SNR performance), (Test4: MCS 0, low SNR performance),
(Test5: 4x4 MIMO, 1 Layer), (Test5: 4x4 MIMO, 1 Layer),
(Test6: 4x4 MIMO, 2 Layers)</desc> (Test6: 4x4 MIMO, 2 Layers),
(Test7: 4x4 MIMO, 4 Layers)</desc>
<main_exec>nr_dlsim</main_exec> <main_exec>nr_dlsim</main_exec>
<main_exec_args>-n100 -e27 -s30 <main_exec_args>-n100 -e27 -s30
-n100 -e16 -s10 -n100 -e16 -s11 -S13
-n100 -q1 -e26 -s30 -n100 -q1 -e26 -s30
-n100 -e0 -t95 -S-1.0 -i 2 1 0 -n100 -e0 -t95 -S-1.0 -i 2 1 0
-n10 -s20 -U 3 0 0 2 -gR -x1 -y4 -z4 -n10 -s20 -U 3 0 0 2 -gR -x1 -y4 -z4
-n10 -s20 -U 3 0 0 2 -gR -x2 -y4 -z4</main_exec_args> -n10 -s20 -U 3 0 0 2 -gR -x2 -y4 -z4
<tags>test1 test2 test3 test4 test5 test6</tags> -n10 -s20 -U 3 0 0 2 -x4 -y4 -z4</main_exec_args>
<tags>test1 test2 test3 test4 test5 test6 test7</tags>
<search_expr_true>PDSCH test OK</search_expr_true> <search_expr_true>PDSCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false> <search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns> <nruns>3</nruns>
...@@ -218,9 +220,9 @@ ...@@ -218,9 +220,9 @@
<main_exec_args>-n100 -s5 -T 2 2 2 <main_exec_args>-n100 -s5 -T 2 2 2
-n100 -s5 -T 2 1 2 -n100 -s5 -T 2 1 2
-n100 -s5 -T 2 0 4 -n100 -s5 -T 2 0 4
-n100 -s2 -U 2 0 1 -n100 -s5 -S7 -U 2 0 1
-n100 -s2 -U 2 0 2 -n100 -s5 -S7 -U 2 0 2
-n100 -s2 -U 2 1 3</main_exec_args> -n100 -s5 -S7 -U 2 1 3</main_exec_args>
<tags>test1 test2 test3 test4 test5 test6</tags> <tags>test1 test2 test3 test4 test5 test6</tags>
<search_expr_true>PDSCH test OK</search_expr_true> <search_expr_true>PDSCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false> <search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
......
...@@ -87,6 +87,7 @@ typedef struct { ...@@ -87,6 +87,7 @@ typedef struct {
typedef struct { typedef struct {
uint16_t rnti; uint16_t rnti;
uint8_t dci_format; uint8_t dci_format;
uint8_t coreset_type;
int ss_type; int ss_type;
// n_CCE index of first CCE for PDCCH reception // n_CCE index of first CCE for PDCCH reception
int n_CCE; int n_CCE;
......
...@@ -249,69 +249,21 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB, ...@@ -249,69 +249,21 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
} }
#endif #endif
} else if (pusch_pdu->dmrs_config_type == pusch_dmrs_type2 && chest_freq == 0) { //pusch_dmrs_type2 |p_r,p_l,d,d,d,d,p_r,p_l,d,d,d,d| } else if (pusch_pdu->dmrs_config_type == pusch_dmrs_type2 && chest_freq == 0) { // pusch_dmrs_type2 |p_r,p_l,d,d,d,d,p_r,p_l,d,d,d,d|
LOG_D(PHY,"PUSCH estimation DMRS type 2, Freq-domain interpolation"); LOG_D(PHY, "PUSCH estimation DMRS type 2, Freq-domain interpolation\n");
c16_t *pil = pilot; c16_t *pil = pilot;
int re_offset = k0; c16_t *rx = &rxdataF[soffset + nushift];
// Treat first DMRS specially (left edge) for (int n = 0; n < nb_rb_pusch * NR_NB_SC_PER_RB; n += 6) {
*ul_ch=c16mulShift(*pil, c16_t ch0 = c16mulShift(*pil, rx[(k0 + n) % symbolSize], 15);
rxdataF[soffset+nushift+re_offset],
15);
pil++; pil++;
ul_ch++; c16_t ch1 = c16mulShift(*pil, rx[(k0 + n + 1) % symbolSize], 15);
re_offset = (re_offset + 1)%symbolSize;
ch_offset++;
// TO verify: used after the loop, likely a piece of code is missing for ch_r
c16_t ch_r;
for (int re_cnt = 1; re_cnt < (nb_rb_pusch*NR_NB_SC_PER_RB) - 5; re_cnt += 6) {
c16_t ch_l=c16mulShift(*pil,
rxdataF[soffset+nushift+re_offset],
15);
*ul_ch = ch_l;
pil++;
ul_ch++;
ch_offset++;
multadd_real_four_symbols_vector_complex_scalar(filt8_ml2,
&ch_l,
ul_ch);
*max_ch = max(*max_ch, max(abs(ch_l.r), abs(ch_l.i)));
re_offset = (re_offset+5)%symbolSize;
ch_r=c16mulShift(*pil,
rxdataF[soffset+nushift+re_offset],
15);
multadd_real_four_symbols_vector_complex_scalar(filt8_mr2,
&ch_r,
ul_ch);
*max_ch = max(*max_ch, max(abs(ch_r.r), abs(ch_r.i)));
//for (int re_idx = 0; re_idx < 8; re_idx += 2)
//printf("ul_ch = %d + j*%d\n", ul_ch[re_idx], ul_ch[re_idx+1]);
ul_ch += 4;
ch_offset += 4;
*ul_ch = ch_r;
pil++; pil++;
ul_ch++; c16_t ch = c16addShift(ch0, ch1, 1);
ch_offset++; *max_ch = max(*max_ch, max(abs(ch.r), abs(ch.i)));
re_offset = (re_offset + 1)%symbolSize; multadd_real_four_symbols_vector_complex_scalar(filt8_rep4, &ch, &ul_ch[n]);
ul_ch[n + 4] = ch;
ul_ch[n + 5] = ch;
} }
// Treat last pilot specially (right edge)
c16_t ch_l=c16mulShift(*pil,
rxdataF[soffset+nushift+re_offset],
15);
*ul_ch = ch_l;
ul_ch++;
ch_offset++;
multadd_real_four_symbols_vector_complex_scalar(filt8_rr1,
&ch_l,
ul_ch);
multadd_real_four_symbols_vector_complex_scalar(filt8_rr2,
&ch_r,
ul_ch);
__m128i *ul_ch_128 = (__m128i *)&ul_ch_estimates[p*gNB->frame_parms.nb_antennas_rx+aarx][ch_offset];
ul_ch_128[0] = _mm_slli_epi16 (ul_ch_128[0], 2);
} }
else if (pusch_pdu->dmrs_config_type == pusch_dmrs_type1) { // this is case without frequency-domain linear interpolation, just take average of LS channel estimates of 6 DMRS REs and use a common value for the whole PRB else if (pusch_pdu->dmrs_config_type == pusch_dmrs_type1) { // this is case without frequency-domain linear interpolation, just take average of LS channel estimates of 6 DMRS REs and use a common value for the whole PRB
......
...@@ -342,3 +342,26 @@ short filt16_ul_middle[16] = {2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048, ...@@ -342,3 +342,26 @@ short filt16_ul_middle[16] = {2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048,
short filt16_ul_last[16] = {4096, 4096, 4096, 4096, 8192, 8192, 8192, 8192, short filt16_ul_last[16] = {4096, 4096, 4096, 4096, 8192, 8192, 8192, 8192,
0, 0, 0, 0, 0, 0, 0, 0}; 0, 0, 0, 0, 0, 0, 0, 0};
short filt8_rep4[8] = {16384, 16384, 16384, 16384, 0, 0, 0, 0};
// DL
// DMRS_Type1
short filt16_dl_first[16] = {12228, 12228, 12228, 12228, 8192, 8192, 8192, 8192,
4096, 4096, 4096, 4096, 0, 0, 0, 0};
short filt16_dl_middle[16] = {2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048,
2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048};
short filt16_dl_last[16] = {4096, 4096, 4096, 4096, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0};
// DMRS_Type2
short filt16_dl_first_type2[16] = {16384, 16384, 16384, 8192, 8192, 8192, 8192, 8192,
8192, 0, 0, 0, 0, 0, 0};
short filt16_dl_middle_type2[16] = {8192, 8192, 8192, 8192, 8192, 8192, 8192, 8192,
8192, 8192, 8192, 8192, 0, 0, 0, 0};
short filt16_dl_last_type2[16] = {8192, 8192, 8192, 8192, 8192, 8192, 16384, 16384,
16384, 0, 0, 0, 0, 0, 0, 0};
...@@ -224,4 +224,16 @@ extern short filt16_ul_p0[16]; ...@@ -224,4 +224,16 @@ extern short filt16_ul_p0[16];
extern short filt16_ul_p1p2[16]; extern short filt16_ul_p1p2[16];
extern short filt16_ul_middle[16]; extern short filt16_ul_middle[16];
extern short filt16_ul_last[16]; extern short filt16_ul_last[16];
extern short filt8_rep4[8];
/*DL*/
// DL DMRS_Type1
extern short filt16_dl_first[16];
extern short filt16_dl_middle[16];
extern short filt16_dl_last[16];
// DL DMRS_Type2
extern short filt16_dl_first_type2[16];
extern short filt16_dl_middle_type2[16];
extern short filt16_dl_last_type2[16];
#endif #endif
...@@ -91,7 +91,8 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -91,7 +91,8 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
unsigned short nb_rb_pdsch, unsigned short nb_rb_pdsch,
uint32_t pdsch_est_size, uint32_t pdsch_est_size,
int32_t dl_ch_estimates[][pdsch_est_size], int32_t dl_ch_estimates[][pdsch_est_size],
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]); int rxdataFsize,
c16_t rxdataF[][rxdataFsize]);
void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms, void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
PHY_VARS_NR_UE *ue, PHY_VARS_NR_UE *ue,
...@@ -123,10 +124,11 @@ void phy_adjust_gain_nr(PHY_VARS_NR_UE *ue, ...@@ -123,10 +124,11 @@ void phy_adjust_gain_nr(PHY_VARS_NR_UE *ue,
uint8_t gNB_id); uint8_t gNB_id);
void nr_pdsch_ptrs_processing(PHY_VARS_NR_UE *ue, void nr_pdsch_ptrs_processing(PHY_VARS_NR_UE *ue,
int nbRx,
c16_t ptrs_phase_per_slot[][14], c16_t ptrs_phase_per_slot[][14],
int32_t ptrs_re_per_slot[][14], int32_t ptrs_re_per_slot[][14],
uint32_t rx_size, uint32_t rx_size_symbol,
int32_t rxdataF_comp[][rx_size], int32_t rxdataF_comp[][nbRx][rx_size_symbol * NR_SYMBOLS_PER_SLOT],
NR_DL_FRAME_PARMS *frame_parms, NR_DL_FRAME_PARMS *frame_parms,
NR_DL_UE_HARQ_t *dlsch0_harq, NR_DL_UE_HARQ_t *dlsch0_harq,
NR_DL_UE_HARQ_t *dlsch1_harq, NR_DL_UE_HARQ_t *dlsch1_harq,
......
...@@ -518,9 +518,8 @@ int nr_csi_rs_ri_estimation(const PHY_VARS_NR_UE *ue, ...@@ -518,9 +518,8 @@ int nr_csi_rs_ri_estimation(const PHY_VARS_NR_UE *ue,
// construct Hh x H elements // construct Hh x H elements
if(ant_rx_conjch == ant_rx_ch) { if(ant_rx_conjch == ant_rx_ch) {
nr_a_sum_b((__m128i *)&csi_rs_estimated_A_MF[port_tx_conjch][port_tx_ch][k_offset], nr_a_sum_b(
(__m128i *)&csi_rs_estimated_conjch_ch[ant_rx_conjch][port_tx_conjch][ant_rx_ch][port_tx_ch][k_offset], (c16_t *)&csi_rs_estimated_A_MF[port_tx_conjch][port_tx_ch][k_offset], (c16_t *)&csi_rs_estimated_conjch_ch[ant_rx_conjch][port_tx_conjch][ant_rx_ch][port_tx_ch][k_offset], 1);
1);
} }
} }
} }
......
...@@ -935,6 +935,7 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue, ...@@ -935,6 +935,7 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
dci_ind->dci_list[dci_ind->number_of_dcis].N_CCE = L; dci_ind->dci_list[dci_ind->number_of_dcis].N_CCE = L;
dci_ind->dci_list[dci_ind->number_of_dcis].dci_format = rel15->dci_format_options[k]; dci_ind->dci_list[dci_ind->number_of_dcis].dci_format = rel15->dci_format_options[k];
dci_ind->dci_list[dci_ind->number_of_dcis].ss_type = rel15->dci_type_options[k]; dci_ind->dci_list[dci_ind->number_of_dcis].ss_type = rel15->dci_type_options[k];
dci_ind->dci_list[dci_ind->number_of_dcis].coreset_type = rel15->coreset.CoreSetType;
int n_rb, rb_offset; int n_rb, rb_offset;
get_coreset_rballoc(rel15->coreset.frequency_domain_resource, &n_rb, &rb_offset); get_coreset_rballoc(rel15->coreset.frequency_domain_resource, &n_rb, &rb_offset);
dci_ind->dci_list[dci_ind->number_of_dcis].cset_start = rel15->BWPStart + rb_offset; dci_ind->dci_list[dci_ind->number_of_dcis].cset_start = rel15->BWPStart + rb_offset;
......
...@@ -97,6 +97,20 @@ extern "C" { ...@@ -97,6 +97,20 @@ extern "C" {
#define squaredMod(a) ((a).r*(a).r + (a).i*(a).i) #define squaredMod(a) ((a).r*(a).r + (a).i*(a).i)
#define csum(res, i1, i2) (res).r = (i1).r + (i2).r ; (res).i = (i1).i + (i2).i #define csum(res, i1, i2) (res).r = (i1).r + (i2).r ; (res).i = (i1).i + (i2).i
__attribute__((always_inline)) inline c16_t c16Shift(const c16_t a, const int Shift) {
return (c16_t) {
.r = (int16_t)(a.r >> Shift),
.i = (int16_t)(a.i >> Shift)
};
}
__attribute__((always_inline)) inline c16_t c16addShift(const c16_t a, const c16_t b, const int Shift) {
return (c16_t) {
.r = (int16_t)((a.r + b.r) >> Shift),
.i = (int16_t)((a.i + b.i) >> Shift)
};
}
__attribute__((always_inline)) inline c16_t c16mulShift(const c16_t a, const c16_t b, const int Shift) { __attribute__((always_inline)) inline c16_t c16mulShift(const c16_t a, const c16_t b, const int Shift) {
return (c16_t) { return (c16_t) {
.r = (int16_t)((a.r * b.r - a.i * b.i) >> Shift), .r = (int16_t)((a.r * b.r - a.i * b.i) >> Shift),
......
...@@ -577,9 +577,19 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, ...@@ -577,9 +577,19 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
LOG_D(PHY,"[UE %d] nr_slot_rx %d, harq_pid %d (%d), rb_start %d, nb_rb %d, symbol_start %d, nb_symbols %d, DMRS mask %x, Nl %d\n", LOG_D(PHY,"[UE %d] nr_slot_rx %d, harq_pid %d (%d), rb_start %d, nb_rb %d, symbol_start %d, nb_symbols %d, DMRS mask %x, Nl %d\n",
ue->Mod_id,nr_slot_rx,harq_pid,dlsch0_harq->status,pdsch_start_rb,pdsch_nb_rb,s0,s1,dlsch0->dlsch_config.dlDmrsSymbPos, dlsch0->Nl); ue->Mod_id,nr_slot_rx,harq_pid,dlsch0_harq->status,pdsch_start_rb,pdsch_nb_rb,s0,s1,dlsch0->dlsch_config.dlDmrsSymbPos, dlsch0->Nl);
const uint32_t pdsch_est_size = ((ue->frame_parms.symbols_per_slot*ue->frame_parms.ofdm_symbol_size+15)/16)*16; const uint32_t pdsch_est_size = ((ue->frame_parms.symbols_per_slot * ue->frame_parms.ofdm_symbol_size + 15) / 16) * 16;
__attribute__ ((aligned(32))) int32_t pdsch_dl_ch_estimates[ue->frame_parms.nb_antennas_rx*dlsch0->Nl][pdsch_est_size]; __attribute__((aligned(32))) int32_t pdsch_dl_ch_estimates[ue->frame_parms.nb_antennas_rx * dlsch0->Nl][pdsch_est_size];
memset(pdsch_dl_ch_estimates, 0, sizeof(int32_t)*ue->frame_parms.nb_antennas_rx*dlsch0->Nl*pdsch_est_size); memset(pdsch_dl_ch_estimates, 0, sizeof(int32_t) * ue->frame_parms.nb_antennas_rx * dlsch0->Nl * pdsch_est_size);
c16_t ptrs_phase_per_slot[ue->frame_parms.nb_antennas_rx][NR_SYMBOLS_PER_SLOT];
memset(ptrs_phase_per_slot, 0, sizeof(ptrs_phase_per_slot));
int32_t ptrs_re_per_slot[ue->frame_parms.nb_antennas_rx][NR_SYMBOLS_PER_SLOT];
memset(ptrs_re_per_slot, 0, sizeof(ptrs_re_per_slot));
const uint32_t rx_size_symbol = dlsch[0].dlsch_config.number_rbs * NR_NB_SC_PER_RB;
__attribute__((aligned(32))) int32_t rxdataF_comp[ue->frame_parms.nb_antennas_tx][ue->frame_parms.nb_antennas_rx][rx_size_symbol * NR_SYMBOLS_PER_SLOT];
memset(rxdataF_comp, 0, sizeof(rxdataF_comp));
for (m = s0; m < (s0 +s1); m++) { for (m = s0; m < (s0 +s1); m++) {
if (dlsch0->dlsch_config.dlDmrsSymbPos & (1 << m)) { if (dlsch0->dlsch_config.dlDmrsSymbPos & (1 << m)) {
...@@ -598,7 +608,7 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, ...@@ -598,7 +608,7 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
pdsch_nb_rb, pdsch_nb_rb,
pdsch_est_size, pdsch_est_size,
pdsch_dl_ch_estimates, pdsch_dl_ch_estimates,
rxdataF); ue->frame_parms.samples_per_slot_wCP, rxdataF);
#if 0 #if 0
///LOG_M: the channel estimation ///LOG_M: the channel estimation
int nr_frame_rx = proc->frame_rx; int nr_frame_rx = proc->frame_rx;
...@@ -635,35 +645,9 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, ...@@ -635,35 +645,9 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
first_symbol_with_data++; first_symbol_with_data++;
} }
c16_t ptrs_phase_per_slot[ue->frame_parms.nb_antennas_rx][NR_SYMBOLS_PER_SLOT];
memset(ptrs_phase_per_slot, 0, ue->frame_parms.nb_antennas_rx*NR_SYMBOLS_PER_SLOT*sizeof(c16_t));
int32_t ptrs_re_per_slot[ue->frame_parms.nb_antennas_rx][NR_SYMBOLS_PER_SLOT];
memset(ptrs_re_per_slot, 0, ue->frame_parms.nb_antennas_rx*NR_SYMBOLS_PER_SLOT*sizeof(c16_t));
uint32_t dl_valid_re[NR_SYMBOLS_PER_SLOT] = {0}; uint32_t dl_valid_re[NR_SYMBOLS_PER_SLOT] = {0};
uint32_t llr_offset[NR_SYMBOLS_PER_SLOT] = {0}; uint32_t llr_offset[NR_SYMBOLS_PER_SLOT] = {0};
const uint32_t rx_size = ((NR_SYMBOLS_PER_SLOT * dlsch[0].dlsch_config.number_rbs * NR_NB_SC_PER_RB + 15) >> 4) << 4;
__attribute__ ((aligned(32))) int32_t dl_ch_estimates_ext[ue->frame_parms.nb_antennas_rx*dlsch0->Nl][rx_size];
memset(dl_ch_estimates_ext, 0, ue->frame_parms.nb_antennas_rx*dlsch0->Nl*rx_size*sizeof(int32_t));
__attribute__ ((aligned(32))) int32_t rxdataF_ext[ue->frame_parms.nb_antennas_rx*dlsch0->Nl][rx_size];
memset(rxdataF_ext, 0, ue->frame_parms.nb_antennas_rx*dlsch0->Nl*rx_size*sizeof(int32_t));
__attribute__ ((aligned(32))) int32_t rxdataF_comp[ue->frame_parms.nb_antennas_rx*dlsch0->Nl][rx_size];
memset(rxdataF_comp, 0, ue->frame_parms.nb_antennas_rx*dlsch0->Nl*rx_size*sizeof(int32_t));
__attribute__ ((aligned(32))) int32_t dl_ch_mag[ue->frame_parms.nb_antennas_rx*dlsch0->Nl][rx_size];
memset(dl_ch_mag, 0, ue->frame_parms.nb_antennas_rx*dlsch0->Nl*rx_size*sizeof(int32_t));
__attribute__ ((aligned(32))) int32_t dl_ch_magb[ue->frame_parms.nb_antennas_rx*dlsch0->Nl][rx_size];
memset(dl_ch_magb, 0, ue->frame_parms.nb_antennas_rx*dlsch0->Nl*rx_size*sizeof(int32_t));
__attribute__ ((aligned(32))) int32_t dl_ch_magr[ue->frame_parms.nb_antennas_rx*dlsch0->Nl][rx_size];
memset(dl_ch_magr, 0, ue->frame_parms.nb_antennas_rx*dlsch0->Nl*rx_size*sizeof(int32_t));
int32_t log2_maxh = 0; int32_t log2_maxh = 0;
start_meas(&ue->rx_pdsch_stats); start_meas(&ue->rx_pdsch_stats);
for (m = s0; m < (s1 + s0); m++) { for (m = s0; m < (s1 + s0); m++) {
...@@ -688,19 +672,16 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, ...@@ -688,19 +672,16 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
pdsch_est_size, pdsch_est_size,
pdsch_dl_ch_estimates, pdsch_dl_ch_estimates,
llr, llr,
ptrs_phase_per_slot,
ptrs_re_per_slot,
dl_valid_re, dl_valid_re,
rx_size,
dl_ch_estimates_ext,
rxdataF_ext,
rxdataF_comp,
dl_ch_mag,
dl_ch_magb,
dl_ch_magr,
rxdataF, rxdataF,
llr_offset, llr_offset,
&log2_maxh) < 0) &log2_maxh,
rx_size_symbol,
ue->frame_parms.nb_antennas_rx,
rxdataF_comp,
ptrs_phase_per_slot,
ptrs_re_per_slot)
< 0)
return -1; return -1;
stop_meas(&ue->dlsch_llr_stats_parallelization[slot]); stop_meas(&ue->dlsch_llr_stats_parallelization[slot]);
...@@ -711,17 +692,6 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, ...@@ -711,17 +692,6 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
} }
} // CRNTI active } // CRNTI active
stop_meas(&ue->rx_pdsch_stats); stop_meas(&ue->rx_pdsch_stats);
UEscopeCopy(ue, pdschRxdataF_comp, rxdataF_comp, sizeof(struct complex16), ue->frame_parms.nb_antennas_rx*dlsch0->Nl, rx_size);
if (ue->phy_sim_pdsch_rxdataF_comp)
memcpy(ue->phy_sim_pdsch_rxdataF_comp, rxdataF_comp, sizeof(int32_t)*rx_size*ue->frame_parms.nb_antennas_rx*dlsch0->Nl);
if (ue->phy_sim_pdsch_rxdataF_ext)
memcpy(ue->phy_sim_pdsch_rxdataF_ext, rxdataF_ext, sizeof(int32_t)*rx_size*ue->frame_parms.nb_antennas_rx*dlsch0->Nl);
if (ue->phy_sim_pdsch_dl_ch_estimates_ext)
memcpy(ue->phy_sim_pdsch_dl_ch_estimates_ext, dl_ch_estimates_ext, sizeof(int32_t)*rx_size*ue->frame_parms.nb_antennas_rx*dlsch0->Nl);
if (ue->phy_sim_pdsch_dl_ch_estimates)
memcpy(ue->phy_sim_pdsch_dl_ch_estimates, dl_ch_estimates_ext, sizeof(int32_t)*rx_size*ue->frame_parms.nb_antennas_rx*dlsch0->Nl);
} }
return 0; return 0;
} }
...@@ -909,7 +879,6 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, ...@@ -909,7 +879,6 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
const double N_TA_max = Ta_max * bw_scaling * tc_factor; const double N_TA_max = Ta_max * bw_scaling * tc_factor;
NR_UE_MAC_INST_t *mac = get_mac_inst(0); NR_UE_MAC_INST_t *mac = get_mac_inst(0);
NR_BWP_Id_t dl_bwp = mac->current_DL_BWP.bwp_id;
NR_BWP_Id_t ul_bwp = mac->current_UL_BWP.bwp_id; NR_BWP_Id_t ul_bwp = mac->current_UL_BWP.bwp_id;
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL; NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL;
...@@ -938,17 +907,8 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, ...@@ -938,17 +907,8 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
} }
long mapping_type_ul = pusch_TimeDomainAllocationList ? pusch_TimeDomainAllocationList->list.array[0]->mappingType : NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA; long mapping_type_ul = pusch_TimeDomainAllocationList ? pusch_TimeDomainAllocationList->list.array[0]->mappingType : NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA;
NR_PDSCH_Config_t *pdsch_Config = NULL; NR_PDSCH_Config_t *pdsch_Config = mac->current_DL_BWP.pdsch_Config;
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL; NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = mac->current_DL_BWP.tdaList_Common;
if(dl_bwp){
pdsch_Config = (mac->DLbwp[dl_bwp-1] && mac->DLbwp[dl_bwp-1]->bwp_Dedicated->pdsch_Config->choice.setup) ? mac->DLbwp[dl_bwp-1]->bwp_Dedicated->pdsch_Config->choice.setup : NULL;
if (mac->DLbwp[dl_bwp-1] && mac->DLbwp[dl_bwp-1]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = pdsch_Config->pdsch_TimeDomainAllocationList->choice.setup;
else if (mac->DLbwp[dl_bwp-1] && mac->DLbwp[dl_bwp-1]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = mac->DLbwp[dl_bwp-1]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
}
else if (mac->scc_SIB && mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup)
pdsch_TimeDomainAllocationList = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
long mapping_type_dl = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[0]->mappingType : NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; long mapping_type_dl = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[0]->mappingType : NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA;
NR_DMRS_DownlinkConfig_t *NR_DMRS_dlconfig = NULL; NR_DMRS_DownlinkConfig_t *NR_DMRS_dlconfig = NULL;
......
...@@ -256,9 +256,10 @@ void nr_dlsim_preprocessor(module_id_t module_id, ...@@ -256,9 +256,10 @@ void nr_dlsim_preprocessor(module_id_t module_id,
* configuration */ * configuration */
current_BWP->mcsTableIdx = g_mcsTableIdx; current_BWP->mcsTableIdx = g_mcsTableIdx;
sched_pdsch->time_domain_allocation = get_dl_tda(RC.nrmac[module_id], scc, slot); sched_pdsch->time_domain_allocation = get_dl_tda(RC.nrmac[module_id], scc, slot);
AssertFatal(sched_pdsch->time_domain_allocation>=0,"Unable to find PDSCH time domain allocation in list\n"); AssertFatal(sched_pdsch->time_domain_allocation >= 0,"Unable to find PDSCH time domain allocation in list\n");
sched_pdsch->tda_info = nr_get_pdsch_tda_info(current_BWP, sched_pdsch->time_domain_allocation); sched_pdsch->tda_info = get_dl_tda_info(current_BWP, sched_ctrl->search_space->searchSpaceType->present, sched_pdsch->time_domain_allocation,
NR_MIB__dmrs_TypeA_Position_pos2, 1, NR_RNTI_C, sched_ctrl->coreset->controlResourceSetId, false);
sched_pdsch->dmrs_parms = get_dl_dmrs_params(scc, sched_pdsch->dmrs_parms = get_dl_dmrs_params(scc,
current_BWP, current_BWP,
...@@ -309,6 +310,7 @@ int NB_UE_INST = 1; ...@@ -309,6 +310,7 @@ int NB_UE_INST = 1;
int main(int argc, char **argv) int main(int argc, char **argv)
{ {
setbuf(stdout, NULL);
char c; char c;
int i,aa;//,l; int i,aa;//,l;
double sigma2, sigma2_dB=10, SNR, snr0=-2.0, snr1=2.0; double sigma2, sigma2_dB=10, SNR, snr0=-2.0, snr1=2.0;
...@@ -1219,9 +1221,11 @@ int main(int argc, char **argv) ...@@ -1219,9 +1221,11 @@ int main(int argc, char **argv)
uint8_t nb_symb_sch = rel15->NrOfSymbols; uint8_t nb_symb_sch = rel15->NrOfSymbols;
available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, rel15->nrOfLayers); available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, rel15->nrOfLayers);
if(pdu_bit_map & 0x1) { if (pdu_bit_map & 0x1) {
available_bits-= (ptrsSymbPerSlot * ptrsRePerSymb *rel15->nrOfLayers* 2); available_bits -= (ptrsSymbPerSlot * ptrsRePerSymb * rel15->nrOfLayers * 2);
printf("[DLSIM][PTRS] Available bits are: %5u, removed PTRS bits are: %5u \n",available_bits, (ptrsSymbPerSlot * ptrsRePerSymb *rel15->nrOfLayers* 2) ); if (trial == 0 && round == 0) {
printf("[DLSIM][PTRS] Available bits are: %5u, removed PTRS bits are: %5u \n", available_bits, (ptrsSymbPerSlot * ptrsRePerSymb * rel15->nrOfLayers * 2));
}
} }
for (i = 0; i < available_bits; i++) { for (i = 0; i < available_bits; i++) {
......
...@@ -356,7 +356,7 @@ typedef struct cu_to_du_rrc_information_s { ...@@ -356,7 +356,7 @@ typedef struct cu_to_du_rrc_information_s {
uint32_t measConfig_length; uint32_t measConfig_length;
}cu_to_du_rrc_information_t; }cu_to_du_rrc_information_t;
typedef struct du_to_du_rrc_information_s { typedef struct du_to_cu_rrc_information_s {
uint8_t * cellGroupConfig; uint8_t * cellGroupConfig;
uint32_t cellGroupConfig_length; uint32_t cellGroupConfig_length;
uint8_t * measGapConfig; uint8_t * measGapConfig;
......
...@@ -574,9 +574,10 @@ typedef struct NR_UE_DL_BWP { ...@@ -574,9 +574,10 @@ typedef struct NR_UE_DL_BWP {
uint16_t BWPStart; uint16_t BWPStart;
uint16_t initial_BWPSize; uint16_t initial_BWPSize;
uint16_t initial_BWPStart; uint16_t initial_BWPStart;
NR_PDSCH_TimeDomainResourceAllocationList_t *tdaList; NR_PDSCH_TimeDomainResourceAllocationList_t *tdaList_Common;
NR_PDSCH_Config_t *pdsch_Config; NR_PDSCH_Config_t *pdsch_Config;
NR_PDSCH_ServingCellConfig_t *pdsch_servingcellconfig; NR_PDSCH_ServingCellConfig_t *pdsch_servingcellconfig;
long *pdsch_HARQ_ACK_Codebook;
uint8_t mcsTableIdx; uint8_t mcsTableIdx;
nr_dci_format_t dci_format; nr_dci_format_t dci_format;
} NR_UE_DL_BWP_t; } NR_UE_DL_BWP_t;
...@@ -590,18 +591,40 @@ typedef struct NR_UE_UL_BWP { ...@@ -590,18 +591,40 @@ typedef struct NR_UE_UL_BWP {
uint16_t BWPStart; uint16_t BWPStart;
uint16_t initial_BWPSize; uint16_t initial_BWPSize;
uint16_t initial_BWPStart; uint16_t initial_BWPStart;
NR_RACH_ConfigCommon_t *rach_ConfigCommon;
NR_PUSCH_ServingCellConfig_t *pusch_servingcellconfig; NR_PUSCH_ServingCellConfig_t *pusch_servingcellconfig;
NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList; NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList_Common;
NR_ConfiguredGrantConfig_t *configuredGrantConfig;
NR_PUSCH_Config_t *pusch_Config; NR_PUSCH_Config_t *pusch_Config;
NR_PUCCH_Config_t *pucch_Config; NR_PUCCH_Config_t *pucch_Config;
NR_PUCCH_ConfigCommon_t *pucch_ConfigCommon; NR_PUCCH_ConfigCommon_t *pucch_ConfigCommon;
long *harq_ACK_SpatialBundlingPUCCH;
NR_CSI_MeasConfig_t *csi_MeasConfig; NR_CSI_MeasConfig_t *csi_MeasConfig;
NR_SRS_Config_t *srs_Config; NR_SRS_Config_t *srs_Config;
long *msg3_DeltaPreamble;
uint8_t transform_precoding; uint8_t transform_precoding;
uint8_t mcs_table; uint8_t mcs_table;
nr_dci_format_t dci_format; nr_dci_format_t dci_format;
int max_fb_time; int max_fb_time;
} NR_UE_UL_BWP_t; } NR_UE_UL_BWP_t;
typedef enum {
defaultA = 0,
defaultB = 1,
defaultC = 2
} default_table_type_t;
typedef enum {
typeA = 0,
typeB = 1
} mappingType_t;
typedef struct NR_tda_info {
mappingType_t mapping_type;
int startSymbolIndex;
int nrOfSymbols;
long k2;
} NR_tda_info_t;
#endif /*__LAYER2_MAC_H__ */ #endif /*__LAYER2_MAC_H__ */
...@@ -51,11 +51,6 @@ typedef enum { ...@@ -51,11 +51,6 @@ typedef enum {
pusch_len2 = 2 pusch_len2 = 2
} pusch_maxLength_t; } pusch_maxLength_t;
typedef enum {
typeA = 0,
typeB = 1
} mappingType_t;
uint32_t get_Y(const NR_SearchSpace_t *ss, int slot, rnti_t rnti); uint32_t get_Y(const NR_SearchSpace_t *ss, int slot, rnti_t rnti);
uint8_t get_BG(uint32_t A, uint16_t R); uint8_t get_BG(uint32_t A, uint16_t R);
...@@ -89,15 +84,22 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config, ...@@ -89,15 +84,22 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config,
const uint8_t *nrOfLayers, const uint8_t *nrOfLayers,
uint32_t *val); uint32_t *val);
uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, NR_PDSCH_TimeDomainResourceAllocationList_t *get_dl_tdalist(const NR_UE_DL_BWP_t *DL_BWP, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type);
const NR_BWP_UplinkCommon_t *initialUplinkBWP,
const NR_UE_DL_BWP_t *DL_BWP, NR_PUSCH_TimeDomainResourceAllocationList_t *get_ul_tdalist(const NR_UE_UL_BWP_t *UL_BWP, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type);
NR_tda_info_t get_ul_tda_info(const NR_UE_UL_BWP_t *ul_bwp, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type, int tda_index);
NR_tda_info_t get_dl_tda_info(const NR_UE_DL_BWP_t *dl_BWP, int ss_type, int tda_index, int dmrs_typeA_pos,
int mux_pattern, nr_rnti_type_t rnti_type, int coresetid, bool sib1);
uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
const NR_UE_UL_BWP_t *UL_BWP, const NR_UE_UL_BWP_t *UL_BWP,
const NR_CellGroupConfig_t *cg, const NR_CellGroupConfig_t *cg,
dci_pdu_rel15_t *dci_pdu, dci_pdu_rel15_t *dci_pdu,
nr_dci_format_t format, nr_dci_format_t format,
nr_rnti_type_t rnti_type, nr_rnti_type_t rnti_type,
int controlResourceSetId, NR_ControlResourceSet_t *coreset,
int bwp_id, int bwp_id,
int ss_type, int ss_type,
uint16_t cset0_bwp_size, uint16_t cset0_bwp_size,
...@@ -220,13 +222,12 @@ void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PD ...@@ -220,13 +222,12 @@ void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PD
uint16_t get_ssb_start_symbol(const long band, NR_SubcarrierSpacing_t scs, int i_ssb); uint16_t get_ssb_start_symbol(const long band, NR_SubcarrierSpacing_t scs, int i_ssb);
void get_info_from_tda_tables(int default_abc, NR_tda_info_t get_info_from_tda_tables(default_table_type_t table_type,
int tda, int tda,
int dmrs_TypeA_Position, int dmrs_TypeA_Position,
int normal_CP, int normal_CP);
bool *is_mapping_typeA,
int *startSymbolIndex, default_table_type_t get_default_table_type(int mux_pattern);
int *nrOfSymbols);
void fill_coresetZero(NR_ControlResourceSet_t *coreset0, NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config); void fill_coresetZero(NR_ControlResourceSet_t *coreset0, NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config);
void fill_searchSpaceZero(NR_SearchSpace_t *ss0, NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config); void fill_searchSpaceZero(NR_SearchSpace_t *ss0, NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config);
...@@ -273,12 +274,7 @@ bool set_ul_ptrs_values(NR_PTRS_UplinkConfig_t *ul_ptrs_config, ...@@ -273,12 +274,7 @@ bool set_ul_ptrs_values(NR_PTRS_UplinkConfig_t *ul_ptrs_config,
@param rnti_type rnti type @param rnti_type rnti type
@param configuredGrant indicates whether a configured grant was received or not @param configuredGrant indicates whether a configured grant was received or not
@returns transformPrecoding value */ @returns transformPrecoding value */
uint8_t get_transformPrecoding(const NR_BWP_UplinkCommon_t *initialUplinkBWP, uint8_t get_transformPrecoding(const NR_UE_UL_BWP_t *current_UL_BWP, nr_dci_format_t dci_format, uint8_t configuredGrant);
const NR_PUSCH_Config_t *pusch_config,
const NR_BWP_UplinkDedicated_t *ubwp,
uint8_t *dci_format,
int rnti_type,
uint8_t configuredGrant);
void nr_mac_gNB_rrc_ul_failure(const module_id_t Mod_instP, void nr_mac_gNB_rrc_ul_failure(const module_id_t Mod_instP,
const int CC_idP, const int CC_idP,
......
...@@ -547,27 +547,68 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac, ...@@ -547,27 +547,68 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac,
NR_UE_UL_BWP_t *UL_BWP = &mac->current_UL_BWP; NR_UE_UL_BWP_t *UL_BWP = &mac->current_UL_BWP;
NR_BWP_t dl_genericParameters = {0}; NR_BWP_t dl_genericParameters = {0};
NR_BWP_t ul_genericParameters = {0}; NR_BWP_t ul_genericParameters = {0};
NR_BWP_DownlinkCommon_t *bwp_dlcommon = NULL;
NR_BWP_UplinkCommon_t *bwp_ulcommon = NULL;
DL_BWP->n_dl_bwp = 0;
UL_BWP->n_ul_bwp = 0;
if(scc) { if(scc) {
DL_BWP->bwp_id = 0; DL_BWP->bwp_id = 0;
UL_BWP->bwp_id = 0; UL_BWP->bwp_id = 0;
dl_genericParameters = scc->downlinkConfigCommon.initialDownlinkBWP.genericParameters; bwp_dlcommon = &scc->downlinkConfigCommon.initialDownlinkBWP;
bwp_ulcommon = &scc->uplinkConfigCommon->initialUplinkBWP;
dl_genericParameters = bwp_dlcommon->genericParameters;
if(scc->uplinkConfigCommon) if(scc->uplinkConfigCommon)
ul_genericParameters = scc->uplinkConfigCommon->initialUplinkBWP.genericParameters; ul_genericParameters = scc->uplinkConfigCommon->initialUplinkBWP.genericParameters;
else else
ul_genericParameters = scc->downlinkConfigCommon.initialDownlinkBWP.genericParameters; ul_genericParameters = bwp_dlcommon->genericParameters;
DL_BWP->pdsch_Config = NULL;
if (bwp_dlcommon->pdsch_ConfigCommon)
DL_BWP->tdaList_Common = bwp_dlcommon->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
if (bwp_ulcommon->pusch_ConfigCommon) {
UL_BWP->tdaList_Common = bwp_ulcommon->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
UL_BWP->msg3_DeltaPreamble = bwp_ulcommon->pusch_ConfigCommon->choice.setup->msg3_DeltaPreamble;
}
if (bwp_ulcommon->pucch_ConfigCommon)
UL_BWP->pucch_ConfigCommon = bwp_ulcommon->pucch_ConfigCommon->choice.setup;
if (bwp_ulcommon->rach_ConfigCommon)
UL_BWP->rach_ConfigCommon = bwp_ulcommon->rach_ConfigCommon->choice.setup;
} }
if(cell_group_config) { if(cell_group_config) {
if (cell_group_config->physicalCellGroupConfig) {
DL_BWP->pdsch_HARQ_ACK_Codebook = &cell_group_config->physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook;
UL_BWP->harq_ACK_SpatialBundlingPUCCH = cell_group_config->physicalCellGroupConfig->harq_ACK_SpatialBundlingPUCCH;
}
if (cell_group_config->spCellConfig && if (cell_group_config->spCellConfig &&
cell_group_config->spCellConfig->spCellConfigDedicated) { cell_group_config->spCellConfig->spCellConfigDedicated) {
struct NR_ServingCellConfig *spCellConfigDedicated = cell_group_config->spCellConfig->spCellConfigDedicated; struct NR_ServingCellConfig *spCellConfigDedicated = cell_group_config->spCellConfig->spCellConfigDedicated;
UL_BWP->csi_MeasConfig = spCellConfigDedicated->csi_MeasConfig ? spCellConfigDedicated->csi_MeasConfig->choice.setup : NULL;
UL_BWP->pusch_servingcellconfig =
spCellConfigDedicated->uplinkConfig && spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig ? spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup : NULL;
DL_BWP->pdsch_servingcellconfig = spCellConfigDedicated->pdsch_ServingCellConfig ? spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup : NULL;
if (spCellConfigDedicated->firstActiveDownlinkBWP_Id) if (spCellConfigDedicated->firstActiveDownlinkBWP_Id)
DL_BWP->bwp_id = *spCellConfigDedicated->firstActiveDownlinkBWP_Id; DL_BWP->bwp_id = *spCellConfigDedicated->firstActiveDownlinkBWP_Id;
if (spCellConfigDedicated->uplinkConfig->firstActiveUplinkBWP_Id) if (spCellConfigDedicated->uplinkConfig->firstActiveUplinkBWP_Id)
UL_BWP->bwp_id = *spCellConfigDedicated->uplinkConfig->firstActiveUplinkBWP_Id; UL_BWP->bwp_id = *spCellConfigDedicated->uplinkConfig->firstActiveUplinkBWP_Id;
if (mac->scc) {
bwp_dlcommon = mac->scc->downlinkConfigCommon->initialDownlinkBWP;
bwp_ulcommon = mac->scc->uplinkConfigCommon->initialUplinkBWP;
}
else if (mac->scc_SIB) {
bwp_dlcommon = &mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP;
bwp_ulcommon = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP;
}
else
AssertFatal(false, "Either SCC or SCC SIB should be non-NULL\n");
NR_BWP_Downlink_t *bwp_downlink = NULL; NR_BWP_Downlink_t *bwp_downlink = NULL;
const struct NR_ServingCellConfig__downlinkBWP_ToAddModList *bwpList = spCellConfigDedicated->downlinkBWP_ToAddModList; const struct NR_ServingCellConfig__downlinkBWP_ToAddModList *bwpList = spCellConfigDedicated->downlinkBWP_ToAddModList;
if (bwpList)
DL_BWP->n_dl_bwp = bwpList->list.count;
if (bwpList && DL_BWP->bwp_id > 0) { if (bwpList && DL_BWP->bwp_id > 0) {
for (int i = 0; i < bwpList->list.count; i++) { for (int i = 0; i < bwpList->list.count; i++) {
bwp_downlink = bwpList->list.array[i]; bwp_downlink = bwpList->list.array[i];
...@@ -576,17 +617,21 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac, ...@@ -576,17 +617,21 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac,
} }
AssertFatal(bwp_downlink != NULL,"Couldn't find DLBWP corresponding to BWP ID %ld\n", DL_BWP->bwp_id); AssertFatal(bwp_downlink != NULL,"Couldn't find DLBWP corresponding to BWP ID %ld\n", DL_BWP->bwp_id);
dl_genericParameters = bwp_downlink->bwp_Common->genericParameters; dl_genericParameters = bwp_downlink->bwp_Common->genericParameters;
DL_BWP->pdsch_Config = bwp_downlink->bwp_Dedicated->pdsch_Config->choice.setup;
DL_BWP->tdaList_Common = bwp_downlink->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
} }
else { else {
if(mac->scc) { dl_genericParameters = bwp_dlcommon->genericParameters;
dl_genericParameters = mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters; DL_BWP->pdsch_Config = spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup;
} DL_BWP->tdaList_Common = bwp_dlcommon->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
if(mac->scc_SIB) {
dl_genericParameters = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters;
}
} }
UL_BWP->msg3_DeltaPreamble = bwp_ulcommon->pusch_ConfigCommon->choice.setup->msg3_DeltaPreamble;
NR_BWP_Uplink_t *bwp_uplink = NULL; NR_BWP_Uplink_t *bwp_uplink = NULL;
const struct NR_UplinkConfig__uplinkBWP_ToAddModList *ubwpList = spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList; const struct NR_UplinkConfig__uplinkBWP_ToAddModList *ubwpList = spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList;
if (ubwpList)
UL_BWP->n_ul_bwp = ubwpList->list.count;
if (ubwpList && UL_BWP->bwp_id > 0) { if (ubwpList && UL_BWP->bwp_id > 0) {
for (int i = 0; i < ubwpList->list.count; i++) { for (int i = 0; i < ubwpList->list.count; i++) {
bwp_uplink = ubwpList->list.array[i]; bwp_uplink = ubwpList->list.array[i];
...@@ -595,14 +640,26 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac, ...@@ -595,14 +640,26 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac,
} }
AssertFatal(bwp_uplink != NULL,"Couldn't find ULBWP corresponding to BWP ID %ld\n",UL_BWP->bwp_id); AssertFatal(bwp_uplink != NULL,"Couldn't find ULBWP corresponding to BWP ID %ld\n",UL_BWP->bwp_id);
ul_genericParameters = bwp_uplink->bwp_Common->genericParameters; ul_genericParameters = bwp_uplink->bwp_Common->genericParameters;
UL_BWP->tdaList_Common = bwp_uplink->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
UL_BWP->pusch_Config = bwp_uplink->bwp_Dedicated->pusch_Config->choice.setup;
UL_BWP->pucch_Config = bwp_uplink->bwp_Dedicated->pucch_Config->choice.setup;
UL_BWP->srs_Config = bwp_uplink->bwp_Dedicated->srs_Config->choice.setup;
UL_BWP->configuredGrantConfig = bwp_uplink->bwp_Dedicated->configuredGrantConfig ? bwp_uplink->bwp_Dedicated->configuredGrantConfig->choice.setup : NULL;
if (bwp_uplink->bwp_Common->pucch_ConfigCommon)
UL_BWP->pucch_ConfigCommon = bwp_uplink->bwp_Common->pucch_ConfigCommon->choice.setup;
if (bwp_uplink->bwp_Common->rach_ConfigCommon)
UL_BWP->rach_ConfigCommon = bwp_uplink->bwp_Common->rach_ConfigCommon->choice.setup;
} }
else { else {
if(mac->scc) { UL_BWP->tdaList_Common = bwp_ulcommon->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
ul_genericParameters = mac->scc->uplinkConfigCommon->initialUplinkBWP->genericParameters; UL_BWP->pusch_Config = spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pusch_Config->choice.setup;
} UL_BWP->pucch_Config = spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup;
if(mac->scc_SIB) { UL_BWP->srs_Config = spCellConfigDedicated->uplinkConfig->initialUplinkBWP->srs_Config->choice.setup;
ul_genericParameters = mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters; UL_BWP->configuredGrantConfig =
} spCellConfigDedicated->uplinkConfig->initialUplinkBWP->configuredGrantConfig ? spCellConfigDedicated->uplinkConfig->initialUplinkBWP->configuredGrantConfig->choice.setup : NULL;
ul_genericParameters = bwp_ulcommon->genericParameters;
if (bwp_ulcommon->rach_ConfigCommon)
UL_BWP->rach_ConfigCommon = bwp_ulcommon->rach_ConfigCommon->choice.setup;
} }
} }
else else
......
...@@ -251,29 +251,8 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t ...@@ -251,29 +251,8 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl_config, frame_t frame, int slot); void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl_config, frame_t frame, int slot);
void get_bwp_info(NR_UE_MAC_INST_t *mac,
int dl_bwp_id,
int ul_bwp_id,
NR_BWP_DownlinkDedicated_t **bwpd,
NR_BWP_DownlinkCommon_t **bwpc,
NR_BWP_UplinkDedicated_t **ubwpd,
NR_BWP_UplinkCommon_t **ubwpc);
NR_BWP_DownlinkCommon_t *get_bwp_downlink_common(NR_UE_MAC_INST_t *mac, NR_BWP_Id_t dl_bwp_id); NR_BWP_DownlinkCommon_t *get_bwp_downlink_common(NR_UE_MAC_INST_t *mac, NR_BWP_Id_t dl_bwp_id);
NR_PUSCH_TimeDomainResourceAllocationList_t *choose_ul_tda_list(const NR_PUSCH_Config_t *pusch_Config,NR_PUSCH_ConfigCommon_t *pusch_ConfigCommon);
NR_PDSCH_TimeDomainResourceAllocationList_t *choose_dl_tda_list(NR_PDSCH_Config_t *pdsch_Config,NR_PDSCH_ConfigCommon_t *pdsch_ConfigCommon);
int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList,
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList,
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu,
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
int *mappingtype,
uint8_t time_domain_ind,
int default_abc,
bool use_default);
uint8_t nr_ue_get_sdu(module_id_t module_idP, uint8_t nr_ue_get_sdu(module_id_t module_idP,
int cc_id, int cc_id,
frame_t frameP, frame_t frameP,
...@@ -475,7 +454,7 @@ int16_t compute_nr_SSB_PL(NR_UE_MAC_INST_t *mac, short ssb_rsrp_dBm); ...@@ -475,7 +454,7 @@ int16_t compute_nr_SSB_PL(NR_UE_MAC_INST_t *mac, short ssb_rsrp_dBm);
// - in which ULSCH should be scheduled. K2 is configured in RRC configuration. // - in which ULSCH should be scheduled. K2 is configured in RRC configuration.
// PUSCH Msg3 scheduler: // PUSCH Msg3 scheduler:
// - scheduled by RAR UL grant according to 8.3 of TS 38.213 // - scheduled by RAR UL grant according to 8.3 of TS 38.213
int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac, uint8_t is_Msg3, frame_t current_frame, int current_slot, frame_t *frame_tx, int *slot_tx, uint8_t tda_id); int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac, uint8_t is_Msg3, frame_t current_frame, int current_slot, frame_t *frame_tx, int *slot_tx, long k2);
int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti); int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti);
...@@ -487,11 +466,6 @@ int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti); ...@@ -487,11 +466,6 @@ int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti);
// - 6.1.4.2 of TS 38.214 // - 6.1.4.2 of TS 38.214
// - 6.4.1.1.1 of TS 38.211 // - 6.4.1.1.1 of TS 38.211
// - 6.3.1.7 of 38.211 // - 6.3.1.7 of 38.211
int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, NR_tda_info_t *tda_info, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci, RAR_grant_t *rar_grant, uint16_t rnti, uint8_t *dci_format);
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu,
dci_pdu_rel15_t *dci,
RAR_grant_t *rar_grant,
uint16_t rnti,
uint8_t *dci_format);
#endif #endif
/** @}*/ /** @}*/
...@@ -138,8 +138,8 @@ void init_RA(module_id_t mod_id, ...@@ -138,8 +138,8 @@ void init_RA(module_id_t mod_id,
NR_PRACH_RESOURCES_t *prach_resources, NR_PRACH_RESOURCES_t *prach_resources,
NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon, NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon,
NR_RACH_ConfigGeneric_t *rach_ConfigGeneric, NR_RACH_ConfigGeneric_t *rach_ConfigGeneric,
NR_RACH_ConfigDedicated_t *rach_ConfigDedicated) { NR_RACH_ConfigDedicated_t *rach_ConfigDedicated)
{
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
RA_config_t *ra = &mac->ra; RA_config_t *ra = &mac->ra;
...@@ -278,16 +278,13 @@ void init_RA(module_id_t mod_id, ...@@ -278,16 +278,13 @@ void init_RA(module_id_t mod_id,
} }
} }
/* TS 38.321 subclause 7.3 - return DELTA_PREAMBLE values in dB */ /* TS 38.321 subclause 7.3 - return DELTA_PREAMBLE values in dB */
int8_t nr_get_DELTA_PREAMBLE(module_id_t mod_id, int CC_id, uint16_t prach_format){ int8_t nr_get_DELTA_PREAMBLE(module_id_t mod_id, int CC_id, uint16_t prach_format)
{
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon = (mac->scc!=NULL) ? NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon = mac->current_UL_BWP.rach_ConfigCommon;
mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup:
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup;
NR_SubcarrierSpacing_t scs = *nr_rach_ConfigCommon->msg1_SubcarrierSpacing; NR_SubcarrierSpacing_t scs = *nr_rach_ConfigCommon->msg1_SubcarrierSpacing;
int prach_sequence_length = (mac->scc!=NULL)?(mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.present - 1) : (mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.present-1); int prach_sequence_length = nr_rach_ConfigCommon->prach_RootSequenceIndex.present - 1;
uint8_t prachConfigIndex, mu; uint8_t prachConfigIndex, mu;
AssertFatal(CC_id == 0, "Transmission on secondary CCs is not supported yet\n"); AssertFatal(CC_id == 0, "Transmission on secondary CCs is not supported yet\n");
...@@ -385,13 +382,13 @@ int8_t nr_get_DELTA_PREAMBLE(module_id_t mod_id, int CC_id, uint16_t prach_forma ...@@ -385,13 +382,13 @@ int8_t nr_get_DELTA_PREAMBLE(module_id_t mod_id, int CC_id, uint16_t prach_forma
// - RA_PREAMBLE_POWER_RAMPING_STEP dB // - RA_PREAMBLE_POWER_RAMPING_STEP dB
// - POWER_OFFSET_2STEP_RA dB // - POWER_OFFSET_2STEP_RA dB
// returns receivedTargerPower in dBm // returns receivedTargerPower in dBm
int nr_get_Po_NOMINAL_PUSCH(NR_PRACH_RESOURCES_t *prach_resources, module_id_t mod_id, uint8_t CC_id){ int nr_get_Po_NOMINAL_PUSCH(NR_PRACH_RESOURCES_t *prach_resources, module_id_t mod_id, uint8_t CC_id)
{
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
int8_t receivedTargerPower; int8_t receivedTargerPower;
int8_t delta_preamble; int8_t delta_preamble;
NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon = (mac->scc != NULL) ? mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup: mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup; NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon = mac->current_UL_BWP.rach_ConfigCommon;
long preambleReceivedTargetPower = nr_rach_ConfigCommon->rach_ConfigGeneric.preambleReceivedTargetPower; long preambleReceivedTargetPower = nr_rach_ConfigCommon->rach_ConfigGeneric.preambleReceivedTargetPower;
delta_preamble = nr_get_DELTA_PREAMBLE(mod_id, CC_id, prach_resources->prach_format); delta_preamble = nr_get_DELTA_PREAMBLE(mod_id, CC_id, prach_resources->prach_format);
...@@ -402,8 +399,8 @@ int nr_get_Po_NOMINAL_PUSCH(NR_PRACH_RESOURCES_t *prach_resources, module_id_t m ...@@ -402,8 +399,8 @@ int nr_get_Po_NOMINAL_PUSCH(NR_PRACH_RESOURCES_t *prach_resources, module_id_t m
return receivedTargerPower; return receivedTargerPower;
} }
void ssb_rach_config(RA_config_t *ra, NR_PRACH_RESOURCES_t *prach_resources, NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon){ void ssb_rach_config(RA_config_t *ra, NR_PRACH_RESOURCES_t *prach_resources, NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon)
{
// Determine the SSB to RACH mapping ratio // Determine the SSB to RACH mapping ratio
// ======================================= // =======================================
...@@ -495,14 +492,11 @@ void ra_preambles_config(NR_PRACH_RESOURCES_t *prach_resources, NR_UE_MAC_INST_t ...@@ -495,14 +492,11 @@ void ra_preambles_config(NR_PRACH_RESOURCES_t *prach_resources, NR_UE_MAC_INST_t
} }
RA_config_t *ra = &mac->ra; RA_config_t *ra = &mac->ra;
NR_RACH_ConfigCommon_t *setup; NR_RACH_ConfigCommon_t *setup = mac->current_UL_BWP.rach_ConfigCommon;
if (mac->scc) setup = mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup;
else setup = mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup;
NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &setup->rach_ConfigGeneric; NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &setup->rach_ConfigGeneric;
NR_BWP_UplinkCommon_t *initialUplinkBWP = (mac->scc) ? mac->scc->uplinkConfigCommon->initialUplinkBWP : &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP; if (mac->current_UL_BWP.msg3_DeltaPreamble) {
if (initialUplinkBWP->pusch_ConfigCommon->choice.setup->msg3_DeltaPreamble){ deltaPreamble_Msg3 = (*mac->current_UL_BWP.msg3_DeltaPreamble) * 2; // dB
deltaPreamble_Msg3 = (*initialUplinkBWP->pusch_ConfigCommon->choice.setup->msg3_DeltaPreamble) * 2; // dB
LOG_D(MAC, "In %s: deltaPreamble_Msg3 set to %ld\n", __FUNCTION__, deltaPreamble_Msg3); LOG_D(MAC, "In %s: deltaPreamble_Msg3 set to %ld\n", __FUNCTION__, deltaPreamble_Msg3);
} }
...@@ -667,9 +661,7 @@ void nr_get_prach_resources(module_id_t mod_id, ...@@ -667,9 +661,7 @@ void nr_get_prach_resources(module_id_t mod_id,
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
RA_config_t *ra = &mac->ra; RA_config_t *ra = &mac->ra;
NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon = (mac->scc)? NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon = mac->current_UL_BWP.rach_ConfigCommon;
mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup :
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup;
LOG_D(MAC, "In %s: getting PRACH resources frame (first_Msg3 %d)\n", __FUNCTION__, ra->first_Msg3); LOG_D(MAC, "In %s: getting PRACH resources frame (first_Msg3 %d)\n", __FUNCTION__, ra->first_Msg3);
...@@ -707,12 +699,8 @@ void nr_Msg3_transmitted(module_id_t mod_id, uint8_t CC_id, frame_t frameP, slot ...@@ -707,12 +699,8 @@ void nr_Msg3_transmitted(module_id_t mod_id, uint8_t CC_id, frame_t frameP, slot
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
RA_config_t *ra = &mac->ra; RA_config_t *ra = &mac->ra;
NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon = (mac->scc) ? NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon = mac->current_UL_BWP.rach_ConfigCommon;
mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup: long mu = mac->current_UL_BWP.scs;
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup;
long mu = (mac->scc) ?
mac->scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing :
mac->scc_SIB->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
int subframes_per_slot = nr_slots_per_frame[mu]/10; int subframes_per_slot = nr_slots_per_frame[mu]/10;
// start contention resolution timer (cnt in slots) // start contention resolution timer (cnt in slots)
...@@ -940,9 +928,7 @@ void nr_get_RA_window(NR_UE_MAC_INST_t *mac){ ...@@ -940,9 +928,7 @@ void nr_get_RA_window(NR_UE_MAC_INST_t *mac){
uint8_t mu, ra_ResponseWindow; uint8_t mu, ra_ResponseWindow;
RA_config_t *ra = &mac->ra; RA_config_t *ra = &mac->ra;
NR_RACH_ConfigCommon_t *setup; NR_RACH_ConfigCommon_t *setup = mac->current_UL_BWP.rach_ConfigCommon;
if (mac->scc) setup = mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup;
else setup = mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup;
AssertFatal(&setup->rach_ConfigGeneric != NULL, "In %s: FATAL! rach_ConfigGeneric is NULL...\n", __FUNCTION__); AssertFatal(&setup->rach_ConfigGeneric != NULL, "In %s: FATAL! rach_ConfigGeneric is NULL...\n", __FUNCTION__);
NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &setup->rach_ConfigGeneric; NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &setup->rach_ConfigGeneric;
long scs = (mac->scc) ? long scs = (mac->scc) ?
......
...@@ -93,20 +93,9 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t ...@@ -93,20 +93,9 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
uint16_t monitoringSymbolsWithinSlot = 0; uint16_t monitoringSymbolsWithinSlot = 0;
int sps = 0; int sps = 0;
AssertFatal(mac->scc == NULL || mac->scc_SIB == NULL, "both scc and scc_SIB cannot be non-null\n");
NR_UE_DL_BWP_t *current_DL_BWP = &mac->current_DL_BWP; NR_UE_DL_BWP_t *current_DL_BWP = &mac->current_DL_BWP;
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP; NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
NR_BWP_Id_t dl_bwp_id = current_DL_BWP ? current_DL_BWP->bwp_id : 0; NR_BWP_Id_t dl_bwp_id = current_DL_BWP ? current_DL_BWP->bwp_id : 0;
NR_ServingCellConfigCommon_t *scc = mac->scc;
NR_ServingCellConfigCommonSIB_t *scc_SIB = mac->scc_SIB;
NR_BWP_DownlinkCommon_t *initialDownlinkBWP=NULL;
NR_BWP_UplinkCommon_t *initialUplinkBWP=NULL;
if (scc!=NULL || scc_SIB != NULL) {
initialDownlinkBWP = scc!=NULL ? scc->downlinkConfigCommon->initialDownlinkBWP : &scc_SIB->downlinkConfigCommon.initialDownlinkBWP;
initialUplinkBWP = scc!=NULL ? scc->uplinkConfigCommon->initialUplinkBWP : &scc_SIB->uplinkConfigCommon->initialUplinkBWP;
}
NR_SearchSpace_t *ss; NR_SearchSpace_t *ss;
NR_ControlResourceSet_t *coreset; NR_ControlResourceSet_t *coreset;
...@@ -173,24 +162,24 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t ...@@ -173,24 +162,24 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
// computing alternative size for padding // computing alternative size for padding
dci_pdu_rel15_t temp_pdu; dci_pdu_rel15_t temp_pdu;
if(dci_format == NR_DL_DCI_FORMAT_1_0) if(dci_format == NR_DL_DCI_FORMAT_1_0)
alt_size = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, alt_size =
current_DL_BWP, current_UL_BWP, nr_dci_size(current_DL_BWP, current_UL_BWP, mac->cg, &temp_pdu, NR_UL_DCI_FORMAT_0_0, rnti_type, coreset, dl_bwp_id, ss->searchSpaceType->present, mac->type0_PDCCH_CSS_config.num_rbs, 0);
mac->cg, &temp_pdu,
NR_UL_DCI_FORMAT_0_0, rnti_type, coreset_id, dl_bwp_id,
ss->searchSpaceType->present, mac->type0_PDCCH_CSS_config.num_rbs, 0);
if(dci_format == NR_UL_DCI_FORMAT_0_0) if(dci_format == NR_UL_DCI_FORMAT_0_0)
alt_size = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, alt_size =
current_DL_BWP, current_UL_BWP, nr_dci_size(current_DL_BWP, current_UL_BWP, mac->cg, &temp_pdu, NR_DL_DCI_FORMAT_1_0, rnti_type, coreset, dl_bwp_id, ss->searchSpaceType->present, mac->type0_PDCCH_CSS_config.num_rbs, 0);
mac->cg, &temp_pdu, }
NR_DL_DCI_FORMAT_1_0, rnti_type, coreset_id, dl_bwp_id,
ss->searchSpaceType->present, mac->type0_PDCCH_CSS_config.num_rbs, 0); rel15->dci_length_options[i] = nr_dci_size(current_DL_BWP,
} current_UL_BWP,
mac->cg,
rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, &mac->def_dci_pdu_rel15[dci_format],
current_DL_BWP, current_UL_BWP, dci_format,
mac->cg, &mac->def_dci_pdu_rel15[dci_format], NR_RNTI_TC,
dci_format, NR_RNTI_TC, coreset_id, dl_bwp_id, coreset,
ss->searchSpaceType->present, mac->type0_PDCCH_CSS_config.num_rbs, alt_size); dl_bwp_id,
ss->searchSpaceType->present,
mac->type0_PDCCH_CSS_config.num_rbs,
alt_size);
rel15->BWPStart = coreset_id == 0 ? mac->type0_PDCCH_CSS_config.cset_start_rb : current_DL_BWP->BWPStart; rel15->BWPStart = coreset_id == 0 ? mac->type0_PDCCH_CSS_config.cset_start_rb : current_DL_BWP->BWPStart;
rel15->BWPSize = coreset_id == 0 ? mac->type0_PDCCH_CSS_config.num_rbs : current_DL_BWP->BWPSize; rel15->BWPSize = coreset_id == 0 ? mac->type0_PDCCH_CSS_config.num_rbs : current_DL_BWP->BWPSize;
......
This diff is collapsed.
...@@ -474,9 +474,11 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, ...@@ -474,9 +474,11 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
if (scc != NULL ) { if (scc != NULL ) {
AssertFatal((scc->ssb_PositionsInBurst->present > 0) && (scc->ssb_PositionsInBurst->present < 4), "SSB Bitmap type %d is not valid\n",scc->ssb_PositionsInBurst->present); AssertFatal((scc->ssb_PositionsInBurst->present > 0) && (scc->ssb_PositionsInBurst->present < 4), "SSB Bitmap type %d is not valid\n",scc->ssb_PositionsInBurst->present);
const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
RC.nrmac[Mod_idP]->common_channels[0].vrb_map_UL = if (*scc->ssbSubcarrierSpacing == 0)
calloc(n * MAX_BWP_SIZE, sizeof(uint16_t)); n <<= 1; // to have enough room for feedback possibly beyond the frame we need a larger array at 15kHz SCS
RC.nrmac[Mod_idP]->common_channels[0].vrb_map_UL = calloc(n * MAX_BWP_SIZE, sizeof(uint16_t));
RC.nrmac[Mod_idP]->vrb_map_UL_size = n;
AssertFatal(RC.nrmac[Mod_idP]->common_channels[0].vrb_map_UL, AssertFatal(RC.nrmac[Mod_idP]->common_channels[0].vrb_map_UL,
"could not allocate memory for RC.nrmac[]->common_channels[0].vrb_map_UL\n"); "could not allocate memory for RC.nrmac[]->common_channels[0].vrb_map_UL\n");
......
...@@ -59,21 +59,19 @@ ...@@ -59,21 +59,19 @@
const uint8_t nr_rv_round_map[4] = { 0, 2, 3, 1 }; const uint8_t nr_rv_round_map[4] = { 0, 2, 3, 1 };
uint16_t nr_pdcch_order_table[6] = { 31, 31, 511, 2047, 2047, 8191 }; uint16_t nr_pdcch_order_table[6] = { 31, 31, 511, 2047, 2047, 8191 };
uint8_t vnf_first_sched_entry = 1;
void clear_nr_nfapi_information(gNB_MAC_INST * gNB, void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
int CC_idP, int CC_idP,
frame_t frameP, frame_t frameP,
sub_frame_t slotP) sub_frame_t slotP)
{ {
NR_ServingCellConfigCommon_t *scc = gNB->common_channels->ServingCellConfigCommon; NR_ServingCellConfigCommon_t *scc = gNB->common_channels->ServingCellConfigCommon;
const int num_slots = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; const int num_slots = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
UL_tti_req_ahead_initialization(gNB, scc, num_slots, CC_idP, frameP); UL_tti_req_ahead_initialization(gNB, scc, num_slots, CC_idP, frameP, slotP, *scc->ssbSubcarrierSpacing);
nfapi_nr_dl_tti_request_t *DL_req = &gNB->DL_req[0]; nfapi_nr_dl_tti_request_t *DL_req = &gNB->DL_req[0];
nfapi_nr_dl_tti_pdcch_pdu_rel15_t **pdcch = (nfapi_nr_dl_tti_pdcch_pdu_rel15_t **)gNB->pdcch_pdu_idx[CC_idP]; nfapi_nr_dl_tti_pdcch_pdu_rel15_t **pdcch = (nfapi_nr_dl_tti_pdcch_pdu_rel15_t **)gNB->pdcch_pdu_idx[CC_idP];
nfapi_nr_ul_tti_request_t *future_ul_tti_req = &gNB->UL_tti_req_ahead[CC_idP][(slotP + num_slots - 1) % num_slots];
nfapi_nr_ul_dci_request_t *UL_dci_req = &gNB->UL_dci_req[0]; nfapi_nr_ul_dci_request_t *UL_dci_req = &gNB->UL_dci_req[0];
nfapi_nr_tx_data_request_t *TX_req = &gNB->TX_req[0]; nfapi_nr_tx_data_request_t *TX_req = &gNB->TX_req[0];
...@@ -83,7 +81,6 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB, ...@@ -83,7 +81,6 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
DL_req[CC_idP].Slot = slotP; DL_req[CC_idP].Slot = slotP;
DL_req[CC_idP].dl_tti_request_body.nPDUs = 0; DL_req[CC_idP].dl_tti_request_body.nPDUs = 0;
DL_req[CC_idP].dl_tti_request_body.nGroup = 0; DL_req[CC_idP].dl_tti_request_body.nGroup = 0;
//DL_req[CC_idP].dl_tti_request_body.transmission_power_pcfich = 6000;
memset(pdcch, 0, sizeof(*pdcch) * MAX_NUM_CORESET); memset(pdcch, 0, sizeof(*pdcch) * MAX_NUM_CORESET);
UL_dci_req[CC_idP].SFN = frameP; UL_dci_req[CC_idP].SFN = frameP;
...@@ -91,8 +88,11 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB, ...@@ -91,8 +88,11 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
UL_dci_req[CC_idP].numPdus = 0; UL_dci_req[CC_idP].numPdus = 0;
/* advance last round's future UL_tti_req to be ahead of current frame/slot */ /* advance last round's future UL_tti_req to be ahead of current frame/slot */
future_ul_tti_req->SFN = (slotP == 0 ? frameP : frameP + 1) % 1024; const int size = gNB->UL_tti_req_ahead_size;
LOG_D(NR_MAC, "In %s: UL_tti_req_ahead SFN.slot = %d.%d for slot %d \n", __FUNCTION__, future_ul_tti_req->SFN, future_ul_tti_req->Slot, (slotP + num_slots - 1) % num_slots); const int prev_slot = frameP * num_slots + slotP + size - 1;
nfapi_nr_ul_tti_request_t *future_ul_tti_req = &gNB->UL_tti_req_ahead[CC_idP][prev_slot % size];
future_ul_tti_req->SFN = (prev_slot / num_slots) % 1024;
LOG_D(NR_MAC, "%d.%d UL_tti_req_ahead SFN.slot = %d.%d for index %d \n", frameP, slotP, future_ul_tti_req->SFN, future_ul_tti_req->Slot, prev_slot % size);
/* future_ul_tti_req->Slot is fixed! */ /* future_ul_tti_req->Slot is fixed! */
future_ul_tti_req->n_pdus = 0; future_ul_tti_req->n_pdus = 0;
future_ul_tti_req->n_ulsch = 0; future_ul_tti_req->n_ulsch = 0;
...@@ -101,8 +101,8 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB, ...@@ -101,8 +101,8 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
/* UL_tti_req is a simple pointer into the current UL_tti_req_ahead, i.e., /* UL_tti_req is a simple pointer into the current UL_tti_req_ahead, i.e.,
* it walks over UL_tti_req_ahead in a circular fashion */ * it walks over UL_tti_req_ahead in a circular fashion */
gNB->UL_tti_req[CC_idP] = &gNB->UL_tti_req_ahead[CC_idP][slotP]; const int current_index = ul_buffer_index(frameP, slotP, *scc->ssbSubcarrierSpacing, gNB->UL_tti_req_ahead_size);
gNB->UL_tti_req[CC_idP] = &gNB->UL_tti_req_ahead[CC_idP][current_index];
TX_req[CC_idP].Number_of_PDUs = 0; TX_req[CC_idP].Number_of_PDUs = 0;
} }
...@@ -113,9 +113,10 @@ bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot) { ...@@ -113,9 +113,10 @@ bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot) {
void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
frame_t frame, frame_t frame,
sub_frame_t slot){ sub_frame_t slot)
{
protocol_ctxt_t ctxt={0}; protocol_ctxt_t ctxt = {0};
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES, NOT_A_RNTI, frame, slot,module_idP); PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES, NOT_A_RNTI, frame, slot,module_idP);
gNB_MAC_INST *gNB = RC.nrmac[module_idP]; gNB_MAC_INST *gNB = RC.nrmac[module_idP];
...@@ -135,7 +136,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -135,7 +136,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
gNB->frame = frame; gNB->frame = frame;
gNB->slot = slot; gNB->slot = slot;
start_meas(&RC.nrmac[module_idP]->eNB_scheduler); start_meas(&gNB->eNB_scheduler);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_IN);
pdcp_run(&ctxt); pdcp_run(&ctxt);
...@@ -155,32 +156,18 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -155,32 +156,18 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
memset(cc[CC_id].vrb_map, 0, sizeof(uint16_t) * MAX_BWP_SIZE); memset(cc[CC_id].vrb_map, 0, sizeof(uint16_t) * MAX_BWP_SIZE);
// clear last scheduled slot's content (only)! // clear last scheduled slot's content (only)!
const int num_slots = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; const int num_slots = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
const int last_slot = (slot + num_slots - 1) % num_slots; const int size = gNB->vrb_map_UL_size;
const int prev_slot = frame * num_slots + slot + size - 1;
uint16_t *vrb_map_UL = cc[CC_id].vrb_map_UL; uint16_t *vrb_map_UL = cc[CC_id].vrb_map_UL;
memcpy(&vrb_map_UL[last_slot * MAX_BWP_SIZE], &RC.nrmac[module_idP]->ulprbbl, sizeof(uint16_t) * MAX_BWP_SIZE); memcpy(&vrb_map_UL[prev_slot % size * MAX_BWP_SIZE], &gNB->ulprbbl, sizeof(uint16_t) * MAX_BWP_SIZE);
clear_nr_nfapi_information(RC.nrmac[module_idP], CC_id, frame, slot); clear_nr_nfapi_information(gNB, CC_id, frame, slot);
/*VNF first entry into scheduler. Since frame numbers for future_ul_tti_req of some future slots
will not be set before we encounter them, set them here */
if (NFAPI_MODE == NFAPI_MODE_VNF){
if(vnf_first_sched_entry == 1)
{
for (int i = 0; i<num_slots; i++){
if(i < slot)
gNB->UL_tti_req_ahead[CC_id][i].SFN = (frame + 1) % 1024;
else
gNB->UL_tti_req_ahead[CC_id][i].SFN = frame;
}
vnf_first_sched_entry = 0;
}
}
} }
if ((slot == 0) && (frame & 127) == 0) { if ((slot == 0) && (frame & 127) == 0) {
char stats_output[16000] = {0}; char stats_output[16000] = {0};
dump_mac_stats(RC.nrmac[module_idP], stats_output, sizeof(stats_output), true); dump_mac_stats(gNB, stats_output, sizeof(stats_output), true);
LOG_I(NR_MAC, "Frame.Slot %d.%d\n%s\n", frame, slot, stats_output); LOG_I(NR_MAC, "Frame.Slot %d.%d\n%s\n", frame, slot, stats_output);
} }
...@@ -232,11 +219,11 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -232,11 +219,11 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
nr_schedule_ue_spec(module_idP, frame, slot); nr_schedule_ue_spec(module_idP, frame, slot);
stop_meas(&gNB->schedule_dlsch); stop_meas(&gNB->schedule_dlsch);
nr_sr_reporting(RC.nrmac[module_idP], frame, slot); nr_sr_reporting(gNB, frame, slot);
nr_schedule_pucch(RC.nrmac[module_idP], frame, slot); nr_schedule_pucch(gNB, frame, slot);
stop_meas(&RC.nrmac[module_idP]->eNB_scheduler); stop_meas(&gNB->eNB_scheduler);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_OUT); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_OUT);
} }
...@@ -569,23 +569,11 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) ...@@ -569,23 +569,11 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
for (int k=0;k<sib1_sdu_length;k++) for (int k=0;k<sib1_sdu_length;k++)
LOG_D(NR_MAC,"byte %d : %x\n",k,((uint8_t*)sib1_payload)[k]); LOG_D(NR_MAC,"byte %d : %x\n",k,((uint8_t*)sib1_payload)[k]);
int startSymbolIndex = 0; default_table_type_t table_type = get_default_table_type(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern);
int nrOfSymbols = 0; // assuming normal CP
bool is_typeA; NR_tda_info_t tda_info = get_info_from_tda_tables(table_type, time_domain_allocation, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, true);
get_info_from_tda_tables(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern, AssertFatal((tda_info.startSymbolIndex + tda_info.nrOfSymbols) < 14, "SIB1 TDA %d would cause overlap with CSI-RS. Please select a different SIB1 TDA.\n", time_domain_allocation);
time_domain_allocation,
gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position,
1, &is_typeA,
&startSymbolIndex, &nrOfSymbols);
AssertFatal((startSymbolIndex+nrOfSymbols)<14,"SIB1 TDA %d would cause overlap with CSI-RS. Please select a different SIB1 TDA.\n",time_domain_allocation);
NR_tda_info_t tda_info = {
.mapping_type = is_typeA ? typeA : typeB,
.startSymbolIndex = startSymbolIndex,
.nrOfSymbols = nrOfSymbols
};
NR_pdsch_dmrs_t dmrs_parms = get_dl_dmrs_params(scc, NR_pdsch_dmrs_t dmrs_parms = get_dl_dmrs_params(scc,
NULL, NULL,
...@@ -603,7 +591,7 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) ...@@ -603,7 +591,7 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body; nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body;
int pdu_index = gNB_mac->pdu_index[0]++; int pdu_index = gNB_mac->pdu_index[0]++;
nr_fill_nfapi_dl_sib1_pdu(module_idP, dl_req, pdu_index, type0_PDCCH_CSS_config, TBS, startSymbolIndex, nrOfSymbols); nr_fill_nfapi_dl_sib1_pdu(module_idP, dl_req, pdu_index, type0_PDCCH_CSS_config, TBS, tda_info.startSymbolIndex, tda_info.nrOfSymbols);
const int ntx_req = gNB_mac->TX_req[CC_id].Number_of_PDUs; const int ntx_req = gNB_mac->TX_req[CC_id].Number_of_PDUs;
nfapi_nr_pdu_t *tx_req = &gNB_mac->TX_req[CC_id].pdu_list[ntx_req]; nfapi_nr_pdu_t *tx_req = &gNB_mac->TX_req[CC_id].pdu_list[ntx_req];
......
This diff is collapsed.
This diff is collapsed.
...@@ -667,6 +667,7 @@ static void fill_dci_from_dl_config(nr_downlink_indication_t*dl_ind, fapi_nr_dl_ ...@@ -667,6 +667,7 @@ static void fill_dci_from_dl_config(nr_downlink_indication_t*dl_ind, fapi_nr_dl_
if (rel15_dci->dci_length_options[j] == dl_ind->dci_ind->dci_list[k].payloadSize) { if (rel15_dci->dci_length_options[j] == dl_ind->dci_ind->dci_list[k].payloadSize) {
dl_ind->dci_ind->dci_list[k].dci_format = rel15_dci->dci_format_options[j]; dl_ind->dci_ind->dci_list[k].dci_format = rel15_dci->dci_format_options[j];
dl_ind->dci_ind->dci_list[k].ss_type = rel15_dci->dci_type_options[j]; dl_ind->dci_ind->dci_list[k].ss_type = rel15_dci->dci_type_options[j];
dl_ind->dci_ind->dci_list[k].coreset_type = rel15_dci->coreset.CoreSetType;
LOG_D(NR_PHY, "format assigned dl_ind->dci_ind->dci_list[k].dci_format %d\n", LOG_D(NR_PHY, "format assigned dl_ind->dci_ind->dci_list[k].dci_format %d\n",
dl_ind->dci_ind->dci_list[k].dci_format); dl_ind->dci_ind->dci_list[k].dci_format);
} }
......
This diff is collapsed.
...@@ -1673,6 +1673,7 @@ void rrc_gNB_process_RRCReestablishmentComplete(const protocol_ctxt_t *const ctx ...@@ -1673,6 +1673,7 @@ void rrc_gNB_process_RRCReestablishmentComplete(const protocol_ctxt_t *const ctx
ue_context_pP->ue_context.masterCellGroup->spCellConfig = ue_context_pP->ue_context.spCellConfigReestablishment; ue_context_pP->ue_context.masterCellGroup->spCellConfig = ue_context_pP->ue_context.spCellConfigReestablishment;
ue_context_pP->ue_context.spCellConfigReestablishment = NULL; ue_context_pP->ue_context.spCellConfigReestablishment = NULL;
cellGroupConfig->spCellConfig = ue_context_pP->ue_context.masterCellGroup->spCellConfig; cellGroupConfig->spCellConfig = ue_context_pP->ue_context.masterCellGroup->spCellConfig;
cellGroupConfig->physicalCellGroupConfig = ue_context_pP->ue_context.masterCellGroup->physicalCellGroupConfig;
fill_mastercellGroupConfig(cellGroupConfig, ue_context_pP->ue_context.masterCellGroup, rrc->um_on_default_drb, (drb_id_to_setup_start < 2) ? 1 : 0, drb_id_to_setup_start, nb_drb_to_setup, drb_priority); fill_mastercellGroupConfig(cellGroupConfig, ue_context_pP->ue_context.masterCellGroup, rrc->um_on_default_drb, (drb_id_to_setup_start < 2) ? 1 : 0, drb_id_to_setup_start, nb_drb_to_setup, drb_priority);
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment