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Michael Black
OpenXG-RAN
Commits
f879260b
Commit
f879260b
authored
Jun 11, 2021
by
francescomani
Browse files
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removing unused fapi structures at UE
parent
4ec568f5
Changes
6
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6 changed files
with
25 additions
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454 deletions
+25
-454
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
+0
-431
openair1/PHY/NR_ESTIMATION/nr_ul_channel_estimation.c
openair1/PHY/NR_ESTIMATION/nr_ul_channel_estimation.c
+3
-2
openair1/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c
openair1/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c
+1
-1
openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
+10
-9
openair1/SIMULATION/NR_PHY/ulsim.c
openair1/SIMULATION/NR_PHY/ulsim.c
+6
-6
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
+5
-5
No files found.
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
View file @
f879260b
...
...
@@ -456,437 +456,6 @@ typedef struct {
}
fapi_nr_dl_config_request_t
;
//
// P5
//
typedef
struct
{
fapi_nr_coreset_t
coreset
;
uint8_t
monitoring_slot_peridicity
;
uint8_t
monitoring_slot_offset
;
uint16_t
duration
;
uint16_t
monitoring_symbols_within_slot
;
uint8_t
number_of_candidates
[
5
];
// aggregation level 1, 2, 4, 8, 16
uint8_t
dci_2_0_number_of_candidates
[
5
];
// aggregation level 1, 2, 4, 8, 16
uint8_t
dci_2_3_monitorying_periodicity
;
uint8_t
dci_2_3_number_of_candidates
;
}
fapi_nr_search_space_t
;
typedef
struct
{
fapi_nr_search_space_t
search_space_sib1
;
fapi_nr_search_space_t
search_space_others_sib
;
fapi_nr_search_space_t
search_space_paging
;
//fapi_nr_coreset_t coreset_ra; // common coreset
fapi_nr_search_space_t
search_space_ra
;
}
fapi_nr_pdcch_config_common_t
;
typedef
struct
{
uint8_t
k0
;
uint8_t
mapping_type
;
uint8_t
symbol_starting
;
uint8_t
symbol_length
;
}
fapi_nr_pdsch_time_domain_resource_allocation_t
;
typedef
struct
{
fapi_nr_pdsch_time_domain_resource_allocation_t
allocation_list
[
FAPI_NR_MAX_NUM_DL_ALLOCATIONS
];
}
fapi_nr_pdsch_config_common_t
;
typedef
struct
{
uint8_t
prach_configuration_index
;
uint8_t
msg1_fdm
;
uint8_t
msg1_frequency_start
;
uint8_t
zero_correlation_zone_config
;
uint8_t
preamble_received_target_power
;
uint8_t
preamble_transmission_max
;
uint8_t
power_ramping_step
;
uint8_t
ra_window_size
;
uint8_t
total_number_of_preamble
;
uint8_t
ssb_occasion_per_rach
;
uint8_t
cb_preamble_per_ssb
;
uint8_t
group_a_msg3_size
;
uint8_t
group_a_number_of_preamble
;
uint8_t
group_b_power_offset
;
uint8_t
contention_resolution_timer
;
uint8_t
rsrp_threshold_ssb
;
uint8_t
rsrp_threshold_ssb_sul
;
uint8_t
prach_length
;
// l839, l139
uint8_t
prach_root_sequence_index
;
// 0 - 837 for l839, 0 - 137 for l139
uint8_t
msg1_subcarrier_spacing
;
uint8_t
restrictedset_config
;
uint8_t
msg3_transform_precoding
;
}
fapi_nr_rach_config_common_t
;
typedef
struct
{
uint8_t
k2
;
uint8_t
mapping_type
;
uint8_t
symbol_starting
;
uint8_t
symbol_length
;
}
fapi_nr_pusch_time_domain_resource_allocation_t
;
typedef
struct
{
uint8_t
group_hopping_enabled_transform_precoding
;
fapi_nr_pusch_time_domain_resource_allocation_t
allocation_list
[
FAPI_NR_MAX_NUM_UL_ALLOCATIONS
];
uint8_t
msg3_delta_preamble
;
uint8_t
p0_nominal_with_grant
;
}
fapi_nr_pusch_config_common_t
;
typedef
struct
{
uint8_t
pucch_resource_common
;
uint8_t
pucch_group_hopping
;
uint8_t
hopping_id
;
uint8_t
p0_nominal
;
}
fapi_nr_pucch_config_common_t
;
typedef
struct
{
fapi_nr_pdcch_config_common_t
pdcch_config_common
;
fapi_nr_pdsch_config_common_t
pdsch_config_common
;
}
fapi_nr_dl_bwp_common_config_t
;
typedef
struct
{
uint16_t
int_rnti
;
uint8_t
time_frequency_set
;
uint8_t
dci_payload_size
;
uint8_t
serving_cell_id
[
FAPI_NR_MAX_NUM_SERVING_CELLS
];
// interrupt configuration per serving cell
uint8_t
position_in_dci
[
FAPI_NR_MAX_NUM_SERVING_CELLS
];
// interrupt configuration per serving cell
}
fapi_nr_downlink_preemption_t
;
typedef
struct
{
uint8_t
tpc_index
;
uint8_t
tpc_index_sul
;
uint8_t
target_cell
;
}
fapi_nr_pusch_tpc_command_config_t
;
typedef
struct
{
uint8_t
tpc_index_pcell
;
uint8_t
tpc_index_pucch_scell
;
}
fapi_nr_pucch_tpc_command_config_t
;
typedef
struct
{
uint8_t
starting_bit_of_format_2_3
;
uint8_t
feild_type_format_2_3
;
}
fapi_nr_srs_tpc_command_config_t
;
typedef
struct
{
fapi_nr_downlink_preemption_t
downlink_preemption
;
fapi_nr_pusch_tpc_command_config_t
tpc_pusch
;
fapi_nr_pucch_tpc_command_config_t
tpc_pucch
;
fapi_nr_srs_tpc_command_config_t
tpc_srs
;
}
fapi_nr_pdcch_config_dedicated_t
;
typedef
struct
{
uint8_t
dmrs_type
;
uint8_t
dmrs_addition_position
;
uint8_t
max_length
;
uint16_t
scrambling_id0
;
uint16_t
scrambling_id1
;
uint8_t
ptrs_frequency_density
[
2
];
// phase tracking rs
uint8_t
ptrs_time_density
[
3
];
// phase tracking rs
uint8_t
ptrs_epre_ratio
;
// phase tracking rs
uint8_t
ptrs_resource_element_offset
;
// phase tracking rs
}
fapi_nr_dmrs_downlink_config_t
;
typedef
struct
{
uint8_t
bwp_or_cell_level
;
uint8_t
pattern_type
;
uint32_t
resource_blocks
[
9
];
// bitmaps type 275 bits
uint8_t
slot_type
;
// bitmaps type one/two slot(s)
uint32_t
symbols_in_resouece_block
;
// bitmaps type 14/28 bits
uint8_t
periodic
;
// bitmaps type
uint32_t
pattern
[
2
];
// bitmaps type 2/4/5/8/10/20/40 bits
fapi_nr_coreset_t
coreset
;
// coreset
uint8_t
subcarrier_spacing
;
uint8_t
mode
;
}
fapi_nr_rate_matching_pattern_group_t
;
typedef
struct
{
// resource mapping
uint8_t
row
;
// row1/row2/row4/other
uint16_t
frequency_domain_allocation
;
// 4/12/3/6 bits
uint8_t
number_of_ports
;
uint8_t
first_ofdm_symbol_in_time_domain
;
uint8_t
first_ofdm_symbol_in_time_domain2
;
uint8_t
cdm_type
;
uint8_t
density
;
// .5/1/3
uint8_t
density_dot5_type
;
// even/odd PRBs
uint8_t
frequency_band_starting_rb
;
// freqBand
uint8_t
frequency_band_number_of_rb
;
// freqBand
// periodicityAndOffset
uint8_t
periodicity
;
// slot4/5/8/10/16/20/32/40/64/80/160/320/640
uint32_t
offset
;
// 0..639 bits
}
fapi_nr_zp_csi_rs_resource_t
;
typedef
struct
{
uint16_t
data_scrambling_id_pdsch
;
fapi_nr_dmrs_downlink_config_t
dmrs_dl_for_pdsch_mapping_type_a
;
fapi_nr_dmrs_downlink_config_t
dmrs_dl_for_pdsch_mapping_type_b
;
uint8_t
vrb_to_prb_interleaver
;
uint8_t
resource_allocation
;
fapi_nr_pdsch_time_domain_resource_allocation_t
allocation_list
[
FAPI_NR_MAX_NUM_DL_ALLOCATIONS
];
uint8_t
pdsch_aggregation_factor
;
fapi_nr_rate_matching_pattern_group_t
rate_matching_pattern_group1
;
fapi_nr_rate_matching_pattern_group_t
rate_matching_pattern_group2
;
uint8_t
rbg_size
;
uint8_t
mcs_table
;
uint8_t
max_num_of_code_word_scheduled_by_dci
;
uint8_t
bundle_size
;
// prb_bundling static
uint8_t
bundle_size_set1
;
// prb_bundling dynamic
uint8_t
bundle_size_set2
;
// prb_bundling dynamic
fapi_nr_zp_csi_rs_resource_t
periodically_zp_csi_rs_resource_set
[
FAPI_NR_MAX_NUM_ZP_CSI_RS_RESOURCE_PER_SET
];
}
fapi_nr_pdsch_config_dedicated_t
;
typedef
struct
{
uint16_t
starting_prb
;
uint8_t
intra_slot_frequency_hopping
;
uint16_t
second_hop_prb
;
uint8_t
format
;
// pucch format 0..4
uint8_t
initial_cyclic_shift
;
uint8_t
number_of_symbols
;
uint8_t
starting_symbol_index
;
uint8_t
time_domain_occ
;
uint8_t
number_of_prbs
;
uint8_t
occ_length
;
uint8_t
occ_index
;
}
fapi_nr_pucch_resource_t
;
typedef
struct
{
uint8_t
periodicity
;
uint8_t
number_of_harq_process
;
fapi_nr_pucch_resource_t
n1_pucch_an
;
}
fapi_nr_sps_config_t
;
typedef
struct
{
uint8_t
beam_failure_instance_max_count
;
uint8_t
beam_failure_detection_timer
;
}
fapi_nr_radio_link_monitoring_config_t
;
typedef
struct
{
fapi_nr_pdcch_config_dedicated_t
pdcch_config_dedicated
;
fapi_nr_pdsch_config_dedicated_t
pdsch_config_dedicated
;
fapi_nr_sps_config_t
sps_config
;
fapi_nr_radio_link_monitoring_config_t
radio_link_monitoring_config
;
}
fapi_nr_dl_bwp_dedicated_config_t
;
typedef
struct
{
fapi_nr_rach_config_common_t
rach_config_common
;
fapi_nr_pusch_config_common_t
pusch_config_common
;
fapi_nr_pucch_config_common_t
pucch_config_common
;
}
fapi_nr_ul_bwp_common_config_t
;
typedef
struct
{
uint8_t
inter_slot_frequency_hopping
;
uint8_t
additional_dmrs
;
uint8_t
max_code_rate
;
uint8_t
number_of_slots
;
uint8_t
pi2bpsk
;
uint8_t
simultaneous_harq_ack_csi
;
}
fapi_nr_pucch_format_config_t
;
typedef
struct
{
fapi_nr_pucch_format_config_t
format1
;
fapi_nr_pucch_format_config_t
format2
;
fapi_nr_pucch_format_config_t
format3
;
fapi_nr_pucch_format_config_t
format4
;
fapi_nr_pucch_resource_t
multi_csi_pucch_resources
[
2
];
uint8_t
dl_data_to_ul_ack
[
8
];
// pucch power control
uint8_t
deltaF_pucch_f0
;
uint8_t
deltaF_pucch_f1
;
uint8_t
deltaF_pucch_f2
;
uint8_t
deltaF_pucch_f3
;
uint8_t
deltaF_pucch_f4
;
uint8_t
two_pucch_pc_adjusment_states
;
}
fapi_nr_pucch_config_dedicated_t
;
typedef
struct
{
uint8_t
dmrs_type
;
uint8_t
dmrs_addition_position
;
uint8_t
ptrs_uplink_config
;
// to indicate if PTRS Uplink is configured of not
uint8_t
ptrs_type
;
//cp-OFDM, dft-S-OFDM
uint16_t
ptrs_frequency_density
[
2
];
uint8_t
ptrs_time_density
[
3
];
uint8_t
ptrs_max_number_of_ports
;
uint8_t
ptrs_resource_element_offset
;
uint8_t
ptrs_power
;
uint16_t
ptrs_sample_density
[
5
];
uint8_t
ptrs_time_density_transform_precoding
;
uint8_t
max_length
;
uint16_t
scrambling_id0
;
uint16_t
scrambling_id1
;
uint8_t
npusch_identity
;
uint8_t
disable_sequence_group_hopping
;
uint8_t
sequence_hopping_enable
;
}
fapi_nr_dmrs_uplink_config_t
;
typedef
struct
{
uint8_t
tpc_accmulation
;
uint8_t
msg3_alpha
;
uint8_t
p0_nominal_with_grant
;
uint8_t
two_pusch_pc_adjustments_states
;
uint8_t
delta_mcs
;
}
fapi_nr_pusch_power_control_t
;
typedef
enum
{
tx_config_codebook
=
1
,
tx_config_nonCodebook
=
2
}
tx_config_t
;
typedef
enum
{
transform_precoder_enabled
=
0
,
transform_precoder_disabled
=
1
}
transform_precoder_t
;
typedef
enum
{
codebook_subset_fullyAndPartialAndNonCoherent
=
1
,
codebook_subset_partialAndNonCoherent
=
2
,
codebook_subset_nonCoherent
=
3
}
codebook_subset_t
;
typedef
struct
{
uint16_t
data_scrambling_identity
;
tx_config_t
tx_config
;
fapi_nr_dmrs_uplink_config_t
dmrs_ul_for_pusch_mapping_type_a
;
fapi_nr_dmrs_uplink_config_t
dmrs_ul_for_pusch_mapping_type_b
;
fapi_nr_pusch_power_control_t
pusch_power_control
;
uint8_t
frequency_hopping
;
uint16_t
frequency_hopping_offset_lists
[
4
];
uint8_t
resource_allocation
;
fapi_nr_pusch_time_domain_resource_allocation_t
allocation_list
[
FAPI_NR_MAX_NUM_UL_ALLOCATIONS
];
uint8_t
pusch_aggregation_factor
;
uint8_t
mcs_table
;
uint8_t
mcs_table_transform_precoder
;
transform_precoder_t
transform_precoder
;
codebook_subset_t
codebook_subset
;
uint8_t
max_rank
;
uint8_t
rbg_size
;
//uci-OnPUSCH
uint8_t
uci_on_pusch_type
;
//dynamic, semi-static
uint8_t
beta_offset_ack_index1
[
4
];
uint8_t
beta_offset_ack_index2
[
4
];
uint8_t
beta_offset_ack_index3
[
4
];
uint8_t
beta_offset_csi_part1_index1
[
4
];
uint8_t
beta_offset_csi_part1_index2
[
4
];
uint8_t
beta_offset_csi_part2_index1
[
4
];
uint8_t
beta_offset_csi_part2_index2
[
4
];
uint8_t
tp_pi2BPSK
;
}
fapi_nr_pusch_config_dedicated_t
;
typedef
struct
{
uint8_t
frequency_hopping
;
fapi_nr_dmrs_uplink_config_t
cg_dmrs_configuration
;
uint8_t
mcs_table
;
uint8_t
mcs_table_transform_precoder
;
//uci-OnPUSCH
uint8_t
uci_on_pusch_type
;
//dynamic, semi-static
uint8_t
beta_offset_ack_index1
[
4
];
uint8_t
beta_offset_ack_index2
[
4
];
uint8_t
beta_offset_ack_index3
[
4
];
uint8_t
beta_offset_csi_part1_index1
[
4
];
uint8_t
beta_offset_csi_part1_index2
[
4
];
uint8_t
beta_offset_csi_part2_index1
[
4
];
uint8_t
beta_offset_csi_part2_index2
[
4
];
uint8_t
resource_allocation
;
// rgb-Size structure missing in spec.
uint8_t
power_control_loop_to_use
;
// p0-PUSCH-Alpha
uint8_t
p0
;
uint8_t
alpha
;
uint8_t
transform_precoder
;
uint8_t
number_of_harq_process
;
uint8_t
rep_k
;
uint8_t
rep_k_rv
;
uint8_t
periodicity
;
uint8_t
configured_grant_timer
;
// rrc-ConfiguredUplinkGrant
uint16_t
time_domain_offset
;
uint8_t
time_domain_allocation
;
uint32_t
frequency_domain_allocation
;
uint8_t
antenna_ports
;
uint8_t
dmrs_seq_initialization
;
uint8_t
precoding_and_number_of_layers
;
uint8_t
srs_resource_indicator
;
uint8_t
mcs_and_tbs
;
uint8_t
frequency_hopping_offset
;
uint8_t
path_loss_reference_index
;
}
fapi_nr_configured_grant_config_t
;
typedef
struct
{
uint8_t
qcl_type1_serving_cell_index
;
uint8_t
qcl_type1_bwp_id
;
uint8_t
qcl_type1_rs_type
;
// csi-rs or ssb
uint8_t
qcl_type1_nzp_csi_rs_resource_id
;
uint8_t
qcl_type1_ssb_index
;
uint8_t
qcl_type1_type
;
uint8_t
qcl_type2_serving_cell_index
;
uint8_t
qcl_type2_bwp_id
;
uint8_t
qcl_type2_rs_type
;
// csi-rs or ssb
uint8_t
qcl_type2_nzp_csi_rs_resource_id
;
uint8_t
qcl_type2_ssb_index
;
uint8_t
qcl_type2_type
;
}
fapi_nr_tci_state_t
;
typedef
struct
{
uint8_t
root_sequence_index
;
// rach genertic
uint8_t
prach_configuration_index
;
uint8_t
msg1_fdm
;
uint8_t
msg1_frequency_start
;
uint8_t
zero_correlation_zone_config
;
uint8_t
preamble_received_target_power
;
uint8_t
preamble_transmission_max
;
uint8_t
power_ramping_step
;
uint8_t
ra_window_size
;
uint8_t
rsrp_threshold_ssb
;
// PRACH-ResourceDedicatedBFR
uint8_t
bfr_ssb_index
[
FAPI_NR_MAX_NUM_CANDIDATE_BEAMS
];
uint8_t
bfr_ssb_ra_preamble_index
[
FAPI_NR_MAX_NUM_CANDIDATE_BEAMS
];
// NZP-CSI-RS-Resource
uint8_t
bfr_csi_rs_nzp_resource_mapping
[
FAPI_NR_MAX_NUM_CANDIDATE_BEAMS
];
uint8_t
bfr_csi_rs_power_control_offset
[
FAPI_NR_MAX_NUM_CANDIDATE_BEAMS
];
uint8_t
bfr_csi_rs_power_control_offset_ss
[
FAPI_NR_MAX_NUM_CANDIDATE_BEAMS
];
uint16_t
bfr_csi_rs_scrambling_id
[
FAPI_NR_MAX_NUM_CANDIDATE_BEAMS
];
uint8_t
bfr_csi_rs_resource_periodicity
[
FAPI_NR_MAX_NUM_CANDIDATE_BEAMS
];
uint16_t
bfr_csi_rs_resource_offset
[
FAPI_NR_MAX_NUM_CANDIDATE_BEAMS
];
fapi_nr_tci_state_t
qcl_infomation_periodic_csi_rs
[
FAPI_NR_MAX_NUM_CANDIDATE_BEAMS
];
uint8_t
bfr_csirs_ra_occasions
[
FAPI_NR_MAX_NUM_CANDIDATE_BEAMS
];
uint8_t
bfr_csirs_ra_preamble_index
[
FAPI_NR_MAX_NUM_CANDIDATE_BEAMS
][
FAPI_NR_MAX_RA_OCCASION_PER_CSIRS
];
uint8_t
ssb_per_rach_occasion
;
uint8_t
ra_ssb_occasion_mask_index
;
fapi_nr_search_space_t
recovery_search_space
;
// RA-Prioritization
uint8_t
power_ramping_step_high_priority
;
uint8_t
scaling_factor_bi
;
uint8_t
beam_failure_recovery_timer
;
}
fapi_nr_beam_failure_recovery_config_t
;
typedef
struct
{
fapi_nr_pucch_config_dedicated_t
pucch_config_dedicated
;
fapi_nr_pusch_config_dedicated_t
pusch_config_dedicated
;
fapi_nr_configured_grant_config_t
configured_grant_config
;
// SRS-Config
uint8_t
srs_tpc_accumulation
;
fapi_nr_beam_failure_recovery_config_t
beam_failure_recovery_config
;
}
fapi_nr_ul_bwp_dedicated_config_t
;
#define FAPI_NR_CONFIG_REQUEST_MASK_PBCH 0x01
#define FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON 0x02
#define FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_COMMON 0x04
...
...
openair1/PHY/NR_ESTIMATION/nr_ul_channel_estimation.c
View file @
f879260b
...
...
@@ -129,8 +129,9 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
//------------------generate DMRS------------------//
if
(
pusch_pdu
->
transform_precoding
==
transform_precoder_disabled
)
{
nr_pusch_dmrs_rx
(
gNB
,
Ns
,
gNB
->
nr_gold_pusch_dmrs
[
pusch_pdu
->
scid
][
Ns
][
symbol
],
&
pilot
[
0
],
1000
,
0
,
nb_rb_pusch
,
(
pusch_pdu
->
bwp_start
+
pusch_pdu
->
rb_start
)
*
NR_NB_SC_PER_RB
,
pusch_pdu
->
dmrs_config_type
);
if
(
pusch_pdu
->
transform_precoding
==
1
)
{
nr_pusch_dmrs_rx
(
gNB
,
Ns
,
gNB
->
nr_gold_pusch_dmrs
[
pusch_pdu
->
scid
][
Ns
][
symbol
],
&
pilot
[
0
],
1000
,
0
,
nb_rb_pusch
,
(
pusch_pdu
->
bwp_start
+
pusch_pdu
->
rb_start
)
*
NR_NB_SC_PER_RB
,
pusch_pdu
->
dmrs_config_type
);
}
else
{
// if transform precoding or SC-FDMA is enabled in Uplink
...
...
openair1/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c
View file @
f879260b
...
...
@@ -1311,7 +1311,7 @@ int nr_rx_pusch(PHY_VARS_gNB *gNB,
stop_meas
(
&
gNB
->
ulsch_mrc_stats
);
if
(
rel15_ul
->
transform_precoding
==
transform_precoder_enabled
)
{
if
(
rel15_ul
->
transform_precoding
==
0
)
{
#ifdef __AVX2__
// For odd number of resource blocks need byte alignment to multiple of 8
...
...
openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
View file @
f879260b
...
...
@@ -254,14 +254,15 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
uint8_t
u
=
0
,
v
=
0
;
int16_t
*
dmrs_seq
=
NULL
;
if
(
pusch_pdu
->
transform_precoding
==
transform_precoder_enabled
)
{
// enbaled
if
(
pusch_pdu
->
transform_precoding
==
0
)
{
uint32_t
nb_re_pusch
=
nb_rb
*
NR_NB_SC_PER_RB
;
uint32_t
y_offset
=
0
;
uint16_t
num_dmrs_res_per_symbol
=
nb_rb
*
(
NR_NB_SC_PER_RB
/
2
);
// Calculate index to dmrs seq array based on number of DMRS Subcarriers on this symbol
index
=
get_index_for_dmrs_lowpapr_seq
(
num_dmrs_res_per_symbol
);
index
=
get_index_for_dmrs_lowpapr_seq
(
num_dmrs_res_per_symbol
);
u
=
pusch_pdu
->
dfts_ofdm
.
low_papr_group_number
;
v
=
pusch_pdu
->
dfts_ofdm
.
low_papr_sequence_number
;
dmrs_seq
=
dmrs_lowpaprtype1_ul_ref_sig
[
u
][
v
][
index
];
...
...
@@ -299,7 +300,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
}
printf
(
"NR_ULSCH_UE: numSym: %d, num_dmrs_sym: %d"
,
number_of_symbols
,
number_dmrs_symbols
);
for
(
int
ll
=
0
;
ll
<
(
number_of_symbols
-
number_dmrs_symbols
);
ll
++
)
{
for
(
int
ll
=
0
;
ll
<
(
number_of_symbols
-
number_dmrs_symbols
);
ll
++
)
{
nr_idft
(
&
debug_symbols
[
offset
],
nb_re_pusch
);
...
...
@@ -355,8 +356,8 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
if
((
ul_dmrs_symb_pos
>>
l
)
&
0x01
)
{
is_dmrs_sym
=
1
;
if
(
pusch_pdu
->
transform_precoding
==
transform_precoder_disabled
){
// disabled
if
(
pusch_pdu
->
transform_precoding
==
1
){
if
(
dmrs_type
==
pusch_dmrs_type1
)
dmrs_idx
=
(
pusch_pdu
->
bwp_start
+
start_rb
)
*
6
;
...
...
@@ -373,9 +374,9 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
}
}
else
if
(
pusch_pdu
->
pdu_bit_map
&
PUSCH_PDU_BITMAP_PUSCH_PTRS
)
{
}
else
if
(
pusch_pdu
->
pdu_bit_map
&
PUSCH_PDU_BITMAP_PUSCH_PTRS
)
{
AssertFatal
(
pusch_pdu
->
transform_precoding
==
transform_precoder_disabled
,
"PTRS NOT SUPPORTED IF TRANSFORM PRECODING IS ENABLED
\n
"
);
AssertFatal
(
pusch_pdu
->
transform_precoding
==
1
,
"PTRS NOT SUPPORTED IF TRANSFORM PRECODING IS ENABLED
\n
"
);
if
(
is_ptrs_symbol
(
l
,
ulsch_ue
->
ptrs_symbols
))
{
is_ptrs_sym
=
1
;
...
...
@@ -406,8 +407,8 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
}
if
(
is_dmrs
==
1
)
{
if
(
pusch_pdu
->
transform_precoding
==
transform_precoder_enabled
)
{
// if enabled
if
(
pusch_pdu
->
transform_precoding
==
0
)
{
((
int16_t
*
)
txdataF
[
ap
])[(
sample_offsetF
)
<<
1
]
=
(
Wt
[
l_prime
[
0
]]
*
Wf
[
k_prime
]
*
AMP
*
dmrs_seq
[
2
*
dmrs_idx
])
>>
15
;
((
int16_t
*
)
txdataF
[
ap
])[((
sample_offsetF
)
<<
1
)
+
1
]
=
(
Wt
[
l_prime
[
0
]]
*
Wf
[
k_prime
]
*
AMP
*
dmrs_seq
[(
2
*
dmrs_idx
)
+
1
])
>>
15
;
...
...
openair1/SIMULATION/NR_PHY/ulsim.c
View file @
f879260b
...
...
@@ -304,7 +304,7 @@ int main(int argc, char **argv)
uint16_t
ptrsSymbPerSlot
=
0
;
uint16_t
ptrsRePerSymb
=
0
;
uint8_t
transform_precoding
=
transform_precoder_disabled
;
// 0 - ENABLE, 1 - DISABLE
uint8_t
transform_precoding
=
1
;
// 0 - ENABLE, 1 - DISABLE
uint8_t
num_dmrs_cdm_grps_no_data
=
1
;
uint8_t
mcs_table
=
0
;
...
...
@@ -561,7 +561,7 @@ int main(int argc, char **argv)
case
'Z'
:
transform_precoding
=
transform_precoder_enabled
;
transform_precoding
=
0
;
num_dmrs_cdm_grps_no_data
=
2
;
mcs_table
=
3
;
...
...
@@ -835,7 +835,7 @@ int main(int argc, char **argv)
uint16_t
number_dmrs_symbols
=
get_dmrs_symbols_in_slot
(
l_prime_mask
,
nb_symb_sch
);
uint8_t
nb_re_dmrs
=
(
dmrs_config_type
==
pusch_dmrs_type1
)
?
6
:
4
;
if
(
transform_precoding
==
transform_precoder_enabled
)
{
if
(
transform_precoding
==
0
)
{
AssertFatal
(
enable_ptrs
==
0
,
"PTRS NOT SUPPORTED IF TRANSFORM PRECODING IS ENABLED
\n
"
);
...
...
@@ -1040,7 +1040,7 @@ int main(int argc, char **argv)
pusch_pdu
->
pusch_ptrs
.
ptrs_ports_list
=
(
nfapi_nr_ptrs_ports_t
*
)
malloc
(
2
*
sizeof
(
nfapi_nr_ptrs_ports_t
));
pusch_pdu
->
pusch_ptrs
.
ptrs_ports_list
[
0
].
ptrs_re_offset
=
0
;
if
(
transform_precoding
==
transform_precoder_enabled
)
{
if
(
transform_precoding
==
0
)
{
pusch_pdu
->
dfts_ofdm
.
low_papr_group_number
=
*
scc
->
physCellId
%
30
;
// U as defined in 38.211 section 6.4.1.1.1.2
pusch_pdu
->
dfts_ofdm
.
low_papr_sequence_number
=
0
;
// V as defined in 38.211 section 6.4.1.1.1.2
...
...
@@ -1100,7 +1100,7 @@ int main(int argc, char **argv)
ul_config
.
ul_config_list
[
0
].
pusch_config_pdu
.
transform_precoding
=
transform_precoding
;
if
(
transform_precoding
==
transform_precoder_enabled
)
{
if
(
transform_precoding
==
0
)
{
ul_config
.
ul_config_list
[
0
].
pusch_config_pdu
.
dfts_ofdm
.
low_papr_group_number
=
*
scc
->
physCellId
%
30
;
// U as defined in 38.211 section 6.4.1.1.1.2
ul_config
.
ul_config_list
[
0
].
pusch_config_pdu
.
dfts_ofdm
.
low_papr_sequence_number
=
0
;
// V as defined in 38.211 section 6.4.1.1.1.2
...
...
@@ -1205,7 +1205,7 @@ int main(int argc, char **argv)
}
if
(
n_trials
==
1
&&
round
==
0
)
{
if
(
n_trials
==
1
&&
round
==
0
)
{
#ifdef __AVX2__
int
off
=
((
nb_rb
&
1
)
==
1
)
?
4
:
0
;
#else
...
...
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
View file @
f879260b
...
...
@@ -671,7 +671,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
/* TRANSFORM PRECODING ------------------------------------------------------------------------------------------*/
if
(
pusch_config_pdu
->
transform_precoding
==
transform_p
recoder_enabled
)
{
if
(
pusch_config_pdu
->
transform_precoding
==
NR_PUSCH_Config__transformP
recoder_enabled
)
{
pusch_config_pdu
->
num_dmrs_cdm_grps_no_data
=
2
;
...
...
@@ -722,7 +722,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu
->
mcs_index
=
dci
->
mcs
;
/* MCS TABLE */
if
(
pusch_config_pdu
->
transform_precoding
==
transform_p
recoder_disabled
)
{
if
(
pusch_config_pdu
->
transform_precoding
==
NR_PUSCH_Config__transformP
recoder_disabled
)
{
pusch_config_pdu
->
mcs_table
=
get_pusch_mcs_table
(
pusch_Config
?
pusch_Config
->
mcs_Table
:
NULL
,
0
,
*
dci_format
,
rnti_type
,
target_ss
,
false
);
}
else
{
pusch_config_pdu
->
mcs_table
=
get_pusch_mcs_table
(
pusch_Config
?
pusch_Config
->
mcs_TableTransformPrecoder
:
NULL
,
1
,
*
dci_format
,
rnti_type
,
target_ss
,
false
);
...
...
@@ -752,9 +752,9 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
/* DMRS */
l_prime_mask
=
get_l_prime
(
pusch_config_pdu
->
nr_of_symbols
,
typeB
,
(
*
dci_format
==
NR_UL_DCI_FORMAT_0_1
)
?
pusch_dmrs_pos0
:
pusch_dmrs_pos2
,
pusch_len1
);
if
((
mac
->
ULbwp
[
0
]
&&
pusch_config_pdu
->
transform_precoding
==
transform_p
recoder_disabled
))
if
((
mac
->
ULbwp
[
0
]
&&
pusch_config_pdu
->
transform_precoding
==
NR_PUSCH_Config__transformP
recoder_disabled
))
pusch_config_pdu
->
num_dmrs_cdm_grps_no_data
=
1
;
else
if
(
*
dci_format
==
NR_UL_DCI_FORMAT_0_0
||
(
mac
->
ULbwp
[
0
]
&&
pusch_config_pdu
->
transform_precoding
==
transform_p
recoder_enabled
))
else
if
(
*
dci_format
==
NR_UL_DCI_FORMAT_0_0
||
(
mac
->
ULbwp
[
0
]
&&
pusch_config_pdu
->
transform_precoding
==
NR_PUSCH_Config__transformP
recoder_enabled
))
pusch_config_pdu
->
num_dmrs_cdm_grps_no_data
=
2
;
// Num PRB Overhead from PUSCH-ServingCellConfig
...
...
@@ -775,7 +775,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
mac
->
ULbwp
[
0
]
->
bwp_Dedicated
->
pusch_Config
->
choice
.
setup
&&
mac
->
ULbwp
[
0
]
->
bwp_Dedicated
->
pusch_Config
->
choice
.
setup
->
dmrs_UplinkForPUSCH_MappingTypeB
&&
mac
->
ULbwp
[
0
]
->
bwp_Dedicated
->
pusch_Config
->
choice
.
setup
->
dmrs_UplinkForPUSCH_MappingTypeB
->
choice
.
setup
->
phaseTrackingRS
)
{
if
(
pusch_config_pdu
->
transform_precoding
==
transform_p
recoder_disabled
)
{
if
(
pusch_config_pdu
->
transform_precoding
==
NR_PUSCH_Config__transformP
recoder_disabled
)
{
nfapi_nr_ue_ptrs_ports_t
ptrs_ports_list
;
pusch_config_pdu
->
pusch_ptrs
.
ptrs_ports_list
=
&
ptrs_ports_list
;
valid_ptrs_setup
=
set_ul_ptrs_values
(
mac
->
ULbwp
[
0
]
->
bwp_Dedicated
->
pusch_Config
->
choice
.
setup
->
dmrs_UplinkForPUSCH_MappingTypeB
->
choice
.
setup
->
phaseTrackingRS
->
choice
.
setup
,
...
...
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