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OpenXG
OpenXG UE
Commits
2c72186c
Commit
2c72186c
authored
May 28, 2021
by
francescomani
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bugfixes for phy-test mode and BWP less than 50 PRBs
parent
362ccfb1
Changes
2
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2 changed files
with
19 additions
and
6 deletions
+19
-6
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+12
-1
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+7
-5
No files found.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @
2c72186c
...
@@ -284,6 +284,8 @@ void nr_preprocessor_phytest(module_id_t module_id,
...
@@ -284,6 +284,8 @@ void nr_preprocessor_phytest(module_id_t module_id,
const
int
bwpSize
=
NRRIV2BW
(
sched_ctrl
->
active_bwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
MAX_BWP_SIZE
);
const
int
bwpSize
=
NRRIV2BW
(
sched_ctrl
->
active_bwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
MAX_BWP_SIZE
);
int
rbStart
=
0
;
int
rbStart
=
0
;
int
rbSize
=
0
;
int
rbSize
=
0
;
if
(
target_dl_bw
>
bwpSize
)
target_dl_bw
=
bwpSize
;
uint16_t
*
vrb_map
=
RC
.
nrmac
[
module_id
]
->
common_channels
[
CC_id
].
vrb_map
;
uint16_t
*
vrb_map
=
RC
.
nrmac
[
module_id
]
->
common_channels
[
CC_id
].
vrb_map
;
/* loop ensures that we allocate exactly target_dl_bw, or return */
/* loop ensures that we allocate exactly target_dl_bw, or return */
while
(
true
)
{
while
(
true
)
{
...
@@ -445,7 +447,16 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
...
@@ -445,7 +447,16 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
nr_set_pusch_semi_static
(
scc
,
sched_ctrl
->
active_ubwp
,
dci_format
,
tda
,
num_dmrs_cdm_grps_no_data
,
ps
);
nr_set_pusch_semi_static
(
scc
,
sched_ctrl
->
active_ubwp
,
dci_format
,
tda
,
num_dmrs_cdm_grps_no_data
,
ps
);
uint16_t
rbStart
=
0
;
uint16_t
rbStart
=
0
;
uint16_t
rbSize
=
target_ul_bw
;
uint16_t
rbSize
;
const
int
bw
=
NRRIV2BW
(
sched_ctrl
->
active_ubwp
?
sched_ctrl
->
active_ubwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
:
scc
->
uplinkConfigCommon
->
initialUplinkBWP
->
genericParameters
.
locationAndBandwidth
,
MAX_BWP_SIZE
);
if
(
target_ul_bw
>
bw
)
rbSize
=
bw
;
else
rbSize
=
target_ul_bw
;
uint16_t
*
vrb_map_UL
=
uint16_t
*
vrb_map_UL
=
&
RC
.
nrmac
[
module_id
]
->
common_channels
[
CC_id
].
vrb_map_UL
[
sched_slot
*
MAX_BWP_SIZE
];
&
RC
.
nrmac
[
module_id
]
->
common_channels
[
CC_id
].
vrb_map_UL
[
sched_slot
*
MAX_BWP_SIZE
];
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @
2c72186c
...
@@ -610,6 +610,7 @@ void config_uldci(const NR_BWP_Uplink_t *ubwp,
...
@@ -610,6 +610,7 @@ void config_uldci(const NR_BWP_Uplink_t *ubwp,
const
int
bw
=
NRRIV2BW
(
ubwp
?
const
int
bw
=
NRRIV2BW
(
ubwp
?
ubwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
:
ubwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
:
scc
->
uplinkConfigCommon
->
initialUplinkBWP
->
genericParameters
.
locationAndBandwidth
,
MAX_BWP_SIZE
);
scc
->
uplinkConfigCommon
->
initialUplinkBWP
->
genericParameters
.
locationAndBandwidth
,
MAX_BWP_SIZE
);
dci_pdu_rel15
->
frequency_domain_assignment
.
val
=
dci_pdu_rel15
->
frequency_domain_assignment
.
val
=
PRBalloc_to_locationandbandwidth0
(
pusch_pdu
->
rb_size
,
pusch_pdu
->
rb_start
,
bw
);
PRBalloc_to_locationandbandwidth0
(
pusch_pdu
->
rb_size
,
pusch_pdu
->
rb_start
,
bw
);
dci_pdu_rel15
->
time_domain_assignment
.
val
=
time_domain_assignment
;
dci_pdu_rel15
->
time_domain_assignment
.
val
=
time_domain_assignment
;
...
@@ -672,6 +673,7 @@ int nr_get_default_pucch_res(int pucch_ResourceCommon) {
...
@@ -672,6 +673,7 @@ int nr_get_default_pucch_res(int pucch_ResourceCommon) {
return
(
default_pucch_csset
[
pucch_ResourceCommon
]);
return
(
default_pucch_csset
[
pucch_ResourceCommon
]);
}
}
void
nr_configure_pdcch
(
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu
,
void
nr_configure_pdcch
(
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu
,
NR_SearchSpace_t
*
ss
,
NR_SearchSpace_t
*
ss
,
NR_ControlResourceSet_t
*
coreset
,
NR_ControlResourceSet_t
*
coreset
,
...
...
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