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OpenXG
OpenXG UE
Commits
3b13b937
Commit
3b13b937
authored
Oct 06, 2017
by
Cedric Roux
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Plain Diff
spacing cleanup
parent
1980293e
Changes
1
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1 changed file
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132 additions
and
150 deletions
+132
-150
openair1/SCHED/fapi_l1.c
openair1/SCHED/fapi_l1.c
+132
-150
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openair1/SCHED/fapi_l1.c
View file @
3b13b937
...
...
@@ -37,13 +37,11 @@
#include "nfapi_interface.h"
#include "fapi_l1.h"
void
handle_nfapi_dci_dl_pdu
(
PHY_VARS_eNB
*
eNB
,
eNB_rxtx_proc_t
*
proc
,
nfapi_dl_config_request_pdu_t
*
dl_config_pdu
)
{
int
idx
=
proc
->
subframe_tx
&
1
;
void
handle_nfapi_dci_dl_pdu
(
PHY_VARS_eNB
*
eNB
,
eNB_rxtx_proc_t
*
proc
,
nfapi_dl_config_request_pdu_t
*
dl_config_pdu
)
{
int
idx
=
proc
->
subframe_tx
&
1
;
LTE_eNB_PDCCH
*
pdcch_vars
=
&
eNB
->
pdcch_vars
[
idx
];
nfapi_dl_config_dci_dl_pdu
*
pdu
=
&
dl_config_pdu
->
dci_dl_pdu
;
...
...
@@ -53,12 +51,11 @@ void handle_nfapi_dci_dl_pdu(PHY_VARS_eNB *eNB,
fill_dci_and_dlsch
(
eNB
,
proc
,
&
pdcch_vars
->
dci_alloc
[
pdcch_vars
->
num_dci
],
pdu
);
}
void
handle_nfapi_mpdcch_pdu
(
PHY_VARS_eNB
*
eNB
,
eNB_rxtx_proc_t
*
proc
,
nfapi_dl_config_request_pdu_t
*
dl_config_pdu
)
{
int
idx
=
proc
->
subframe_tx
&
1
;
void
handle_nfapi_mpdcch_pdu
(
PHY_VARS_eNB
*
eNB
,
eNB_rxtx_proc_t
*
proc
,
nfapi_dl_config_request_pdu_t
*
dl_config_pdu
)
{
int
idx
=
proc
->
subframe_tx
&
1
;
LTE_eNB_MPDCCH
*
mpdcch_vars
=
&
eNB
->
mpdcch_vars
[
idx
];
nfapi_dl_config_mpdcch_pdu
*
pdu
=
&
dl_config_pdu
->
mpdcch_pdu
;
...
...
@@ -68,25 +65,25 @@ void handle_nfapi_mpdcch_pdu(PHY_VARS_eNB *eNB,
fill_mdci_and_dlsch
(
eNB
,
proc
,
&
mpdcch_vars
->
mdci_alloc
[
mpdcch_vars
->
num_dci
],
pdu
);
}
void
handle_nfapi_hi_dci0_dci_pdu
(
PHY_VARS_eNB
*
eNB
,
eNB_rxtx_proc_t
*
proc
,
nfapi_hi_dci0_request_pdu_t
*
hi_dci0_config_pdu
){
void
handle_nfapi_hi_dci0_dci_pdu
(
PHY_VARS_eNB
*
eNB
,
eNB_rxtx_proc_t
*
proc
,
nfapi_hi_dci0_request_pdu_t
*
hi_dci0_config_pdu
)
{
int
idx
=
proc
->
subframe_tx
&
1
;
LTE_eNB_PDCCH
*
pdcch_vars
=
&
eNB
->
pdcch_vars
[
idx
];
// copy dci configuration in to eNB structure
fill_dci0
(
eNB
,
proc
,
&
pdcch_vars
->
dci_alloc
[
pdcch_vars
->
num_dci
],
&
hi_dci0_config_pdu
->
dci_pdu
);
}
void
handle_nfapi_hi_dci0_hi_pdu
(
PHY_VARS_eNB
*
eNB
,
eNB_rxtx_proc_t
*
proc
,
nfapi_hi_dci0_request_pdu_t
*
hi_dci0_config_pdu
)
{
void
handle_nfapi_hi_dci0_hi_pdu
(
PHY_VARS_eNB
*
eNB
,
eNB_rxtx_proc_t
*
proc
,
nfapi_hi_dci0_request_pdu_t
*
hi_dci0_config_pdu
)
{
LTE_eNB_PHICH
*
phich
=
&
eNB
->
phich_vars
[
proc
->
subframe_tx
&
1
];
// copy dci configuration in to eNB structure
LOG_D
(
PHY
,
"Received HI PDU which value %d (rbstart %d,cshift %d)
\n
"
,
hi_dci0_config_pdu
->
hi_pdu
.
hi_pdu_rel8
.
hi_value
,
hi_dci0_config_pdu
->
hi_pdu
.
hi_pdu_rel8
.
resource_block_start
,
hi_dci0_config_pdu
->
hi_pdu
.
hi_pdu_rel8
.
cyclic_shift_2_for_drms
);
hi_dci0_config_pdu
->
hi_pdu
.
hi_pdu_rel8
.
hi_value
,
hi_dci0_config_pdu
->
hi_pdu
.
hi_pdu_rel8
.
resource_block_start
,
hi_dci0_config_pdu
->
hi_pdu
.
hi_pdu_rel8
.
cyclic_shift_2_for_drms
);
phich
->
config
[
phich
->
num_hi
].
hi
=
hi_dci0_config_pdu
->
hi_pdu
.
hi_pdu_rel8
.
hi_value
;
phich
->
config
[
phich
->
num_hi
].
first_rb
=
hi_dci0_config_pdu
->
hi_pdu
.
hi_pdu_rel8
.
resource_block_start
;
...
...
@@ -95,12 +92,12 @@ void handle_nfapi_hi_dci0_hi_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
AssertFatal
(
phich
->
num_hi
<
32
,
"Maximum number of phich reached in subframe
\n
"
);
}
void
handle_nfapi_bch_pdu
(
PHY_VARS_eNB
*
eNB
,
eNB_rxtx_proc_t
*
proc
,
nfapi_dl_config_request_pdu_t
*
dl_config_pdu
,
uint8_t
*
sdu
)
{
void
handle_nfapi_bch_pdu
(
PHY_VARS_eNB
*
eNB
,
eNB_rxtx_proc_t
*
proc
,
nfapi_dl_config_request_pdu_t
*
dl_config_pdu
,
uint8_t
*
sdu
)
{
nfapi_dl_config_bch_pdu_rel8_t
*
rel8
=
&
dl_config_pdu
->
bch_pdu
.
bch_pdu_rel8
;
AssertFatal
(
rel8
->
length
==
3
,
"BCH PDU has length %d != 3
\n
"
,
rel8
->
length
);
LOG_D
(
PHY
,
"bch_pdu: %x,%x,%x
\n
"
,
sdu
[
0
],
sdu
[
1
],
sdu
[
2
]);
...
...
@@ -109,7 +106,6 @@ void handle_nfapi_bch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
eNB
->
pbch_pdu
[
2
]
=
sdu
[
0
];
// adjust transmit amplitude here based on NFAPI info
}
#ifdef Rel14
...
...
@@ -123,11 +119,11 @@ extern uint32_t localRIV2alloc_LUT100_2[6000];
extern
uint32_t
localRIV2alloc_LUT100_3
[
6000
];
#endif
void
handle_nfapi_dlsch_pdu
(
PHY_VARS_eNB
*
eNB
,
eNB_rxtx_proc_t
*
proc
,
nfapi_dl_config_request_pdu_t
*
dl_config_pdu
,
uint8_t
codeword_index
,
uint8_t
*
sdu
)
{
void
handle_nfapi_dlsch_pdu
(
PHY_VARS_eNB
*
eNB
,
eNB_rxtx_proc_t
*
proc
,
nfapi_dl_config_request_pdu_t
*
dl_config_pdu
,
uint8_t
codeword_index
,
uint8_t
*
sdu
)
{
nfapi_dl_config_dlsch_pdu_rel8_t
*
rel8
=
&
dl_config_pdu
->
dlsch_pdu
.
dlsch_pdu_rel8
;
#ifndef Rel8
nfapi_dl_config_dlsch_pdu_rel10_t
*
rel10
=
&
dl_config_pdu
->
dlsch_pdu
.
dlsch_pdu_rel10
;
...
...
@@ -139,12 +135,11 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
LTE_DL_eNB_HARQ_t
*
dlsch0_harq
=
NULL
,
*
dlsch1_harq
=
NULL
;
int
UE_id
;
int
harq_pid
;
UE_id
=
find_dlsch
(
rel8
->
rnti
,
eNB
,
SEARCH_EXIST_OR_FREE
);
AssertFatal
(
UE_id
!=-
1
,
"no free or exiting dlsch_context
\n
"
);
AssertFatal
(
UE_id
<
NUMBER_OF_UE_MAX
,
"returned UE_id %d >= %d(NUMBER_OF_UE_MAX)
\n
"
,
UE_id
,
NUMBER_OF_UE_MAX
);
dlsch0
=
eNB
->
dlsch
[
UE_id
][
0
];
dlsch1
=
eNB
->
dlsch
[
UE_id
][
1
];
...
...
@@ -170,28 +165,27 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
computeRhoB_eNB
(
&
eNB
->
pdsch_config_dedicated
[
UE_id
],
&
(
eNB
->
frame_parms
.
pdsch_config_common
),
eNB
->
frame_parms
.
nb_antenna_ports_eNB
,
dlsch1
,
dlsch1_harq
->
dl_power_off
);
}
dlsch0_harq
->
pdsch_start
=
eNB
->
pdcch_vars
[
proc
->
subframe_tx
&
1
].
num_pdcch_symbols
;
if
(
dlsch0_harq
->
round
==
0
)
{
//get pointer to SDU if this a new SDU
if
(
rel8
->
rnti
!=
0xFFFF
)
LOG_D
(
PHY
,
"NFAPI: frame %d, subframe %d: programming dlsch for round 0, rnti %x, UE_id %d, harq_pid %d
\n
"
,
proc
->
frame_tx
,
proc
->
subframe_tx
,
rel8
->
rnti
,
UE_id
,
harq_pid
);
proc
->
frame_tx
,
proc
->
subframe_tx
,
rel8
->
rnti
,
UE_id
,
harq_pid
);
if
(
codeword_index
==
0
)
dlsch0_harq
->
pdu
=
sdu
;
else
dlsch1_harq
->
pdu
=
sdu
;
}
else
{
if
(
rel8
->
rnti
!=
0xFFFF
)
LOG_D
(
PHY
,
"NFAPI: frame %d, subframe %d: programming dlsch for round %d, rnti %x, UE_id %d, harq_pid %d
\n
"
,
proc
->
frame_tx
,
proc
->
subframe_tx
,
dlsch0_harq
->
round
,
rel8
->
rnti
,
UE_id
,
harq_pid
);
proc
->
frame_tx
,
proc
->
subframe_tx
,
dlsch0_harq
->
round
,
rel8
->
rnti
,
UE_id
,
harq_pid
);
}
#ifdef Rel14
dlsch0
->
sib1_br_flag
=
0
;
if
((
rel13
->
pdsch_payload_type
<
2
)
&&
(
rel13
->
ue_type
>
0
))
{
// this is a BR/CE UE and SIB1-BR/SI-BR
dlsch0
->
rnti
=
0xFFFF
;
dlsch0
->
Kmimo
=
1
;
dlsch0
->
Mdlharq
=
4
;
dlsch0
->
Mdlharq
=
4
;
dlsch0
->
Nsoft
=
25344
;
dlsch0
->
i0
=
rel13
->
initial_transmission_sf_io
;
dlsch0_harq
->
pdsch_start
=
rel10
->
pdsch_start
;
...
...
@@ -209,7 +203,7 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
case
25
:
dlsch0_harq
->
rb_alloc
[
0
]
=
localRIV2alloc_LUT25
[
rel8
->
resource_block_coding
];
break
;
case
50
:
case
50
:
dlsch0_harq
->
rb_alloc
[
0
]
=
localRIV2alloc_LUT50_0
[
rel8
->
resource_block_coding
];
dlsch0_harq
->
rb_alloc
[
1
]
=
localRIV2alloc_LUT50_1
[
rel8
->
resource_block_coding
];
break
;
...
...
@@ -224,8 +218,8 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
}
dlsch0
->
active
=
1
;
dlsch0_harq
->
nb_rb
=
6
;
dlsch0_harq
->
nb_rb
=
6
;
dlsch0_harq
->
vrb_type
=
LOCALIZED
;
dlsch0_harq
->
rvidx
=
rel8
->
redundancy_version
;
dlsch0_harq
->
Nl
=
1
;
...
...
@@ -245,8 +239,8 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
uint16_t
to_beta_offset_harqack
[
16
]
=
{
16
,
20
,
25
,
32
,
40
,
50
,
64
,
80
,
101
,
127
,
160
,
248
,
400
,
640
,
1008
,
8
};
void
handle_ulsch_harq_pdu
(
PHY_VARS_eNB
*
eNB
,
int
UE_id
,
nfapi_ul_config_request_pdu_t
*
ul_config_pdu
,
uint16_t
frame
,
uint8_t
subframe
)
{
void
handle_ulsch_harq_pdu
(
PHY_VARS_eNB
*
eNB
,
int
UE_id
,
nfapi_ul_config_request_pdu_t
*
ul_config_pdu
,
uint16_t
frame
,
uint8_t
subframe
)
{
nfapi_ul_config_ulsch_pdu_rel8_t
*
rel8
=
&
ul_config_pdu
->
ulsch_harq_pdu
.
ulsch_pdu
.
ulsch_pdu_rel8
;
LTE_eNB_ULSCH_t
*
ulsch
=
eNB
->
ulsch
[
UE_id
];
...
...
@@ -264,8 +258,8 @@ void handle_ulsch_harq_pdu(PHY_VARS_eNB *eNB,int UE_id,nfapi_ul_config_request_p
uint16_t
to_beta_offset_ri
[
16
]
=
{
9
,
13
,
16
,
20
,
25
,
32
,
40
,
50
,
64
,
80
,
101
,
127
,
160
,
0
,
0
,
0
};
uint16_t
to_beta_offset_cqi
[
16
]
=
{
0
,
0
,
9
,
10
,
11
,
13
,
14
,
16
,
18
,
20
,
23
,
25
,
28
,
32
,
40
,
50
};
void
handle_ulsch_cqi_ri_pdu
(
PHY_VARS_eNB
*
eNB
,
int
UE_id
,
nfapi_ul_config_request_pdu_t
*
ul_config_pdu
,
uint16_t
frame
,
uint8_t
subframe
)
{
void
handle_ulsch_cqi_ri_pdu
(
PHY_VARS_eNB
*
eNB
,
int
UE_id
,
nfapi_ul_config_request_pdu_t
*
ul_config_pdu
,
uint16_t
frame
,
uint8_t
subframe
)
{
nfapi_ul_config_cqi_ri_information_rel9_t
*
rel9
=
&
ul_config_pdu
->
ulsch_cqi_ri_pdu
.
cqi_ri_information
.
cqi_ri_information_rel9
;
LTE_eNB_ULSCH_t
*
ulsch
=
eNB
->
ulsch
[
UE_id
];
...
...
@@ -273,19 +267,19 @@ void handle_ulsch_cqi_ri_pdu(PHY_VARS_eNB *eNB,int UE_id,nfapi_ul_config_request
LTE_UL_eNB_HARQ_t
*
ulsch_harq
=
ulsch
->
harq_processes
[
harq_pid
];
ulsch_harq
->
frame
=
frame
;
ulsch_harq
->
subframe
=
subframe
;
ulsch_harq
->
subframe
=
subframe
;
ulsch_harq
->
O_RI
=
rel9
->
aperiodic_cqi_pmi_ri_report
.
cc
[
0
].
ri_size
;
ulsch_harq
->
Or1
=
rel9
->
aperiodic_cqi_pmi_ri_report
.
cc
[
0
].
dl_cqi_pmi_size
[
0
];
if
(
ulsch_harq
->
O_RI
>
1
)
ulsch_harq
->
Or2
=
rel9
->
aperiodic_cqi_pmi_ri_report
.
cc
[
0
].
dl_cqi_pmi_size
[
1
];
ulsch
->
beta_offset_ri_times8
=
to_beta_offset_ri
[
rel9
->
delta_offset_ri
];
ulsch
->
beta_offset_cqi_times8
=
to_beta_offset_cqi
[
rel9
->
delta_offset_cqi
];
LOG_D
(
PHY
,
"Filling ulsch_cqi_ri information for frame %d, subframe %d : O_RI %d, Or1 %d, beta_offset_cqi_times8 %d (%d)
\n
"
,
frame
,
subframe
,
ulsch_harq
->
O_RI
,
ulsch_harq
->
Or1
,
ulsch
->
beta_offset_cqi_times8
,
rel9
->
delta_offset_cqi
);
frame
,
subframe
,
ulsch_harq
->
O_RI
,
ulsch_harq
->
Or1
,
ulsch
->
beta_offset_cqi_times8
,
rel9
->
delta_offset_cqi
);
}
void
handle_ulsch_cqi_harq_ri_pdu
(
PHY_VARS_eNB
*
eNB
,
int
UE_id
,
nfapi_ul_config_request_pdu_t
*
ul_config_pdu
,
uint16_t
frame
,
uint8_t
subframe
)
{
void
handle_ulsch_cqi_harq_ri_pdu
(
PHY_VARS_eNB
*
eNB
,
int
UE_id
,
nfapi_ul_config_request_pdu_t
*
ul_config_pdu
,
uint16_t
frame
,
uint8_t
subframe
)
{
nfapi_ul_config_cqi_ri_information_rel9_t
*
rel9
=
&
ul_config_pdu
->
ulsch_cqi_harq_ri_pdu
.
cqi_ri_information
.
cqi_ri_information_rel9
;
LTE_eNB_ULSCH_t
*
ulsch
=
eNB
->
ulsch
[
UE_id
];
...
...
@@ -294,7 +288,7 @@ void handle_ulsch_cqi_harq_ri_pdu(PHY_VARS_eNB *eNB,int UE_id,nfapi_ul_config_re
nfapi_ul_config_ulsch_harq_information
*
harq_information
=
&
ul_config_pdu
->
ulsch_cqi_harq_ri_pdu
.
harq_information
;
ulsch_harq
->
frame
=
frame
;
ulsch_harq
->
subframe
=
subframe
;
ulsch_harq
->
subframe
=
subframe
;
ulsch_harq
->
O_RI
=
rel9
->
aperiodic_cqi_pmi_ri_report
.
cc
[
0
].
ri_size
;
ulsch_harq
->
Or1
=
rel9
->
aperiodic_cqi_pmi_ri_report
.
cc
[
0
].
dl_cqi_pmi_size
[
0
];
ulsch_harq
->
O_ACK
=
harq_information
->
harq_information_rel10
.
harq_size
;
...
...
@@ -304,34 +298,32 @@ void handle_ulsch_cqi_harq_ri_pdu(PHY_VARS_eNB *eNB,int UE_id,nfapi_ul_config_re
ulsch
->
beta_offset_harqack_times8
=
to_beta_offset_harqack
[
harq_information
->
harq_information_rel10
.
delta_offset_harq
];
ulsch
->
beta_offset_ri_times8
=
to_beta_offset_ri
[
rel9
->
delta_offset_ri
];
ulsch
->
beta_offset_cqi_times8
=
to_beta_offset_cqi
[
rel9
->
delta_offset_cqi
];
}
void
handle_uci_harq_information
(
PHY_VARS_eNB
*
eNB
,
LTE_eNB_UCI
*
uci
,
nfapi_ul_config_harq_information
*
harq_information
)
{
void
handle_uci_harq_information
(
PHY_VARS_eNB
*
eNB
,
LTE_eNB_UCI
*
uci
,
nfapi_ul_config_harq_information
*
harq_information
)
{
if
(
eNB
->
frame_parms
.
frame_type
==
FDD
)
{
uci
->
num_pucch_resources
=
harq_information
->
harq_information_rel9_fdd
.
number_of_pucch_resources
;
uci
->
num_pucch_resources
=
harq_information
->
harq_information_rel9_fdd
.
number_of_pucch_resources
;
LOG_D
(
PHY
,
"Programming UCI HARQ mode %d : size %d in (%d,%d)
\n
"
,
harq_information
->
harq_information_rel9_fdd
.
ack_nack_mode
,
harq_information
->
harq_information_rel9_fdd
.
harq_size
,
uci
->
frame
,
uci
->
subframe
);
harq_information
->
harq_information_rel9_fdd
.
ack_nack_mode
,
harq_information
->
harq_information_rel9_fdd
.
harq_size
,
uci
->
frame
,
uci
->
subframe
);
if
((
harq_information
->
harq_information_rel9_fdd
.
ack_nack_mode
==
0
)
&&
(
harq_information
->
harq_information_rel9_fdd
.
harq_size
==
1
))
{
(
harq_information
->
harq_information_rel9_fdd
.
harq_size
==
1
))
{
uci
->
pucch_fmt
=
pucch_format1a
;
uci
->
n_pucch_1
[
0
][
0
]
=
harq_information
->
harq_information_rel9_fdd
.
n_pucch_1_0
;
uci
->
n_pucch_1
[
0
][
1
]
=
harq_information
->
harq_information_rel11
.
n_pucch_2_0
;
}
else
if
((
harq_information
->
harq_information_rel9_fdd
.
ack_nack_mode
==
0
)
&&
(
harq_information
->
harq_information_rel9_fdd
.
harq_size
==
2
))
{
(
harq_information
->
harq_information_rel9_fdd
.
harq_size
==
2
))
{
uci
->
pucch_fmt
=
pucch_format1b
;
uci
->
n_pucch_1
[
0
][
0
]
=
harq_information
->
harq_information_rel9_fdd
.
n_pucch_1_0
;
uci
->
n_pucch_1
[
0
][
1
]
=
harq_information
->
harq_information_rel11
.
n_pucch_2_0
;
}
else
if
((
harq_information
->
harq_information_rel9_fdd
.
ack_nack_mode
==
1
)
&&
(
harq_information
->
harq_information_rel9_fdd
.
harq_size
==
2
))
{
(
harq_information
->
harq_information_rel9_fdd
.
harq_size
==
2
))
{
uci
->
pucch_fmt
=
pucch_format1b_csA2
;
uci
->
n_pucch_1
[
0
][
0
]
=
harq_information
->
harq_information_rel9_fdd
.
n_pucch_1_0
;
uci
->
n_pucch_1
[
0
][
1
]
=
harq_information
->
harq_information_rel11
.
n_pucch_2_0
;
...
...
@@ -339,7 +331,7 @@ void handle_uci_harq_information(PHY_VARS_eNB *eNB, LTE_eNB_UCI *uci,nfapi_ul_co
uci
->
n_pucch_1
[
1
][
1
]
=
harq_information
->
harq_information_rel11
.
n_pucch_2_1
;
}
else
if
((
harq_information
->
harq_information_rel9_fdd
.
ack_nack_mode
==
1
)
&&
(
harq_information
->
harq_information_rel9_fdd
.
harq_size
==
3
))
{
(
harq_information
->
harq_information_rel9_fdd
.
harq_size
==
3
))
{
uci
->
pucch_fmt
=
pucch_format1b_csA3
;
uci
->
n_pucch_1
[
0
][
0
]
=
harq_information
->
harq_information_rel9_fdd
.
n_pucch_1_0
;
uci
->
n_pucch_1
[
0
][
1
]
=
harq_information
->
harq_information_rel11
.
n_pucch_2_0
;
...
...
@@ -349,7 +341,7 @@ void handle_uci_harq_information(PHY_VARS_eNB *eNB, LTE_eNB_UCI *uci,nfapi_ul_co
uci
->
n_pucch_1
[
2
][
1
]
=
harq_information
->
harq_information_rel11
.
n_pucch_2_2
;
}
else
if
((
harq_information
->
harq_information_rel9_fdd
.
ack_nack_mode
==
1
)
&&
(
harq_information
->
harq_information_rel9_fdd
.
harq_size
==
4
))
{
(
harq_information
->
harq_information_rel9_fdd
.
harq_size
==
4
))
{
uci
->
pucch_fmt
=
pucch_format1b_csA4
;
uci
->
n_pucch_1
[
0
][
0
]
=
harq_information
->
harq_information_rel9_fdd
.
n_pucch_1_0
;
uci
->
n_pucch_1
[
0
][
1
]
=
harq_information
->
harq_information_rel11
.
n_pucch_2_0
;
...
...
@@ -366,7 +358,7 @@ void handle_uci_harq_information(PHY_VARS_eNB *eNB, LTE_eNB_UCI *uci,nfapi_ul_co
else
AssertFatal
(
1
==
0
,
"unsupported HARQ mode %d
\n
"
,
harq_information
->
harq_information_rel9_fdd
.
ack_nack_mode
);
}
else
{
// TDD
uci
->
num_pucch_resources
=
harq_information
->
harq_information_rel10_tdd
.
number_of_pucch_resources
;
uci
->
num_pucch_resources
=
harq_information
->
harq_information_rel10_tdd
.
number_of_pucch_resources
;
if
(
harq_information
->
harq_information_rel10_tdd
.
ack_nack_mode
==
0
)
{
//bundling
...
...
@@ -375,15 +367,15 @@ void handle_uci_harq_information(PHY_VARS_eNB *eNB, LTE_eNB_UCI *uci,nfapi_ul_co
uci
->
n_pucch_1
[
0
][
0
]
=
harq_information
->
harq_information_rel10_tdd
.
n_pucch_1_0
;
uci
->
n_pucch_1
[
0
][
1
]
=
harq_information
->
harq_information_rel11
.
n_pucch_2_0
;
}
else
if
((
harq_information
->
harq_information_rel10_tdd
.
ack_nack_mode
==
1
)
&&
//multiplexing
(
uci
->
num_pucch_resources
==
1
))
{
else
if
((
harq_information
->
harq_information_rel10_tdd
.
ack_nack_mode
==
1
)
&&
//multiplexing
(
uci
->
num_pucch_resources
==
1
))
{
uci
->
pucch_fmt
=
harq_information
->
harq_information_rel10_tdd
.
harq_size
==
1
?
pucch_format1a
:
pucch_format1b
;
uci
->
tdd_bundling
=
0
;
uci
->
n_pucch_1
[
0
][
0
]
=
harq_information
->
harq_information_rel10_tdd
.
n_pucch_1_0
;
uci
->
n_pucch_1
[
0
][
1
]
=
harq_information
->
harq_information_rel11
.
n_pucch_2_0
;
}
else
if
((
harq_information
->
harq_information_rel10_tdd
.
ack_nack_mode
==
1
)
&&
//multiplexing M>1
(
uci
->
num_pucch_resources
>
1
))
{
(
uci
->
num_pucch_resources
>
1
))
{
uci
->
pucch_fmt
=
pucch_format1b
;
uci
->
tdd_bundling
=
0
;
uci
->
n_pucch_1
[
0
][
0
]
=
harq_information
->
harq_information_rel10_tdd
.
n_pucch_1_0
;
...
...
@@ -404,7 +396,8 @@ void handle_uci_harq_information(PHY_VARS_eNB *eNB, LTE_eNB_UCI *uci,nfapi_ul_co
}
}
void
handle_uci_sr_pdu
(
PHY_VARS_eNB
*
eNB
,
int
UE_id
,
nfapi_ul_config_request_pdu_t
*
ul_config_pdu
,
uint16_t
frame
,
uint8_t
subframe
,
uint8_t
srs_active
)
{
void
handle_uci_sr_pdu
(
PHY_VARS_eNB
*
eNB
,
int
UE_id
,
nfapi_ul_config_request_pdu_t
*
ul_config_pdu
,
uint16_t
frame
,
uint8_t
subframe
,
uint8_t
srs_active
)
{
LTE_eNB_UCI
*
uci
=
&
eNB
->
uci_vars
[
UE_id
];
uci
->
frame
=
frame
;
...
...
@@ -419,16 +412,11 @@ void handle_uci_sr_pdu(PHY_VARS_eNB *eNB,int UE_id,nfapi_ul_config_request_pdu_t
uci
->
active
=
1
;
LOG_D
(
PHY
,
"Programming UCI SR rnti %x, pucch1_0 %d for (%d,%d)
\n
"
,
uci
->
rnti
,
uci
->
n_pucch_1_0_sr
[
0
],
frame
,
subframe
);
uci
->
rnti
,
uci
->
n_pucch_1_0_sr
[
0
],
frame
,
subframe
);
}
void
handle_uci_sr_harq_pdu
(
PHY_VARS_eNB
*
eNB
,
int
UE_id
,
nfapi_ul_config_request_pdu_t
*
ul_config_pdu
,
uint16_t
frame
,
uint8_t
subframe
,
uint8_t
srs_active
)
{
void
handle_uci_sr_harq_pdu
(
PHY_VARS_eNB
*
eNB
,
int
UE_id
,
nfapi_ul_config_request_pdu_t
*
ul_config_pdu
,
uint16_t
frame
,
uint8_t
subframe
,
uint8_t
srs_active
)
{
LTE_eNB_UCI
*
uci
=
&
eNB
->
uci_vars
[
UE_id
];
uci
->
frame
=
frame
;
...
...
@@ -441,12 +429,11 @@ void handle_uci_sr_harq_pdu(PHY_VARS_eNB *eNB,int UE_id,nfapi_ul_config_request_
uci
->
srs_active
=
srs_active
;
uci
->
active
=
1
;
handle_uci_harq_information
(
eNB
,
uci
,
&
ul_config_pdu
->
uci_sr_harq_pdu
.
harq_information
);
}
void
handle_uci_harq_pdu
(
PHY_VARS_eNB
*
eNB
,
int
UE_id
,
nfapi_ul_config_request_pdu_t
*
ul_config_pdu
,
uint16_t
frame
,
uint8_t
subframe
,
uint8_t
srs_active
)
{
void
handle_uci_harq_pdu
(
PHY_VARS_eNB
*
eNB
,
int
UE_id
,
nfapi_ul_config_request_pdu_t
*
ul_config_pdu
,
uint16_t
frame
,
uint8_t
subframe
,
uint8_t
srs_active
)
{
LTE_eNB_UCI
*
uci
=
&
eNB
->
uci_vars
[
UE_id
];
LOG_D
(
PHY
,
"Frame %d, Subframe %d: Programming UCI_HARQ process (type %d)
\n
"
,
frame
,
subframe
,
HARQ
);
...
...
@@ -460,18 +447,16 @@ void handle_uci_harq_pdu(PHY_VARS_eNB *eNB,int UE_id,nfapi_ul_config_request_pdu
handle_uci_harq_information
(
eNB
,
uci
,
&
ul_config_pdu
->
uci_harq_pdu
.
harq_information
);
uci
->
active
=
1
;
}
void
handle_srs_pdu
(
PHY_VARS_eNB
*
eNB
,
nfapi_ul_config_request_pdu_t
*
ul_config_pdu
,
uint16_t
frame
,
uint8_t
subframe
)
{
void
handle_srs_pdu
(
PHY_VARS_eNB
*
eNB
,
nfapi_ul_config_request_pdu_t
*
ul_config_pdu
,
uint16_t
frame
,
uint8_t
subframe
)
{
int
i
;
for
(
i
=
0
;
i
<
NUMBER_OF_UE_MAX
;
i
++
)
{
if
(
eNB
->
soundingrs_ul_config_dedicated
[
i
].
active
==
1
)
continue
;
eNB
->
soundingrs_ul_config_dedicated
[
i
].
active
=
1
;
eNB
->
soundingrs_ul_config_dedicated
[
i
].
frame
=
frame
;
eNB
->
soundingrs_ul_config_dedicated
[
i
].
subframe
=
subframe
;
...
...
@@ -482,15 +467,15 @@ void handle_srs_pdu(PHY_VARS_eNB *eNB,nfapi_ul_config_request_pdu_t *ul_config_p
eNB
->
soundingrs_ul_config_dedicated
[
i
].
transmissionComb
=
ul_config_pdu
->
srs_pdu
.
srs_pdu_rel8
.
transmission_comb
;
eNB
->
soundingrs_ul_config_dedicated
[
i
].
srs_ConfigIndex
=
ul_config_pdu
->
srs_pdu
.
srs_pdu_rel8
.
i_srs
;
eNB
->
soundingrs_ul_config_dedicated
[
i
].
cyclicShift
=
ul_config_pdu
->
srs_pdu
.
srs_pdu_rel8
.
sounding_reference_cyclic_shift
;
break
;
break
;
}
AssertFatal
(
i
<
NUMBER_OF_UE_MAX
,
"No room for SRS processing
\n
"
);
}
void
handle_nfapi_ul_pdu
(
PHY_VARS_eNB
*
eNB
,
eNB_rxtx_proc_t
*
proc
,
nfapi_ul_config_request_pdu_t
*
ul_config_pdu
,
uint16_t
frame
,
uint8_t
subframe
,
uint8_t
srs_present
)
{
nfapi_ul_config_request_pdu_t
*
ul_config_pdu
,
uint16_t
frame
,
uint8_t
subframe
,
uint8_t
srs_present
)
{
nfapi_ul_config_ulsch_pdu_rel8_t
*
rel8
=
&
ul_config_pdu
->
ulsch_pdu
.
ulsch_pdu_rel8
;
int8_t
UE_id
;
...
...
@@ -499,42 +484,41 @@ void handle_nfapi_ul_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
if
(
ul_config_pdu
->
pdu_type
==
NFAPI_UL_CONFIG_ULSCH_PDU_TYPE
)
{
AssertFatal
((
UE_id
=
find_ulsch
(
ul_config_pdu
->
ulsch_pdu
.
ulsch_pdu_rel8
.
rnti
,
eNB
,
SEARCH_EXIST_OR_FREE
))
>=
0
,
"No existing UE ULSCH for rnti %x
\n
"
,
rel8
->
rnti
);
"No existing UE ULSCH for rnti %x
\n
"
,
rel8
->
rnti
);
LOG_D
(
PHY
,
"Applying UL config for UE %d, rnti %x for frame %d, subframe %d
\n
"
,
UE_id
,
rel8
->
rnti
,
frame
,
subframe
);
UE_id
,
rel8
->
rnti
,
frame
,
subframe
);
fill_ulsch
(
eNB
,
&
ul_config_pdu
->
ulsch_pdu
,
frame
,
subframe
);
}
else
if
(
ul_config_pdu
->
pdu_type
==
NFAPI_UL_CONFIG_ULSCH_HARQ_PDU_TYPE
)
{
AssertFatal
((
UE_id
=
find_ulsch
(
ul_config_pdu
->
ulsch_harq_pdu
.
ulsch_pdu
.
ulsch_pdu_rel8
.
rnti
,
eNB
,
SEARCH_EXIST_OR_FREE
))
>=
0
,
"No available UE ULSCH for rnti %x
\n
"
,
ul_config_pdu
->
ulsch_harq_pdu
.
ulsch_pdu
.
ulsch_pdu_rel8
.
rnti
);
"No available UE ULSCH for rnti %x
\n
"
,
ul_config_pdu
->
ulsch_harq_pdu
.
ulsch_pdu
.
ulsch_pdu_rel8
.
rnti
);
fill_ulsch
(
eNB
,
&
ul_config_pdu
->
ulsch_harq_pdu
.
ulsch_pdu
,
frame
,
subframe
);
handle_ulsch_harq_pdu
(
eNB
,
UE_id
,
ul_config_pdu
,
frame
,
subframe
);
}
}
else
if
(
ul_config_pdu
->
pdu_type
==
NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE
)
{
AssertFatal
((
UE_id
=
find_ulsch
(
ul_config_pdu
->
ulsch_cqi_ri_pdu
.
ulsch_pdu
.
ulsch_pdu_rel8
.
rnti
,
eNB
,
SEARCH_EXIST_OR_FREE
))
>=
0
,
"No available UE ULSCH for rnti %x
\n
"
,
ul_config_pdu
->
ulsch_cqi_ri_pdu
.
ulsch_pdu
.
ulsch_pdu_rel8
.
rnti
);
eNB
,
SEARCH_EXIST_OR_FREE
))
>=
0
,
"No available UE ULSCH for rnti %x
\n
"
,
ul_config_pdu
->
ulsch_cqi_ri_pdu
.
ulsch_pdu
.
ulsch_pdu_rel8
.
rnti
);
fill_ulsch
(
eNB
,
&
ul_config_pdu
->
ulsch_cqi_ri_pdu
.
ulsch_pdu
,
frame
,
subframe
);
handle_ulsch_cqi_ri_pdu
(
eNB
,
UE_id
,
ul_config_pdu
,
frame
,
subframe
);
}
}
else
if
(
ul_config_pdu
->
pdu_type
==
NFAPI_UL_CONFIG_ULSCH_CQI_HARQ_RI_PDU_TYPE
)
{
AssertFatal
((
UE_id
=
find_ulsch
(
ul_config_pdu
->
ulsch_cqi_harq_ri_pdu
.
ulsch_pdu
.
ulsch_pdu_rel8
.
rnti
,
eNB
,
SEARCH_EXIST_OR_FREE
))
>=
0
,
"No available UE ULSCH for rnti %x
\n
"
,
ul_config_pdu
->
ulsch_cqi_harq_ri_pdu
.
ulsch_pdu
.
ulsch_pdu_rel8
.
rnti
);
eNB
,
SEARCH_EXIST_OR_FREE
))
>=
0
,
"No available UE ULSCH for rnti %x
\n
"
,
ul_config_pdu
->
ulsch_cqi_harq_ri_pdu
.
ulsch_pdu
.
ulsch_pdu_rel8
.
rnti
);
fill_ulsch
(
eNB
,
&
ul_config_pdu
->
ulsch_cqi_harq_ri_pdu
.
ulsch_pdu
,
frame
,
subframe
);
handle_ulsch_cqi_harq_ri_pdu
(
eNB
,
UE_id
,
ul_config_pdu
,
frame
,
subframe
);
handle_ulsch_harq_pdu
(
eNB
,
UE_id
,
ul_config_pdu
,
frame
,
subframe
);
}
}
else
if
(
ul_config_pdu
->
pdu_type
==
NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE
)
{
AssertFatal
((
UE_id
=
find_uci
(
ul_config_pdu
->
uci_harq_pdu
.
ue_information
.
ue_information_rel8
.
rnti
,
proc
->
frame_tx
,
proc
->
subframe_tx
,
eNB
,
SEARCH_EXIST_OR_FREE
))
>=
0
,
"No available UE UCI for rnti %x
\n
"
,
ul_config_pdu
->
uci_harq_pdu
.
ue_information
.
ue_information_rel8
.
rnti
);
proc
->
frame_tx
,
proc
->
subframe_tx
,
eNB
,
SEARCH_EXIST_OR_FREE
))
>=
0
,
"No available UE UCI for rnti %x
\n
"
,
ul_config_pdu
->
uci_harq_pdu
.
ue_information
.
ue_information_rel8
.
rnti
);
handle_uci_harq_pdu
(
eNB
,
UE_id
,
ul_config_pdu
,
frame
,
subframe
,
srs_present
);
}
else
if
(
ul_config_pdu
->
pdu_type
==
NFAPI_UL_CONFIG_UCI_CQI_PDU_TYPE
)
{
...
...
@@ -548,14 +532,14 @@ void handle_nfapi_ul_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
}
else
if
(
ul_config_pdu
->
pdu_type
==
NFAPI_UL_CONFIG_UCI_SR_PDU_TYPE
)
{
AssertFatal
((
UE_id
=
find_uci
(
ul_config_pdu
->
uci_sr_pdu
.
ue_information
.
ue_information_rel8
.
rnti
,
proc
->
frame_tx
,
proc
->
subframe_tx
,
eNB
,
SEARCH_EXIST_OR_FREE
))
>=
0
,
"No available UE UCI for rnti %x
\n
"
,
ul_config_pdu
->
uci_sr_pdu
.
ue_information
.
ue_information_rel8
.
rnti
);
proc
->
frame_tx
,
proc
->
subframe_tx
,
eNB
,
SEARCH_EXIST_OR_FREE
))
>=
0
,
"No available UE UCI for rnti %x
\n
"
,
ul_config_pdu
->
uci_sr_pdu
.
ue_information
.
ue_information_rel8
.
rnti
);
handle_uci_sr_pdu
(
eNB
,
UE_id
,
ul_config_pdu
,
frame
,
subframe
,
srs_present
);
}
else
if
(
ul_config_pdu
->
pdu_type
==
NFAPI_UL_CONFIG_UCI_SR_HARQ_PDU_TYPE
)
{
AssertFatal
((
UE_id
=
find_uci
(
rel8
->
rnti
,
proc
->
frame_tx
,
proc
->
subframe_tx
,
eNB
,
SEARCH_EXIST_OR_FREE
))
>=
0
,
"No available UE UCI for rnti %x
\n
"
,
ul_config_pdu
->
uci_sr_harq_pdu
.
ue_information
.
ue_information_rel8
.
rnti
);
"No available UE UCI for rnti %x
\n
"
,
ul_config_pdu
->
uci_sr_harq_pdu
.
ue_information
.
ue_information_rel8
.
rnti
);
handle_uci_sr_harq_pdu
(
eNB
,
UE_id
,
ul_config_pdu
,
frame
,
subframe
,
srs_present
);
}
else
if
(
ul_config_pdu
->
pdu_type
==
NFAPI_UL_CONFIG_SRS_PDU_TYPE
)
{
...
...
@@ -563,9 +547,8 @@ void handle_nfapi_ul_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
}
}
void
schedule_response
(
Sched_Rsp_t
*
Sched_INFO
)
{
void
schedule_response
(
Sched_Rsp_t
*
Sched_INFO
)
{
PHY_VARS_eNB
*
eNB
;
eNB_rxtx_proc_t
*
proc
;
// copy data from L2 interface into L1 structures
...
...
@@ -600,7 +583,6 @@ void schedule_response(Sched_Rsp_t *Sched_INFO) {
uint8_t
number_hi_dci0_pdu
=
HI_DCI0_req
->
hi_dci0_request_body
.
number_of_dci
+
HI_DCI0_req
->
hi_dci0_request_body
.
number_of_hi
;
uint8_t
number_ul_pdu
=
UL_req
->
ul_config_request_body
.
number_of_pdus
;
nfapi_dl_config_request_pdu_t
*
dl_config_pdu
;
nfapi_hi_dci0_request_pdu_t
*
hi_dci0_req_pdu
;
nfapi_ul_config_request_pdu_t
*
ul_config_pdu
;
...
...
@@ -612,18 +594,18 @@ void schedule_response(Sched_Rsp_t *Sched_INFO) {
eNB
->
phich_vars
[
subframe
&
1
].
num_hi
=
0
;
LOG_D
(
PHY
,
"NFAPI: Frame %d, Subframe %d: received %d dl_pdu, %d tx_req, %d hi_dci0_config_req, %d UL_config
\n
"
,
frame
,
subframe
,
number_dl_pdu
,
TX_req
->
tx_request_body
.
number_of_pdus
,
number_hi_dci0_pdu
,
number_ul_pdu
);
frame
,
subframe
,
number_dl_pdu
,
TX_req
->
tx_request_body
.
number_of_pdus
,
number_hi_dci0_pdu
,
number_ul_pdu
);
if
((
subframe_select
(
fp
,
ul_subframe
)
==
SF_UL
)
||
(
fp
->
frame_type
==
FDD
))
{
harq_pid
=
subframe2harq_pid
(
fp
,
ul_frame
,
ul_subframe
);
// clear DCI allocation maps for new subframe
for
(
i
=
0
;
i
<
NUMBER_OF_UE_MAX
;
i
++
)
{
if
(
eNB
->
ulsch
[
i
])
{
ulsch_harq
=
eNB
->
ulsch
[
i
]
->
harq_processes
[
harq_pid
];
ulsch_harq
=
eNB
->
ulsch
[
i
]
->
harq_processes
[
harq_pid
];
ulsch_harq
->
dci_alloc
=
0
;
ulsch_harq
->
rar_alloc
=
0
;
}
...
...
@@ -639,12 +621,12 @@ void schedule_response(Sched_Rsp_t *Sched_INFO) {
break
;
case
NFAPI_DL_CONFIG_BCH_PDU_TYPE
:
AssertFatal
(
dl_config_pdu
->
bch_pdu
.
bch_pdu_rel8
.
pdu_index
<
TX_req
->
tx_request_body
.
number_of_pdus
,
"bch_pdu_rel8.pdu_index>=TX_req->number_of_pdus (%d>%d)
\n
"
,
dl_config_pdu
->
bch_pdu
.
bch_pdu_rel8
.
pdu_index
,
TX_req
->
tx_request_body
.
number_of_pdus
);
"bch_pdu_rel8.pdu_index>=TX_req->number_of_pdus (%d>%d)
\n
"
,
dl_config_pdu
->
bch_pdu
.
bch_pdu_rel8
.
pdu_index
,
TX_req
->
tx_request_body
.
number_of_pdus
);
eNB
->
pbch_configured
=
1
;
handle_nfapi_bch_pdu
(
eNB
,
proc
,
dl_config_pdu
,
TX_req
->
tx_request_body
.
tx_pdu_list
[
dl_config_pdu
->
bch_pdu
.
bch_pdu_rel8
.
pdu_index
].
segments
[
0
].
segment_data
);
TX_req
->
tx_request_body
.
tx_pdu_list
[
dl_config_pdu
->
bch_pdu
.
bch_pdu_rel8
.
pdu_index
].
segments
[
0
].
segment_data
);
break
;
case
NFAPI_DL_CONFIG_MCH_PDU_TYPE
:
// handle_nfapi_mch_dl_pdu(eNB,dl_config_pdu);
...
...
@@ -652,26 +634,26 @@ void schedule_response(Sched_Rsp_t *Sched_INFO) {
case
NFAPI_DL_CONFIG_DLSCH_PDU_TYPE
:
/*
AssertFatal(dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index<TX_req->tx_request_body.number_of_pdus,
"dlsch_pdu_rel8.pdu_index>=TX_req->number_of_pdus (%d>%d)\n",
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index,
TX_req->tx_request_body.number_of_pdus);
"dlsch_pdu_rel8.pdu_index>=TX_req->number_of_pdus (%d>%d)\n",
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index,
TX_req->tx_request_body.number_of_pdus);
*/
AssertFatal
((
dl_config_pdu
->
dlsch_pdu
.
dlsch_pdu_rel8
.
transport_blocks
<
3
)
&&
(
dl_config_pdu
->
dlsch_pdu
.
dlsch_pdu_rel8
.
transport_blocks
>
0
),
"dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks = %d not in [1,2]
\n
"
,
dl_config_pdu
->
dlsch_pdu
.
dlsch_pdu_rel8
.
transport_blocks
);
(
dl_config_pdu
->
dlsch_pdu
.
dlsch_pdu_rel8
.
transport_blocks
>
0
),
"dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks = %d not in [1,2]
\n
"
,
dl_config_pdu
->
dlsch_pdu
.
dlsch_pdu_rel8
.
transport_blocks
);
handle_nfapi_dlsch_pdu
(
eNB
,
proc
,
dl_config_pdu
,
dl_config_pdu
->
dlsch_pdu
.
dlsch_pdu_rel8
.
transport_blocks
-
1
,
TX_req
->
tx_request_body
.
tx_pdu_list
[
dl_config_pdu
->
dlsch_pdu
.
dlsch_pdu_rel8
.
pdu_index
].
segments
[
0
].
segment_data
);
dl_config_pdu
->
dlsch_pdu
.
dlsch_pdu_rel8
.
transport_blocks
-
1
,
TX_req
->
tx_request_body
.
tx_pdu_list
[
dl_config_pdu
->
dlsch_pdu
.
dlsch_pdu_rel8
.
pdu_index
].
segments
[
0
].
segment_data
);
/*
if (dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.rnti == eNB->preamble_list[0].preamble_rel8.rnti) {// is RAR pdu
LOG_D(PHY,"Frame %d, Subframe %d: Received LTE RAR pdu, programming based on UL Grant\n",frame,subframe);
generate_eNB_ulsch_params_from_rar(eNB,
TX_req->tx_request_body.tx_pdu_list[dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index].segments[0].segment_data,
frame,
subframe);
} */
LOG_D(PHY,"Frame %d, Subframe %d: Received LTE RAR pdu, programming based on UL Grant\n",frame,subframe);
generate_eNB_ulsch_params_from_rar(eNB,
TX_req->tx_request_body.tx_pdu_list[dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index].segments[0].segment_data,
frame,
subframe);
} */
break
;
case
NFAPI_DL_CONFIG_PCH_PDU_TYPE
:
// handle_nfapi_pch_pdu(eNB,dl_config_pdu);
...
...
@@ -687,11 +669,11 @@ void schedule_response(Sched_Rsp_t *Sched_INFO) {
break
;
case
NFAPI_DL_CONFIG_MPDCCH_PDU_TYPE
:
handle_nfapi_mpdcch_pdu
(
eNB
,
proc
,
dl_config_pdu
);
eNB
->
mpdcch_vars
[
subframe
&
1
].
num_dci
++
;
eNB
->
mpdcch_vars
[
subframe
&
1
].
num_dci
++
;
break
;
}
}
for
(
i
=
0
;
i
<
number_hi_dci0_pdu
;
i
++
)
{
hi_dci0_req_pdu
=
&
HI_DCI0_req
->
hi_dci0_request_body
.
hi_dci0_pdu_list
[
i
];
...
...
@@ -703,7 +685,7 @@ void schedule_response(Sched_Rsp_t *Sched_INFO) {
case
NFAPI_HI_DCI0_DCI_PDU_TYPE
:
handle_nfapi_hi_dci0_dci_pdu
(
eNB
,
proc
,
hi_dci0_req_pdu
);
eNB
->
pdcch_vars
[
subframe
&
1
].
num_dci
++
;
eNB
->
pdcch_vars
[
subframe
&
1
].
num_dci
++
;
break
;
case
NFAPI_HI_DCI0_HI_PDU_TYPE
:
...
...
@@ -711,20 +693,20 @@ void schedule_response(Sched_Rsp_t *Sched_INFO) {
break
;
}
}
}
for
(
i
=
0
;
i
<
number_ul_pdu
;
i
++
)
{
ul_config_pdu
=
&
UL_req
->
ul_config_request_body
.
ul_config_pdu_list
[
i
];
LOG_D
(
PHY
,
"NFAPI: ul_pdu %d : type %d
\n
"
,
i
,
ul_config_pdu
->
pdu_type
);
AssertFatal
(
ul_config_pdu
->
pdu_type
==
NFAPI_UL_CONFIG_ULSCH_PDU_TYPE
||
ul_config_pdu
->
pdu_type
==
NFAPI_UL_CONFIG_ULSCH_HARQ_PDU_TYPE
||
ul_config_pdu
->
pdu_type
==
NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE
||
ul_config_pdu
->
pdu_type
==
NFAPI_UL_CONFIG_ULSCH_CQI_HARQ_RI_PDU_TYPE
||
ul_config_pdu
->
pdu_type
==
NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE
||
ul_config_pdu
->
pdu_type
==
NFAPI_UL_CONFIG_UCI_SR_PDU_TYPE
||
ul_config_pdu
->
pdu_type
==
NFAPI_UL_CONFIG_UCI_SR_HARQ_PDU_TYPE
,
"Optional UL_PDU type %d not supported
\n
"
,
ul_config_pdu
->
pdu_type
);
ul_config_pdu
->
pdu_type
==
NFAPI_UL_CONFIG_ULSCH_HARQ_PDU_TYPE
||
ul_config_pdu
->
pdu_type
==
NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE
||
ul_config_pdu
->
pdu_type
==
NFAPI_UL_CONFIG_ULSCH_CQI_HARQ_RI_PDU_TYPE
||
ul_config_pdu
->
pdu_type
==
NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE
||
ul_config_pdu
->
pdu_type
==
NFAPI_UL_CONFIG_UCI_SR_PDU_TYPE
||
ul_config_pdu
->
pdu_type
==
NFAPI_UL_CONFIG_UCI_SR_HARQ_PDU_TYPE
,
"Optional UL_PDU type %d not supported
\n
"
,
ul_config_pdu
->
pdu_type
);
handle_nfapi_ul_pdu
(
eNB
,
proc
,
ul_config_pdu
,
UL_req
->
sfn_sf
>>
4
,
UL_req
->
sfn_sf
&
0xf
,
UL_req
->
ul_config_request_body
.
srs_present
);
}
}
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