Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
O
OpenXG UE
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Analytics
Analytics
CI / CD
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
OpenXG
OpenXG UE
Commits
c35d315b
Commit
c35d315b
authored
Aug 09, 2018
by
Calvin HSU
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
UE: Add frequency domain resource in type0-pdcch and new field rb_offset
parent
0725674d
Changes
4
Show whitespace changes
Inline
Side-by-side
Showing
4 changed files
with
23 additions
and
10 deletions
+23
-10
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
+4
-2
openair1/PHY/defs_nr_UE.h
openair1/PHY/defs_nr_UE.h
+1
-1
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
+7
-5
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+11
-2
No files found.
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
View file @
c35d315b
...
...
@@ -115,8 +115,10 @@ typedef struct {
typedef
struct
{
/// frequency_domain_resource;
uint32_t
rb_start
;
uint32_t
rb_end
;
//uint32_t rb_start;
//uint32_t rb_end;
uint64_t
frequency_domain_resource
;
uint16_t
rb_offset
;
uint8_t
duration
;
uint8_t
cce_reg_mapping_type
;
// interleaved or noninterleaved
...
...
openair1/PHY/defs_nr_UE.h
View file @
c35d315b
...
...
@@ -774,7 +774,7 @@ typedef struct {
int
tciStatesPDCCH
;
int
tciPresentInDCI
;
uint16_t
pdcchDMRSScramblingID
;
uint16_t
rb_offset
;
}
NR_UE_PDCCH_CORESET
;
// Slots for PDCCH Monitoring configured as periodicity and offset
...
...
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
View file @
c35d315b
...
...
@@ -68,16 +68,18 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
pdcch_vars2
->
searchSpace
[
i
].
nrofCandidates_aggrlevel16
=
dci_config
->
number_of_candidates
[
4
];
pdcch_vars2
->
coreset
[
i
].
duration
=
dci_config
->
coreset
.
duration
;
//pdcch_vars2->coreset[i].frequencyDomainResources;
//dci_config.coreset.rb_start
;
//dci_config.coreset.rb_end
;
pdcch_vars2
->
coreset
[
i
].
frequencyDomainResources
=
dci_config
.
coreset
.
frequency_domain_resource
;
pdcch_vars2
->
coreset
[
i
].
rb_offset
=
dci_config
.
coreset
.
rb_offset
;
if
(
dci_config
->
coreset
.
cce_reg_mapping_type
==
CCE_REG_MAPPING_TYPE_INTERLEAVED
){
pdcch_vars2
->
coreset
[
i
].
cce_reg_mappingType
.
shiftIndex
=
dci_config
->
coreset
.
cce_reg_interleaved_shift_index
;
pdcch_vars2
->
coreset
[
i
].
cce_reg_mappingType
.
reg_bundlesize
=
dci_config
->
coreset
.
cce_reg_interleaved_reg_bundle_size
;
pdcch_vars2
->
coreset
[
i
].
cce_reg_mappingType
.
interleaversize
=
dci_config
->
coreset
.
cce_reg_interleaved_interleaver_size
;
}
else
{
;
}
else
{
//CCE_REG_MAPPING_TYPE_NON_INTERLEAVED
pdcch_vars2
->
coreset
[
i
].
cce_reg_mappingType
.
shiftIndex
=
0
;
pdcch_vars2
->
coreset
[
i
].
cce_reg_mappingType
.
reg_bundlesize
=
0
;
pdcch_vars2
->
coreset
[
i
].
cce_reg_mappingType
.
interleaversize
=
0
;
}
pdcch_vars2
->
coreset
[
i
].
precoderGranularity
=
dci_config
->
coreset
.
precoder_granularity
;
...
...
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @
c35d315b
...
...
@@ -236,8 +236,17 @@ int8_t nr_ue_decode_mib(
//uint32_t cell_id = 0; // obtain from L1 later
mac
->
type0_pdcch_dci_config
.
coreset
.
rb_start
=
rb_offset
;
mac
->
type0_pdcch_dci_config
.
coreset
.
rb_end
=
rb_offset
+
num_rbs
-
1
;
//mac->type0_pdcch_dci_config.coreset.rb_start = rb_offset;
//mac->type0_pdcch_dci_config.coreset.rb_end = rb_offset + num_rbs - 1;
uint64_t
mask
=
0x0
;
uint8_t
i
;
for
(
i
=
0
;
i
<
(
num_rbs
/
6
);
++
i
){
// 38.331 Each bit corresponds a group of 6 RBs
mask
=
mask
>>
1
;
mask
=
mask
|
0x100000000000
;
}
mac
->
type0_pdcch_dci_config
.
coreset
.
frequency_domain_resource
=
mask
;
mac
->
type0_pdcch_dci_config
.
coreset
.
rb_offset
=
rb_offset
;
// additional parameter other than coreset
//mac->type0_pdcch_dci_config.type0_pdcch_coreset.duration = num_symbols;
mac
->
type0_pdcch_dci_config
.
coreset
.
cce_reg_mapping_type
=
CCE_REG_MAPPING_TYPE_INTERLEAVED
;
mac
->
type0_pdcch_dci_config
.
coreset
.
cce_reg_interleaved_reg_bundle_size
=
6
;
// L 38.211 7.3.2.2
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment