Commit f9ea5d62 authored by Louis Adrien Dufrene's avatar Louis Adrien Dufrene

Add dci0_ongoing_timer. Commit to build and test.

parent e4bc693e
...@@ -1062,6 +1062,7 @@ void eNB_Config_Local_DRX( ...@@ -1062,6 +1062,7 @@ void eNB_Config_Local_DRX(
UE_scheduling_control->cdrx_configured = FALSE; // will be set to true when ACK is received UE_scheduling_control->cdrx_configured = FALSE; // will be set to true when ACK is received
UE_scheduling_control->cdrx_waiting_ack = TRUE; // set to true first, waiting for the UE to configure CDRX on its side UE_scheduling_control->cdrx_waiting_ack = TRUE; // set to true first, waiting for the UE to configure CDRX on its side
UE_scheduling_control->in_active_time = FALSE; UE_scheduling_control->in_active_time = FALSE;
UE_scheduling_control->dci0_ongoing_timer = 0;
UE_scheduling_control->on_duration_timer = 0; UE_scheduling_control->on_duration_timer = 0;
switch (drx_Configuration->choice.setup.onDurationTimer) { switch (drx_Configuration->choice.setup.onDurationTimer) {
......
...@@ -790,7 +790,7 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -790,7 +790,7 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP,
active_time_condition = 1; active_time_condition = 1;
} else if ((UE_scheduling_control->on_duration_timer > 0) && (active_time_condition == 0)) { } else if ((UE_scheduling_control->on_duration_timer > 0) && (active_time_condition == 0)) {
active_time_condition = 3; active_time_condition = 3;
} else if ((UE_scheduling_control->drx_inactivity_timer > 0) && (active_time_condition == 0)) { } else if ((UE_scheduling_control->drx_inactivity_timer > 1) && (active_time_condition == 0)) {
active_time_condition = 4; active_time_condition = 4;
} }
...@@ -798,6 +798,15 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -798,6 +798,15 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP,
} }
/* END VCD */ /* END VCD */
/* DCI0 ongoing timer */
if (UE_scheduling_control->dci0_ongoing_timer > 1) {
UE_scheduling_control->dci0_ongoing_timer++;
if (UE_scheduling_control->dci0_ongoing_timer > 3) {
UE_scheduling_control->dci0_ongoing_timer = 0;
}
}
} else { // else: CDRX not configured } else { // else: CDRX not configured
/* Note: (UL) HARQ RTT timers processing is done here and can be used by other features than CDRX */ /* Note: (UL) HARQ RTT timers processing is done here and can be used by other features than CDRX */
/* HARQ RTT timers */ /* HARQ RTT timers */
......
...@@ -4948,8 +4948,21 @@ SR_indication(module_id_t mod_idP, ...@@ -4948,8 +4948,21 @@ SR_indication(module_id_t mod_idP,
T_INT(rntiP)); T_INT(rntiP));
int UE_id = find_UE_id(mod_idP, rntiP); int UE_id = find_UE_id(mod_idP, rntiP);
UE_list_t *UE_list = &RC.mac[mod_idP]->UE_list; UE_list_t *UE_list = &RC.mac[mod_idP]->UE_list;
UE_sched_ctrl *UE_scheduling_ctrl = NULL;
if (UE_id != -1) { if (UE_id != -1) {
UE_scheduling_ctrl = &(UE_list->UE_sched_ctrl[UE_id]);
if ((UE_scheduling_ctrl->cdrx_configured == TRUE) && (UE_scheduling_ctrl->dci0_ongoing_timer > 0)) {
LOG_D(MAC, "[eNB %d][SR %x] Frame %d subframeP %d Signaling SR for UE %d on CC_id %d. \
The SR is not set do to ongoing DCI0 with CDRX activated\n",
mod_idP,
rntiP,
frameP,
subframeP,
UE_id,
cc_idP);)
} else {
if (mac_eNB_get_rrc_status(mod_idP, UE_RNTI(mod_idP, UE_id)) < RRC_CONNECTED) { if (mac_eNB_get_rrc_status(mod_idP, UE_RNTI(mod_idP, UE_id)) < RRC_CONNECTED) {
LOG_D(MAC, "[eNB %d][SR %x] Frame %d subframeP %d Signaling SR for UE %d on CC_id %d\n", LOG_D(MAC, "[eNB %d][SR %x] Frame %d subframeP %d Signaling SR for UE %d on CC_id %d\n",
mod_idP, mod_idP,
...@@ -4963,6 +4976,7 @@ SR_indication(module_id_t mod_idP, ...@@ -4963,6 +4976,7 @@ SR_indication(module_id_t mod_idP,
UE_list->UE_template[cc_idP][UE_id].ul_active = TRUE; UE_list->UE_template[cc_idP][UE_id].ul_active = TRUE;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_SR_INDICATION, 1); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_SR_INDICATION, 1);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_SR_INDICATION, 0); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_SR_INDICATION, 0);
}
} else { } else {
LOG_D(MAC, "[eNB %d][SR %x] Frame %d subframeP %d Signaling SR for UE %d (unknown UE_id) on CC_id %d\n", LOG_D(MAC, "[eNB %d][SR %x] Frame %d subframeP %d Signaling SR for UE %d (unknown UE_id) on CC_id %d\n",
mod_idP, mod_idP,
...@@ -4972,6 +4986,7 @@ SR_indication(module_id_t mod_idP, ...@@ -4972,6 +4986,7 @@ SR_indication(module_id_t mod_idP,
UE_id, UE_id,
cc_idP); cc_idP);
} }
return; return;
} }
......
...@@ -1653,6 +1653,8 @@ schedule_ulsch_rnti(module_id_t module_idP, ...@@ -1653,6 +1653,8 @@ schedule_ulsch_rnti(module_id_t module_idP,
if (UE_sched_ctrl_ptr->cdrx_configured) { if (UE_sched_ctrl_ptr->cdrx_configured) {
UE_sched_ctrl_ptr->drx_inactivity_timer = 1; // reset drx inactivity timer when new transmission UE_sched_ctrl_ptr->drx_inactivity_timer = 1; // reset drx inactivity timer when new transmission
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_DRX_INACTIVITY, (unsigned long) UE_sched_ctrl_ptr->drx_inactivity_timer); VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_DRX_INACTIVITY, (unsigned long) UE_sched_ctrl_ptr->drx_inactivity_timer);
UE_sched_ctrl_ptr->dci0_ongoing_timer = 1; // when set the UE_template_ptr->ul_SR cannot be set to 1,
// see definition for more information
} }
if (UE_template_ptr->pre_allocated_rb_table_index_ul >= 0) { if (UE_template_ptr->pre_allocated_rb_table_index_ul >= 0) {
......
...@@ -1007,7 +1007,7 @@ typedef struct { ...@@ -1007,7 +1007,7 @@ typedef struct {
uint8_t ul_synchronous_harq_timer[NFAPI_CC_MAX][8]; // These timers are used for UL synchronous HARQ processes uint8_t ul_synchronous_harq_timer[NFAPI_CC_MAX][8]; // These timers are used for UL synchronous HARQ processes
/* C-DRX related timers */ /* C-DRX related timers */
/* Note: only valid for FDD when this comment is written (11-01-19)*/ /* Note: only valid for FDD and LTE UE when this comment is written (11-01-19)*/
/// is TRUE if the cqi mask feature is activated by RRC configuration /// is TRUE if the cqi mask feature is activated by RRC configuration
boolean_t cqi_mask_boolean; boolean_t cqi_mask_boolean;
/// is TRUE if the following drx parameters are configured for UE /// is TRUE if the following drx parameters are configured for UE
...@@ -1018,6 +1018,13 @@ typedef struct { ...@@ -1018,6 +1018,13 @@ typedef struct {
* configured on the eNB side, but not yet on the UE side... * configured on the eNB side, but not yet on the UE side...
*/ */
boolean_t cdrx_waiting_ack; boolean_t cdrx_waiting_ack;
/*
* Is set when a ULSCH scheduling is done and run until the first corresponding transmission is done (4 subframes).
* When set, SR cannot be set for the UE. This allows OAI to avoid concidering a SR as uncompleted if the UE sends
* a SR just after a periodic DCI0 ULSCH scheduling. Without CDRX there is no problem, but with CDRX this case would
* create a lost in timers synchronization.
*/
uint8_t dci0_ongoing_timer;
/// is TRUE if the UE is in "Active Time", hence listening to PDCCH /// is TRUE if the UE is in "Active Time", hence listening to PDCCH
boolean_t in_active_time; boolean_t in_active_time;
/// OnDurationTimer /// OnDurationTimer
......
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