Commit fbb5baca authored by Florian Kaltenberger's avatar Florian Kaltenberger

adding nr_ue_scheduled_response to UE and fixed paramters in nr_ue_dcireq. Now...

adding nr_ue_scheduled_response to UE and fixed paramters in nr_ue_dcireq. Now DCI decoded again by UE.
parent 1db92898
...@@ -268,11 +268,11 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq) { ...@@ -268,11 +268,11 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq) {
// Type0 PDCCH search space // Type0 PDCCH search space
dl_config->number_pdus = 1; dl_config->number_pdus = 1;
dl_config->dl_config_list[0].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI; dl_config->dl_config_list[0].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI;
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.rnti = 0; // to be set dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.rnti = 0xaaaa; // to be set
uint64_t mask = 0x0; uint64_t mask = 0x0;
uint16_t num_rbs=24; uint16_t num_rbs=48;
uint16_t rb_offset=0; uint16_t rb_offset=47;
uint16_t cell_id=0; uint16_t cell_id=0;
uint16_t num_symbols=2; uint16_t num_symbols=2;
for(int i=0; i<(num_rbs/6); ++i){ // 38.331 Each bit corresponds a group of 6 RBs for(int i=0; i<(num_rbs/6); ++i){ // 38.331 Each bit corresponds a group of 6 RBs
...@@ -292,7 +292,7 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq) { ...@@ -292,7 +292,7 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq) {
uint32_t number_of_search_space_per_slot=1; uint32_t number_of_search_space_per_slot=1;
uint32_t first_symbol_index=0; uint32_t first_symbol_index=0;
uint32_t search_space_duration=0; // element of search space uint32_t search_space_duration=1; // element of search space
uint32_t coreset_duration; // element of coreset uint32_t coreset_duration; // element of coreset
coreset_duration = num_symbols * number_of_search_space_per_slot; coreset_duration = num_symbols * number_of_search_space_per_slot;
......
...@@ -1286,7 +1286,7 @@ static void* ru_thread_tx( void* param ) { ...@@ -1286,7 +1286,7 @@ static void* ru_thread_tx( void* param ) {
gNB_L1_rxtx_proc_t *L1_proc; gNB_L1_rxtx_proc_t *L1_proc;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms; NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
char filename[40]; char filename[40];
int print_frame = 2; int print_frame = 8;
int i = 0; int i = 0;
cpu_set_t cpuset; cpu_set_t cpuset;
...@@ -1403,7 +1403,7 @@ static void* ru_thread( void* param ) { ...@@ -1403,7 +1403,7 @@ static void* ru_thread( void* param ) {
int slot = fp->slots_per_frame-1; int slot = fp->slots_per_frame-1;
int frame =1023; int frame =1023;
char filename[40]; char filename[40];
int print_frame = 2; int print_frame = 8;
int i = 0; int i = 0;
// set default return value // set default return value
......
...@@ -673,6 +673,8 @@ static void *UE_thread_rxn_txnp4(void *arg) { ...@@ -673,6 +673,8 @@ static void *UE_thread_rxn_txnp4(void *arg) {
// pickTime(current); // pickTime(current);
// updateTimes(proc->gotIQs, &t2, 10000, "Delay to wake up UE_Thread_Rx (case 2)"); // updateTimes(proc->gotIQs, &t2, 10000, "Delay to wake up UE_Thread_Rx (case 2)");
// Process Rx data for one sub-frame // Process Rx data for one sub-frame
if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_DOWNLINK_SLOT) { if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_DOWNLINK_SLOT) {
...@@ -689,6 +691,10 @@ static void *UE_thread_rxn_txnp4(void *arg) { ...@@ -689,6 +691,10 @@ static void *UE_thread_rxn_txnp4(void *arg) {
UE->dcireq.slot = proc->nr_tti_rx; UE->dcireq.slot = proc->nr_tti_rx;
nr_ue_dcireq(&UE->dcireq); //to be replaced with function pointer later nr_ue_dcireq(&UE->dcireq); //to be replaced with function pointer later
NR_UE_MAC_INST_t *UE_mac = get_mac_inst(0);
UE_mac->scheduled_response.dl_config = &UE->dcireq.dl_config_req;
nr_ue_scheduled_response(&UE_mac->scheduled_response);
#ifdef UE_SLOT_PARALLELISATION #ifdef UE_SLOT_PARALLELISATION
phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL ); phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
#else #else
...@@ -707,68 +713,17 @@ static void *UE_thread_rxn_txnp4(void *arg) { ...@@ -707,68 +713,17 @@ static void *UE_thread_rxn_txnp4(void *arg) {
// trigger L2 to run ue_scheduler thru IF module // trigger L2 to run ue_scheduler thru IF module
// [TODO] mapping right after NR initial sync // [TODO] mapping right after NR initial sync
if(1)
if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL){ if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL){
UE->ul_indication.module_id = 0; UE->ul_indication.module_id = 0;
UE->ul_indication.gNB_index = 0; UE->ul_indication.gNB_index = 0;
UE->ul_indication.cc_id = 0; UE->ul_indication.cc_id = 0;
UE->ul_indication.slot = 0; // to be fill
UE->ul_indication.frame = 0; // to be fill
// [TODO] mapping right after NR initial sync
UE->ul_indication.frame = proc->frame_rx; UE->ul_indication.frame = proc->frame_rx;
UE->ul_indication.slot = proc->nr_tti_rx; UE->ul_indication.slot = proc->nr_tti_rx;
UE->if_inst->ul_indication(&UE->ul_indication); UE->if_inst->ul_indication(&UE->ul_indication);
} }
#ifdef NEW_MAC
ret = mac_xface->ue_scheduler(UE->Mod_id,
proc->frame_rx,
proc->subframe_rx,
proc->nr_tti_rx,
proc->frame_tx,
proc->subframe_tx,
proc->nr_tti_tx%(UE->frame_parms.ttis_per_subframe),
#ifndef NO_RAT_NR
slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx),
#else
subframe_select(&UE->frame_parms,proc->subframe_tx),
#endif
0,
0/*FIXME CC_id*/);
#endif
/*#else
ret = mac_xface->ue_scheduler(UE->Mod_id,
proc->frame_rx,
proc->subframe_rx,
proc->frame_tx,
proc->subframe_tx,
subframe_select(&UE->frame_parms,proc->subframe_tx),
0, */
// 0/*FIXME CC_id*/);
//#endif
if ( ret != CONNECTION_OK) {
char *txt;
switch (ret) {
case CONNECTION_LOST:
txt="RRC Connection lost, returning to PRACH";
break;
case PHY_RESYNCH:
txt="RRC Connection lost, trying to resynch";
break;
case RESYNCH:
txt="return to PRACH and perform a contention-free access";
break;
default:
txt="UNKNOWN RETURN CODE";
};
LOG_E( PHY, "[UE %"PRIu8"] Frame %"PRIu32", subframe %u %s\n",
UE->Mod_id, proc->frame_rx, proc->subframe_tx,txt );
}
} }
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
stop_meas(&UE->generic_stat); stop_meas(&UE->generic_stat);
#endif #endif
...@@ -1133,22 +1088,40 @@ void *UE_thread(void *arg) { ...@@ -1133,22 +1088,40 @@ void *UE_thread(void *arg) {
} }
proc->subframe_tx=proc->nr_tti_tx; proc->subframe_tx=proc->nr_tti_tx;
if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_DOWNLINK_SLOT) {
//clean previous FAPI MESSAGE
UE->rx_ind.number_pdus = 0;
UE->dci_ind.number_of_dcis = 0;
//clean previous FAPI MESSAGE
// call L2 for DL_CONFIG (DCI)
UE->dcireq.module_id = UE->Mod_id;
UE->dcireq.gNB_index = 0;
UE->dcireq.cc_id = 0;
UE->dcireq.frame = proc->frame_rx;
UE->dcireq.slot = proc->nr_tti_rx;
nr_ue_dcireq(&UE->dcireq); //to be replaced with function pointer later
NR_UE_MAC_INST_t *UE_mac = get_mac_inst(0);
UE_mac->scheduled_response.dl_config = &UE->dcireq.dl_config_req;
nr_ue_scheduled_response(&UE_mac->scheduled_response);
printf("Processing subframe %d\n",proc->subframe_rx); printf("Processing subframe %d\n",proc->subframe_rx);
phy_procedures_nrUE_RX( UE, proc, 0, 1, UE->mode);
}
if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL){ if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL){
UE->ul_indication.module_id = 0; UE->ul_indication.module_id = 0;
UE->ul_indication.gNB_index = 0; UE->ul_indication.gNB_index = 0;
UE->ul_indication.cc_id = 0; UE->ul_indication.cc_id = 0;
UE->ul_indication.slot = 0; // to be fill
UE->ul_indication.frame = 0; // to be fill
// [TODO] mapping right after NR initial sync
UE->ul_indication.frame = proc->frame_rx; UE->ul_indication.frame = proc->frame_rx;
UE->ul_indication.slot = proc->nr_tti_rx; UE->ul_indication.slot = proc->nr_tti_rx;
UE->if_inst->ul_indication(&UE->ul_indication); UE->if_inst->ul_indication(&UE->ul_indication);
} }
phy_procedures_nrUE_RX( UE, proc, 0, 1, UE->mode);
getchar(); getchar();
} // else loop_through_memory } // else loop_through_memory
} // start_rx_stream==1 } // start_rx_stream==1
......
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