Commit 156defcd authored by cig's avatar cig

Fixes RAR generation, reception

parent 986b5fb2
...@@ -1321,7 +1321,7 @@ void ulsch_common_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_ ...@@ -1321,7 +1321,7 @@ void ulsch_common_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_
#endif #endif
UE_MODE_t get_nrUE_mode(uint8_t Mod_id,uint8_t CC_id,uint8_t gNB_id){ // TBR generate enum for NR UE_MODE_t get_nrUE_mode(uint8_t Mod_id,uint8_t CC_id,uint8_t gNB_id){
return(PHY_vars_UE_g[Mod_id][CC_id]->UE_mode[gNB_id]); return(PHY_vars_UE_g[Mod_id][CC_id]->UE_mode[gNB_id]);
} }
...@@ -3152,19 +3152,47 @@ void nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB ...@@ -3152,19 +3152,47 @@ void nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB
} }
} }
// WIP TBR fix:
// - time domain indication hardcoded to 0 for k2 offset
// - extend TS 38.213 ch 8.3 Msg3 PUSCH
// - b buffer
// - ulsch power offset
// - UE_mode == PUSCH case (should be handled by TA updates)
// - harq
// - optimize: mu_pusch, j and table_6_1_2_1_1_2_time_dom_res_alloc_A are already defined in nr_ue_procedures
void nr_process_rar(nr_downlink_indication_t *dl_info) { void nr_process_rar(nr_downlink_indication_t *dl_info) {
module_id_t module_id = dl_info->module_id; module_id_t module_id = dl_info->module_id;
int cc_id = dl_info->cc_id, frame_rx = dl_info->proc->frame_rx, nr_tti_rx = dl_info->proc->nr_tti_rx, ta_command, harq_pid = 0; int cc_id = dl_info->cc_id, frame_rx = dl_info->proc->frame_rx, nr_tti_rx = dl_info->proc->nr_tti_rx, ta_command, k2, delta;
uint8_t gNB_index = dl_info->gNB_index, *rar; uint8_t gNB_index = dl_info->gNB_index, *rar;
fapi_nr_dci_indication_t *dci_ind = dl_info->dci_ind; fapi_nr_dci_indication_t *dci_ind = dl_info->dci_ind;
PHY_VARS_NR_UE *ue = PHY_vars_UE_g[module_id][cc_id]; PHY_VARS_NR_UE *ue = PHY_vars_UE_g[module_id][cc_id];
NR_UE_DLSCH_t *dlsch0 = ue->dlsch_ra[gNB_index]; NR_UE_DLSCH_t *dlsch0 = ue->dlsch_ra[gNB_index];
UE_MODE_t UE_mode = ue->UE_mode[gNB_index]; UE_MODE_t UE_mode = ue->UE_mode[gNB_index];
NR_PRACH_RESOURCES_t *prach_resources = ue->prach_resources[gNB_index]; NR_PRACH_RESOURCES_t *prach_resources = ue->prach_resources[gNB_index];
uint16_t slots_per_frame = ue->frame_parms.slots_per_frame;
uint8_t next1_thread_id = ue->current_thread_id[nr_tti_rx]== (RX_NB_TH-1) ? 0:(ue->current_thread_id[nr_tti_rx]+1); // TBR double check uint8_t mu_pusch = 1;
uint8_t next2_thread_id = next1_thread_id== (RX_NB_TH-1) ? 0:(next1_thread_id+1); // TBR double check // definition table j Table 6.1.2.1.1-4
uint8_t j = (mu_pusch==3)?3:(mu_pusch==2)?2:1;
uint8_t table_6_1_2_1_1_2_time_dom_res_alloc_A[16][3]={ // for PUSCH from TS 38.214 subclause 6.1.2.1.1
{j, 0,14}, // row index 1
{j, 0,12}, // row index 2
{j, 0,10}, // row index 3
{j, 2,10}, // row index 4
{j, 4,10}, // row index 5
{j, 4,8}, // row index 6
{j, 4,6}, // row index 7
{j+1,0,14}, // row index 8
{j+1,0,12}, // row index 9
{j+1,0,10}, // row index 10
{j+2,0,14}, // row index 11
{j+2,0,12}, // row index 12
{j+2,0,10}, // row index 13
{j, 8,6}, // row index 14
{j+3,0,14}, // row index 15
{j+3,0,10} // row index 16
};
LOG_D(PHY,"[UE %d][RAPROC] Frame %d subframe %d Received RAR mode %d\n", module_id, frame_rx, nr_tti_rx, UE_mode); LOG_D(PHY,"[UE %d][RAPROC] Frame %d subframe %d Received RAR mode %d\n", module_id, frame_rx, nr_tti_rx, UE_mode);
...@@ -3173,66 +3201,75 @@ void nr_process_rar(nr_downlink_indication_t *dl_info) { ...@@ -3173,66 +3201,75 @@ void nr_process_rar(nr_downlink_indication_t *dl_info) {
LOG_D(PHY,"[UE %d][RAPROC] Frame %d subframe %d Invoking MAC for RAR (current preamble %d)\n", module_id, frame_rx, nr_tti_rx, prach_resources->ra_PreambleIndex); LOG_D(PHY,"[UE %d][RAPROC] Frame %d subframe %d Invoking MAC for RAR (current preamble %d)\n", module_id, frame_rx, nr_tti_rx, prach_resources->ra_PreambleIndex);
// TBR double check ta_command = nr_ue_process_rar(ue->Mod_id,
// fix crnti cc_id,
// ta_command = nr_ue_process_rar(ue->Mod_id, frame_rx,
// cc_id, dlsch0->harq_processes[0]->b,
// frame_rx, &ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][gNB_index]->pdcch_config[0].rnti,
// prach_resources->ra_RNTI, prach_resources->ra_PreambleIndex,
// dlsch0->harq_processes[0]->b, dlsch0->harq_processes[0]->b); // alter the 'b' buffer so it contains only the selected RAR header and RAR payload
// &ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][gNB_index]->crnti,
// prach_resources->ra_PreambleIndex,
// dlsch0->harq_processes[0]->b); // alter the 'b' buffer so it contains only the selected RAR header and RAR payload
// ue->pdcch_vars[next1_thread_id][gNB_index]->crnti = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][gNB_index]->crnti;
// ue->pdcch_vars[next2_thread_id][gNB_index]->crnti = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][gNB_index]->crnti;
// TBR double check
if (ta_command != 0xffff) { if (ta_command != 0xffff) {
// LOG_D(PHY,"[UE %d][RAPROC] Frame %d subframe %d Got rnti %x and timing advance %d from RAR\n", LOG_D(PHY,"[UE %d][RAPROC] Frame %d subframe %d Got Temporary C-RNTI %x and timing advance %d from RAR\n",
// ue->Mod_id, ue->Mod_id,
// frame_rx, frame_rx,
// nr_tti_rx, nr_tti_rx,
// ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][gNB_index]->crnti, ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][gNB_index]->pdcch_config[0].rnti,
// ta_command); ta_command);
// fix TBR : C-RNTI is still a TC-RNTI
// ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][gNB_index]->crnti_is_temporary = 1;
nr_process_timing_advance_rar(ue, dl_info->proc, ta_command); nr_process_timing_advance_rar(ue, dl_info->proc, ta_command);
if (UE_mode != debug_prach) { if (UE_mode != debug_prach) {
ue->ulsch_Msg3_active[gNB_index] = 1; ue->ulsch_Msg3_active[gNB_index] = 1;
// nr_get_Msg3_alloc(&ue->frame_parms, // TS 38.213 ch 8.3 Msg3 PUSCH
// nr_tti_rx, // PUSCH time domain resource allocation A for normal CP
// frame_rx, // TS 38.214 ch 6.1.2.1.1
// &ue->ulsch_Msg3_frame[gNB_index], k2 = table_6_1_2_1_1_2_time_dom_res_alloc_A[0][0];
// &ue->ulsch_Msg3_subframe[gNB_index]); // TBR switch (mu_pusch) {
case 0:
delta = 2;
break;
case 1:
delta = 3;
break;
case 2:
delta = 4;
break;
case 3:
delta = 6;
break;
}
ue->ulsch_Msg3_subframe[gNB_index] = (nr_tti_rx + k2 + delta) % slots_per_frame;
if (nr_tti_rx + k2 + delta > slots_per_frame){
ue->ulsch_Msg3_frame[gNB_index] = (frame_rx + 1) % 1024;
} else {
ue->ulsch_Msg3_frame[gNB_index] = frame_rx;
}
LOG_D(PHY,"[UE %d][RAPROC] Got Msg3_alloc Frame %d subframe %d: Msg3_frame %d, Msg3_subframe %d\n", LOG_D(PHY,"[UE %d][RAPROC] Got Msg3_alloc Frame %d subframe %d: Msg3_frame %d, Msg3_subframe %d\n",
ue->Mod_id, ue->Mod_id,
frame_rx, frame_rx,
nr_tti_rx, nr_tti_rx,
ue->ulsch_Msg3_frame[gNB_index], ue->ulsch_Msg3_frame[gNB_index],
ue->ulsch_Msg3_subframe[gNB_index]); ue->ulsch_Msg3_subframe[gNB_index]);
// todo TBR
// harq_pid = subframe2harq_pid(&ue->frame_parms, // harq_pid = subframe2harq_pid(&ue->frame_parms,
// ue->ulsch_Msg3_frame[gNB_index], // ue->ulsch_Msg3_frame[gNB_index],
// ue->ulsch_Msg3_subframe[gNB_index]); // ue->ulsch_Msg3_subframe[gNB_index]);
// ue->ulsch[gNB_index]->harq_processes[harq_pid]->round = 0; // ue->ulsch[gNB_index]->harq_processes[harq_pid]->round = 0;
// ue->UE_mode[gNB_index] = RA_RESPONSE;
// ue->Msg3_timer[gNB_index] = 10; // ue->Msg3_timer[gNB_index] = 10;
// ue->ulsch[gNB_index].power_offset = 6; // ue->ulsch[gNB_index].power_offset = 6;
// ue->ulsch_no_allocation_counter[gNB_index] = 0; // ue->ulsch_no_allocation_counter[gNB_index] = 0;
ue->UE_mode[gNB_index] = RA_RESPONSE;
}
} else {
LOG_W(PHY,"[UE %d][RAPROC] Received RAR preamble (%d) doesn't match !!!\n", ue->Mod_id, prach_resources->ra_PreambleIndex);
} }
} else { // PRACH preamble doesn't match RAR
LOG_W(PHY,"[UE %d][RAPROC] Received RAR preamble (%d) doesn't match !!!\n",
ue->Mod_id,
prach_resources->ra_PreambleIndex);
} }
} // mode != PUSCH
} else { } else {
rar = dlsch0->harq_processes[0]->b+1; // rar = dlsch0->harq_processes[0]->b+1;
ta_command = ((((uint16_t)(rar[0]&0x7f))<<4) + (rar[1]>>4)); // ta_command = ((((uint16_t)(rar[0]&0x7f))<<4) + (rar[1]>>4));
nr_process_timing_advance_rar(ue, dl_info->proc, ta_command); // nr_process_timing_advance_rar(ue, dl_info->proc, ta_command);
} }
} }
...@@ -4468,7 +4505,6 @@ void nr_ue_prach_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t ...@@ -4468,7 +4505,6 @@ void nr_ue_prach_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t
uint16_t preamble_tx = 50, pathloss; uint16_t preamble_tx = 50, pathloss;
NR_PRACH_RESOURCES_t prach_resources; NR_PRACH_RESOURCES_t prach_resources;
uint8_t mod_id = ue->Mod_id; uint8_t mod_id = ue->Mod_id;
NR_UE_MAC_INST_t *nr_UE_mac_inst = get_mac_inst(mod_id);
UE_MODE_t UE_mode = get_nrUE_mode(mod_id, ue->CC_id, gNB_id); UE_MODE_t UE_mode = get_nrUE_mode(mod_id, ue->CC_id, gNB_id);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX_PRACH, VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX_PRACH, VCD_FUNCTION_IN);
......
...@@ -147,14 +147,21 @@ typedef struct { ...@@ -147,14 +147,21 @@ typedef struct {
// uint8_t payload[RAR_PAYLOAD_SIZE_MAX]; // uint8_t payload[RAR_PAYLOAD_SIZE_MAX];
// } __attribute__ ((__packed__)) RAR_PDU; // } __attribute__ ((__packed__)) RAR_PDU;
/*!\brief MAC header of Random Access Response for Random access preamble identifier (RAPID) */ //* RAR MAC subheader // TS 38.321 ch. 6.1.5, 6.2.2 *//
// - E: The Extension field is a flag indicating if the MAC subPDU including this MAC subheader is the last MAC subPDU or not in the MAC PDU
// - T: The Type field is a flag indicating whether the MAC subheader contains a Random Access Preamble ID or a Backoff Indicator (0, BI) (1, RAPID)
// - R: Reserved bit, set to "0"
// - BI: The Backoff Indicator field identifies the overload condition in the cell.
// - RAPID: The Random Access Preamble IDentifier field identifies the transmitted Random Access Preamble
/*!\brief RAR MAC subheader with RAPID */
typedef struct { typedef struct {
uint8_t RAPID:6; uint8_t RAPID:6;
uint8_t T:1; uint8_t T:1;
uint8_t E:1; uint8_t E:1;
} __attribute__ ((__packed__)) NR_RA_HEADER_RAPID; } __attribute__ ((__packed__)) NR_RA_HEADER_RAPID;
/*!\brief MAC header of Random Access Response for backoff indicator (BI)*/ /*!\brief RAR MAC subheader with Backoff Indicator */
typedef struct { typedef struct {
uint8_t BI:4; uint8_t BI:4;
uint8_t R:2; uint8_t R:2;
...@@ -162,6 +169,19 @@ typedef struct { ...@@ -162,6 +169,19 @@ typedef struct {
uint8_t E:1; uint8_t E:1;
} __attribute__ ((__packed__)) NR_RA_HEADER_BI; } __attribute__ ((__packed__)) NR_RA_HEADER_BI;
// TS 38.321 ch. 6.2.3
typedef struct {
uint8_t R:1; // octet 1 [7]
uint8_t TA1:7; // octet 1 [7:0]
uint8_t TA2:5; // octet 2 [7:2]
uint8_t UL_GRANT_1:3; // octet 2 [2:0]
uint8_t UL_GRANT_2:8; // octet 3 [7:0]
uint8_t UL_GRANT_3:8; // octet 4 [7:0]
uint8_t UL_GRANT_4:8; // octet 5 [7:0]
uint8_t TCRNTI_1:8; // octet 6 [7:0]
uint8_t TCRNTI_2:8; // octet 7 [7:0]
} __attribute__ ((__packed__)) NR_MAC_RAR;
// 38.321 ch6.2.1, 38.331 // 38.321 ch6.2.1, 38.331
#define DL_SCH_LCID_CCCH 0x00 #define DL_SCH_LCID_CCCH 0x00
#define DL_SCH_LCID_DCCH 0x01 #define DL_SCH_LCID_DCCH 0x01
......
...@@ -145,6 +145,8 @@ typedef struct { ...@@ -145,6 +145,8 @@ typedef struct {
/// Preamble Power Ramping Counter /// Preamble Power Ramping Counter
uint8_t RA_PREAMBLE_POWER_RAMPING_COUNTER; uint8_t RA_PREAMBLE_POWER_RAMPING_COUNTER;
/// Random-access backoff counter /// Random-access backoff counter
int16_t RA_backoff_indicator;
/// Random-access backoff counter
int16_t RA_backoff_cnt; int16_t RA_backoff_cnt;
/// Random-access variable for window calculation (frame of last change in window counter) /// Random-access variable for window calculation (frame of last change in window counter)
uint32_t RA_tx_frame; uint32_t RA_tx_frame;
...@@ -165,6 +167,8 @@ typedef struct { ...@@ -165,6 +167,8 @@ typedef struct {
int8_t deltaPreamble_Msg3; int8_t deltaPreamble_Msg3;
/// Flag to monitor if matching RAPID was received in RAR /// Flag to monitor if matching RAPID was received in RAR
uint8_t RA_RAPID_found; uint8_t RA_RAPID_found;
/// Flag to monitor if BI was received in RAR
uint8_t RA_BI_found;
/// UE_Mode variable should be used in the case of Phy_stub operation since we won't have access to PHY_VARS_UE /// UE_Mode variable should be used in the case of Phy_stub operation since we won't have access to PHY_VARS_UE
/// where the UE_mode originally is for the full stack operation mode. The transitions between the states of the UE_Mode /// where the UE_mode originally is for the full stack operation mode. The transitions between the states of the UE_Mode
/// will be triggered within phy_stub_ue.c in this case /// will be triggered within phy_stub_ue.c in this case
......
...@@ -206,13 +206,12 @@ random-access procedure ...@@ -206,13 +206,12 @@ random-access procedure
@param selected_rar_buffer the output buffer for storing the selected RAR header and RAR payload @param selected_rar_buffer the output buffer for storing the selected RAR header and RAR payload
@returns timing advance or 0xffff if preamble doesn't match @returns timing advance or 0xffff if preamble doesn't match
*/ */
uint16_t nr_ue_process_rar(const module_id_t mod_id, uint16_t nr_ue_process_rar(module_id_t mod_id,
const int CC_id, int CC_id,
const frame_t frameP, frame_t frameP,
const rnti_t ra_rnti, uint8_t * dlsch_buffer,
uint8_t * const dlsch_buffer, rnti_t * t_crnti,
rnti_t * const t_crnti, uint8_t preamble_index,
const uint8_t preamble_index,
uint8_t * selected_rar_buffer); uint8_t * selected_rar_buffer);
void nr_process_rar(nr_downlink_indication_t *dl_info); void nr_process_rar(nr_downlink_indication_t *dl_info);
......
...@@ -47,103 +47,91 @@ ...@@ -47,103 +47,91 @@
#define DEBUG_RAR #define DEBUG_RAR
uint16_t nr_ue_process_rar(const module_id_t mod_id, // table 7.2-1 TS 38.321
const int CC_id, uint8_t table_7_2_1[16] = {
const frame_t frameP, {5}, // row index 0
const rnti_t ra_rnti, {10}, // row index 1
uint8_t * const dlsch_buffer, {20}, // row index 2
rnti_t * const t_crnti, {30}, // row index 3
const uint8_t preamble_index, {40}, // row index 4
{60}, // row index 5
{80}, // row index 6
{120}, // row index 7
{160}, // row index 8
{240}, // row index 9
{320}, // row index 10
{480}, // row index 11
{960}, // row index 12
{1920}, // row index 13
};
// WIP todo:
// - UL grant
uint16_t nr_ue_process_rar(module_id_t mod_id,
int CC_id,
frame_t frameP,
uint8_t * dlsch_buffer,
rnti_t * t_crnti,
uint8_t preamble_index,
uint8_t * selected_rar_buffer){ uint8_t * selected_rar_buffer){
NR_UE_MAC_INST_t *nrUE_mac_inst = get_mac_inst(mod_id); NR_UE_MAC_INST_t *ue_mac = get_mac_inst(mod_id);
NR_RA_HEADER_RAPID *rarh = (NR_RA_HEADER_RAPID *) dlsch_buffer; NR_RA_HEADER_RAPID *rarh = (NR_RA_HEADER_RAPID *) dlsch_buffer; // RAR subheader pointer
uint16_t ret = 0; NR_MAC_RAR *rar = (NR_MAC_RAR *) (dlsch_buffer + 1); // RAR subPDU pointer
// NR_RAR_PDU *rar = (RAR_PDU *)(dlsch_buffer+1); uint8_t n_subPDUs = 0; // number of RAR payloads
uint8_t *rar = (uint8_t *) (dlsch_buffer + 1); uint8_t n_subheaders = 0; // number of MAC RAR subheaders
// get the last RAR payload for working with CMW500
uint8_t n_rarpy = 0; // number of RAR payloads
uint8_t n_rarh = 0; // number of MAC RAR subheaders
uint8_t best_rx_rapid = -1; // the closest RAPID receive from all RARs uint8_t best_rx_rapid = -1; // the closest RAPID receive from all RARs
uint16_t ta_command = 0;
AssertFatal(CC_id == 0, "RAR reception on secondary CCs is not supported yet\n"); AssertFatal(CC_id == 0, "RAR reception on secondary CCs is not supported yet\n");
while (1) { while (1) {
n_rarh++; n_subheaders++;
if (rarh->T == 1) { if (rarh->T == 1) {
n_rarpy++; n_subPDUs++;
LOG_D(MAC, "RAPID %d\n", rarh->RAPID); LOG_D(MAC, "[UE %d][RAPROC] Got RAPID RAR subPDU %d\n", mod_id, rarh->RAPID);
} else {
n_subPDUs++;
ue_mac->RA_backoff_indicator = table_7_2_1[((NR_RA_HEADER_BI *)rarh)->BI];
ue_mac->RA_BI_found = 1;
LOG_D(MAC, "[UE %d][RAPROC] Got BI RAR subPDU %d\n", mod_id, ue_mac->RA_backoff_indicator);
} }
if (rarh->RAPID == preamble_index) { if (rarh->RAPID == preamble_index) {
LOG_D(PHY, "Found RAR with the intended RAPID %d\n", LOG_D(PHY, "[UE %d][RAPROC] Found RAR with the intended RAPID %d\n", rarh->RAPID);
rarh->RAPID); rar = (NR_MAC_RAR *) (dlsch_buffer + n_subheaders + (n_subPDUs - 1) * sizeof(NR_MAC_RAR));
rar = (uint8_t *) (dlsch_buffer + n_rarh + (n_rarpy - 1) * 6); ue_mac->RA_RAPID_found = 1;
nrUE_mac_inst->RA_RAPID_found = 1;
break; break;
} }
// if (abs((int) rarh->RAPID - (int) preamble_index) < abs((int) best_rx_rapid - (int) preamble_index)) {
if (abs((int) rarh->RAPID - (int) preamble_index) < // best_rx_rapid = rarh->RAPID;
abs((int) best_rx_rapid - (int) preamble_index)) { // rar = (NR_MAC_RAR *) (dlsch_buffer + n_subheaders + (n_subPDUs - 1) * sizeof(NR_MAC_RAR));
best_rx_rapid = rarh->RAPID; // }
rar = (uint8_t *) (dlsch_buffer + n_rarh + (n_rarpy - 1) * 6);
}
if (rarh->E == 0) { if (rarh->E == 0) {
LOG_I(PHY, "No RAR found with the intended RAPID. The closest RAPID in all RARs is %d\n", best_rx_rapid); LOG_I(PHY, "No RAR found with the intended RAPID. The closest RAPID in all RARs is %d\n", best_rx_rapid);
break; break;
} else { } else {
rarh++; rarh += sizeof(NR_MAC_RAR) + 1;
} }
}; };
LOG_D(MAC, "number of RAR subheader %d; number of RAR pyloads %d\n",
n_rarh, n_rarpy);
LOG_I(MAC,
"[UE %d][RAPROC] Frame %d Received RAR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for preamble %d/%d\n",
mod_id, frameP, *(uint8_t *) rarh, rar[0], rar[1], rar[2],
rar[3], rar[4], rar[5], rarh->RAPID, preamble_index);
#ifdef DEBUG_RAR
LOG_D(MAC, "[UE %d][RAPROC] rarh->E %d\n", mod_id, rarh->E);
LOG_D(MAC, "[UE %d][RAPROC] rarh->T %d\n", mod_id, rarh->T);
LOG_D(MAC, "[UE %d][RAPROC] rarh->RAPID %d\n", mod_id,
rarh->RAPID);
// LOG_I(MAC,"[UE %d][RAPROC] rar->R %d\n",mod_id,rar->R);
LOG_D(MAC, "[UE %d][RAPROC] rar->Timing_Advance_Command %d\n",
mod_id, (((uint16_t) (rar[0] & 0x7f)) << 4) + (rar[1] >> 4));
// LOG_I(MAC,"[UE %d][RAPROC] rar->hopping_flag %d\n",mod_id,rar->hopping_flag);
// LOG_I(MAC,"[UE %d][RAPROC] rar->rb_alloc %d\n",mod_id,rar->rb_alloc);
// LOG_I(MAC,"[UE %d][RAPROC] rar->mcs %d\n",mod_id,rar->mcs);
// LOG_I(MAC,"[UE %d][RAPROC] rar->TPC %d\n",mod_id,rar->TPC);
// LOG_I(MAC,"[UE %d][RAPROC] rar->UL_delay %d\n",mod_id,rar->UL_delay);
// LOG_I(MAC,"[UE %d][RAPROC] rar->cqi_req %d\n",mod_id,rar->cqi_req);
LOG_D(MAC, "[UE %d][RAPROC] rar->t_crnti %x\n", mod_id,
(uint16_t) rar[5] + (rar[4] << 8));
#endif
if (opt_enabled) {
LOG_D(OPT,
"[UE %d][RAPROC] CC_id %d RAR Frame %d trace pdu for ra-RNTI %x\n",
mod_id, CC_id, frameP, ra_rnti);
/*trace_pdu(DIRECTION_DOWNLINK, (uint8_t *) dlsch_buffer, n_rarh + n_rarpy * 6,
mod_id, WS_RA_RNTI, ra_rnti, nrUE_mac_inst->rxFrame,
nrUE_mac_inst->rxSubframe, 0, 0);*/ // TODO TBR fix rxframe and subframe
}
if (preamble_index == rarh->RAPID) { // TBR double check this LOG_D(MAC, "number of RAR subheader %d; number of RAR pyloads %d\n", n_subheaders, n_subPDUs);
*t_crnti = (uint16_t) rar[5] + (rar[4] << 8); //rar->t_crnti;
nrUE_mac_inst->crnti = *t_crnti; //rar->t_crnti; LOG_I(MAC, "[UE %d][RAPROC] Frame %d Received RAR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for preamble %d/%d\n",
//return(rar->Timing_Advance_Command); mod_id, frameP, *(uint8_t *) rarh, rar[0], rar[1], rar[2], rar[3], rar[4], rar[5], rarh->RAPID, preamble_index);
ret = ((((uint16_t) (rar[0] & 0x7f)) << 4) + (rar[1] >> 4));
if (ue_mac->RA_RAPID_found) {
*t_crnti = rar->TCRNTI_2 + (rar->TCRNTI_1 << 8);
ue_mac->t_crnti = *t_crnti;
ue_mac->rnti_type == NR_RNTI_TC;
ta_command = rar->TA2 + (rar->TA1 << 5);
} else { } else {
nrUE_mac_inst->crnti = 0; ue_mac->t_crnti = 0;
ret = (0xffff); ta_command = (0xffff);
} }
// move the selected RAR to the front of the RA_PDSCH buffer // move the selected RAR to the front of the RA_PDSCH buffer
memcpy(selected_rar_buffer + 0, (uint8_t *) rarh, 1); memcpy((void *) (selected_rar_buffer + 0), (void *) rarh, 1);
memcpy(selected_rar_buffer + 1, (uint8_t *) rar, 6); memcpy((void *) (selected_rar_buffer + 1), (void *) rar, sizeof(NR_MAC_RAR));
return ret; return ta_command;
} }
\ No newline at end of file
...@@ -382,7 +382,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -382,7 +382,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
// Phytest scheduling // Phytest scheduling
if (phy_test && slot_txP==1){ if (phy_test && slot_txP==1){
nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP,NULL); nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP,NULL);
// This schedules Random-Access for NR starting in subframeP
nr_schedule_RA(module_idP, frame_txP, slot_txP); nr_schedule_RA(module_idP, frame_txP, slot_txP);
// resetting ta flag // resetting ta flag
gNB->ta_len = 0; gNB->ta_len = 0;
......
...@@ -1365,62 +1365,6 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){ ...@@ -1365,62 +1365,6 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
} }
*/ */
/*
boolean_t nr_CCE_allocation_infeasible(int module_idP, int CC_id, int format_flag, int slot, int aggregation, int rnti){
gNB_MAC_INST *mac = RC.nrmac[module_idP];
nfapi_nr_dl_tti_request_body_t *dl_req = &mac->DL_req[CC_id].dl_config_request_body;
nfapi_nr_dl_tti_request_pdu_t *dl_config_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
nfapi_hi_dci0_request_body_t *HI_DCI0_req = &RC.mac[module_idP]->HI_DCI0_req[CC_id][slot].hi_dci0_request_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu = &HI_DCI0_req->hi_dci0_pdu_list[HI_DCI0_req->number_of_dci + HI_DCI0_req->number_of_hi];
int ret;
boolean_t res = FALSE;
if (format_flag != 2) { // DL DCI
if (dl_req->number_pdu == MAX_NUM_DL_PDU) {
LOG_W(MAC,
"Subframe %d: FAPI DL structure is full, skip scheduling UE %d\n",
slot, rnti);
} else {
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.tl.tag = NFAPI_DL_CONFIG_REQUEST_DCI_DL_PDU_REL8_TAG;
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti = rnti;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti_type = (format_flag == 0) ? 2 : 1;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level = aggregation;
dl_req->number_pdu++;
LOG_D(MAC, "Subframe %d: Checking CCE feasibility format %d : (%x,%d) (%x,%d,%d)\n",
slot, format_flag, rnti, aggregation,
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti,
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.
aggregation_level,
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti_type);
// ret = nr_allocate_CCEs(module_idP, CC_id, 0, slot, 0); // TBR
if (ret == -1) res = TRUE;
dl_req->number_pdu--;
}
} else { // ue-specific UL DCI
if (HI_DCI0_req->number_of_dci + HI_DCI0_req->number_of_hi == MAX_NUM_HI_DCI0_PDU) {
LOG_W(MAC, "Subframe %d: FAPI UL structure is full, skip scheduling UE %d\n", slot, rnti);
} else {
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_DCI_PDU_TYPE;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.tl.tag = NFAPI_HI_DCI0_REQUEST_DCI_PDU_REL8_TAG;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.rnti = rnti;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.aggregation_level = aggregation;
HI_DCI0_req->number_of_dci++;
// ret = nr_allocate_CCEs(module_idP, CC_id, 0, slot, 0); // TBR
if (ret == -1) res = TRUE;
HI_DCI0_req->number_of_dci--;
}
}
return res;
}*/
/* // TBR fix this /* // TBR fix this
void nr_get_Msg3alloc(NR_COMMON_channels_t *cc, void nr_get_Msg3alloc(NR_COMMON_channels_t *cc,
...@@ -1531,11 +1475,11 @@ void nr_get_Msg3alloc(NR_COMMON_channels_t *cc, ...@@ -1531,11 +1475,11 @@ void nr_get_Msg3alloc(NR_COMMON_channels_t *cc,
} // else TDD } // else TDD
}*/ }*/
uint16_t nr_mac_compute_RIV(uint16_t N_RB_DL, uint16_t RBstart, uint16_t Lcrbs){ // TBR this is outdated // uint16_t nr_mac_compute_RIV(uint16_t N_RB_DL, uint16_t RBstart, uint16_t Lcrbs){ // TBR
uint16_t RIV; // uint16_t RIV;
//
if (Lcrbs <= (1 + (N_RB_DL >> 1))) RIV = (N_RB_DL * (Lcrbs - 1)) + RBstart; // if (Lcrbs <= (1 + (N_RB_DL >> 1))) RIV = (N_RB_DL * (Lcrbs - 1)) + RBstart;
else RIV = (N_RB_DL * (N_RB_DL + 1 - Lcrbs)) + (N_RB_DL - 1 - RBstart); // else RIV = (N_RB_DL * (N_RB_DL + 1 - Lcrbs)) + (N_RB_DL - 1 - RBstart);
//
return RIV; // return RIV;
} // }
\ No newline at end of file \ No newline at end of file
...@@ -98,13 +98,6 @@ void nr_initiate_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP, sub_ ...@@ -98,13 +98,6 @@ void nr_initiate_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP, sub_
void nr_clear_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP); void nr_clear_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP);
boolean_t nr_CCE_allocation_infeasible(int module_idP,
int CC_idP,
int common_flag,
int slot,
int aggregation,
int rnti);
int nr_allocate_CCEs(int module_idP, int CC_idP, frame_t frameP, sub_frame_t slotP, int test_only); int nr_allocate_CCEs(int module_idP, int CC_idP, frame_t frameP, sub_frame_t slotP, int test_only);
void nr_get_Msg3alloc(NR_COMMON_channels_t *cc, void nr_get_Msg3alloc(NR_COMMON_channels_t *cc,
...@@ -113,19 +106,14 @@ void nr_get_Msg3alloc(NR_COMMON_channels_t *cc, ...@@ -113,19 +106,14 @@ void nr_get_Msg3alloc(NR_COMMON_channels_t *cc,
frame_t *frame, frame_t *frame,
sub_frame_t *subframe); sub_frame_t *subframe);
/* \brief Function in gNB to fill RAR pdu when requested by PHY. This provides a single RAR SDU for the moment and returns the t-CRNTI. /* \brief Function in gNB to fill RAR pdu when requested by PHY.
@param Mod_id Instance ID of gNB @param ra Instance of RA resources of gNB
@param dlsch_buffer Pointer to DLSCH input buffer @param dlsch_buffer Pointer to RAR input buffer
@param N_RB_UL Number of UL resource blocks @param N_RB_UL Number of UL resource blocks
@returns t_CRNTI
*/ */
unsigned short nr_fill_rar(const module_id_t module_idP, void nr_fill_rar(NR_RA_t * ra,
const int CC_id, uint8_t * dlsch_buffer,
NR_RA_t *ra, uint16_t N_RB_UL);
const frame_t frameP,
uint8_t * const dlsch_buffer,
const uint16_t N_RB_UL,
const uint8_t input_buffer_length);
uint16_t nr_mac_compute_RIV(uint16_t N_RB_DL, uint16_t RBstart, uint16_t Lcrbs); uint16_t nr_mac_compute_RIV(uint16_t N_RB_DL, uint16_t RBstart, uint16_t Lcrbs);
......
...@@ -90,15 +90,15 @@ typedef struct { ...@@ -90,15 +90,15 @@ typedef struct {
/// Subframe where preamble was received /// Subframe where preamble was received
uint8_t preamble_subframe; uint8_t preamble_subframe;
/// Subframe where Msg2 is to be sent /// Subframe where Msg2 is to be sent
uint8_t Msg2_subframe; uint8_t Msg2_slot;
/// Frame where Msg2 is to be sent /// Frame where Msg2 is to be sent
frame_t Msg2_frame; frame_t Msg2_frame;
/// Subframe where Msg3 is to be sent /// Subframe where Msg3 is to be sent
sub_frame_t Msg3_subframe; sub_frame_t Msg3_slot;
/// Frame where Msg3 is to be sent /// Frame where Msg3 is to be sent
frame_t Msg3_frame; frame_t Msg3_frame;
/// Subframe where Msg4 is to be sent /// Subframe where Msg4 is to be sent
sub_frame_t Msg4_subframe; sub_frame_t Msg4_slot;
/// Frame where Msg4 is to be sent /// Frame where Msg4 is to be sent
frame_t Msg4_frame; frame_t Msg4_frame;
/// harq_pid used for Msg4 transmission /// harq_pid used for Msg4 transmission
......
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