if(nl>=2)// Apply zero forcing for 2, 3, and 4 Tx layers
nr_zero_forcing_rx(rx_size_symbol,
n_rx,
nl,
rxdataF_comp,
dl_ch_mag,
dl_ch_magb,
dl_ch_magr,
dl_ch_estimates_ext,
nb_rb_pdsch,
dlsch[0].dlsch_config.qamModOrder,
*log2_maxh,
symbol,
nb_re_pdsch);
}
stop_meas(&ue->generic_stat_bis[slot]);
if(cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY,"[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine and zero forcing %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[slot].p_time/(cpuf*1000.0));
if(meas_enabled){
stop_meas(&meas);
LOG_D(PHY,
"[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine and zero forcing %5.2f \n",
frame,
nr_slot_rx,
slot,
symbol,
meas.p_time/(cpuf*1000.0));
}
start_meas(&ue->generic_stat_bis[slot]);
if(meas_enabled)
start_meas(&meas);
/* Store the valid DL RE's */
dl_valid_re[symbol-1]=nb_re_pdsch;
...
...
@@ -652,9 +713,16 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
#endif
}
stop_meas(&ue->generic_stat_bis[slot]);
if(cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY,"[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[slot].p_time/(cpuf*1000.0));
if(meas_enabled){
stop_meas(&meas);
LOG_D(PHY,
"[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",