Commit 30f6da16 authored by vijay chadachan's avatar vijay chadachan Committed by Guido Casati

Refactor set_tdd_config_nr to use frame_structure_t and tdd_period_config_t

* assuming num_dl_slots and num_ul_slots are including also
  slots with dl/ul symbols respectively
* refactor set_tdd_config_nr
* moved function to MAC
* fill max_num_of_symbol_per_slot_list depending on slot type
* use new set_tdd_config_nr in stack
* minor refactor in config.c to improve readability (scs)
Co-authored-by: default avatarGuido Casati <guido.casati@firecell.io>
parent 421a690b
...@@ -669,10 +669,6 @@ void pnf_nr_handle_config_request(pnf_t* pnf, void *pRecvMsg, int recvMsgLen) ...@@ -669,10 +669,6 @@ void pnf_nr_handle_config_request(pnf_t* pnf, void *pRecvMsg, int recvMsgLen)
{ {
nfapi_pnf_phy_config_t* phy = nfapi_pnf_phy_config_find(config, req.header.phy_id); nfapi_pnf_phy_config_t* phy = nfapi_pnf_phy_config_find(config, req.header.phy_id);
#if 0 // emulate set_config TLV reception (hard-code)
int tdd_return = set_tdd_config_nr(&req, 1, 7, 6, 2, 4);
#endif
if(phy) if(phy)
{ {
if(phy->state != NFAPI_PNF_PHY_RUNNING) if(phy->state != NFAPI_PNF_PHY_RUNNING)
......
...@@ -44,108 +44,112 @@ ...@@ -44,108 +44,112 @@
#define NR_TST_PHY_PRINTF(...) #define NR_TST_PHY_PRINTF(...)
#endif #endif
/******************************************************************* /** @brief This function processes TDD dedicated configuration for NR
* * by processing the tdd_slot_bitmap and period_cfg, and
* NAME : set_tdd_configuration * allocates memory and fills max_num_of_symbol_per_slot_list
* * in the nfapi config request (cfg)
* PARAMETERS : pointer to frame configuration * @ref see TS 38.213 11.1 Slot configuration
* * @param cfg NR config request structure pointer
* OUTPUT: table of uplink symbol for each slot for 2 frames * @param fs TDD configuration pointer
* * @returns void
* RETURN : nb_periods_per_frame if tdd has been properly configurated */
* -1 tdd configuration can not be done void set_tdd_config_nr(nfapi_nr_config_request_scf_t *cfg, frame_structure_t *fs)
*
* DESCRIPTION : generate bit map for uplink symbol for each slot for several frames
* see TS 38.213 11.1 Slot configuration
*
*********************************************************************/
int set_tdd_config_nr(nfapi_nr_config_request_scf_t *cfg,
int mu,
int nrofDownlinkSlots,
int nrofDownlinkSymbols,
int nrofUplinkSlots,
int nrofUplinkSymbols)
{ {
int slot_number = 0; AssertFatal(fs != NULL, "frame_structure must be non-NULL");
int nb_periods_per_frame = get_nb_periods_per_frame(cfg->tdd_table.tdd_period.value);
int nb_slots_to_set = (1 << mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
int nb_slots_per_period = ((1 << mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) / nb_periods_per_frame;
if ((nrofDownlinkSymbols + nrofUplinkSymbols) == 0)
AssertFatal(nb_slots_per_period == (nrofDownlinkSlots + nrofUplinkSlots),
"set_tdd_configuration_nr: given period is inconsistent with current tdd configuration, nrofDownlinkSlots %d, "
"nrofUplinkSlots %d, nb_slots_per_period %d \n",
nrofDownlinkSlots,
nrofUplinkSlots,
nb_slots_per_period);
else {
AssertFatal(nrofDownlinkSymbols + nrofUplinkSymbols < 14,
"illegal symbol configuration DL %d, UL %d\n",
nrofDownlinkSymbols,
nrofUplinkSymbols);
AssertFatal(nb_slots_per_period == (nrofDownlinkSlots + nrofUplinkSlots + 1),
"set_tdd_configuration_nr: given period is inconsistent with current tdd configuration, nrofDownlinkSlots %d, "
"nrofUplinkSlots %d, nrofMixed slots 1, nb_slots_per_period %d \n",
nrofDownlinkSlots,
nrofUplinkSlots,
nb_slots_per_period);
}
cfg->tdd_table.max_tdd_periodicity_list = calloc(nb_slots_to_set, sizeof(nfapi_nr_max_tdd_periodicity_t));
int slot_number = 0;
int nb_slots_to_set = fs->numb_slots_frame;
int slot_index = 0;
tdd_period_config_t *pc = &fs->period_cfg;
tdd_bitmap_t *tdd_slot_bitmap = pc->tdd_slot_bitmap;
LOG_I(NR_PHY,
"Set TDD Period Configuration: %d periods per frame, %d slots to be configured (%d DL, %d UL)\n",
fs->numb_period_frame,
nb_slots_to_set,
pc->num_dl_slots,
pc->num_ul_slots);
// Allocate memory formax_num_of_symbol_per_slot_list items
cfg->tdd_table.max_tdd_periodicity_list = calloc_or_fail(nb_slots_to_set, sizeof(nfapi_nr_max_tdd_periodicity_t));
for (int slot = 0; slot < nb_slots_to_set; slot++) { for (int slot = 0; slot < nb_slots_to_set; slot++) {
nfapi_nr_max_tdd_periodicity_t *p_list = &cfg->tdd_table.max_tdd_periodicity_list[slot]; nfapi_nr_max_tdd_periodicity_t *p_list = &cfg->tdd_table.max_tdd_periodicity_list[slot];
p_list->max_num_of_symbol_per_slot_list = p_list->max_num_of_symbol_per_slot_list =
calloc(NR_NUMBER_OF_SYMBOLS_PER_SLOT, sizeof(*p_list->max_num_of_symbol_per_slot_list)); calloc_or_fail(NR_NUMBER_OF_SYMBOLS_PER_SLOT, sizeof(*p_list->max_num_of_symbol_per_slot_list));
for (int sym = 0; sym < NR_NUMBER_OF_SYMBOLS_PER_SLOT; sym++) { for (int sym = 0; sym < NR_NUMBER_OF_SYMBOLS_PER_SLOT; sym++) {
// for each symbol, assign the TLV tag for usage when packing // for each symbol, assign the TLV tag for usage when packing
p_list->max_num_of_symbol_per_slot_list[sym].slot_config.tl.tag = NFAPI_NR_CONFIG_SLOT_CONFIG_TAG; p_list->max_num_of_symbol_per_slot_list[sym].slot_config.tl.tag = NFAPI_NR_CONFIG_SLOT_CONFIG_TAG;
} }
} }
// Loop through all periods to be configured
while (slot_number != nb_slots_to_set) { while (slot_number != nb_slots_to_set) {
if (nrofDownlinkSlots != 0) { slot_index = get_slot_idx_in_period(slot_number, fs);
for (int sym = 0; sym < nrofDownlinkSlots * NR_NUMBER_OF_SYMBOLS_PER_SLOT; sym++) { /* Fill max_tdd_periodicity_list */
cfg->tdd_table.max_tdd_periodicity_list[slot_number] nfapi_nr_max_tdd_periodicity_t *list = &cfg->tdd_table.max_tdd_periodicity_list[slot_number];
.max_num_of_symbol_per_slot_list[sym % NR_NUMBER_OF_SYMBOLS_PER_SLOT] // FULL DOWNLINK SLOTS
.slot_config.value = 0; if (tdd_slot_bitmap[slot_index].slot_type == TDD_NR_DOWNLINK_SLOT) {
for (int sym = 0; sym < NR_NUMBER_OF_SYMBOLS_PER_SLOT; sym++) {
if ((sym + 1) % NR_NUMBER_OF_SYMBOLS_PER_SLOT == 0) list->max_num_of_symbol_per_slot_list[sym % NR_NUMBER_OF_SYMBOLS_PER_SLOT].slot_config.value = 0;
if ((sym + 1) % NR_NUMBER_OF_SYMBOLS_PER_SLOT == 0) {
slot_number++; slot_number++;
list += 1;
}
} }
} }
// FLEXIBLE SLOTS
if (nrofDownlinkSymbols != 0 || nrofUplinkSymbols != 0) { if (tdd_slot_bitmap[slot_index].slot_type == TDD_NR_MIXED_SLOT) {
for (int sym = 0; sym < nrofDownlinkSymbols; sym++) { int nrofDLSymbolsInSlot = tdd_slot_bitmap[slot_index].num_dl_symbols;
cfg->tdd_table.max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[sym].slot_config.value = 0; int nrofULSymbolsInSlot = tdd_slot_bitmap[slot_index].num_ul_symbols;
AssertFatal(nrofDLSymbolsInSlot + nrofULSymbolsInSlot < NR_NUMBER_OF_SYMBOLS_PER_SLOT,
"illegal symbol configuration DL %d, UL %d\n",
nrofDLSymbolsInSlot,
nrofULSymbolsInSlot);
// DL Symbols
for (int sym = 0; sym < nrofDLSymbolsInSlot; sym++) {
list->max_num_of_symbol_per_slot_list[sym].slot_config.value = 0;
} }
// Flexible Symbols
for (int sym = nrofDownlinkSymbols; sym < NR_NUMBER_OF_SYMBOLS_PER_SLOT - nrofUplinkSymbols; sym++) { for (int sym = nrofDLSymbolsInSlot; sym < NR_NUMBER_OF_SYMBOLS_PER_SLOT - nrofULSymbolsInSlot; sym++) {
cfg->tdd_table.max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[sym].slot_config.value = 2; list->max_num_of_symbol_per_slot_list[sym].slot_config.value = 2;
} }
// UL Symbols
for (int sym = NR_NUMBER_OF_SYMBOLS_PER_SLOT - nrofUplinkSymbols; sym < NR_NUMBER_OF_SYMBOLS_PER_SLOT; sym++) { for (int sym = NR_NUMBER_OF_SYMBOLS_PER_SLOT - nrofULSymbolsInSlot; sym < NR_NUMBER_OF_SYMBOLS_PER_SLOT; sym++) {
cfg->tdd_table.max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[sym].slot_config.value = 1; list->max_num_of_symbol_per_slot_list[sym].slot_config.value = 1;
} }
slot_number++; slot_number++;
list += 1;
} }
// FULL UPLINK SLOTS
if (nrofUplinkSlots != 0) { if (tdd_slot_bitmap[slot_index].slot_type == TDD_NR_UPLINK_SLOT) {
for (int sym = 0; sym < nrofUplinkSlots * NR_NUMBER_OF_SYMBOLS_PER_SLOT; sym++) { for (int sym = 0; sym < NR_NUMBER_OF_SYMBOLS_PER_SLOT; sym++) {
cfg->tdd_table.max_tdd_periodicity_list[slot_number] list->max_num_of_symbol_per_slot_list[sym % NR_NUMBER_OF_SYMBOLS_PER_SLOT].slot_config.value = 1;
.max_num_of_symbol_per_slot_list[sym % NR_NUMBER_OF_SYMBOLS_PER_SLOT] if ((sym + 1) % NR_NUMBER_OF_SYMBOLS_PER_SLOT == 0) {
.slot_config.value = 1;
if ((sym + 1) % NR_NUMBER_OF_SYMBOLS_PER_SLOT == 0)
slot_number++; slot_number++;
list += 1;
}
} }
} }
} }
// Dump 1 period on the output
return (nb_periods_per_frame); for (int s = 0; s < fs->numb_slots_period; s++) {
if (tdd_slot_bitmap[s].slot_type == TDD_NR_MIXED_SLOT) {
char flexi_slot[NR_NUMBER_OF_SYMBOLS_PER_SLOT + 1];
memset(flexi_slot, 0, sizeof(flexi_slot));
for (int symb = 0; symb < NR_NUMBER_OF_SYMBOLS_PER_SLOT; symb++) {
uint8_t val = cfg->tdd_table.max_tdd_periodicity_list[s].max_num_of_symbol_per_slot_list[symb].slot_config.value;
char *symb_type_s[] = {"D", "U", "F"};
flexi_slot[symb] = *symb_type_s[val];
}
flexi_slot[NR_NUMBER_OF_SYMBOLS_PER_SLOT] = '\0';
LOG_I(NR_PHY, "TDD period configuration: slot %d is FLEXIBLE: %s\n", s, flexi_slot);
} else {
LOG_I(NR_PHY,
"TDD period configuration: slot %d is %s\n",
s,
tdd_slot_bitmap[s].slot_type == TDD_NR_DOWNLINK_SLOT ? "DOWNLINK" : "UPLINK");
}
}
} }
/******************************************************************* /*******************************************************************
...@@ -389,3 +393,48 @@ void free_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms) { ...@@ -389,3 +393,48 @@ void free_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms) {
} }
} }
void do_tdd_config_sim(PHY_VARS_gNB *gNB, int mu)
{
frame_structure_t fs = {.is_tdd = true};
fs.numb_slots_frame = (1 << mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
fs.numb_period_frame = get_nb_periods_per_frame(gNB->gNB_config.tdd_table.tdd_period.value);
fs.numb_slots_period = fs.numb_slots_frame / fs.numb_period_frame;
tdd_period_config_t *pc = &fs.period_cfg;
// Set DL/UL slots
switch (mu)
{
case 0:
pc->num_dl_slots = 3;
pc->num_ul_slots = 1;
break;
case 1:
pc->num_dl_slots = 7;
pc->num_ul_slots = 2;
break;
case 3:
pc->num_dl_slots = 27;
pc->num_ul_slots = 12;
break;
default:
break;
}
for (int i = 0; i < pc->num_dl_slots; i++) {
pc->tdd_slot_bitmap[i].slot_type = TDD_NR_DOWNLINK_SLOT;
pc->tdd_slot_bitmap[i].num_dl_symbols = 0;
pc->tdd_slot_bitmap[i].num_ul_symbols = 0;
}
for (int i = pc->num_dl_slots; i < fs.numb_slots_period - pc->num_ul_slots; i++) {
pc->tdd_slot_bitmap[i].slot_type = TDD_NR_MIXED_SLOT;
pc->tdd_slot_bitmap[i].num_dl_symbols = 6;
pc->tdd_slot_bitmap[i].num_ul_symbols = 4;
}
for (int i = pc->num_ul_slots; i < fs.numb_slots_period; i++) {
pc->tdd_slot_bitmap[i].slot_type = TDD_NR_UPLINK_SLOT;
pc->tdd_slot_bitmap[i].num_dl_symbols = 0;
pc->tdd_slot_bitmap[i].num_ul_symbols = 0;
}
set_tdd_config_nr(&gNB->gNB_config, &fs);
}
...@@ -36,18 +36,16 @@ ...@@ -36,18 +36,16 @@
/*************** FUNCTIONS *****************************************/ /*************** FUNCTIONS *****************************************/
/** \brief This function processes tdd dedicated configuration for nr /** @brief This function processes TDD dedicated configuration for NR
* @param frame_parms NR DL Frame parameters * by processing the tdd_slot_bitmap and period_cfg, and
* @param dl_UL_TransmissionPeriodicity periodicity * allocates memory and fills max_num_of_symbol_per_slot_list
* @param nrofDownlinkSlots number of downlink slots * in the nfapi config request (cfg)
* @param nrofDownlinkSymbols number of downlink symbols * @param cfg NR config request structure pointer
* @param nrofUplinkSlots number of uplink slots * @param fs frame structure pointer
* @param nrofUplinkSymbols number of uplink symbols * @returns nb_periods_per_frame if TDD has been properly configurated
@returns 0 if tdd dedicated configuration has been properly set or -1 on error with message */ * -1 tdd configuration can not be done
*/
int set_tdd_config_nr(nfapi_nr_config_request_scf_t *cfg, int mu, void set_tdd_config_nr(nfapi_nr_config_request_scf_t *cfg, frame_structure_t *fs);
int nrofDownlinkSlots, int nrofDownlinkSymbols,
int nrofUplinkSlots, int nrofUplinkSymbols);
/** \brief This function adds a slot configuration to current dedicated configuration for nr /** \brief This function adds a slot configuration to current dedicated configuration for nr
* @param frame_parms NR DL Frame parameters * @param frame_parms NR DL Frame parameters
...@@ -92,5 +90,7 @@ void free_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms); ...@@ -92,5 +90,7 @@ void free_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms);
int get_next_downlink_slot(PHY_VARS_gNB *gNB, nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_slot); int get_next_downlink_slot(PHY_VARS_gNB *gNB, nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_slot);
void do_tdd_config_sim(PHY_VARS_gNB *gNB, int mu);
#endif /* PHY_FRAME_CONFIG_NR_H */ #endif /* PHY_FRAME_CONFIG_NR_H */
...@@ -388,8 +388,9 @@ int main(int argc, char **argv) ...@@ -388,8 +388,9 @@ int main(int argc, char **argv)
frame_parms->Ncp = extended_prefix_flag ? EXTENDED : NORMAL; frame_parms->Ncp = extended_prefix_flag ? EXTENDED : NORMAL;
crcTableInit(); crcTableInit();
nr_phy_config_request_sim(gNB, N_RB_DL, N_RB_DL, mu, Nid_cell,SSB_positions); nr_phy_config_request_sim(gNB, N_RB_DL, N_RB_DL, mu, Nid_cell,SSB_positions);
gNB->gNB_config.tdd_table.tdd_period.value = 6; // TDD configuration
set_tdd_config_nr(&gNB->gNB_config, mu, 7, 6, 2, 4); gNB->gNB_config.tdd_table.tdd_period.value = 6;
do_tdd_config_sim(gNB, mu);
phy_init_nr_gNB(gNB); phy_init_nr_gNB(gNB);
//init_eNB_afterRU(); //init_eNB_afterRU();
frame_length_complex_samples = frame_parms->samples_per_subframe; frame_length_complex_samples = frame_parms->samples_per_subframe;
......
...@@ -448,13 +448,10 @@ int main(int argc, char **argv) ...@@ -448,13 +448,10 @@ int main(int argc, char **argv)
frame_parms->freq_range = mu<2 ? FR1 : FR2; frame_parms->freq_range = mu<2 ? FR1 : FR2;
nr_phy_config_request_sim(gNB, N_RB_DL, N_RB_DL, mu, Nid_cell, SSB_positions); nr_phy_config_request_sim(gNB, N_RB_DL, N_RB_DL, mu, Nid_cell, SSB_positions);
// TDD configuration
gNB->gNB_config.tdd_table.tdd_period.value = 6; gNB->gNB_config.tdd_table.tdd_period.value = 6;
if (mu == 0) do_tdd_config_sim(gNB, mu);
set_tdd_config_nr(&gNB->gNB_config, mu, 3, 6, 1, 4);
else if (mu == 1)
set_tdd_config_nr(&gNB->gNB_config, mu, 7, 6, 2, 4);
else if (mu == 3)
set_tdd_config_nr(&gNB->gNB_config, mu, 27, 6, 12, 4);
phy_init_nr_gNB(gNB); phy_init_nr_gNB(gNB);
frame_parms->ssb_start_subcarrier = 12 * gNB->gNB_config.ssb_table.ssb_offset_point_a.value + ssb_subcarrier_offset; frame_parms->ssb_start_subcarrier = 12 * gNB->gNB_config.ssb_table.ssb_offset_point_a.value + ssb_subcarrier_offset;
initFloatingCoresTpool(ssb_scan_threads, &nrUE_params.Tpool, false, "UE-tpool"); initFloatingCoresTpool(ssb_scan_threads, &nrUE_params.Tpool, false, "UE-tpool");
......
...@@ -568,7 +568,10 @@ int main(int argc, char **argv){ ...@@ -568,7 +568,10 @@ int main(int argc, char **argv){
memcpy((void*)&ru->config,(void*)&RC.gNB[0]->gNB_config,sizeof(ru->config)); memcpy((void*)&ru->config,(void*)&RC.gNB[0]->gNB_config,sizeof(ru->config));
RC.nb_nr_L1_inst=1; RC.nb_nr_L1_inst=1;
set_tdd_config_nr(&gNB->gNB_config, mu, 7, 6, 2, 4); // TDD configuration
gNB->gNB_config.tdd_table.tdd_period.value = 6;
do_tdd_config_sim(gNB, mu);
phy_init_nr_gNB(gNB); phy_init_nr_gNB(gNB);
nr_phy_init_RU(ru); nr_phy_init_RU(ru);
......
...@@ -433,8 +433,10 @@ int main(int argc, char **argv) ...@@ -433,8 +433,10 @@ int main(int argc, char **argv)
cfg->carrier_config.num_tx_ant.value = n_tx; cfg->carrier_config.num_tx_ant.value = n_tx;
cfg->carrier_config.num_rx_ant.value = n_rx; cfg->carrier_config.num_rx_ant.value = n_rx;
nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,Nid_cell,SSB_positions); nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,Nid_cell,SSB_positions);
// TDD configuration
gNB->gNB_config.tdd_table.tdd_period.value = 6; gNB->gNB_config.tdd_table.tdd_period.value = 6;
set_tdd_config_nr(&gNB->gNB_config, mu, 7, 6, 2, 4); do_tdd_config_sim(gNB, mu);
phy_init_nr_gNB(gNB); phy_init_nr_gNB(gNB);
/* RU handles rxdataF, and gNB just has a pointer. Here, we don't have an RU, /* RU handles rxdataF, and gNB just has a pointer. Here, we don't have an RU,
* so we need to allocate that memory as well. */ * so we need to allocate that memory as well. */
......
...@@ -406,8 +406,10 @@ int main(int argc, char **argv) ...@@ -406,8 +406,10 @@ int main(int argc, char **argv)
gNB->frame_parms.nb_antennas_rx = n_rx; gNB->frame_parms.nb_antennas_rx = n_rx;
nr_phy_config_request_sim(gNB, N_RB_UL, N_RB_UL, mu, Nid_cell, SSB_positions); nr_phy_config_request_sim(gNB, N_RB_UL, N_RB_UL, mu, Nid_cell, SSB_positions);
// TDD configuration
gNB->gNB_config.tdd_table.tdd_period.value = 6; gNB->gNB_config.tdd_table.tdd_period.value = 6;
set_tdd_config_nr(&gNB->gNB_config, mu, 7, 6, 2, 4); do_tdd_config_sim(gNB, mu);
phy_init_nr_gNB(gNB); phy_init_nr_gNB(gNB);
//configure UE //configure UE
......
...@@ -468,12 +468,7 @@ static int config_frame_structure(int mu, ...@@ -468,12 +468,7 @@ static int config_frame_structure(int mu,
fs->numb_slots_period = fs->numb_slots_frame / fs->numb_period_frame; fs->numb_slots_period = fs->numb_slots_frame / fs->numb_period_frame;
fs->is_tdd = true; fs->is_tdd = true;
config_tdd_patterns(scc->tdd_UL_DL_ConfigurationCommon, fs); config_tdd_patterns(scc->tdd_UL_DL_ConfigurationCommon, fs);
set_tdd_config_nr(cfg, set_tdd_config_nr(cfg, fs);
mu,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols);
} else { // FDD } else { // FDD
fs->is_tdd = false; fs->is_tdd = false;
fs->numb_period_frame = 1; fs->numb_period_frame = 1;
...@@ -521,10 +516,10 @@ static void config_common(gNB_MAC_INST *nrmac, ...@@ -521,10 +516,10 @@ static void config_common(gNB_MAC_INST *nrmac,
} }
} }
struct NR_FrequencyInfoUL *frequencyInfoUL = scc->uplinkConfigCommon->frequencyInfoUL; struct NR_FrequencyInfoUL *frequencyInfoUL = scc->uplinkConfigCommon->frequencyInfoUL;
int scs = frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
frequency_range = *frequencyInfoUL->frequencyBandList->list.array[0] > 256 ? FR2 : FR1; frequency_range = *frequencyInfoUL->frequencyBandList->list.array[0] > 256 ? FR2 : FR1;
bw_index = get_supported_band_index(frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing, bw_index =
frequency_range, get_supported_band_index(scs, frequency_range, frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth);
frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth);
cfg->carrier_config.uplink_bandwidth.value = get_supported_bw_mhz(frequency_range, bw_index); cfg->carrier_config.uplink_bandwidth.value = get_supported_bw_mhz(frequency_range, bw_index);
cfg->carrier_config.uplink_bandwidth.tl.tag = NFAPI_NR_CONFIG_UPLINK_BANDWIDTH_TAG; // temporary cfg->carrier_config.uplink_bandwidth.tl.tag = NFAPI_NR_CONFIG_UPLINK_BANDWIDTH_TAG; // temporary
cfg->num_tlv++; cfg->num_tlv++;
...@@ -543,7 +538,7 @@ static void config_common(gNB_MAC_INST *nrmac, ...@@ -543,7 +538,7 @@ static void config_common(gNB_MAC_INST *nrmac,
cfg->num_tlv++; cfg->num_tlv++;
for (int i = 0; i < 5; i++) { for (int i = 0; i < 5; i++) {
if (i == frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing) { if (i == scs) {
cfg->carrier_config.ul_grid_size[i].value = frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth; cfg->carrier_config.ul_grid_size[i].value = frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
cfg->carrier_config.ul_k0[i].value = frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier; cfg->carrier_config.ul_k0[i].value = frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
cfg->carrier_config.ul_grid_size[i].tl.tag = NFAPI_NR_CONFIG_UL_GRID_SIZE_TAG; cfg->carrier_config.ul_grid_size[i].tl.tag = NFAPI_NR_CONFIG_UL_GRID_SIZE_TAG;
...@@ -642,21 +637,15 @@ static void config_common(gNB_MAC_INST *nrmac, ...@@ -642,21 +637,15 @@ static void config_common(gNB_MAC_INST *nrmac,
prach_fd_occasion->k1.value = prach_fd_occasion->k1.value =
NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE) NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE)
+ rach_ConfigCommon->rach_ConfigGeneric.msg1_FrequencyStart + rach_ConfigCommon->rach_ConfigGeneric.msg1_FrequencyStart
+ (get_N_RA_RB(cfg->prach_config.prach_sub_c_spacing.value, + (get_N_RA_RB(cfg->prach_config.prach_sub_c_spacing.value, scs) * i);
frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing)
* i);
if (IS_SA_MODE(get_softmodem_params())) { if (IS_SA_MODE(get_softmodem_params())) {
prach_fd_occasion->k1.value = prach_fd_occasion->k1.value =
NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE) NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE)
+ rach_ConfigCommon->rach_ConfigGeneric.msg1_FrequencyStart + rach_ConfigCommon->rach_ConfigGeneric.msg1_FrequencyStart
+ (get_N_RA_RB(cfg->prach_config.prach_sub_c_spacing.value, + (get_N_RA_RB(cfg->prach_config.prach_sub_c_spacing.value, scs) * i);
frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing)
* i);
} else { } else {
prach_fd_occasion->k1.value = rach_ConfigCommon->rach_ConfigGeneric.msg1_FrequencyStart prach_fd_occasion->k1.value = rach_ConfigCommon->rach_ConfigGeneric.msg1_FrequencyStart
+ (get_N_RA_RB(cfg->prach_config.prach_sub_c_spacing.value, + (get_N_RA_RB(cfg->prach_config.prach_sub_c_spacing.value, scs) * i);
frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing)
* i);
} }
prach_fd_occasion->k1.tl.tag = NFAPI_NR_CONFIG_K1_TAG; prach_fd_occasion->k1.tl.tag = NFAPI_NR_CONFIG_K1_TAG;
cfg->num_tlv++; cfg->num_tlv++;
...@@ -789,14 +778,18 @@ static void config_common(gNB_MAC_INST *nrmac, ...@@ -789,14 +778,18 @@ static void config_common(gNB_MAC_INST *nrmac,
cfg->tdd_table.tdd_period.value = *scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530; cfg->tdd_table.tdd_period.value = *scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530;
} }
LOG_D(NR_MAC, "Setting TDD configuration period to %d\n", cfg->tdd_table.tdd_period.value); LOG_D(NR_MAC, "Setting TDD configuration period to %d\n", cfg->tdd_table.tdd_period.value);
int periods_per_frame = set_tdd_config_nr(cfg, NR_TDD_UL_DL_Pattern_t *pattern1 = &scc->tdd_UL_DL_ConfigurationCommon->pattern1;
frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing, tdd_period_config_t period_cfg = {.num_dl_slots = pattern1->nrofDownlinkSlots,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots, .num_ul_slots = pattern1->nrofUplinkSlots,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols, .tdd_slot_bitmap[0].slot_type = TDD_NR_MIXED_SLOT,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots, .tdd_slot_bitmap[0].num_dl_symbols = pattern1->nrofDownlinkSymbols,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols); .tdd_slot_bitmap[0].num_ul_symbols = pattern1->nrofUplinkSymbols};
frame_structure_t fs = {.period_cfg = period_cfg, .is_tdd = true};
AssertFatal(periods_per_frame > 0, "TDD configuration cannot be configured\n"); fs.numb_slots_frame = nr_slots_per_frame[scs];
fs.numb_period_frame = get_nb_periods_per_frame(cfg->tdd_table.tdd_period.value);
fs.numb_slots_period = ((1 << scs) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) / fs.numb_period_frame;
set_tdd_config_nr(cfg, &fs);
AssertFatal(fs.numb_period_frame > 0, "TDD configuration cannot be configured\n");
} }
int nb_tx = config->nb_bfw[0]; // number of tx antennas int nb_tx = config->nb_bfw[0]; // number of tx antennas
......
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