Perform UL slot check in pre-processor

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c

@@ -463,8 +463,14 @@ int8_t select_ul_harq_pid(NR_UE_sched_ctrl_t *sched_ctrl) {
 
 void nr_simple_ulsch_preprocessor(module_id_t module_id,
                                   frame_t frame,
-                                  sub_frame_t slot) {
-  NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info;
+                                  sub_frame_t slot,
+                                  int num_slots_per_tdd,
+                                  uint64_t ulsch_in_slot_bitmap) {
+  gNB_MAC_INST *nr_mac = RC.nrmac[module_id];
+  NR_COMMON_channels_t *cc = nr_mac->common_channels;
+  NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
+  const int mu = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing;
+  NR_UE_info_t *UE_info = &nr_mac->UE_info;
 
   AssertFatal(UE_info->num_UEs <= 1,
               "%s() cannot handle more than one UE, but found %d\n",
@@ -478,6 +484,30 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id,
 
   NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
 
+  const int tda = 1;
+  const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList =
+    sched_ctrl->active_ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
+  AssertFatal(tda < tdaList->list.count,
+              "time domain assignment %d >= %d\n",
+              tda,
+              tdaList->list.count);
+  int K2 = get_K2(sched_ctrl->active_ubwp, tda, mu);
+  const int sched_frame = frame + (slot + K2 >= num_slots_per_tdd);
+  const int sched_slot = (slot + K2) % num_slots_per_tdd;
+  /* check if slot is UL, and for phy test verify that it is in first TDD
+   * period, slot 8 (for K2=6, this is at slot 2 in the gNB; because of UE
+   * limitations).  Note that if K2 or the TDD configuration is changed, below
+   * conditions might exclude each other and never be true */
+  const bool transmit =
+      is_xlsch_in_slot(ulsch_in_slot_bitmap, sched_slot)
+      && (!get_softmodem_params()->phy_test || sched_slot == 8);
+  if (!transmit)
+    return;
+
+  sched_ctrl->sched_pusch->time_domain_allocation = tda;
+  sched_ctrl->sched_pusch->slot = sched_slot;
+  sched_ctrl->sched_pusch->frame = sched_frame;
+
   const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
   sched_ctrl->search_space = get_searchspace(sched_ctrl->active_bwp, target_ss);
   uint8_t nr_of_candidates;
@@ -514,56 +544,30 @@ void nr_schedule_ulsch(module_id_t module_id,
                        int num_slots_per_tdd,
                        int ul_slots,
                        uint64_t ulsch_in_slot_bitmap) {
-  gNB_MAC_INST *nr_mac = RC.nrmac[module_id];
-  NR_COMMON_channels_t *cc = nr_mac->common_channels;
-  NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
-
-  const int mu = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing;
   const int UE_id = 0;
   NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info;
   AssertFatal(UE_info->active[UE_id],"Cannot find UE_id %d is not active\n",UE_id);
 
+  nr_simple_ulsch_preprocessor(
+      module_id, frame, slot, num_slots_per_tdd, ulsch_in_slot_bitmap);
+
   NR_CellGroupConfig_t *secondaryCellGroup = UE_info->secondaryCellGroup[UE_id];
   NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
-
-  const int tda = 1; // hardcoded for the moment
-  const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList =
-    sched_ctrl->active_ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
-  AssertFatal(tda < tdaList->list.count,
-              "time domain assignment %d >= %d\n",
-              tda,
-              tdaList->list.count);
-
-  int K2 = get_K2(sched_ctrl->active_ubwp, tda, mu);
-  /* check if slot is UL, and for phy test verify that it is in first TDD
-   * period, slot 8 (for K2=2, this is at slot 6 in the gNB; because of UE
-   * limitations).  Note that if K2 or the TDD configuration is changed, below
-   * conditions might exclude each other and never be true */
-  const int sched_frame = frame + (slot + K2 >= num_slots_per_tdd);
-  const int sched_slot = (slot + K2) % num_slots_per_tdd;
-  if (is_xlsch_in_slot(ulsch_in_slot_bitmap, sched_slot)
-        && (!get_softmodem_params()->phy_test || sched_slot == 8)) {
-
-    nfapi_nr_ul_dci_request_t *UL_dci_req = &RC.nrmac[module_id]->UL_dci_req[0];
-    UL_dci_req->SFN = frame;
-    UL_dci_req->Slot = slot;
-    nfapi_nr_ul_dci_request_pdus_t  *ul_dci_request_pdu;
+  if (sched_ctrl->sched_pusch->rbSize <= 0)
+    return;
 
   uint16_t rnti = UE_info->rnti[UE_id];
 
   /* PUSCH in a later slot, but corresponding DCI now! */
-    nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_id]->UL_tti_req_ahead[0][sched_slot];
-    AssertFatal(future_ul_tti_req->SFN == sched_frame
-                && future_ul_tti_req->Slot == sched_slot,
+  nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_id]->UL_tti_req_ahead[0][sched_ctrl->sched_pusch->slot];
+  AssertFatal(future_ul_tti_req->SFN == sched_ctrl->sched_pusch->frame
+              && future_ul_tti_req->Slot == sched_ctrl->sched_pusch->slot,
               "%d.%d future UL_tti_req's frame.slot %d.%d does not match PUSCH %d.%d\n",
               frame, slot,
               future_ul_tti_req->SFN,
               future_ul_tti_req->Slot,
-                sched_frame,
-                sched_slot);
-    nfapi_nr_ul_dci_request_t *ul_dci_req = &RC.nrmac[module_id]->UL_dci_req[0];
-    ul_dci_req->SFN = frame;
-    ul_dci_req->Slot = slot;
+              sched_ctrl->sched_pusch->frame,
+              sched_ctrl->sched_pusch->slot);
   future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE;
   future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t);
   nfapi_nr_pusch_pdu_t *pusch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pusch_pdu;
@@ -577,10 +581,12 @@ void nr_schedule_ulsch(module_id_t module_id,
     dci_formats[0]  = NR_UL_DCI_FORMAT_0_1;
   else
     dci_formats[0]  = NR_UL_DCI_FORMAT_0_0;
-
   int rnti_types[2] = { NR_RNTI_C, 0 };
 
   //Resource Allocation in time domain
+  const int tda = sched_ctrl->sched_pusch->time_domain_allocation;
+  const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList =
+    sched_ctrl->active_ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
   const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
   int StartSymbolIndex, NrOfSymbols;
   SLIV2SL(startSymbolAndLength,&StartSymbolIndex,&NrOfSymbols);
@@ -597,6 +603,7 @@ void nr_schedule_ulsch(module_id_t module_id,
   pusch_pdu->cyclic_prefix = 0;
 
   NR_PUSCH_Config_t *pusch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pusch_Config->choice.setup;
+  NR_ServingCellConfigCommon_t *scc = RC.nrmac[0]->common_channels->ServingCellConfigCommon;
   if (!pusch_Config->transformPrecoder)
     pusch_pdu->transform_precoding = !scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder;
   else
@@ -723,10 +730,6 @@ void nr_schedule_ulsch(module_id_t module_id,
     pusch_pdu->pdu_bit_map &= ~PUSCH_PDU_BITMAP_PUSCH_PTRS; // disable PUSCH PTRS
   }
 
-    // --------------------------------------------------------------------------------------------------------------------------------------------
-
-    //Pusch Allocation in frequency domain [TS38.214, sec 6.1.2.2]
-    //Optional Data only included if indicated in pduBitmap
   int8_t harq_id = select_ul_harq_pid(&UE_info->UE_sched_ctrl[UE_id]);
   if (harq_id < 0) return;
   NR_UE_ul_harq_t *cur_harq = &UE_info->UE_sched_ctrl[UE_id].ul_harq_processes[harq_id];
@@ -735,7 +738,7 @@ void nr_schedule_ulsch(module_id_t module_id,
   pusch_pdu->pusch_data.rv_index = nr_rv_round_map[cur_harq->round];
 
   cur_harq->state = ACTIVE_SCHED;
-    cur_harq->last_tx_slot = sched_slot;
+  cur_harq->last_tx_slot = sched_ctrl->sched_pusch->slot;
 
   uint8_t num_dmrs_symb = 0;
   for(int i = pusch_pdu->start_symbol_index; i < pusch_pdu->start_symbol_index + pusch_pdu->nr_of_symbols; i++)
@@ -762,16 +765,19 @@ void nr_schedule_ulsch(module_id_t module_id,
 
   pusch_pdu->pusch_data.num_cb = 0; //CBG not supported
 
-    ul_dci_request_pdu = &UL_dci_req->ul_dci_pdu_list[UL_dci_req->numPdus];
-    memset((void*)ul_dci_request_pdu,0,sizeof(nfapi_nr_ul_dci_request_pdus_t));
+  nfapi_nr_ul_dci_request_t *ul_dci_req = &RC.nrmac[module_id]->UL_dci_req[0];
+  ul_dci_req->SFN = frame;
+  ul_dci_req->Slot = slot;
+  nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu = &ul_dci_req->ul_dci_pdu_list[ul_dci_req->numPdus];
+  memset(ul_dci_request_pdu, 0, sizeof(nfapi_nr_ul_dci_request_pdus_t));
   ul_dci_request_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE;
   ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu));
   nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15;
-    UL_dci_req->numPdus+=1;
+  ul_dci_req->numPdus += 1;
 
   LOG_D(MAC,"Configuring ULDCI/PDCCH in %d.%d\n", frame,slot);
 
-    nr_configure_pdcch(nr_mac,
+  nr_configure_pdcch(RC.nrmac[0],
                      pdcch_pdu_rel15,
                      rnti,
                      sched_ctrl->search_space,
@@ -789,5 +795,4 @@ void nr_schedule_ulsch(module_id_t module_id,
 
 
   sched_ctrl->sched_pusch->rbSize = 0;
-  }
 }

openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h

@@ -295,6 +295,9 @@ typedef struct NR_sched_pusch {
   uint16_t rbSize;
   uint16_t rbStart;
 
+  // time-domain allocation for scheduled RBs
+  int time_domain_allocation;
+
   /// MCS
   uint8_t mcs;
 } NR_sched_pusch_t;