Commit 3b39a374 authored by Robert Schmidt's avatar Robert Schmidt

Merge remote-tracking branch 'origin/NR_multiSSB_initialaccess_fixes' into integration_2022_wk40

parents 7d2281c0 dded67c1
......@@ -57,7 +57,8 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
unsigned char symbol,
unsigned char Ns,
int sample_offset);
int sample_offset,
bool pbch_decoded);
int slot_fep_mbsfn(PHY_VARS_UE *phy_vars_ue,
unsigned char l,
......
......@@ -150,7 +150,8 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
unsigned char symbol,
unsigned char Ns,
int sample_offset)
int sample_offset,
bool pbch_decoded)
{
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
NR_UE_COMMON *common_vars = &ue->common_vars;
......@@ -160,7 +161,7 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
unsigned int nb_prefix_samples;
unsigned int nb_prefix_samples0;
if (ue->is_synchronized) {
if (pbch_decoded) {
nb_prefix_samples = frame_parms->nb_prefix_samples;
nb_prefix_samples0 = frame_parms->nb_prefix_samples0;
}
......
......@@ -1272,8 +1272,8 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
int re_offset = k;
#ifdef DEBUG_PDSCH
printf("PDSCH Channel Estimation : ThreadId %d, gNB_id %d ch_offset %d, symbol_offset %d OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",proc->thread_id, gNB_id,ch_offset,symbol_offset,ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,Ns,k, symbol);
printf("PDSCH Channel Estimation : ThreadId %d, gNB_id %d ch_offset %d, symbol_offset %d OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",
proc->thread_id, gNB_id,ch_offset,symbol_offset,ue->frame_parms.ofdm_symbol_size, ue->frame_parms.Ncp,Ns,k, symbol);
#endif
// generate pilot for gNB port number 1000+p
......
......@@ -403,7 +403,8 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
#endif
if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",
frame,nr_slot_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
//----------------------------------------------------------
//--------------------- channel compensation ---------------
......@@ -428,7 +429,8 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
measurements); // log2_maxh+I0_shift
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n", frame, nr_slot_rx, slot, symbol, pdsch_vars[gNB_id]->log2_maxh, proc->channel_level, ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n",
frame, nr_slot_rx, slot, symbol, pdsch_vars[gNB_id]->log2_maxh, proc->channel_level, ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
start_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
......@@ -464,7 +466,8 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
dl_ch_mag_ptr = pdsch_vars[gNB_id_i]->dl_ch_mag0;
if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine and zero forcing %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine and zero forcing %5.2f \n",
frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
start_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
/* Store the valid DL RE's */
......@@ -544,7 +547,8 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",
frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
// Please keep it: useful for debugging
#ifdef DEBUG_PDSCH_RX
......@@ -1647,7 +1651,6 @@ void nr_dlsch_extract_rbs(int **rxdataF,
} else {
int neg_length = frame_parms->ofdm_symbol_size - start_re;
int pos_length = nb_rb_pdsch * NR_NB_SC_PER_RB - neg_length;
memcpy(rxF_ext, &rxF[start_re], neg_length * sizeof(int32_t));
memcpy(&rxF_ext[neg_length], rxF, pos_length * sizeof(int32_t));
}
......
......@@ -658,7 +658,7 @@ int nr_dlsch_qpsk_llr(NR_DL_FRAME_PARMS *frame_parms,
//*llr32 = *rxF;
llr32->r = rxF->r >> 3;
llr32->i = rxF->i >> 3;
//printf("dlsch_qpsk_llr %d : (%d,%d)\n", i, llr32->r, llr32->i);
LOG_D(PHY,"dlsch_qpsk_llr %d : (%d,%d)\n", i, llr32->r, llr32->i);
rxF++;
llr32++;
}
......
......@@ -298,7 +298,8 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
proc,
i,
0,
is*fp->samples_per_frame+ue->ssb_offset);
is*fp->samples_per_frame+ue->ssb_offset,
false);
#ifdef DEBUG_INITIAL_SYNCH
LOG_I(PHY,"Calling sss detection (normal CP)\n");
......@@ -339,6 +340,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
}
if (ret == 0) {
// sync at symbol ue->symbol_offset
// computing the offset wrt the beginning of the frame
int mu = fp->numerology_index;
......@@ -534,8 +536,8 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size = ((((fp->symbols_per_slot*(fp->ofdm_symbol_size+LTE_CE_FILTER_LENGTH))+15)/16)*16);
__attribute__ ((aligned(16))) int32_t pdcch_dl_ch_estimates[4*fp->nb_antennas_rx][pdcch_est_size];
for(int n_ss = 0; n_ss<phy_pdcch_config.nb_search_space; n_ss++) {
proc->nr_slot_rx = phy_pdcch_config.slot; // setting PDCCH slot to proc
uint8_t nb_symb_pdcch = phy_pdcch_config.pdcch_config[n_ss].coreset.duration;
int start_symb = phy_pdcch_config.pdcch_config[n_ss].coreset.StartSymbolIndex;
for (uint16_t l=start_symb; l<start_symb+nb_symb_pdcch; l++) {
......@@ -543,7 +545,8 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
proc,
l, // the UE PHY has no notion of the symbols to be monitored in the search space
phy_pdcch_config.slot,
is*fp->samples_per_frame+phy_pdcch_config.sfn*fp->samples_per_frame+ue->rx_offset);
is*fp->samples_per_frame+phy_pdcch_config.sfn*fp->samples_per_frame+ue->rx_offset,
true);
nr_pdcch_channel_estimation(ue,
proc,
......@@ -571,7 +574,8 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
proc,
m,
phy_pdcch_config.slot, // same slot and offset as pdcch
is*fp->samples_per_frame+phy_pdcch_config.sfn*fp->samples_per_frame+ue->rx_offset);
is*fp->samples_per_frame+phy_pdcch_config.sfn*fp->samples_per_frame+ue->rx_offset,
true);
}
int ret = nr_ue_pdsch_procedures(ue,
......
......@@ -1550,6 +1550,7 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac,
LOG_D(NR_MAC,"initial_pucch_id %d, pucch_resource %p\n",pucch->initial_pucch_id,pucch->pucch_resource);
// configure pucch from Table 9.2.1-1
// only for ack/nack
if (pucch->initial_pucch_id > -1 &&
pucch->pucch_resource == NULL) {
......@@ -1582,25 +1583,12 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac,
pucch_pdu->freq_hop_flag = 1;
pucch_pdu->time_domain_occ_idx = 0;
if (O_SR == 0 || pucch->sr_payload == 0) { /* only ack is transmitted TS 36.213 9.2.3 UE procedure for reporting HARQ-ACK */
if (O_ACK == 1)
pucch_pdu->mcs = sequence_cyclic_shift_1_harq_ack_bit[pucch->ack_payload & 0x1]; /* only harq of 1 bit */
else
pucch_pdu->mcs = sequence_cyclic_shift_2_harq_ack_bits[pucch->ack_payload & 0x3]; /* only harq with 2 bits */
}
else { /* SR + eventually ack are transmitted TS 36.213 9.2.5.1 UE procedure for multiplexing HARQ-ACK or CSI and SR */
if (pucch->sr_payload == 1) { /* positive scheduling request */
if (O_ACK == 1)
pucch_pdu->mcs = sequence_cyclic_shift_1_harq_ack_bit_positive_sr[pucch->ack_payload & 0x1]; /* positive SR and harq of 1 bit */
else if (O_ACK == 2)
pucch_pdu->mcs = sequence_cyclic_shift_2_harq_ack_bits_positive_sr[pucch->ack_payload & 0x3]; /* positive SR and harq with 2 bits */
else
pucch_pdu->mcs = 0; /* only positive SR */
}
}
// TODO verify if SR can be transmitted in this mode
pucch_pdu->payload = (pucch->sr_payload << O_ACK) | pucch->ack_payload;
pucch_pdu->payload = pucch->ack_payload;
}
else if (pucch->pucch_resource != NULL) {
......
......@@ -512,9 +512,8 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
int nr_dl_slots = n;
int nr_ulstart_slot = 0;
if (tdd) {
nr_ulstart_slot = tdd->nrofDownlinkSlots + (tdd->nrofUplinkSymbols == 0);
nr_dl_slots = tdd->nrofDownlinkSlots + (tdd->nrofDownlinkSymbols != 0);
nr_ulstart_slot = tdd->nrofDownlinkSlots + (tdd->nrofUplinkSymbols == 0);
nr_ulstart_slot = tdd->nrofDownlinkSlots;
nr_slots_period /= get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
}
else
......
......@@ -636,7 +636,7 @@ void nr_initiate_ra_proc(module_id_t module_idP,
ra->RA_rnti = ra_rnti;
ra->preamble_index = preamble_index;
ra->beam_id = beam_index;
ra->beam_id = cc->ssb_index[beam_index];
LOG_I(NR_MAC,
"[gNB %d][RAPROC] CC_id %d Frame %d Activating Msg2 generation in frame %d, slot %d using RA rnti %x SSB, new rnti %04x "
......@@ -886,7 +886,7 @@ void nr_get_Msg3alloc(module_id_t module_id,
int StartSymbolIndex = 0;
int NrOfSymbols = 0;
int startSymbolAndLength = 0;
int temp_slot = 0;
int abs_slot = 0;
ra->Msg3_tda_id = 16; // initialization to a value above limit
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = ul_bwp->tdaList;
......@@ -895,8 +895,11 @@ void nr_get_Msg3alloc(module_id_t module_id,
const int n_slots_frame = nr_slots_per_frame[mu];
uint8_t k2 = 0;
if (frame_type == TDD) {
int nb_periods_per_frame = get_nb_periods_per_frame(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity);
int nb_slots_per_period = ((1<<mu)*10)/nb_periods_per_frame;
int msg3_slot = tdd->nrofDownlinkSlots; // first uplink slot
if (tdd->nrofUplinkSymbols > 0 && tdd->nrofUplinkSymbols < 3)
msg3_slot++; // we can't trasmit msg3 in mixed slot if there are less than 3 symbols
const int nb_periods_per_frame = get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
const int nb_slots_per_period = ((1<<mu)*10)/nb_periods_per_frame;
for (int i=0; i<pusch_TimeDomainAllocationList->list.count; i++) {
startSymbolAndLength = pusch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, &StartSymbolIndex, &NrOfSymbols);
......@@ -904,36 +907,33 @@ void nr_get_Msg3alloc(module_id_t module_id,
int start_symbol_index,nr_of_symbols;
SLIV2SL(pusch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength, &start_symbol_index, &nr_of_symbols);
LOG_D(NR_MAC,"Checking Msg3 TDA %d : k2 %d, sliv %d,S %d L %d\n",i,(int)k2,(int)pusch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength,start_symbol_index,nr_of_symbols);
// we want to transmit in the uplink symbols of mixed slot AND assuming Msg2 was in the mixed slot
if ((k2 + DELTA[mu])%nb_slots_per_period == 0) {
temp_slot = current_slot + k2 + DELTA[mu]; // msg3 slot according to 8.3 in 38.213
ra->Msg3_slot = temp_slot%nr_slots_per_frame[mu];
if (is_xlsch_in_slot(RC.nrmac[module_id]->ulsch_slot_bitmap[ra->Msg3_slot / 64], ra->Msg3_slot) &&
nr_of_symbols<=scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols&&
start_symbol_index>=(14-scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols)) {
// we want to transmit in the uplink symbols of mixed slot or the first uplink slot
abs_slot = (current_slot + k2 + DELTA[mu]);
int temp_slot = abs_slot % nr_slots_per_frame[mu]; // msg3 slot according to 8.3 in 38.213
if ((temp_slot % nb_slots_per_period) == msg3_slot &&
is_xlsch_in_slot(RC.nrmac[module_id]->ulsch_slot_bitmap[temp_slot / 64], temp_slot)) {
ra->Msg3_tda_id = i;
ra->msg3_startsymb = StartSymbolIndex;
ra->msg3_nrsymb = NrOfSymbols;
ra->Msg3_slot = temp_slot;
break;
}
}
}
AssertFatal(ra->Msg3_tda_id < 16, "Couldn't find an appropriate TD allocation for Msg3\n");
}
else {
ra->Msg3_tda_id = 0;
k2 = *pusch_TimeDomainAllocationList->list.array[0]->k2;
temp_slot = current_slot + k2 + DELTA[mu]; // msg3 slot according to 8.3 in 38.213
ra->Msg3_slot = temp_slot%nr_slots_per_frame[mu];
abs_slot = current_slot + k2 + DELTA[mu]; // msg3 slot according to 8.3 in 38.213
ra->Msg3_slot = abs_slot % nr_slots_per_frame[mu];
}
AssertFatal(ra->Msg3_tda_id<16,"Unable to find Msg3 time domain allocation in list\n");
if (n_slots_frame > temp_slot)
if (n_slots_frame > abs_slot)
ra->Msg3_frame = current_frame;
else
ra->Msg3_frame = (current_frame + (temp_slot / n_slots_frame)) % 1024;
ra->Msg3_frame = (current_frame + (abs_slot / n_slots_frame)) % 1024;
// beam association for FR2
if (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0] >= 257) {
......@@ -1041,10 +1041,10 @@ void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu,
int num_dmrs_symb = 0;
for(int i = start_symbol_index; i < start_symbol_index+nr_of_symbols; i++)
num_dmrs_symb += (pusch_pdu->ul_dmrs_symb_pos >> i) & 1;
int TBS = 0;
while(TBS<7) { // TBS for msg3 is 7 bytes (except for RRCResumeRequest1 currently not implemented)
mcsindex++;
AssertFatal(mcsindex<28,"Exceeding MCS limit for Msg3\n");
int R = nr_get_code_rate_ul(mcsindex,pusch_pdu->mcs_table);
pusch_pdu->target_code_rate = R;
pusch_pdu->qam_mod_order = nr_get_Qm_ul(mcsindex,pusch_pdu->mcs_table);
......@@ -1060,7 +1060,6 @@ void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu,
pusch_pdu->mcs_index = mcsindex;
pusch_pdu->pusch_data.tb_size = TBS;
pusch_pdu->maintenance_parms_v3.ldpcBaseGraph = get_BG(TBS<<3,R);
}
}
......@@ -1404,10 +1403,9 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id];
NR_UE_DL_BWP_t *dl_bwp = &ra->DL_BWP;
if (ra->Msg4_frame == frameP && ra->Msg4_slot == slotP ) {
uint8_t time_domain_assignment = 0;
uint8_t mcsIndex = 0;
// if it is a DL slot, if the RA is in MSG4 state
if (is_xlsch_in_slot(nr_mac->dlsch_slot_bitmap[slotP / 64], slotP) &&
ra->state == Msg4) {
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
NR_SearchSpace_t *ss = ra->ra_ss;
......@@ -1427,7 +1425,8 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
return;
}
LOG_I(NR_MAC,"Generate msg4, rnti: %04x\n", ra->rnti);
if(UE->enc_rval.encoded <= 0) return; // need to wait until RRCSetup is encoded
NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
long BWPStart = 0;
......@@ -1442,26 +1441,6 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
BWPSize = type0_PDCCH_CSS_config->num_rbs;
}
/* get the PID of a HARQ process awaiting retrnasmission, or -1 otherwise */
int current_harq_pid = sched_ctrl->retrans_dl_harq.head;
// HARQ management
if (current_harq_pid < 0) {
AssertFatal(sched_ctrl->available_dl_harq.head >= 0,
"UE context not initialized: no HARQ processes found\n");
current_harq_pid = sched_ctrl->available_dl_harq.head;
remove_front_nr_list(&sched_ctrl->available_dl_harq);
}
NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
DevAssert(!harq->is_waiting);
add_tail_nr_list(&sched_ctrl->feedback_dl_harq, current_harq_pid);
harq->is_waiting = true;
ra->harq_pid = current_harq_pid;
// Remove UE associated to TC-RNTI
if(harq->round==0 && ra->msg3_dcch_dtch) {
mac_remove_nr_ue(nr_mac, tc_rnti);
}
// get CCEindex, needed also for PUCCH and then later for PDCCH
uint8_t aggregation_level;
uint8_t nr_of_candidates;
......@@ -1491,7 +1470,33 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
LOG_D(NR_MAC,"[RAPROC] Msg4 r_pucch %d (CCEIndex %d, nb_of_candidates %d, delta_PRI %d)\n", r_pucch, CCEIndex, nr_of_candidates, delta_PRI);
int alloc = nr_acknack_scheduling(module_idP, UE, frameP, slotP, r_pucch, 1);
AssertFatal(alloc>=0,"Couldn't find a pucch allocation for ack nack (msg4)\n");
if (alloc<0) {
LOG_D(NR_MAC,"Couldn't find a pucch allocation for ack nack (msg4) in frame %d slot %d\n",frameP,slotP);
return;
}
LOG_I(NR_MAC,"Generate msg4, rnti: %04x\n", ra->rnti);
/* get the PID of a HARQ process awaiting retrnasmission, or -1 otherwise */
int current_harq_pid = sched_ctrl->retrans_dl_harq.head;
// HARQ management
if (current_harq_pid < 0) {
AssertFatal(sched_ctrl->available_dl_harq.head >= 0,
"UE context not initialized: no HARQ processes found\n");
current_harq_pid = sched_ctrl->available_dl_harq.head;
remove_front_nr_list(&sched_ctrl->available_dl_harq);
}
NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
DevAssert(!harq->is_waiting);
add_tail_nr_list(&sched_ctrl->feedback_dl_harq, current_harq_pid);
harq->is_waiting = true;
ra->harq_pid = current_harq_pid;
// Remove UE associated to TC-RNTI
if(harq->round==0 && ra->msg3_dcch_dtch) {
mac_remove_nr_ue(nr_mac, tc_rnti);
}
NR_sched_pucch_t *pucch = &sched_ctrl->sched_pucch[alloc];
harq->feedback_slot = pucch->ul_slot;
harq->feedback_frame = pucch->frame;
......@@ -1528,15 +1533,15 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
}
}
uint8_t time_domain_assignment = get_dl_tda(nr_mac, scc, slotP);
NR_tda_info_t msg4_tda = nr_get_pdsch_tda_info(dl_bwp, time_domain_assignment);
NR_pdsch_dmrs_t dmrs_info = get_dl_dmrs_params(scc,
dl_bwp,
&msg4_tda,
1);
uint8_t mcsTableIdx = dl_bwp->mcsTableIdx;
uint8_t mcsIndex = 0;
int rbStart = 0;
int rbSize = 0;
uint8_t tb_scaling = 0;
......@@ -1832,8 +1837,6 @@ void nr_check_Msg4_Ack(module_id_t module_id, int CC_id, frame_t frame, sub_fram
}
} else {
LOG_I(NR_MAC, "(UE %04x) Received Nack of RA-Msg4. Preparing retransmission!\n", ra->rnti);
ra->Msg4_frame = (frame + 1) % 1024;
ra->Msg4_slot = 1;
ra->state = Msg4;
}
}
......
......@@ -67,7 +67,7 @@ const int get_dl_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon
if ((slot%nr_slots_period) == tdd->nrofDownlinkSlots)
return 2;
}
return 0; // if FDD or not mixed slot in TDD, for now use default TDA (TODO handle CSI-RS slots)
return 0; // if FDD or not mixed slot in TDD, for now use default TDA
}
// Compute and write all MAC CEs and subheaders, and return number of written
......
......@@ -721,8 +721,6 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
// the function is only called to decode the contention resolution sub-header
if (nr_process_mac_pdu(gnb_mod_idP, UE, CC_idP, frameP, slotP, sduP, sdu_lenP, -1) == 0) {
ra->state = Msg4;
ra->Msg4_frame = (frameP + 2) % 1024;
ra->Msg4_slot = 1;
if (ra->msg3_dcch_dtch) {
// Check if the UE identified by C-RNTI still exists at the gNB
......@@ -743,8 +741,8 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
reset_ul_harq_list(&UE_C->UE_sched_ctrl);
}
}
LOG_I(NR_MAC, "Scheduling RA-Msg4 for TC_RNTI 0x%04x (state %d, frame %d, slot %d)\n",
(ra->msg3_dcch_dtch?ra->crnti:ra->rnti), ra->state, ra->Msg4_frame, ra->Msg4_slot);
LOG_I(NR_MAC, "Activating scheduling RA-Msg4 for TC_RNTI 0x%04x (state %d)\n",
(ra->msg3_dcch_dtch?ra->crnti:ra->rnti), ra->state);
}
else {
nr_mac_remove_ra_rnti(gnb_mod_idP, ra->rnti);
......
......@@ -171,10 +171,6 @@ typedef struct {
frame_t Msg3_frame;
/// Msg3 time domain allocation index
uint8_t Msg3_tda_id;
/// Subframe where Msg4 is to be sent
sub_frame_t Msg4_slot;
/// Frame where Msg4 is to be sent
frame_t Msg4_frame;
/// harq_pid used for Msg4 transmission
uint8_t harq_pid;
/// UE RNTI allocated during RAR
......
......@@ -604,23 +604,26 @@ void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay){
pusch_timedomainresourceallocation->mappingType = NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB;
pusch_timedomainresourceallocation->startSymbolAndLength = get_SLIV(14-ul_symb,ul_symb-1); // starting in fist ul symbol til the last but one
ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation);
}
// UL TDA index 2 for msg3 in the mixed slot (TDD)
int nb_periods_per_frame = get_nb_periods_per_frame(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity);
int nb_slots_per_period = ((1<<mu) * 10)/nb_periods_per_frame;
struct NR_PUSCH_TimeDomainResourceAllocation *pusch_timedomainresourceallocation_msg3 = CALLOC(1,sizeof(struct NR_PUSCH_TimeDomainResourceAllocation));
pusch_timedomainresourceallocation_msg3->k2 = CALLOC(1,sizeof(long));
*pusch_timedomainresourceallocation_msg3->k2 = nb_slots_per_period - DELTA[mu];
int no_mix_slot = ul_symb < 3 ? 1 : 0; // we need at least 2 symbols for scheduling Msg3
*pusch_timedomainresourceallocation_msg3->k2 = nb_slots_per_period - DELTA[mu] + no_mix_slot;
if(*pusch_timedomainresourceallocation_msg3->k2 < min_fb_delay)
*pusch_timedomainresourceallocation_msg3->k2 += nb_slots_per_period;
AssertFatal(*pusch_timedomainresourceallocation_msg3->k2<33,"Computed k2 for msg3 %ld is larger than the range allowed by RRC (0..32)\n",
*pusch_timedomainresourceallocation_msg3->k2);
pusch_timedomainresourceallocation_msg3->mappingType = NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB;
if(no_mix_slot)
pusch_timedomainresourceallocation_msg3->startSymbolAndLength = get_SLIV(0,13); // full allocation if there is no mixed slot
else
pusch_timedomainresourceallocation_msg3->startSymbolAndLength = get_SLIV(14-ul_symb,ul_symb-1); // starting in fist ul symbol til the last but one
ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation_msg3);
}
}
}
}
void set_dl_DataToUL_ACK(NR_PUCCH_Config_t *pucch_Config, int min_feedback_time) {
......
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