Commit 4a058413 authored by Calvin HSU's avatar Calvin HSU

ue add IF module, calculation of system frame and ssb_index

parent 966b3a05
...@@ -1296,6 +1296,7 @@ set(PHY_SRC_UE ...@@ -1296,6 +1296,7 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/INIT/nr_init_ue.c ${OPENAIR1_DIR}/PHY/INIT/nr_init_ue.c
${OPENAIR1_DIR}/SCHED_NR_UE/phy_procedures_nr_ue.c ${OPENAIR1_DIR}/SCHED_NR_UE/phy_procedures_nr_ue.c
#${OPENAIR1_DIR}/SCHED_NR_UE/phy_procedures_nr_common_ue.c #${OPENAIR1_DIR}/SCHED_NR_UE/phy_procedures_nr_common_ue.c
${OPENAIR1_DIR}/SCHED_NR_UE/fapi_nr_ue_l1.c
${PHY_POLARSRC} ${PHY_POLARSRC}
) )
...@@ -1321,6 +1322,7 @@ add_library(PHY_RU ${PHY_SRC_RU}) ...@@ -1321,6 +1322,7 @@ add_library(PHY_RU ${PHY_SRC_RU})
set(MAC_DIR ${OPENAIR2_DIR}/LAYER2/MAC) set(MAC_DIR ${OPENAIR2_DIR}/LAYER2/MAC)
set(NR_UE_MAC_DIR ${OPENAIR2_DIR}/LAYER2/NR_MAC_UE) set(NR_UE_MAC_DIR ${OPENAIR2_DIR}/LAYER2/NR_MAC_UE)
set(PHY_INTERFACE_DIR ${OPENAIR2_DIR}/PHY_INTERFACE) set(PHY_INTERFACE_DIR ${OPENAIR2_DIR}/PHY_INTERFACE)
set(NR_UE_PHY_INTERFACE_DIR ${OPENAIR2_DIR}/NR_UE_PHY_INTERFACE)
set(RLC_DIR ${OPENAIR2_DIR}/LAYER2/RLC) set(RLC_DIR ${OPENAIR2_DIR}/LAYER2/RLC)
set(RLC_UM_DIR ${OPENAIR2_DIR}/LAYER2/RLC/UM_v9.3.0) set(RLC_UM_DIR ${OPENAIR2_DIR}/LAYER2/RLC/UM_v9.3.0)
set(RLC_AM_DIR ${OPENAIR2_DIR}/LAYER2/RLC/AM_v9.3.0) set(RLC_AM_DIR ${OPENAIR2_DIR}/LAYER2/RLC/AM_v9.3.0)
...@@ -1440,6 +1442,7 @@ set (MAC_SRC ...@@ -1440,6 +1442,7 @@ set (MAC_SRC
${MAC_DIR}/config_ue.c ${MAC_DIR}/config_ue.c
) )
set (MAC_SRC_UE set (MAC_SRC_UE
${MAC_DIR}/main_ue.c ${MAC_DIR}/main_ue.c
${MAC_DIR}/ue_procedures.c ${MAC_DIR}/ue_procedures.c
...@@ -1447,11 +1450,16 @@ set (MAC_SRC_UE ...@@ -1447,11 +1450,16 @@ set (MAC_SRC_UE
${MAC_DIR}/l1_helpers.c ${MAC_DIR}/l1_helpers.c
${MAC_DIR}/rar_tools_ue.c ${MAC_DIR}/rar_tools_ue.c
${MAC_DIR}/config_ue.c ${MAC_DIR}/config_ue.c
)
set (MAC_NR_SRC_UE
${NR_UE_PHY_INTERFACE_DIR}/NR_IF_Module.c
${NR_UE_MAC_DIR}/config_ue.c ${NR_UE_MAC_DIR}/config_ue.c
${NR_UE_MAC_DIR}/mac_vars.c ${NR_UE_MAC_DIR}/mac_vars.c
${NR_UE_MAC_DIR}/main_ue_nr.c ${NR_UE_MAC_DIR}/main_ue_nr.c
${NR_UE_MAC_DIR}/nr_ue_procedures.c ${NR_UE_MAC_DIR}/nr_ue_procedures.c
) )
set (ENB_APP_SRC set (ENB_APP_SRC
${OPENAIR2_DIR}/ENB_APP/enb_app.c ${OPENAIR2_DIR}/ENB_APP/enb_app.c
...@@ -1468,8 +1476,10 @@ add_library(L2 ...@@ -1468,8 +1476,10 @@ add_library(L2
add_library(L2_UE add_library(L2_UE
${L2_SRC_UE} ${L2_SRC_UE}
${MAC_SRC_UE} ${MAC_SRC_UE}
${MAC_NR_SRC_UE}
) )
include_directories(${NR_UE_PHY_INTERFACE_DIR})
include_directories(${NFAPI_USER_DIR}) include_directories(${NFAPI_USER_DIR})
......
...@@ -15,18 +15,20 @@ ...@@ -15,18 +15,20 @@
*/ */
#ifndef _NFAPI_NR_INTERFACE_NR_EXTENSION_H_ #ifndef _FAPI_NR_INTERFACE_NR_EXTENSION_H_
#define _NFAPI_NR_INTERFACE_NR_EXTENSION_H_ #define _FAPI_NR_INTERFACE_NR_EXTENSION_H_
#define _NFAPI_NR_INTERFACE_H_ #define _FAPI_NR_INTERFACE_H_
#include "stddef.h" #include "stddef.h"
#define NFAPI_NR_MAX_NUM_DL_ALLOCATIONS 16 #define FAPI_NR_MAX_NUM_DL_ALLOCATIONS 16
#define NFAPI_NR_MAX_NUM_UL_ALLOCATIONS 16 #define FAPI_NR_MAX_NUM_UL_ALLOCATIONS 16
#define NFAPI_NR_MAX_NUM_SERVING_CELLS 32 #define FAPI_NR_MAX_NUM_SERVING_CELLS 32
#define NFAPI_NR_MAX_NUM_ZP_CSI_RS_RESOURCE_PER_SET 16 #define FAPI_NR_MAX_NUM_ZP_CSI_RS_RESOURCE_PER_SET 16
#define FAPI_NR_MAX_NUM_CANDIDATE_BEAMS 16
#define FAPI_NR_MAX_RA_OCCASION_PER_CSIRS 64
typedef unsigned int uint32_t; typedef unsigned int uint32_t;
typedef unsigned short uint16_t; typedef unsigned short uint16_t;
...@@ -35,12 +37,19 @@ typedef signed int int32_t; ...@@ -35,12 +37,19 @@ typedef signed int int32_t;
typedef signed short int16_t; typedef signed short int16_t;
typedef signed char int8_t; typedef signed char int8_t;
typedef enum {
FAPI_NR_RX_PDU_BCCH_BCH_TYPE = 0,
FAPI_NR_RX_PDU_BCCH_DLSCH_TYPE
} fapi_nr_rx_pdu_type_e;
typedef struct { typedef struct {
uint16_t phy_id; uint16_t phy_id;
uint16_t message_id; uint16_t message_id;
uint16_t message_length; uint16_t message_length;
uint16_t spare; uint16_t spare;
} nfapi_nr_p4_p5_message_header_t; } fapi_nr_p4_p5_message_header_t;
typedef struct { typedef struct {
uint16_t phy_id; uint16_t phy_id;
...@@ -49,20 +58,16 @@ typedef struct { ...@@ -49,20 +58,16 @@ typedef struct {
uint16_t m_segment_sequence; /* This consists of 3 fields - namely, M, Segement & Sequence number*/ uint16_t m_segment_sequence; /* This consists of 3 fields - namely, M, Segement & Sequence number*/
uint32_t checksum; uint32_t checksum;
uint32_t transmit_timestamp; uint32_t transmit_timestamp;
} nfapi_nr_p7_message_header_t; } fapi_nr_p7_message_header_t;
typedef struct { typedef struct {
uint16_t tag; uint16_t tag;
uint16_t length; uint16_t length;
} nfapi_nr_tl_t; } fapi_nr_tl_t;
#define NFAPI_NR_TAG_LENGTH_PACKED_LEN 4 #define FAPI_NR_TAG_LENGTH_PACKED_LEN 4
typedef struct { typedef struct {
nfapi_nr_tl_t tl; fapi_nr_tl_t tl;
// common C-RNTI // common C-RNTI
uint8_t dci_format; uint8_t dci_format;
uint8_t frequency_domain_resouce_assignment; // 38.214 chapter 5.1.2.2 uint8_t frequency_domain_resouce_assignment; // 38.214 chapter 5.1.2.2
...@@ -80,8 +85,8 @@ typedef struct { ...@@ -80,8 +85,8 @@ typedef struct {
uint8_t carrier_indicator; uint8_t carrier_indicator;
uint8_t bwp_indndicator; uint8_t bwp_indndicator;
uint8_t vrb_to_prb_mapping; uint8_t vrb_to_prb_mapping;
uint8_t downlink_assignment_index_1; uint8_t downlink_assignment_index1;
uint8_t downlink_assignment_index_2; uint8_t downlink_assignment_index2;
uint8_t srs_resource_indicator; uint8_t srs_resource_indicator;
uint8_t precoding_information; uint8_t precoding_information;
uint8_t antenna_ports; uint8_t antenna_ports;
...@@ -116,11 +121,11 @@ typedef struct { ...@@ -116,11 +121,11 @@ typedef struct {
uint8_t dci2_3_srs_request; // 38.212 table 7.3.1.1.2-5 uint8_t dci2_3_srs_request; // 38.212 table 7.3.1.1.2-5
uint8_t dci2_3_tpc_command; uint8_t dci2_3_tpc_command;
} nfapi_nr_dci_pdu_rel15_t; } fapi_nr_dci_pdu_rel15_t;
#define NFAPI_NR_HI_DCI0_REQUEST_DCI_PDU_REL8_TAG 0x2020 #define FAPI_NR_HI_DCI0_REQUEST_DCI_PDU_REL8_TAG 0x2020
typedef struct { typedef struct {
nfapi_nr_tl_t tl; fapi_nr_tl_t tl;
uint8_t uci_format; uint8_t uci_format;
uint8_t uci_channel; uint8_t uci_channel;
uint8_t harq_ack_bits; uint8_t harq_ack_bits;
...@@ -129,13 +134,12 @@ typedef struct { ...@@ -129,13 +134,12 @@ typedef struct {
uint32_t csi; uint32_t csi;
uint8_t sr_bits; uint8_t sr_bits;
uint32_t sr; uint32_t sr;
} nfapi_nr_uci_pdu_rel15_t; } fapi_nr_uci_pdu_rel15_t;
// //
// Top level NFAPI messages // Top level FAPI messages
// //
...@@ -148,105 +152,103 @@ typedef struct { ...@@ -148,105 +152,103 @@ typedef struct {
uint16_t rnti; uint16_t rnti;
uint8_t dci_type; uint8_t dci_type;
uint8_t dci_size; uint8_t dci_size;
nfapi_nr_dci_pdu_rel15_t dci; fapi_nr_dci_pdu_rel15_t dci;
}nfapi_nr_dci_indication_pdu_t; }fapi_nr_dci_indication_pdu_t;
typedef struct { typedef struct {
nfapi_nr_tl_t tl; fapi_nr_tl_t tl;
uint16_t number_of_dcis; uint16_t number_of_dcis;
nfapi_nr_dci_indication_pdu_t* dci_list; fapi_nr_dci_indication_pdu_t* dci_list;
} nfapi_nr_dci_indication_body_t; } fapi_nr_dci_indication_body_t;
/// ///
typedef struct { typedef struct {
nfapi_nr_p7_message_header_t header; fapi_nr_p7_message_header_t header;
uint16_t sfn_sf_slot; uint16_t sfn_sf_slot;
nfapi_nr_dci_indication_body_t dci_indication_body; fapi_nr_dci_indication_body_t dci_indication_body;
} nfapi_nr_dci_indication_t; } fapi_nr_dci_indication_t;
#define NFAPI_NR_TX_MAX_PDU 100 #define FAPI_NR_TX_MAX_PDU 100
typedef struct { typedef struct {
nfapi_nr_tl_t tl; fapi_nr_tl_t tl;
uint8_t* data; uint32_t pdu_index;
} nfapi_nr_rx_request_body_t; uint32_t pdu_length;
#define NFAPI_NR_TX_REQUEST_BODY_TAG 0x2022 uint8_t* pdu;
} fapi_nr_rx_request_body_t;
#define FAPI_NR_TX_REQUEST_BODY_TAG 0x2022
/// ///
typedef struct { typedef struct {
nfapi_nr_p7_message_header_t header; fapi_nr_p7_message_header_t header;
uint16_t sfn_sf_slot; uint16_t sfn_sf_slot;
nfapi_nr_rx_request_body_t rx_request_body; fapi_nr_rx_request_body_t rx_request_body;
} nfapi_nr_rx_indication_t; } fapi_nr_rx_indication_t;
typedef struct { typedef struct {
nfapi_nr_tl_t tl; fapi_nr_tl_t tl;
uint8_t ul_cqi; uint8_t ul_cqi;
uint16_t timing_advance; uint16_t timing_advance;
} nfapi_nr_tx_indication_t; uint16_t rnti;
} fapi_nr_tx_config_t;
#define NFAPI_NR_TX_MAX_SEGMENTS 32 #define FAPI_NR_TX_MAX_SEGMENTS 32
typedef struct { typedef struct {
uint16_t pdu_length; uint16_t pdu_length;
uint16_t pdu_index; uint16_t pdu_index;
uint8_t num_segments; uint8_t* pdu;
struct { } fapi_nr_tx_request_pdu_t;
uint32_t segment_length;
uint8_t* segment_data;
} segments[NFAPI_NR_TX_MAX_SEGMENTS];
} nfapi_nr_tx_indication_pdu_t; #define FAPI_NR_RX_IND_MAX_PDU 100
#define NFAPI_NR_RX_IND_MAX_PDU 100
typedef struct { typedef struct {
nfapi_nr_tl_t tl; fapi_nr_tl_t tl;
nfapi_nr_tx_indication_t tx_indication; fapi_nr_tx_config_t tx_config;
uint16_t number_of_pdus; uint16_t number_of_pdus;
nfapi_nr_tx_indication_pdu_t* tx_pdu_list; fapi_nr_tx_request_pdu_t* tx_pdu_list;
} nfapi_nr_tx_indication_body_t; } fapi_nr_tx_request_body_t;
#define NFAPI_NR_RX_INDICATION_BODY_TAG 0x2023 #define FAPI_NR_RX_INDICATION_BODY_TAG 0x2023
/// ///
typedef struct { typedef struct {
nfapi_nr_p7_message_header_t header; fapi_nr_p7_message_header_t header;
uint16_t sfn_sf_slot; uint16_t sfn_sf_slot;
nfapi_nr_tx_indication_body_t tx_indication_body; fapi_nr_tx_request_body_t tx_request_body;
} nfapi_nr_tx_request_t; } fapi_nr_tx_request_t;
typedef struct { typedef struct {
uint8_t pdu_type; uint8_t pdu_type;
uint8_t pdu_size; uint8_t pdu_size;
union { union {
/*nfapi_nr_ul_config_ulsch_pdu ulsch_pdu; /*fapi_nr_ul_config_ulsch_pdu ulsch_pdu;
nfapi_nr_ul_config_ulsch_cqi_ri_pdu ulsch_cqi_ri_pdu; fapi_nr_ul_config_ulsch_cqi_ri_pdu ulsch_cqi_ri_pdu;
nfapi_nr_ul_config_ulsch_harq_pdu ulsch_harq_pdu; fapi_nr_ul_config_ulsch_harq_pdu ulsch_harq_pdu;
nfapi_nr_ul_config_ulsch_cqi_harq_ri_pdu ulsch_cqi_harq_ri_pdu; fapi_nr_ul_config_ulsch_cqi_harq_ri_pdu ulsch_cqi_harq_ri_pdu;
nfapi_nr_ul_config_uci_cqi_pdu uci_cqi_pdu; fapi_nr_ul_config_uci_cqi_pdu uci_cqi_pdu;
nfapi_nr_ul_config_uci_sr_pdu uci_sr_pdu; fapi_nr_ul_config_uci_sr_pdu uci_sr_pdu;
nfapi_nr_ul_config_uci_harq_pdu uci_harq_pdu; fapi_nr_ul_config_uci_harq_pdu uci_harq_pdu;
nfapi_nr_ul_config_uci_sr_harq_pdu uci_sr_harq_pdu; fapi_nr_ul_config_uci_sr_harq_pdu uci_sr_harq_pdu;
nfapi_nr_ul_config_uci_cqi_harq_pdu uci_cqi_harq_pdu; fapi_nr_ul_config_uci_cqi_harq_pdu uci_cqi_harq_pdu;
nfapi_nr_ul_config_uci_cqi_sr_pdu uci_cqi_sr_pdu; fapi_nr_ul_config_uci_cqi_sr_pdu uci_cqi_sr_pdu;
nfapi_nr_ul_config_uci_cqi_sr_harq_pdu uci_cqi_sr_harq_pdu; fapi_nr_ul_config_uci_cqi_sr_harq_pdu uci_cqi_sr_harq_pdu;
nfapi_nr_ul_config_srs_pdu srs_pdu; fapi_nr_ul_config_srs_pdu srs_pdu;
nfapi_nr_ul_config_harq_buffer_pdu harq_buffer_pdu; fapi_nr_ul_config_harq_buffer_pdu harq_buffer_pdu;
nfapi_nr_ul_config_ulsch_uci_csi_pdu ulsch_uci_csi_pdu; fapi_nr_ul_config_ulsch_uci_csi_pdu ulsch_uci_csi_pdu;
nfapi_nr_ul_config_ulsch_uci_harq_pdu ulsch_uci_harq_pdu; fapi_nr_ul_config_ulsch_uci_harq_pdu ulsch_uci_harq_pdu;
nfapi_nr_ul_config_ulsch_csi_uci_harq_pdu ulsch_csi_uci_harq_pdu;*/ fapi_nr_ul_config_ulsch_csi_uci_harq_pdu ulsch_csi_uci_harq_pdu;*/
}; };
} nfapi_nr_ul_config_request_pdu_t; } fapi_nr_ul_config_request_pdu_t;
typedef struct { typedef struct {
nfapi_nr_tl_t tl; fapi_nr_tl_t tl;
nfapi_nr_ul_config_request_pdu_t ul_config_pdu_list; fapi_nr_ul_config_request_pdu_t ul_config_pdu_list;
} nfapi_nr_ul_config_request_body_t; } fapi_nr_ul_config_request_body_t;
/// ///
typedef struct { typedef struct {
nfapi_nr_p7_message_header_t header; fapi_nr_p7_message_header_t header;
uint16_t sfn_sf_slot; uint16_t sfn_sf_slot;
nfapi_nr_ul_config_request_body_t ul_config_request_body; fapi_nr_ul_config_request_body_t ul_config_request_body;
} nfapi_nr_ul_config_request_t; } fapi_nr_ul_config_request_t;
...@@ -254,19 +256,17 @@ typedef struct { ...@@ -254,19 +256,17 @@ typedef struct {
uint8_t pdu_type; uint8_t pdu_type;
uint8_t pdu_size; uint8_t pdu_size;
union { union {
/*nfapi_nr_dl_config_dlsch_pdu dlsch_pdu; /*fapi_nr_dl_config_dlsch_pdu dlsch_pdu;
nfapi_nr_dl_config_prs_pdu prs_pdu; fapi_nr_dl_config_prs_pdu prs_pdu;
nfapi_nr_dl_config_csi_rs_pdu csi_rs_pdu;*/ fapi_nr_dl_config_csi_rs_pdu csi_rs_pdu;*/
}; };
} nfapi_nr_dl_config_request_pdu_t; } fapi_nr_dl_config_request_pdu_t;
///
typedef struct { typedef struct {
nfapi_nr_p7_message_header_t header; fapi_nr_p7_message_header_t header;
uint16_t sfn_sf_slot; uint16_t sfn_sf_slot;
nfapi_nr_dl_config_request_pdu_t dl_config_request_body; fapi_nr_dl_config_request_pdu_t dl_config_request_body;
} nfapi_nr_dl_config_request_t; } fapi_nr_dl_config_request_t;
// //
...@@ -282,12 +282,13 @@ typedef struct { ...@@ -282,12 +282,13 @@ typedef struct {
uint8_t cce_reg_interleaved_shift_index; // valid if CCE to REG mapping type is interleaved type uint8_t cce_reg_interleaved_shift_index; // valid if CCE to REG mapping type is interleaved type
uint8_t precoder_granularity; uint8_t precoder_granularity;
uint8_t tci_state_pdcch; uint8_t tci_state_pdcch;
uint8_t tci_present_in_dci; uint8_t tci_present_in_dci;
uint16_t pdcch_dmrs_scrambling_id; uint16_t pdcch_dmrs_scrambling_id;
} nfapi_nr_coreset_t; } fapi_nr_coreset_t;
typedef struct { typedef struct {
nfapi_nr_coreset_t coreset; fapi_nr_coreset_t coreset;
uint8_t monitoring_slot_peridicity; uint8_t monitoring_slot_peridicity;
uint8_t monitoring_slot_offset; uint8_t monitoring_slot_offset;
...@@ -299,26 +300,26 @@ typedef struct { ...@@ -299,26 +300,26 @@ typedef struct {
uint8_t dci_2_3_monitorying_periodicity; uint8_t dci_2_3_monitorying_periodicity;
uint8_t dci_2_3_number_of_candidates; uint8_t dci_2_3_number_of_candidates;
} nfapi_nr_search_space_t; } fapi_nr_search_space_t;
typedef struct { typedef struct {
nfapi_nr_search_space_t search_space_sib1; fapi_nr_search_space_t search_space_sib1;
nfapi_nr_search_space_t search_space_others_sib; fapi_nr_search_space_t search_space_others_sib;
nfapi_nr_search_space_t search_space_paging; fapi_nr_search_space_t search_space_paging;
nfapi_nr_coreset_t coreset_ra; // common coreset fapi_nr_coreset_t coreset_ra; // common coreset
nfapi_nr_search_space_t search_space_ra; fapi_nr_search_space_t search_space_ra;
} nfapi_nr_pdcch_config_common_t; } fapi_nr_pdcch_config_common_t;
typedef struct { typedef struct {
uint8_t k0; uint8_t k0;
uint8_t mapping_type; uint8_t mapping_type;
uint8_t symbol_starting; uint8_t symbol_starting;
uint8_t symbol_length; uint8_t symbol_length;
} nfapi_nr_pdsch_time_domain_resource_allocation_t; } fapi_nr_pdsch_time_domain_resource_allocation_t;
typedef struct { typedef struct {
nfapi_nr_pdsch_time_domain_resource_allocation_t allocation_list[NFAPI_NR_MAX_NUM_DL_ALLOCATIONS]; fapi_nr_pdsch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_DL_ALLOCATIONS];
} nfapi_nr_pdsch_config_common_t; } fapi_nr_pdsch_config_common_t;
typedef struct { typedef struct {
uint8_t prach_configuration_index; uint8_t prach_configuration_index;
...@@ -345,28 +346,28 @@ typedef struct { ...@@ -345,28 +346,28 @@ typedef struct {
uint8_t msg1_subcarrier_spacing; uint8_t msg1_subcarrier_spacing;
uint8_t restrictedset_config; uint8_t restrictedset_config;
uint8_t msg3_transform_precoding; uint8_t msg3_transform_precoding;
} nfapi_nr_rach_config_common_t; } fapi_nr_rach_config_common_t;
typedef struct { typedef struct {
uint8_t k2; uint8_t k2;
uint8_t mapping_type; uint8_t mapping_type;
uint8_t symbol_starting; uint8_t symbol_starting;
uint8_t symbol_length; uint8_t symbol_length;
} nfapi_nr_pusch_time_domain_resource_allocation_t; } fapi_nr_pusch_time_domain_resource_allocation_t;
typedef struct { typedef struct {
uint8_t group_hopping_enabled_transform_precoding; uint8_t group_hopping_enabled_transform_precoding;
nfapi_nr_pusch_time_domain_resource_allocation_t allocation_list[NFAPI_NR_MAX_NUM_UL_ALLOCATIONS]; fapi_nr_pusch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_UL_ALLOCATIONS];
uint8_t msg3_delta_preamble; uint8_t msg3_delta_preamble;
uint8_t p0_nominal_with_grant; uint8_t p0_nominal_with_grant;
} nfapi_nr_pusch_config_common_t; } fapi_nr_pusch_config_common_t;
typedef struct { typedef struct {
uint8_t pucch_resource_common; uint8_t pucch_resource_common;
uint8_t pucch_group_hopping; uint8_t pucch_group_hopping;
uint8_t hopping_id; uint8_t hopping_id;
uint8_t p0_nominal; uint8_t p0_nominal;
} nfapi_nr_pucch_config_common_t; } fapi_nr_pucch_config_common_t;
typedef struct { typedef struct {
uint8_t subcarrier_spacing_common; uint8_t subcarrier_spacing_common;
...@@ -375,15 +376,15 @@ typedef struct { ...@@ -375,15 +376,15 @@ typedef struct {
uint8_t pdcch_config_sib1; uint8_t pdcch_config_sib1;
uint8_t cell_barred; uint8_t cell_barred;
uint8_t intra_frquency_reselection; uint8_t intra_frquency_reselection;
} nfapi_nr_pbch_config_t; } fapi_nr_pbch_config_t;
typedef struct { typedef struct {
nfapi_nr_tl_t tl; fapi_nr_tl_t tl;
nfapi_nr_pdcch_config_common_t pdcch_config_common; fapi_nr_pdcch_config_common_t pdcch_config_common;
nfapi_nr_pdsch_config_common_t pdsch_config_common; fapi_nr_pdsch_config_common_t pdsch_config_common;
} nfapi_nr_dl_bwp_common_config_t; } fapi_nr_dl_bwp_common_config_t;
...@@ -391,44 +392,44 @@ typedef struct { ...@@ -391,44 +392,44 @@ typedef struct {
uint16_t int_rnti; uint16_t int_rnti;
uint8_t time_frequency_set; uint8_t time_frequency_set;
uint8_t dci_payload_size; uint8_t dci_payload_size;
uint8_t serving_cell_id[NFAPI_NR_MAX_NUM_SERVING_CELLS]; // interrupt configuration per serving cell uint8_t serving_cell_id[FAPI_NR_MAX_NUM_SERVING_CELLS]; // interrupt configuration per serving cell
uint8_t position_in_dci[NFAPI_NR_MAX_NUM_SERVING_CELLS]; // interrupt configuration per serving cell uint8_t position_in_dci[FAPI_NR_MAX_NUM_SERVING_CELLS]; // interrupt configuration per serving cell
} nfapi_nr_downlink_preemption_t; } fapi_nr_downlink_preemption_t;
typedef struct { typedef struct {
uint8_t tpc_index; uint8_t tpc_index;
uint8_t tpc_index_sul; uint8_t tpc_index_sul;
uint8_t target_cell; uint8_t target_cell;
} nfapi_nr_pusch_tpc_command_config_t; } fapi_nr_pusch_tpc_command_config_t;
typedef struct { typedef struct {
uint8_t tpc_index_pcell; uint8_t tpc_index_pcell;
uint8_t tpc_index_pucch_scell; uint8_t tpc_index_pucch_scell;
} nfapi_nr_pucch_tpc_command_config_t; } fapi_nr_pucch_tpc_command_config_t;
typedef struct { typedef struct {
uint8_t starting_bit_of_format_2_3; uint8_t starting_bit_of_format_2_3;
uint8_t feild_type_format_2_3; uint8_t feild_type_format_2_3;
} nfapi_nr_srs_tpc_command_config_t; } fapi_nr_srs_tpc_command_config_t;
typedef struct { typedef struct {
nfapi_nr_downlink_preemption_t downlink_preemption; fapi_nr_downlink_preemption_t downlink_preemption;
nfapi_nr_pusch_tpc_command_config_t tpc_pusch; fapi_nr_pusch_tpc_command_config_t tpc_pusch;
nfapi_nr_pucch_tpc_command_config_t tpc_pucch; fapi_nr_pucch_tpc_command_config_t tpc_pucch;
nfapi_nr_srs_tpc_command_config_t tpc_srs; fapi_nr_srs_tpc_command_config_t tpc_srs;
} nfapi_nr_pdcch_config_dedicated_t; } fapi_nr_pdcch_config_dedicated_t;
typedef struct { typedef struct {
uint8_t dmrs_type; uint8_t dmrs_type;
uint8_t dmrs_addition_position; uint8_t dmrs_addition_position;
uint8_t max_length; uint8_t max_length;
uint16_t scrambling_id_0; uint16_t scrambling_id0;
uint16_t scrambling_id_1; uint16_t scrambling_id1;
uint8_t ptrs_frequency_density[2]; // phase tracking rs uint8_t ptrs_frequency_density[2]; // phase tracking rs
uint8_t ptrs_time_density[3]; // phase tracking rs uint8_t ptrs_time_density[3]; // phase tracking rs
uint8_t ptrs_epre_ratio; // phase tracking rs uint8_t ptrs_epre_ratio; // phase tracking rs
uint8_t ptrs_resource_element_offset; // phase tracking rs uint8_t ptrs_resource_element_offset; // phase tracking rs
} nfapi_nr_dmrs_downlink_config_t; } fapi_nr_dmrs_downlink_config_t;
typedef struct { typedef struct {
uint8_t bwp_or_cell_level; uint8_t bwp_or_cell_level;
...@@ -439,11 +440,11 @@ typedef struct { ...@@ -439,11 +440,11 @@ typedef struct {
uint8_t periodic; // bitmaps type uint8_t periodic; // bitmaps type
uint32_t pattern[2]; // bitmaps type 2/4/5/8/10/20/40 bits uint32_t pattern[2]; // bitmaps type 2/4/5/8/10/20/40 bits
nfapi_nr_coreset_t coreset; // coreset fapi_nr_coreset_t coreset; // coreset
uint8_t subcarrier_spacing; uint8_t subcarrier_spacing;
uint8_t mode; uint8_t mode;
} nfapi_nr_rate_matching_pattern_group_t; } fapi_nr_rate_matching_pattern_group_t;
typedef struct { typedef struct {
// resource mapping // resource mapping
...@@ -462,26 +463,26 @@ typedef struct { ...@@ -462,26 +463,26 @@ typedef struct {
// periodicityAndOffset // periodicityAndOffset
uint8_t periodicity; // slot4/5/8/10/16/20/32/40/64/80/160/320/640 uint8_t periodicity; // slot4/5/8/10/16/20/32/40/64/80/160/320/640
uint32_t offset; // 0..639 bits uint32_t offset; // 0..639 bits
} nfapi_nr_zp_csi_rs_resource_t; } fapi_nr_zp_csi_rs_resource_t;
typedef struct { typedef struct {
uint16_t data_scrambling_id_pdsch; uint16_t data_scrambling_id_pdsch;
nfapi_nr_dmrs_downlink_config_t dmrs_dl_for_pdsch_mapping_type_a; fapi_nr_dmrs_downlink_config_t dmrs_dl_for_pdsch_mapping_type_a;
nfapi_nr_dmrs_downlink_config_t dmrs_dl_for_pdsch_mapping_type_b; fapi_nr_dmrs_downlink_config_t dmrs_dl_for_pdsch_mapping_type_b;
uint8_t vrb_to_prb_interleaver; uint8_t vrb_to_prb_interleaver;
uint8_t resource_allocation; uint8_t resource_allocation;
nfapi_nr_pdsch_time_domain_resource_allocation_t allocation_list[NFAPI_NR_MAX_NUM_DL_ALLOCATIONS]; fapi_nr_pdsch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_DL_ALLOCATIONS];
uint8_t pdsch_aggregation_factor; uint8_t pdsch_aggregation_factor;
nfapi_nr_rate_matching_pattern_group_t rate_matching_pattern_group1; fapi_nr_rate_matching_pattern_group_t rate_matching_pattern_group1;
nfapi_nr_rate_matching_pattern_group_t rate_matching_pattern_group2; fapi_nr_rate_matching_pattern_group_t rate_matching_pattern_group2;
uint8_t rbg_size; uint8_t rbg_size;
uint8_t mcs_table; uint8_t mcs_table;
uint8_t max_num_of_code_word_scheduled_by_dci; uint8_t max_num_of_code_word_scheduled_by_dci;
uint8_t bundle_size; // prb_bundling static uint8_t bundle_size; // prb_bundling static
uint8_t bundle_size_set1; // prb_bundling dynamic uint8_t bundle_size_set1; // prb_bundling dynamic
uint8_t bundle_size_set2; // prb_bundling dynamic uint8_t bundle_size_set2; // prb_bundling dynamic
nfapi_nr_zp_csi_rs_resource_t periodically_zp_csi_rs_resource_set[NFAPI_NR_MAX_NUM_ZP_CSI_RS_RESOURCE_PER_SET]; fapi_nr_zp_csi_rs_resource_t periodically_zp_csi_rs_resource_set[FAPI_NR_MAX_NUM_ZP_CSI_RS_RESOURCE_PER_SET];
} nfapi_nr_pdsch_config_dedicated_t; } fapi_nr_pdsch_config_dedicated_t;
typedef struct { typedef struct {
uint16_t starting_prb; uint16_t starting_prb;
...@@ -495,33 +496,33 @@ typedef struct { ...@@ -495,33 +496,33 @@ typedef struct {
uint8_t number_of_prbs; uint8_t number_of_prbs;
uint8_t occ_length; uint8_t occ_length;
uint8_t occ_index; uint8_t occ_index;
} nfapi_nr_pucch_resource_t; } fapi_nr_pucch_resource_t;
typedef struct { typedef struct {
uint8_t periodicity; uint8_t periodicity;
uint8_t number_of_harq_process; uint8_t number_of_harq_process;
nfapi_nr_pucch_resource_t n1_pucch_an; fapi_nr_pucch_resource_t n1_pucch_an;
} nfapi_nr_sps_config_t; } fapi_nr_sps_config_t;
typedef struct { typedef struct {
uint8_t beam_failure_instance_max_count; uint8_t beam_failure_instance_max_count;
uint8_t beam_failure_detection_timer; uint8_t beam_failure_detection_timer;
} nfapi_nr_radio_link_monitoring_config_t; } fapi_nr_radio_link_monitoring_config_t;
typedef struct { typedef struct {
nfapi_nr_pdcch_config_dedicated_t pdcch_config_dedicated; fapi_nr_pdcch_config_dedicated_t pdcch_config_dedicated;
nfapi_nr_pdsch_config_dedicated_t pdsch_config_dedicated; fapi_nr_pdsch_config_dedicated_t pdsch_config_dedicated;
nfapi_nr_sps_config_t sps_config; fapi_nr_sps_config_t sps_config;
nfapi_nr_radio_link_monitoring_config_t radio_link_monitoring_config; fapi_nr_radio_link_monitoring_config_t radio_link_monitoring_config;
} nfapi_nr_dl_bwp_dedicated_config_t; } fapi_nr_dl_bwp_dedicated_config_t;
typedef struct { typedef struct {
nfapi_nr_rach_config_common_t rach_config_common; fapi_nr_rach_config_common_t rach_config_common;
nfapi_nr_pusch_config_common_t pusch_config_common; fapi_nr_pusch_config_common_t pusch_config_common;
nfapi_nr_pucch_config_common_t pucch_config_common; fapi_nr_pucch_config_common_t pucch_config_common;
} nfapi_nr_ul_bwp_common_config_t; } fapi_nr_ul_bwp_common_config_t;
typedef struct { typedef struct {
uint8_t inter_slot_frequency_hopping; uint8_t inter_slot_frequency_hopping;
...@@ -530,14 +531,14 @@ typedef struct { ...@@ -530,14 +531,14 @@ typedef struct {
uint8_t number_of_slots; uint8_t number_of_slots;
uint8_t pi2bpsk; uint8_t pi2bpsk;
uint8_t simultaneous_harq_ack_csi; uint8_t simultaneous_harq_ack_csi;
} nfapi_nr_pucch_format_config_t; } fapi_nr_pucch_format_config_t;
typedef struct { typedef struct {
nfapi_nr_pucch_format_config_t format1; fapi_nr_pucch_format_config_t format1;
nfapi_nr_pucch_format_config_t format2; fapi_nr_pucch_format_config_t format2;
nfapi_nr_pucch_format_config_t format3; fapi_nr_pucch_format_config_t format3;
nfapi_nr_pucch_format_config_t format4; fapi_nr_pucch_format_config_t format4;
nfapi_nr_pucch_resource_t multi_csi_pucch_resources[2]; fapi_nr_pucch_resource_t multi_csi_pucch_resources[2];
uint8_t dl_data_to_ul_ack[8]; uint8_t dl_data_to_ul_ack[8];
// pucch power control // pucch power control
uint8_t deltaF_pucch_f0; uint8_t deltaF_pucch_f0;
...@@ -546,20 +547,187 @@ typedef struct { ...@@ -546,20 +547,187 @@ typedef struct {
uint8_t deltaF_pucch_f3; uint8_t deltaF_pucch_f3;
uint8_t deltaF_pucch_f4; uint8_t deltaF_pucch_f4;
uint8_t two_pucch_pc_adjusment_states; uint8_t two_pucch_pc_adjusment_states;
} nfapi_nr_ul_bwp_dedicated_config_t; } fapi_nr_pucch_config_dedicated_t;
typedef struct {
uint8_t dmrs_type;
uint8_t dmrs_addition_position;
uint8_t ptrs_type; //cp-OFDM, dft-S-OFDM
uint16_t ptrs_frequency_density[2];
uint8_t ptrs_time_density[3];
uint8_t ptrs_max_number_of_ports;
uint8_t ptrs_resource_element_offset;
uint8_t ptrs_power;
uint16_t ptrs_sample_density[5];
uint8_t ptrs_time_density_transform_precoding;
uint8_t max_length;
uint16_t scrambling_id0;
uint16_t scrambling_id1;
uint8_t npusch_identity;
uint8_t disable_sequence_group_hopping;
uint8_t sequence_hopping_enable;
} fapi_nr_dmrs_uplink_config_t;
typedef struct {
uint8_t tpc_accmulation;
uint8_t msg3_alpha;
uint8_t p0_nominal_with_grant;
uint8_t two_pusch_pc_adjustments_states;
uint8_t delta_mcs;
} fapi_nr_pusch_power_control_t;
typedef struct {
uint16_t data_scrambling_identity;
uint8_t tx_config;
fapi_nr_dmrs_uplink_config_t dmrs_ul_for_pusch_mapping_type_a;
fapi_nr_dmrs_uplink_config_t dmrs_ul_for_pusch_mapping_type_b;
fapi_nr_pusch_power_control_t pusch_power_control;
uint8_t frequency_hopping;
uint16_t frequency_hopping_offset_lists[4];
uint8_t resource_allocation;
fapi_nr_pusch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_UL_ALLOCATIONS];
uint8_t pusch_aggregation_factor;
uint8_t mcs_table;
uint8_t mcs_table_transform_precoder;
uint8_t transform_precoder;
uint8_t codebook_subset;
uint8_t max_rank;
uint8_t rbg_size;
//uci-OnPUSCH
uint8_t uci_on_pusch_type; //dynamic, semi-static
uint8_t beta_offset_ack_index1[4];
uint8_t beta_offset_ack_index2[4];
uint8_t beta_offset_ack_index3[4];
uint8_t beta_offset_csi_part1_index1[4];
uint8_t beta_offset_csi_part1_index2[4];
uint8_t beta_offset_csi_part2_index1[4];
uint8_t beta_offset_csi_part2_index2[4];
uint8_t tp_pi2BPSK;
} fapi_nr_pusch_config_dedicated_t;
typedef struct {
uint8_t frequency_hopping;
fapi_nr_dmrs_uplink_config_t cg_dmrs_configuration;
uint8_t mcs_table;
uint8_t mcs_table_transform_precoder;
//uci-OnPUSCH
uint8_t uci_on_pusch_type; //dynamic, semi-static
uint8_t beta_offset_ack_index1[4];
uint8_t beta_offset_ack_index2[4];
uint8_t beta_offset_ack_index3[4];
uint8_t beta_offset_csi_part1_index1[4];
uint8_t beta_offset_csi_part1_index2[4];
uint8_t beta_offset_csi_part2_index1[4];
uint8_t beta_offset_csi_part2_index2[4];
uint8_t resource_allocation;
// rgb-Size structure missing in spec.
uint8_t power_control_loop_to_use;
// p0-PUSCH-Alpha
uint8_t p0;
uint8_t alpha;
uint8_t transform_precoder;
uint8_t number_of_harq_process;
uint8_t rep_k;
uint8_t rep_k_rv;
uint8_t periodicity;
uint8_t configured_grant_timer;
// rrc-ConfiguredUplinkGrant
uint16_t time_domain_offset;
uint8_t time_domain_allocation;
uint32_t frequency_domain_allocation;
uint8_t antenna_ports;
uint8_t dmrs_seq_initialization;
uint8_t precoding_and_number_of_layers;
uint8_t srs_resource_indicator;
uint8_t mcs_and_tbs;
uint8_t frequency_hopping_offset;
uint8_t path_loss_reference_index;
} fapi_nr_configured_grant_config_t;
typedef struct {
uint8_t qcl_type1_serving_cell_index;
uint8_t qcl_type1_bwp_id;
uint8_t qcl_type1_rs_type; // csi-rs or ssb
uint8_t qcl_type1_nzp_csi_rs_resource_id;
uint8_t qcl_type1_ssb_index;
uint8_t qcl_type1_type;
uint8_t qcl_type2_serving_cell_index;
uint8_t qcl_type2_bwp_id;
uint8_t qcl_type2_rs_type; // csi-rs or ssb
uint8_t qcl_type2_nzp_csi_rs_resource_id;
uint8_t qcl_type2_ssb_index;
uint8_t qcl_type2_type;
} fapi_nr_tci_state_t;
typedef struct {
uint8_t root_sequence_index;
// rach genertic
uint8_t prach_configuration_index;
uint8_t msg1_fdm;
uint8_t msg1_frequency_start;
uint8_t zero_correlation_zone_config;
uint8_t preamble_received_target_power;
uint8_t preamble_transmission_max;
uint8_t power_ramping_step;
uint8_t ra_window_size;
uint8_t rsrp_threshold_ssb;
// PRACH-ResourceDedicatedBFR
uint8_t bfr_ssb_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_ssb_ra_preamble_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
// NZP-CSI-RS-Resource
uint8_t bfr_csi_rs_nzp_resource_mapping[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csi_rs_power_control_offset[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csi_rs_power_control_offset_ss[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint16_t bfr_csi_rs_scrambling_id[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csi_rs_resource_periodicity[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint16_t bfr_csi_rs_resource_offset[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
fapi_nr_tci_state_t qcl_infomation_periodic_csi_rs[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csirs_ra_occasions[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csirs_ra_preamble_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS][FAPI_NR_MAX_RA_OCCASION_PER_CSIRS];
uint8_t ssb_per_rach_occasion;
uint8_t ra_ssb_occasion_mask_index;
fapi_nr_search_space_t recovery_search_space;
// RA-Prioritization
uint8_t power_ramping_step_high_priority;
uint8_t scaling_factor_bi;
uint8_t beam_failure_recovery_timer;
} fapi_nr_beam_failure_recovery_config_t;
typedef struct {
fapi_nr_pucch_config_dedicated_t pucch_config_dedicated;
fapi_nr_pusch_config_dedicated_t pusch_config_dedicated;
fapi_nr_configured_grant_config_t configured_grant_config;
// SRS-Config
uint8_t srs_tpc_accumulation;
fapi_nr_beam_failure_recovery_config_t beam_failure_recovery_config;
} fapi_nr_ul_bwp_dedicated_config_t;
typedef struct { typedef struct {
nfapi_nr_p4_p5_message_header_t header; fapi_nr_p4_p5_message_header_t header;
uint8_t num_tlv; uint8_t num_tlv;
nfapi_nr_pbch_config_t pbch_config_common; // MIB fapi_nr_pbch_config_t pbch_config_common; // MIB
nfapi_nr_dl_bwp_common_config_t dl_bwp_common; fapi_nr_dl_bwp_common_config_t dl_bwp_common;
nfapi_nr_dl_bwp_dedicated_config_t dl_bwp_dedicated; fapi_nr_dl_bwp_dedicated_config_t dl_bwp_dedicated;
nfapi_nr_ul_bwp_common_config_t ul_bwp_common; fapi_nr_ul_bwp_common_config_t ul_bwp_common;
nfapi_nr_ul_bwp_dedicated_config_t ul_bwp_dedicated; fapi_nr_ul_bwp_dedicated_config_t ul_bwp_dedicated;
} nfapi_nr_config_request_t; } fapi_nr_config_request_t;
#endif /* _NFAPI_INTERFACE_H_ */ #endif /* _FAPI_INTERFACE_H_ */
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file fapi_nr_ue_l1.c
* \brief functions for NR UE FAPI-like interface
* \author R. Knopp
* \date 2018
* \version 0.1
* \company Eurecom
* \email: knopp@eurecom.fr
* \note
* \warning
*/
#include "fapi_nr_ue_interface.h"
#include "fapi_nr_ue_l1.h"
int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
return 0;
}
int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){
return 0;
}
\ No newline at end of file
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file fapi_nr_ue_l1.c
* \brief functions for FAPI L1 interface
* \author R. Knopp
* \date 2018
* \version 0.1
* \company Eurecom
* \email: knopp@eurecom.fr
* \note
* \warning
*/
#ifndef __FAPI_NR_UE_L1_H__
#define __FAPI_NR_UE_L1_H__
#include "NR_IF_Module.h"
/**\brief NR UE FAPI-like P7 messages, scheduled response from L2 indicating L1
\param scheduled_response including transmission config(dl_config, ul_config) and data transmission (tx_req)*/
int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response);
/**\brief NR UE FAPI-like P5 message, physical configuration from L2 to configure L1
\param scheduled_response including transmission config(dl_config, ul_config) and data transmission (tx_req)*/
int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config);
#endif
\ No newline at end of file
...@@ -48,7 +48,7 @@ nr_rrc_mac_config_req_ue( ...@@ -48,7 +48,7 @@ nr_rrc_mac_config_req_ue(
// TODO do something FAPI-like P5 L1/L2 config interface in config_si, config_mib, etc. // TODO do something FAPI-like P5 L1/L2 config interface in config_si, config_mib, etc.
if(mibP != NULL){ if(mibP != NULL){
; mac->mib = mibP; // update by every reception
} }
if(mac_cell_group_configP != NULL){ if(mac_cell_group_configP != NULL){
......
...@@ -73,6 +73,8 @@ typedef struct { ...@@ -73,6 +73,8 @@ typedef struct {
NR_RNTI_Value_t *cs_RNTI; /* OPTIONAL */ NR_RNTI_Value_t *cs_RNTI; /* OPTIONAL */
NR_MIB_t *mib;
} NR_UE_MAC_INST_t; } NR_UE_MAC_INST_t;
/*@}*/ /*@}*/
......
...@@ -31,19 +31,37 @@ ...@@ -31,19 +31,37 @@
#include "proto.h" #include "proto.h"
#include "RRC/NR_UE/rrc_proto.h" #include "RRC/NR_UE/rrc_proto.h"
void int8_t nr_ue_decode_mib(
nr_ue_decode_mib(
module_id_t module_id, module_id_t module_id,
int CC_id, int CC_id,
uint8_t gNB_index, uint8_t gNB_index,
uint8_t extra_bits, uint8_t extra_bits, // 8bits 38.212 c7.1.1
uint32_t ssb_index, uint32_t l_ssb_equal_64,
uint32_t *frameP, uint32_t *ssb_index, // from decoded MIB
void *pduP, uint32_t *frameP, // 10 bits = 6(in decoded MIB)+4(in extra bits from L1)
void *pduP, // encoded MIB
uint16_t pdu_len){ uint16_t pdu_len){
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
nr_mac_rrc_data_ind_ue( module_id, CC_id, gNB_index, frameP, nr_mac_rrc_data_ind_ue( module_id, CC_id, gNB_index, frameP,
NR_BCCH_BCH, (uint8_t *) pduP, pdu_len ); NR_BCCH_BCH, (uint8_t *) pduP, pdu_len );
// frame calculation
uint32_t frame = mac->mib->systemFrameNumber.buf[0];
uint32_t frame_number_4lsb = (uint32_t)(extra_bits & 0xf);
uint32_t ssb_subcarrier_offset_msb = (uint32_t)(( extra_bits >> 4 ) & 0x1 );
frame = frame << 4;
frame = frame | frame_number_4lsb;
*frameP = frame;
if(l_ssb_equal_64){
*ssb_index = (( extra_bits >> 4 ) & 0x7 );
}
return 0;
} }
...@@ -36,11 +36,12 @@ ...@@ -36,11 +36,12 @@
\param CC_id component carrier id \param CC_id component carrier id
\param gNB_index gNB index \param gNB_index gNB index
\param extra_bits extra bits for frame calculation \param extra_bits extra bits for frame calculation
\param l_ssb_equal_64 check if ssb number of candicate is equal 64, 1=equal; 0=non equal. Reference 38.212 c7.1.1
\param ssb_index SSB index for frame calculation \param ssb_index SSB index for frame calculation
\param frameP pointer to frame for revising after frame calculation \param frameP pointer to frame for revising after frame calculation
\param pduP pointer to pdu \param pduP pointer to pdu
\param pdu_length length of pdu*/ \param pdu_length length of pdu*/
void nr_ue_decode_mib(module_id_t module_id, int CC_id, uint8_t gNB_index, uint8_t extra_bits, uint32_t ssb_index, uint32_t *frameP, void *pduP, uint16_t pdu_len); int8_t nr_ue_decode_mib(module_id_t module_id, int CC_id, uint8_t gNB_index, uint8_t extra_bits, uint32_t l_ssb_equal_64, uint32_t *ssb_index, uint32_t *frameP, void *pduP, uint16_t pdu_len);
/**\brief primitive from RRC layer to MAC layer for configuration L1/L2, now supported 4 rrc messages: MIB, cell_group_config for MAC/PHY, spcell_config(serving cell config) /**\brief primitive from RRC layer to MAC layer for configuration L1/L2, now supported 4 rrc messages: MIB, cell_group_config for MAC/PHY, spcell_config(serving cell config)
......
#include "openair1/PHY/defs.h"
#include "openair2/PHY_INTERFACE/IF_Module.h"
#include "openair1/PHY/extern.h"
#include "LAYER2/MAC/extern.h"
#include "LAYER2/MAC/proto.h"
#include "common/ran_context.h"
#define MAX_IF_MODULES 100
IF_Module_t *if_inst[MAX_IF_MODULES];
Sched_Rsp_t Sched_INFO[MAX_IF_MODULES][MAX_NUM_CCs];
extern int oai_nfapi_harq_indication(nfapi_harq_indication_t *harq_ind);
extern int oai_nfapi_crc_indication(nfapi_crc_indication_t *crc_ind);
extern int oai_nfapi_cqi_indication(nfapi_cqi_indication_t *cqi_ind);
extern int oai_nfapi_sr_indication(nfapi_sr_indication_t *ind);
extern int oai_nfapi_rx_ind(nfapi_rx_indication_t *ind);
extern uint8_t nfapi_mode;
extern uint16_t sf_ahead;
void handle_rach(UL_IND_t *UL_info) {
int i;
if (UL_info->rach_ind.rach_indication_body.number_of_preambles>0) {
AssertFatal(UL_info->rach_ind.rach_indication_body.number_of_preambles==1,"More than 1 preamble not supported\n");
UL_info->rach_ind.rach_indication_body.number_of_preambles=0;
LOG_D(MAC,"UL_info[Frame %d, Subframe %d] Calling initiate_ra_proc RACH:SFN/SF:%d\n",UL_info->frame,UL_info->subframe, NFAPI_SFNSF2DEC(UL_info->rach_ind.sfn_sf));
initiate_ra_proc(UL_info->module_id,
UL_info->CC_id,
NFAPI_SFNSF2SFN(UL_info->rach_ind.sfn_sf),
NFAPI_SFNSF2SF(UL_info->rach_ind.sfn_sf),
UL_info->rach_ind.rach_indication_body.preamble_list[0].preamble_rel8.preamble,
UL_info->rach_ind.rach_indication_body.preamble_list[0].preamble_rel8.timing_advance,
UL_info->rach_ind.rach_indication_body.preamble_list[0].preamble_rel8.rnti
#ifdef Rel14
,0
#endif
);
}
#ifdef Rel14
if (UL_info->rach_ind_br.rach_indication_body.number_of_preambles>0) {
AssertFatal(UL_info->rach_ind_br.rach_indication_body.number_of_preambles<5,"More than 4 preambles not supported\n");
for (i=0;i<UL_info->rach_ind_br.rach_indication_body.number_of_preambles;i++) {
AssertFatal(UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel13.rach_resource_type>0,
"Got regular PRACH preamble, not BL/CE\n");
LOG_D(MAC,"Frame %d, Subframe %d Calling initiate_ra_proc (CE_level %d)\n",UL_info->frame,UL_info->subframe,
UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel13.rach_resource_type-1);
initiate_ra_proc(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
UL_info->subframe,
UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel8.preamble,
UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel8.timing_advance,
UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel8.rnti,
UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel13.rach_resource_type);
}
UL_info->rach_ind_br.rach_indication_body.number_of_preambles=0;
}
#endif
}
void handle_sr(UL_IND_t *UL_info) {
int i;
if (nfapi_mode == 1) // PNF
{
if (UL_info->sr_ind.sr_indication_body.number_of_srs>0)
{
oai_nfapi_sr_indication(&UL_info->sr_ind);
}
}
else
{
for (i=0;i<UL_info->sr_ind.sr_indication_body.number_of_srs;i++)
SR_indication(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
UL_info->subframe,
UL_info->sr_ind.sr_indication_body.sr_pdu_list[i].rx_ue_information.rnti,
UL_info->sr_ind.sr_indication_body.sr_pdu_list[i].ul_cqi_information.ul_cqi);
}
UL_info->sr_ind.sr_indication_body.number_of_srs=0;
}
void handle_cqi(UL_IND_t *UL_info) {
int i;
if (nfapi_mode == 1)
{
if (UL_info->cqi_ind.number_of_cqis>0)
{
LOG_D(PHY,"UL_info->cqi_ind.number_of_cqis:%d\n", UL_info->cqi_ind.number_of_cqis);
nfapi_cqi_indication_t ind;
ind.header.message_id = NFAPI_RX_CQI_INDICATION;
ind.sfn_sf = UL_info->frame<<4 | UL_info->subframe;
ind.cqi_indication_body = UL_info->cqi_ind;
oai_nfapi_cqi_indication(&ind);
UL_info->cqi_ind.number_of_cqis=0;
}
}
else
{
for (i=0;i<UL_info->cqi_ind.number_of_cqis;i++)
cqi_indication(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
UL_info->subframe,
UL_info->cqi_ind.cqi_pdu_list[i].rx_ue_information.rnti,
&UL_info->cqi_ind.cqi_pdu_list[i].cqi_indication_rel9,
UL_info->cqi_ind.cqi_raw_pdu_list[i].pdu,
&UL_info->cqi_ind.cqi_pdu_list[i].ul_cqi_information);
UL_info->cqi_ind.number_of_cqis=0;
}
}
void handle_harq(UL_IND_t *UL_info) {
int i;
if (nfapi_mode == 1 && UL_info->harq_ind.harq_indication_body.number_of_harqs>0) // PNF
{
//LOG_D(PHY, "UL_info->harq_ind.harq_indication_body.number_of_harqs:%d Send to VNF\n", UL_info->harq_ind.harq_indication_body.number_of_harqs);
int retval = oai_nfapi_harq_indication(&UL_info->harq_ind);
if (retval!=0)
{
LOG_E(PHY, "Failed to encode NFAPI HARQ_IND retval:%d\n", retval);
}
UL_info->harq_ind.harq_indication_body.number_of_harqs = 0;
}
else
{
for (i=0;i<UL_info->harq_ind.harq_indication_body.number_of_harqs;i++)
harq_indication(UL_info->module_id,
UL_info->CC_id,
NFAPI_SFNSF2SFN(UL_info->harq_ind.sfn_sf),
NFAPI_SFNSF2SF(UL_info->harq_ind.sfn_sf),
&UL_info->harq_ind.harq_indication_body.harq_pdu_list[i]);
UL_info->harq_ind.harq_indication_body.number_of_harqs=0;
}
}
void handle_ulsch(UL_IND_t *UL_info) {
int i,j;
if(nfapi_mode == 1)
{
if (UL_info->crc_ind.crc_indication_body.number_of_crcs>0)
{
//LOG_D(PHY,"UL_info->crc_ind.crc_indication_body.number_of_crcs:%d CRC_IND:SFN/SF:%d\n", UL_info->crc_ind.crc_indication_body.number_of_crcs, NFAPI_SFNSF2DEC(UL_info->crc_ind.sfn_sf));
oai_nfapi_crc_indication(&UL_info->crc_ind);
UL_info->crc_ind.crc_indication_body.number_of_crcs = 0;
}
if (UL_info->rx_ind.rx_indication_body.number_of_pdus>0)
{
//LOG_D(PHY,"UL_info->rx_ind.number_of_pdus:%d RX_IND:SFN/SF:%d\n", UL_info->rx_ind.rx_indication_body.number_of_pdus, NFAPI_SFNSF2DEC(UL_info->rx_ind.sfn_sf));
oai_nfapi_rx_ind(&UL_info->rx_ind);
UL_info->rx_ind.rx_indication_body.number_of_pdus = 0;
}
}
else
{
if (UL_info->rx_ind.rx_indication_body.number_of_pdus>0 && UL_info->crc_ind.crc_indication_body.number_of_crcs>0) {
for (i=0;i<UL_info->rx_ind.rx_indication_body.number_of_pdus;i++) {
for (j=0;j<UL_info->crc_ind.crc_indication_body.number_of_crcs;j++) {
// find crc_indication j corresponding rx_indication i
LOG_D(PHY,"UL_info->crc_ind.crc_indication_body.crc_pdu_list[%d].rx_ue_information.rnti:%04x UL_info->rx_ind.rx_indication_body.rx_pdu_list[%d].rx_ue_information.rnti:%04x\n", j, UL_info->crc_ind.crc_indication_body.crc_pdu_list[j].rx_ue_information.rnti, i, UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti);
if (UL_info->crc_ind.crc_indication_body.crc_pdu_list[j].rx_ue_information.rnti ==
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti) {
LOG_D(PHY, "UL_info->crc_ind.crc_indication_body.crc_pdu_list[%d].crc_indication_rel8.crc_flag:%d\n", j, UL_info->crc_ind.crc_indication_body.crc_pdu_list[j].crc_indication_rel8.crc_flag);
if (UL_info->crc_ind.crc_indication_body.crc_pdu_list[j].crc_indication_rel8.crc_flag == 1) { // CRC error indication
LOG_D(MAC,"Frame %d, Subframe %d Calling rx_sdu (CRC error) \n",UL_info->frame,UL_info->subframe);
rx_sdu(UL_info->module_id,
UL_info->CC_id,
NFAPI_SFNSF2SFN(UL_info->rx_ind.sfn_sf), //UL_info->frame,
NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf), //UL_info->subframe,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti,
(uint8_t *)NULL,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.length,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.timing_advance,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.ul_cqi);
}
else {
LOG_D(MAC,"Frame %d, Subframe %d Calling rx_sdu (CRC ok) \n",UL_info->frame,UL_info->subframe);
rx_sdu(UL_info->module_id,
UL_info->CC_id,
NFAPI_SFNSF2SFN(UL_info->rx_ind.sfn_sf), //UL_info->frame,
NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf), //UL_info->subframe,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].data,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.length,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.timing_advance,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.ul_cqi);
}
break;
} //if (UL_info->crc_ind.crc_pdu_list[j].rx_ue_information.rnti ==
// UL_info->rx_ind.rx_pdu_list[i].rx_ue_information.rnti)
} // for (j=0;j<UL_info->crc_ind.crc_indication_body.number_of_crcs;j++)
} // for (i=0;i<UL_info->rx_ind.number_of_pdus;i++)
UL_info->crc_ind.crc_indication_body.number_of_crcs=0;
UL_info->rx_ind.rx_indication_body.number_of_pdus = 0;
} // UL_info->rx_ind.rx_indication_body.number_of_pdus>0 && UL_info->subframe && UL_info->crc_ind.crc_indication_body.number_of_crcs>0
else if (UL_info->rx_ind.rx_indication_body.number_of_pdus!=0 || UL_info->crc_ind.crc_indication_body.number_of_crcs!=0) {
LOG_E(PHY,"hoping not to have mis-match between CRC ind and RX ind - hopefully the missing message is coming shortly rx_ind:%d(SFN/SF:%05d) crc_ind:%d(SFN/SF:%05d) UL_info(SFN/SF):%04d%d\n",
UL_info->rx_ind.rx_indication_body.number_of_pdus, NFAPI_SFNSF2DEC(UL_info->rx_ind.sfn_sf),
UL_info->crc_ind.crc_indication_body.number_of_crcs, NFAPI_SFNSF2DEC(UL_info->crc_ind.sfn_sf),
UL_info->frame, UL_info->subframe);
}
}
}
/****************************************************************************/
/* debug utility functions begin */
/****************************************************************************/
//#define DUMP_FAPI
#ifdef DUMP_FAPI
#define C do { size = 0; put(0); } while (0)
#define A(...) do { char t[4096]; sprintf(t, __VA_ARGS__); append_string(t); } while (0)
#if 0
/* eats lots of ms at startup, disrupts realtime */
static char *s;
static int size;
static int maxsize;
static void put(char x)
{
if (size == maxsize) {
maxsize += 32768;
s = realloc(s, maxsize); if (s == NULL) abort();
}
s[size++] = x;
}
#else
/* eats nothing at startup, but fixed size */
#define SMAX 65536
static char s[SMAX];
static int size;
static int maxsize = SMAX;
static void put(char x)
{
if (size == maxsize) { printf("incrase SMAX\n"); exit(1); }
s[size++] = x;
}
#endif
static void append_string(char *t)
{
size--;
while (*t) put(*t++);
put(0);
}
static void dump_ul(UL_IND_t *u)
{
int i;
C;
A("XXXX UL mod %d CC %d f.sf %d.%d\n",
u->module_id, u->CC_id, u->frame, u->subframe);
A("XXXX harq_ind %d\n", u->harq_ind.harq_indication_body.number_of_harqs);
for (i = 0; i < u->harq_ind.harq_indication_body.number_of_harqs; i++) {
nfapi_harq_indication_pdu_t *v = &u->harq_ind.harq_indication_body.harq_pdu_list[i];
A("XXXX harq ind %d\n", i);
A("XXXX rnti %d\n", v->rx_ue_information.rnti);
A("XXXX tb1 %d tb2 %d\n", v->harq_indication_fdd_rel8.harq_tb1,
v->harq_indication_fdd_rel8.harq_tb2);
A("XXXX number_of_ack_nack %d\n",
v->harq_indication_fdd_rel9.number_of_ack_nack);
A("XXXX harq[0] = %d\n",
v->harq_indication_fdd_rel9.harq_tb_n[0]);
A("XXXX harq ul_cqi %d channel %d\n", v->ul_cqi_information.ul_cqi,
v->ul_cqi_information.channel);
}
A("XXXX crc_ind %d\n", u->crc_ind.crc_indication_body.number_of_crcs);
A("XXXX sr_ind %d\n", u->sr_ind.sr_indication_body.number_of_srs);
A("XXXX cqi_ind %d\n", u->cqi_ind.number_of_cqis);
for (i = 0; i < u->cqi_ind.number_of_cqis; i++) {
nfapi_cqi_indication_pdu_t *v = &u->cqi_ind.cqi_pdu_list[i];
A("XXXX cqi ind %d\n", i);
A("XXXX cqi ul_cqi %d channel %d\n", v->ul_cqi_information.ul_cqi,
v->ul_cqi_information.channel);
}
A("XXXX rach_ind %d\n", u->rach_ind.rach_indication_body.number_of_preambles);
A("XXXX rx_ind %d\n", u->rx_ind.rx_indication_body.number_of_pdus);
for (i = 0; i < u->rx_ind.rx_indication_body.number_of_pdus; i++) {
nfapi_rx_indication_pdu_t *v = &u->rx_ind.rx_indication_body.rx_pdu_list[i];
A("XXXX rx ind %d\n", i);
A("XXXX timing_advance %d\n",
v->rx_indication_rel8.timing_advance);
A("XXXX rx ul_cqi %d\n", v->rx_indication_rel8.ul_cqi);
}
LOG_I(PHY, "XXXX UL\nXXXX UL\n%s", s);
}
static char *DL_PDU_TYPE(int x)
{
switch (x) {
case NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE: return "NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE";
case NFAPI_DL_CONFIG_BCH_PDU_TYPE: return "NFAPI_DL_CONFIG_BCH_PDU_TYPE";
case NFAPI_DL_CONFIG_MCH_PDU_TYPE: return "NFAPI_DL_CONFIG_MCH_PDU_TYPE";
case NFAPI_DL_CONFIG_DLSCH_PDU_TYPE: return "NFAPI_DL_CONFIG_DLSCH_PDU_TYPE";
case NFAPI_DL_CONFIG_PCH_PDU_TYPE: return "NFAPI_DL_CONFIG_PCH_PDU_TYPE";
case NFAPI_DL_CONFIG_PRS_PDU_TYPE: return "NFAPI_DL_CONFIG_PRS_PDU_TYPE";
case NFAPI_DL_CONFIG_CSI_RS_PDU_TYPE: return "NFAPI_DL_CONFIG_CSI_RS_PDU_TYPE";
case NFAPI_DL_CONFIG_EPDCCH_DL_PDU_TYPE: return "NFAPI_DL_CONFIG_EPDCCH_DL_PDU_TYPE";
case NFAPI_DL_CONFIG_MPDCCH_PDU_TYPE: return "NFAPI_DL_CONFIG_MPDCCH_PDU_TYPE";
case NFAPI_DL_CONFIG_NBCH_PDU_TYPE: return "NFAPI_DL_CONFIG_NBCH_PDU_TYPE";
case NFAPI_DL_CONFIG_NPDCCH_PDU_TYPE: return "NFAPI_DL_CONFIG_NPDCCH_PDU_TYPE";
case NFAPI_DL_CONFIG_NDLSCH_PDU_TYPE: return "NFAPI_DL_CONFIG_NDLSCH_PDU_TYPE";
}
return "UNKNOWN";
}
static char *UL_PDU_TYPE(int x)
{
switch (x) {
case NFAPI_UL_CONFIG_ULSCH_PDU_TYPE: return "NFAPI_UL_CONFIG_ULSCH_PDU_TYPE";
case NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE: return "NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE";
case NFAPI_UL_CONFIG_ULSCH_HARQ_PDU_TYPE: return "NFAPI_UL_CONFIG_ULSCH_HARQ_PDU_TYPE";
case NFAPI_UL_CONFIG_ULSCH_CQI_HARQ_RI_PDU_TYPE: return "NFAPI_UL_CONFIG_ULSCH_CQI_HARQ_RI_PDU_TYPE";
case NFAPI_UL_CONFIG_UCI_CQI_PDU_TYPE: return "NFAPI_UL_CONFIG_UCI_CQI_PDU_TYPE";
case NFAPI_UL_CONFIG_UCI_SR_PDU_TYPE: return "NFAPI_UL_CONFIG_UCI_SR_PDU_TYPE";
case NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE: return "NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE";
case NFAPI_UL_CONFIG_UCI_SR_HARQ_PDU_TYPE: return "NFAPI_UL_CONFIG_UCI_SR_HARQ_PDU_TYPE";
case NFAPI_UL_CONFIG_UCI_CQI_HARQ_PDU_TYPE: return "NFAPI_UL_CONFIG_UCI_CQI_HARQ_PDU_TYPE";
case NFAPI_UL_CONFIG_UCI_CQI_SR_PDU_TYPE: return "NFAPI_UL_CONFIG_UCI_CQI_SR_PDU_TYPE";
case NFAPI_UL_CONFIG_UCI_CQI_SR_HARQ_PDU_TYPE: return "NFAPI_UL_CONFIG_UCI_CQI_SR_HARQ_PDU_TYPE";
case NFAPI_UL_CONFIG_SRS_PDU_TYPE: return "NFAPI_UL_CONFIG_SRS_PDU_TYPE";
case NFAPI_UL_CONFIG_HARQ_BUFFER_PDU_TYPE: return "NFAPI_UL_CONFIG_HARQ_BUFFER_PDU_TYPE";
case NFAPI_UL_CONFIG_ULSCH_UCI_CSI_PDU_TYPE: return "NFAPI_UL_CONFIG_ULSCH_UCI_CSI_PDU_TYPE";
case NFAPI_UL_CONFIG_ULSCH_UCI_HARQ_PDU_TYPE: return "NFAPI_UL_CONFIG_ULSCH_UCI_HARQ_PDU_TYPE";
case NFAPI_UL_CONFIG_ULSCH_CSI_UCI_HARQ_PDU_TYPE: return "NFAPI_UL_CONFIG_ULSCH_CSI_UCI_HARQ_PDU_TYPE";
case NFAPI_UL_CONFIG_NULSCH_PDU_TYPE: return "NFAPI_UL_CONFIG_NULSCH_PDU_TYPE";
case NFAPI_UL_CONFIG_NRACH_PDU_TYPE: return "NFAPI_UL_CONFIG_NRACH_PDU_TYPE";
}
return "UNKNOWN";
}
static char *HI_DCI0_PDU_TYPE(int x)
{
switch (x) {
case NFAPI_HI_DCI0_HI_PDU_TYPE: return "NFAPI_HI_DCI0_HI_PDU_TYPE";
case NFAPI_HI_DCI0_DCI_PDU_TYPE: return "NFAPI_HI_DCI0_DCI_PDU_TYPE";
case NFAPI_HI_DCI0_EPDCCH_DCI_PDU_TYPE: return "NFAPI_HI_DCI0_EPDCCH_DCI_PDU_TYPE";
case NFAPI_HI_DCI0_MPDCCH_DCI_PDU_TYPE: return "NFAPI_HI_DCI0_MPDCCH_DCI_PDU_TYPE";
case NFAPI_HI_DCI0_NPDCCH_DCI_PDU_TYPE: return "NFAPI_HI_DCI0_NPDCCH_DCI_PDU_TYPE";
}
return "UNKNOWN";
}
static void dump_dl(Sched_Rsp_t *d)
{
int i;
C;
A("XXXX DL mod %d CC %d f.sf %d.%d\n",
d->module_id, d->CC_id, d->frame, d->subframe);
if (d->DL_req != NULL) {
nfapi_dl_config_request_body_t *v=&d->DL_req->dl_config_request_body;
nfapi_dl_config_request_pdu_t *p = v->dl_config_pdu_list;
A("XXXX DL_req sfnsf %d\n", d->DL_req->sfn_sf);
A("XXXX PDCCH size %d\n", v->number_pdcch_ofdm_symbols);
A("XXXX DCIs %d\n", v->number_dci);
A("XXXX PDUs %d\n", v->number_pdu);
A("XXXX rntis %d\n", v->number_pdsch_rnti);
A("XXXX pcfich power %d\n", v->transmission_power_pcfich);
for (i = 0; i < v->number_pdu; i++) {
A("XXXX pdu %d\n", i);
A("XXXX type %d %s\n", p[i].pdu_type, DL_PDU_TYPE(p[i].pdu_type));
switch (p[i].pdu_type) {
case NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE: {
nfapi_dl_config_dci_dl_pdu_rel8_t *q =
&p[i].dci_dl_pdu.dci_dl_pdu_rel8;
A("XXXX dci format %d\n", q->dci_format);
A("XXXX cce idx %d\n", q->cce_idx);
A("XXXX agg lvl %d\n", q->aggregation_level);
A("XXXX rnti %d\n", q->rnti);
A("XXXX rb coding %8.8x\n", q->resource_block_coding);
A("XXXX mcs_1 %d\n", q->mcs_1);
A("XXXX rv_1 %d\n", q->redundancy_version_1);
A("XXXX ndi_1 %d\n", q->new_data_indicator_1);
A("XXXX harq pid %d\n", q->harq_process);
A("XXXX tpc %d\n", q->tpc);
A("XXXX tbs idx %d\n", q->transport_block_size_index);
A("XXXX dl pow off %d\n", q->downlink_power_offset);
A("XXXX rnti type %d\n", q->rnti_type);
A("XXXX xmit pow %d\n", q->transmission_power);
break;
}
case NFAPI_DL_CONFIG_DLSCH_PDU_TYPE: {
nfapi_dl_config_dlsch_pdu_rel8_t *q =
&p[i].dlsch_pdu.dlsch_pdu_rel8;
A("XXXX pdu_index %d\n", q->pdu_index);
A("XXXX rnti %d\n", q->rnti);
A("XXXX rv %d\n", q->redundancy_version);
A("XXXX mcs %d\n", q->modulation);
A("XXXX pa %d\n", q->pa);
break;
}}
}
}
if (d->HI_DCI0_req != NULL) {
nfapi_hi_dci0_request_body_t *v=&d->HI_DCI0_req->hi_dci0_request_body;
A("XXXX up HI_DCI0_req sfnsf %d (%d.%d)\n", d->HI_DCI0_req->sfn_sf,
d->HI_DCI0_req->sfn_sf/16, d->HI_DCI0_req->sfn_sf%16);
A("XXXX up sfnsf %d\n", v->sfnsf);
A("XXXX up DCIs %d\n", v->number_of_dci);
A("XXXX up HIs %d\n", v->number_of_hi);
for (i = 0; i < v->number_of_dci + v->number_of_hi; i++) {
nfapi_hi_dci0_request_pdu_t *p = &v->hi_dci0_pdu_list[i];
A("XXXX up pdu %d\n", i);
A("XXXX up type %d %s\n",p->pdu_type,HI_DCI0_PDU_TYPE(p->pdu_type));
if (p->pdu_type == NFAPI_HI_DCI0_DCI_PDU_TYPE) {
nfapi_hi_dci0_dci_pdu_rel8_t *q = &p->dci_pdu.dci_pdu_rel8;
A("XXXX up dci_format %d\n", q->dci_format);
A("XXXX up cce_index %d\n", q->cce_index);
A("XXXX up aggregation_level %d\n", q->aggregation_level);
A("XXXX up rnti %d\n", q->rnti);
A("XXXX up rb start %d\n", q->resource_block_start);
A("XXXX up # rb %d\n", q->number_of_resource_block);
A("XXXX up mcs_1 %d\n", q->mcs_1);
A("XXXX up cshift_2_for_drms %d\n", q->cyclic_shift_2_for_drms);
A("XXXX up freq hop enabled %d\n", q->frequency_hopping_enabled_flag);
A("XXXX up fre hop bits %d\n", q->frequency_hopping_bits);
A("XXXX up NDI_1 %d\n", q->new_data_indication_1);
A("XXXX up tx_antenna_seleciton %d\n", q->ue_tx_antenna_seleciton);
A("XXXX up tpc %d\n", q->tpc);
A("XXXX up cqi_csi_request %d\n", q->cqi_csi_request);
A("XXXX up ul_index %d\n", q->ul_index);
A("XXXX up dl_assignment_index %d\n", q->dl_assignment_index);
A("XXXX up tpc_bitmap %d\n", q->tpc_bitmap);
A("XXXX up transmission_power %d\n", q->transmission_power);
}
if (p->pdu_type == NFAPI_HI_DCI0_HI_PDU_TYPE) {
nfapi_hi_dci0_hi_pdu_rel8_t *q = &p->hi_pdu.hi_pdu_rel8;
A("XXXX up rb start %d\n", q->resource_block_start);
A("XXXX up cs2_drms %d\n", q->cyclic_shift_2_for_drms);
A("XXXX up ack %d\n", q->hi_value);
A("XXXX up i_phich %d\n", q->i_phich);
A("XXXX up power %d\n", q->transmission_power);
}
}
}
if (d->UL_req != NULL) {
nfapi_ul_config_request_body_t *v=&d->UL_req->ul_config_request_body;
A("XXXX UL_req sfnsf %d (%d.%d)\n", d->UL_req->sfn_sf,
d->UL_req->sfn_sf/16, d->UL_req->sfn_sf%16);
A("XXXX PDUs %d\n", v->number_of_pdus);
A("XXXX ra freq %d\n", v->rach_prach_frequency_resources);
A("XXXX srs? %d\n", v->srs_present);
for (i = 0; i < v->number_of_pdus; i++) {
nfapi_ul_config_request_pdu_t *p = &v->ul_config_pdu_list[i];
A("XXXX pdu %d\n", i);
A("XXXX type %d %s\n", p->pdu_type, UL_PDU_TYPE(p->pdu_type));
switch(p->pdu_type) {
case NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE: {
nfapi_ul_config_uci_harq_pdu *q = &p->uci_harq_pdu;
nfapi_ul_config_harq_information_rel9_fdd_t *h =
&q->harq_information.harq_information_rel9_fdd;
A("XXXX rnti %d\n",
q->ue_information.ue_information_rel8.rnti);
A("XXXX harq size %d\n", h->harq_size);
A("XXXX ack_nack_mode %d\n", h->ack_nack_mode);
A("XXXX # pucch res %d\n", h->number_of_pucch_resources);
A("XXXX n_pucch_1_0 %d\n", h->n_pucch_1_0);
A("XXXX n_pucch_1_1 %d\n", h->n_pucch_1_1);
A("XXXX n_pucch_1_2 %d\n", h->n_pucch_1_2);
A("XXXX n_pucch_1_3 %d\n", h->n_pucch_1_3);
break;
}
case NFAPI_UL_CONFIG_UCI_SR_PDU_TYPE: {
nfapi_ul_config_uci_sr_pdu *q = &p->uci_sr_pdu;
nfapi_ul_config_sr_information_rel8_t *h =
&q->sr_information.sr_information_rel8;
A("XXXX rnti %d\n",
q->ue_information.ue_information_rel8.rnti);
A("XXXX pucch_index %d\n", h->pucch_index);
}}
}
}
LOG_I(PHY, "XXXX DL\nXXXX DL\n%s", s);
}
#undef C
#undef A
#endif /* DUMP_FAPI */
/****************************************************************************/
/* debug utility functions end */
/****************************************************************************/
void UL_indication(UL_IND_t *UL_info)
{
AssertFatal(UL_info!=NULL,"UL_INFO is null\n");
#ifdef DUMP_FAPI
dump_ul(UL_info);
#endif
module_id_t module_id = UL_info->module_id;
int CC_id = UL_info->CC_id;
Sched_Rsp_t *sched_info = &Sched_INFO[module_id][CC_id];
IF_Module_t *ifi = if_inst[module_id];
eNB_MAC_INST *mac = RC.mac[module_id];
LOG_D(PHY,"SFN/SF:%d%d module_id:%d CC_id:%d UL_info[rx_ind:%d harqs:%d crcs:%d cqis:%d preambles:%d sr_ind:%d]\n",
UL_info->frame,UL_info->subframe,
module_id,CC_id,
UL_info->rx_ind.rx_indication_body.number_of_pdus, UL_info->harq_ind.harq_indication_body.number_of_harqs, UL_info->crc_ind.crc_indication_body.number_of_crcs, UL_info->cqi_ind.number_of_cqis, UL_info->rach_ind.rach_indication_body.number_of_preambles, UL_info->sr_ind.sr_indication_body.number_of_srs);
if (nfapi_mode != 1)
{
if (ifi->CC_mask==0) {
ifi->current_frame = UL_info->frame;
ifi->current_subframe = UL_info->subframe;
}
else {
AssertFatal(UL_info->frame != ifi->current_frame,"CC_mask %x is not full and frame has changed\n",ifi->CC_mask);
AssertFatal(UL_info->subframe != ifi->current_subframe,"CC_mask %x is not full and subframe has changed\n",ifi->CC_mask);
}
ifi->CC_mask |= (1<<CC_id);
}
// clear DL/UL info for new scheduling round
clear_nfapi_information(RC.mac[module_id],CC_id,
UL_info->frame,UL_info->subframe);
handle_rach(UL_info);
handle_sr(UL_info);
handle_cqi(UL_info);
handle_harq(UL_info);
// clear HI prior to handling ULSCH
mac->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_hi = 0;
handle_ulsch(UL_info);
if (nfapi_mode != 1)
{
if (ifi->CC_mask == ((1<<MAX_NUM_CCs)-1)) {
eNB_dlsch_ulsch_scheduler(module_id,
(UL_info->frame+((UL_info->subframe>(9-sf_ahead))?1:0)) % 1024,
(UL_info->subframe+sf_ahead)%10);
ifi->CC_mask = 0;
sched_info->module_id = module_id;
sched_info->CC_id = CC_id;
sched_info->frame = (UL_info->frame + ((UL_info->subframe>(9-sf_ahead)) ? 1 : 0)) % 1024;
sched_info->subframe = (UL_info->subframe+sf_ahead)%10;
sched_info->DL_req = &mac->DL_req[CC_id];
sched_info->HI_DCI0_req = &mac->HI_DCI0_req[CC_id];
if ((mac->common_channels[CC_id].tdd_Config==NULL) ||
(is_UL_sf(&mac->common_channels[CC_id],(sched_info->subframe+sf_ahead)%10)>0))
sched_info->UL_req = &mac->UL_req[CC_id];
else
sched_info->UL_req = NULL;
sched_info->TX_req = &mac->TX_req[CC_id];
#ifdef DUMP_FAPI
dump_dl(sched_info);
#endif
if (ifi->schedule_response)
{
AssertFatal(ifi->schedule_response!=NULL,
"schedule_response is null (mod %d, cc %d)\n",
module_id,
CC_id);
ifi->schedule_response(sched_info);
}
LOG_D(PHY,"Schedule_response: SFN_SF:%d%d dl_pdus:%d\n",sched_info->frame,sched_info->subframe,sched_info->DL_req->dl_config_request_body.number_pdu);
}
}
}
IF_Module_t *IF_Module_init(int Mod_id){
AssertFatal(Mod_id<MAX_MODULES,"Asking for Module %d > %d\n",Mod_id,MAX_IF_MODULES);
LOG_D(PHY,"Installing callbacks for IF_Module - UL_indication\n");
if (if_inst[Mod_id]==NULL) {
if_inst[Mod_id] = (IF_Module_t*)malloc(sizeof(IF_Module_t));
memset((void*)if_inst[Mod_id],0,sizeof(IF_Module_t));
if_inst[Mod_id]->CC_mask=0;
if_inst[Mod_id]->UL_indication = UL_indication;
AssertFatal(pthread_mutex_init(&if_inst[Mod_id]->if_mutex,NULL)==0,
"allocation of if_inst[%d]->if_mutex fails\n",Mod_id);
}
return if_inst[Mod_id];
}
void IF_Module_kill(int Mod_id) {
AssertFatal(Mod_id>MAX_MODULES,"Asking for Module %d > %d\n",Mod_id,MAX_IF_MODULES);
if (if_inst[Mod_id]!=NULL) free(if_inst[Mod_id]);
}
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file openair2/PHY_INTERFACE/IF_Module.h
* \brief data structures for PHY/MAC interface modules
* \author EURECOM/NTUST
* \date 2017
* \version 0.1
* \company Eurecom
* \email: raymond.knopp@eurecom.fr
* \note
* \warning
*/
#ifndef __IF_MODULE__H__
#define __IF_MODULE__H__
#include <stdint.h>
#include "openair1/PHY/LTE_TRANSPORT/defs.h"
#include "nfapi_interface.h"
#define MAX_NUM_DL_PDU 100
#define MAX_NUM_UL_PDU 100
#define MAX_NUM_HI_DCI0_PDU 100
#define MAX_NUM_TX_REQUEST_PDU 100
#define MAX_NUM_HARQ_IND 100
#define MAX_NUM_CRC_IND 100
#define MAX_NUM_SR_IND 100
#define MAX_NUM_CQI_IND 100
#define MAX_NUM_RACH_IND 100
#define MAX_NUM_SRS_IND 100
typedef struct{
/// Module ID
module_id_t module_id;
/// CC ID
int CC_id;
/// frame
frame_t frame;
/// subframe
sub_frame_t subframe;
/// harq indication list
nfapi_harq_indication_t harq_ind;
/// crc indication list
nfapi_crc_indication_t crc_ind;
/// SR indication list
nfapi_sr_indication_t sr_ind;
/// CQI indication list
nfapi_cqi_indication_body_t cqi_ind;
/// RACH indication list
nfapi_rach_indication_t rach_ind;
#ifdef Rel14
/// RACH indication list for BR UEs
nfapi_rach_indication_t rach_ind_br;
#endif
/// SRS indication list
nfapi_srs_indication_body_t srs_ind;
/// RX indication
nfapi_rx_indication_t rx_ind;
} UL_IND_t;
// Downlink subframe P7
typedef struct{
/// Module ID
module_id_t module_id;
/// CC ID
uint8_t CC_id;
/// frame
frame_t frame;
/// subframe
sub_frame_t subframe;
/// nFAPI DL Config Request
nfapi_dl_config_request_t *DL_req;
/// nFAPI UL Config Request
nfapi_ul_config_request_t *UL_req;
/// nFAPI HI_DCI Request
nfapi_hi_dci0_request_t *HI_DCI0_req;
/// Pointers to DL SDUs
nfapi_tx_request_t *TX_req;
}Sched_Rsp_t;
typedef struct {
uint8_t Mod_id;
int CC_id;
nfapi_config_request_t *cfg;
}PHY_Config_t;
typedef struct IF_Module_s{
//define the function pointer
void (*UL_indication)(UL_IND_t *UL_INFO);
void (*schedule_response)(Sched_Rsp_t *Sched_INFO);
void (*PHY_config_req)(PHY_Config_t* config_INFO);
uint32_t CC_mask;
uint16_t current_frame;
uint8_t current_subframe;
pthread_mutex_t if_mutex;
}IF_Module_t;
/*Initial */
IF_Module_t *IF_Module_init(int Mod_id);
void IF_Module_kill(int Mod_id);
/*Interface for uplink, transmitting the Preamble(list), ULSCH SDU, NAK, Tick (trigger scheduler)
*/
void UL_indication(UL_IND_t *UL_INFO);
/*Interface for Downlink, transmitting the DLSCH SDU, DCI SDU*/
void Schedule_Response(Sched_Rsp_t *Sched_INFO);
#endif
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file NR_IF_Module.c
* \brief functions for NR UE FAPI-like interface
* \author R. Knopp
* \date 2018
* \version 0.1
* \company Eurecom
* \email: knopp@eurecom.fr
* \note
* \warning
*/
#include "NR_IF_Module.h"
#include "LAYER2/NR_MAC_UE/proto.h"
#define MAX_IF_MODULES 100
static nr_ue_if_module_t *nr_ue_if_module_inst[MAX_IF_MODULES];
int8_t handle_bcch_bch(uint32_t pdu_len, uint8_t *pduP){
// pdu_len = 4, 32bits
uint8_t extra_bits = pduP[3];
uint32_t ssb_index;
uint32_t frame;
nr_ue_decode_mib( (module_id_t)0,
0,
0,
extra_bits,
0, // Lssb = 64 is not support
&ssb_index,
&frame,
pduP,
3 );
return 0;
}
int8_t handle_bcch_dlsch(uint32_t pdu_len, uint8_t *pduP){
return 0;
}
int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
if(dl_info->rx_ind != NULL){
switch(dl_info->rx_ind->rx_request_body.pdu_index){
case FAPI_NR_RX_PDU_BCCH_BCH_TYPE:
handle_bcch_bch(dl_info->rx_ind->rx_request_body.pdu_length, dl_info->rx_ind->rx_request_body.pdu);
break;
case FAPI_NR_RX_PDU_BCCH_DLSCH_TYPE:
handle_bcch_dlsch(dl_info->rx_ind->rx_request_body.pdu_length, dl_info->rx_ind->rx_request_body.pdu);
break;
default:
break;
}
}
if(dl_info->dci_ind != NULL){
}
return 0;
}
nr_ue_if_module_t *nr_ue_if_module_init(uint32_t module_id){
if (nr_ue_if_module_inst[module_id] == NULL) {
nr_ue_if_module_inst[module_id] = (nr_ue_if_module_t*)malloc(sizeof(nr_ue_if_module_t));
memset((void*)nr_ue_if_module_inst[module_id],0,sizeof(nr_ue_if_module_t));
nr_ue_if_module_inst[module_id]->CC_mask=0;
nr_ue_if_module_register_dl_indication(module_id, nr_ue_dl_indication);
}
return nr_ue_if_module_inst[module_id];
}
int8_t nr_ue_if_module_register_dl_indication(uint32_t module_id, nr_ue_dl_indication_f *f){
if (nr_ue_if_module_inst[module_id] == NULL) {
nr_ue_if_module_inst[module_id]->dl_indication = f;
}else{
return -1;
}
return 0;
}
int8_t nr_ue_if_module_register_phy_config_request(uint32_t module_id, nr_ue_phy_config_request_f *f){
if (nr_ue_if_module_inst[module_id] == NULL) {
nr_ue_if_module_inst[module_id]->phy_config_request = f;
}else{
return -1;
}
return 0;
}
int8_t nr_ue_if_module_register_scheduled_response(uint32_t module_id, nr_ue_scheduled_response_f *f){
if (nr_ue_if_module_inst[module_id] == NULL) {
nr_ue_if_module_inst[module_id]->scheduled_response = f;
}else{
return -1;
}
return 0;
}
int8_t nr_ue_if_module_kill(uint32_t module_id) {
if (nr_ue_if_module_inst[module_id] != NULL){
free(nr_ue_if_module_inst[module_id]);
}
return 0;
}
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file openair2/PHY_INTERFACE/IF_Module.h
* \brief data structures for PHY/MAC interface modules
* \author EURECOM/NTUST
* \date 2018
* \version 0.1
* \company Eurecom
* \email: raymond.knopp@eurecom.fr
* \note
* \warning
*/
#ifndef __NR_IF_MODULE_H__
#define __NR_IF_MODULE_H__
#include "platform_types.h"
#include "fapi_nr_ue_interface.h"
typedef struct {
/// module id
module_id_t module_id;
/// component carrier id
int CC_id;
/// frame
frame_t frame;
/// subframe
sub_frame_t subframe;
/// slot
uint8_t slot;
/// NR UE FAPI-like P7 message, direction: L1 to L2
/// data reception indication structure
fapi_nr_rx_indication_t *rx_ind;
/// dci reception indication structure
fapi_nr_dci_indication_t *dci_ind;
} nr_downlink_indication_t;
// Downlink subframe P7
typedef struct {
/// module id
module_id_t module_id;
/// component carrier id
uint8_t CC_id;
/// frame
frame_t frame;
/// subframe
sub_frame_t subframe;
/// slot
uint8_t slot;
/// NR UE FAPI-like P7 message, direction: L2 to L1
/// downlink transmission configuration request structure
fapi_nr_dl_config_request_t *dl_config;
/// uplink transmission configuration request structure
fapi_nr_ul_config_request_t *ul_config;
/// data transmission request structure
fapi_nr_tx_request_t *tx_request;
} nr_scheduled_response_t;
typedef struct {
/// module id
uint8_t Mod_id;
/// component carrier id
uint8_t CC_id;
/// NR UE FAPI-like P5 message
/// physical layer configuration request structure
fapi_nr_config_request_t *config_req;
} nr_phy_config_t;
/*
* Generic type of an application-defined callback to return various
* types of data to the application.
* EXPECTED RETURN VALUES:
* -1: Failed to consume bytes. Abort the mission.
* Non-negative return values indicate success, and ignored.
*/
typedef int8_t(nr_ue_scheduled_response_f)(nr_scheduled_response_t *scheduled_response);
/*
* Generic type of an application-defined callback to return various
* types of data to the application.
* EXPECTED RETURN VALUES:
* -1: Failed to consume bytes. Abort the mission.
* Non-negative return values indicate success, and ignored.
*/
typedef int8_t(nr_ue_phy_config_request_f)(nr_phy_config_t *phy_config);
/*
* Generic type of an application-defined callback to return various
* types of data to the application.
* EXPECTED RETURN VALUES:
* -1: Failed to consume bytes. Abort the mission.
* Non-negative return values indicate success, and ignored.
*/
typedef int8_t(nr_ue_dl_indication_f)(nr_downlink_indication_t *dl_info);
// TODO check this stuff can be reuse of need modification
typedef struct IF_Module_s {
nr_ue_scheduled_response_f *scheduled_response;
nr_ue_phy_config_request_f *phy_config_request;
nr_ue_dl_indication_f *dl_indication;
uint32_t CC_mask;
uint16_t current_frame;
uint8_t current_subframe;
//pthread_mutex_t nr_if_mutex;
} nr_ue_if_module_t;
/**\brief reserved one of the interface(if) module instantce from pointer pool and done memory allocation by module_id.
\param module_id module id*/
nr_ue_if_module_t *nr_ue_if_module_init(uint32_t module_id);
/**\brief done free of memory allocation by module_id and release to pointer pool.
\param module_id module id*/
int8_t nr_ue_if_module_kill(uint32_t module_id);
/**\brief interface between L1/L2, indicating the downlink related information, like dci_ind and rx_req
\param dl_info including dci_ind and rx_request messages*/
int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info);
/**\brief register dl_indication into certain if_module_inst by module_id
\param f function pointer to dl_indication*/
int8_t nr_ue_if_module_register_dl_indication(uint32_t module_id, nr_ue_dl_indication_f *f);
/**\brief register phy_config_request into certain if_module_inst by module_id
\param f function pointer to phy_config_request*/
int8_t nr_ue_if_module_register_phy_config_request(uint32_t module_id, nr_ue_phy_config_request_f *f);
/**\brief register scheduled_response into certain if_module_inst by module_id
\param f function pointer to scheduled_response*/
int8_t nr_ue_if_module_register_scheduled_response(uint32_t module_id, nr_ue_scheduled_response_f *f);
/**\brief handle BCCH-BCH message from dl_indication
\param pdu_len length(bytes) of pdu
\param pduP pointer to pdu*/
int8_t handle_bcch_bch(uint32_t pdu_len, uint8_t *pduP);
/**\brief handle BCCH-DL-SCH message from dl_indication
\param pdu_len length(bytes) of pdu
\param pduP pointer to pdu*/
int8_t handle_bcch_dlsch(uint32_t pdu_len, uint8_t *pduP);
#endif
...@@ -287,6 +287,10 @@ int8_t nr_rrc_ue_decode_NR_BCCH_BCH_Message( ...@@ -287,6 +287,10 @@ int8_t nr_rrc_ue_decode_NR_BCCH_BCH_Message(
NR_BCCH_BCH_Message_t *bcch_message = NULL; NR_BCCH_BCH_Message_t *bcch_message = NULL;
NR_MIB_t *mib = NR_UE_rrc_inst->mib; NR_MIB_t *mib = NR_UE_rrc_inst->mib;
if(mib != NULL){
SEQUENCE_free( &asn_DEF_NR_BCCH_BCH_Message, (void *)mib, 1 );
}
asn_dec_rval_t dec_rval = uper_decode_complete( NULL, asn_dec_rval_t dec_rval = uper_decode_complete( NULL,
&asn_DEF_NR_BCCH_BCH_Message, &asn_DEF_NR_BCCH_BCH_Message,
(void **)&bcch_message, (void **)&bcch_message,
...@@ -307,10 +311,11 @@ int8_t nr_rrc_ue_decode_NR_BCCH_BCH_Message( ...@@ -307,10 +311,11 @@ int8_t nr_rrc_ue_decode_NR_BCCH_BCH_Message(
return -1; return -1;
} }
// copy into rrc instance // link to rrc instance
memcpy( (void *)mib, mib = &bcch_message->message.choice.mib;
(void *)&bcch_message->message.choice.mib, //memcpy( (void *)mib,
sizeof(NR_MIB_t) ); // (void *)&bcch_message->message.choice.mib,
// sizeof(NR_MIB_t) );
nr_rrc_mac_config_req_ue( 0, 0, 0, mib, NULL, NULL, NULL); nr_rrc_mac_config_req_ue( 0, 0, 0, mib, NULL, NULL, NULL);
......
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