Commit 5d834473 authored by Remi Hardy's avatar Remi Hardy

Integration 2021 wk16

MR !1129 : gnb-realtime-hotfix
-Hotfix for realtime performance issue
-Enabled L1 and scheduler timing statistics
-Changed order of UL Indication. L1 Rx -> UL Ind -> L1 Tx

MR !1123 : [CI] ci_phytest
-new 5G NR phy test -q -U 787200 -T 106 -t 28 -D 130175 -m 28 -M 106

MR !1128 : [CI] ci_add_runtime_stats
-adding L1 processing stats

MR !1132 : [CI] ci_add_uldlharq_stats
-additonal ulsch/dlsch stat

no MR : hotfix branch fixgtpu 
-revert default values for 5GS
-fix T_IDs.h build
parents d7913bb0 0c3280b5
Active_gNBs = ( "gNB-Eurecom-5GNRBox");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
cell_type = "CELL_MACRO_GNB";
gNB_name = "gNB-Eurecom-5GNRBox";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({mcc = 222; mnc = 01; mnc_length = 2;});
tr_s_preference = "local_mac"
////////// Physical parameters:
ssb_SubcarrierOffset = 31; //0;
pdsch_AntennaPorts = 1;
pusch_AntennaPorts = 1;
pusch_TargetSNRx10 = 200;
pucch_TargetSNRx10 = 200;
servingCellConfigCommon = (
{
#spCellConfigCommon
physCellId = 0;
# downlinkConfigCommon
#frequencyInfoDL
# this is 3600 MHz + 84 PRBs@30kHz SCS (same as initial BWP)
absoluteFrequencySSB = 641272; //641032; #641968; 641968=start of ssb at 3600MHz + 82 RBs 641032=center of SSB at center of cell
dl_frequencyBand = 78;
# this is 3600 MHz
dl_absoluteFrequencyPointA = 640000;
#scs-SpecificCarrierList
dl_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing = 1;
dl_carrierBandwidth = 106;
#initialDownlinkBWP
#genericParameters
# this is RBstart=84,L=13 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 6368;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=4 //5 (4 is for 43, 5 is for 57)
initialDLBWPstartSymbolAndLength_3 = 57; //43; //57;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 78;
#scs-SpecificCarrierList
ul_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing = 1;
ul_carrierBandwidth = 106;
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 6368;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
#rach-ConfigCommon
#rach-ConfigGeneric
prach_ConfigurationIndex = 98;
#prach_msg1_FDM
#0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM = 0;
prach_msg1_FrequencyStart = 0;
zeroCorrelationZoneConfig = 13;
preambleReceivedTargetPower = -100;
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax = 6;
#powerRampingStep
# 0=dB0,1=dB2,2=dB4,3=dB6
powerRampingStep = 1;
#ra_ReponseWindow
#1,2,4,8,10,20,40,80
ra_ResponseWindow = 5;
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4;
#oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 14; //15;
#ra_ContentionResolutionTimer
#(0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer = 7;
rsrp_ThresholdSSB = 19;
#prach-RootSequenceIndex_PR
#1 = 839, 2 = 139
prach_RootSequenceIndex_PR = 2;
prach_RootSequenceIndex = 1;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
#
msg1_SubcarrierSpacing = 1,
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2;
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 2;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
# pucch-ConfigCommon setup :
# pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping = 0;
hoppingId = 40;
p0_nominal = -90;
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 2;
ssb_PositionsInBurst_Bitmap = 1; #0x80;
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 2;
# dmrs_TypeA_position
# 0 = pos2, 1 = pos3
dmrs_TypeA_Position = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing = 1;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = 1;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 6;
nrofDownlinkSlots = 7; //8; //7;
nrofDownlinkSymbols = 6; //0; //6;
nrofUplinkSlots = 2;
nrofUplinkSymbols = 4; //0; //4;
ssPBCH_BlockPower = -25;
}
);
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// MME parameters:
mme_ip_address = ( { ipv4 = "CI_MME_IP_ADDR";
ipv6 = "192:168:30::17";
port = 36412 ;
active = "yes";
preference = "ipv4";
}
);
///X2
enable_x2 = "yes";
t_reloc_prep = 1000; /* unit: millisecond */
tx2_reloc_overall = 2000; /* unit: millisecond */
t_dc_prep = 1000; /* unit: millisecond */
t_dc_overall = 2000; /* unit: millisecond */
target_enb_x2_ip_address = (
{ ipv4 = "CI_FR1_CTL_ENB_IP_ADDR";
ipv6 = "192:168:30::17";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
GNB_INTERFACE_NAME_FOR_S1_MME = "eth0";
GNB_IPV4_ADDRESS_FOR_S1_MME = "CI_GNB_IP_ADDR";
GNB_INTERFACE_NAME_FOR_S1U = "eth0";
GNB_IPV4_ADDRESS_FOR_S1U = "CI_GNB_IP_ADDR";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
GNB_IPV4_ADDRESS_FOR_X2C = "CI_GNB_IP_ADDR";
GNB_PORT_FOR_X2C = 36422; # Spec 36422
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
pusch_proc_threads = 6;
}
);
RUs = (
{
local_rf = "yes"
nb_tx = 1
nb_rx = 1
att_tx = 0
att_rx = 0;
bands = [7];
max_pdschReferenceSignalPower = -27;
max_rxgain = 75; #114
eNB_instances = [0];
sdr_addrs = "addr=192.168.80.50"
clock_src = "internal"
}
);
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
//parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
);
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
};
uicc: {
opc = "testopc";
};
...@@ -694,8 +694,8 @@ class RANManagement(): ...@@ -694,8 +694,8 @@ class RANManagement():
NSA_RAPROC_PUSCH_check = 0 NSA_RAPROC_PUSCH_check = 0
#dlsch and ulsch statistics (dictionary) #dlsch and ulsch statistics (dictionary)
dlsch_ulsch_stats = {} dlsch_ulsch_stats = {}
#count "L1 thread not ready" msg #real time statistics (dictionary)
L1_thread_not_ready_cnt = 0 real_time_stats = {}
#count "problem receiving samples" msg #count "problem receiving samples" msg
pb_receiving_samples_cnt = 0 pb_receiving_samples_cnt = 0
...@@ -857,16 +857,21 @@ class RANManagement(): ...@@ -857,16 +857,21 @@ class RANManagement():
#keys below are the markers we are loooking for, loop over this keys list #keys below are the markers we are loooking for, loop over this keys list
#everytime these markers are found in the log file, the previous ones are overwritten in the dict #everytime these markers are found in the log file, the previous ones are overwritten in the dict
#eventually we record and print only the last occurence #eventually we record and print only the last occurence
keys = {'dlsch_rounds','dlsch_total_bytes','ulsch_rounds','ulsch_total_bytes_scheduled'} keys = {'UE ID','dlsch_rounds','dlsch_total_bytes','ulsch_rounds','ulsch_total_bytes_scheduled', 'scheduling timing stats'}
for k in keys: for k in keys:
result = re.search(k, line) result = re.search(k, line)
if result is not None: if result is not None:
#remove 1- all useless char before relevant info (ulsch or dlsch) 2- trailing char #remove 1- all useless char before relevant info (ulsch or dlsch) 2- trailing char
dlsch_ulsch_stats[k]=re.sub(r'^.*\]\s+', r'' , line.rstrip()) dlsch_ulsch_stats[k]=re.sub(r'^.*\]\s+', r'' , line.rstrip())
#count "L1 thread not ready" msg #real time statistics
result = re.search('\[PHY\]\s+L1_thread isn\'t ready', str(line)) #same method as above
keys = {'feprx','feptx_prec','feptx_ofdm','feptx_total','L1 Tx processing','DLSCH encoding','L1 Rx processing','PUSCH inner-receiver','PUSCH decoding'}
for k in keys:
result = re.search(k, line)
if result is not None: if result is not None:
L1_thread_not_ready_cnt += 1 #remove 1- all useless char before relevant info 2- trailing char
tmp=re.match(rf'^.*?(\b{k}\b.*)',line.rstrip()) #from python 3.6 we can use literal string interpolation for the variable k, using rf' in the regex
real_time_stats[k]=tmp.group(1)
#count "problem receiving samples" msg #count "problem receiving samples" msg
result = re.search('\[PHY\]\s+problem receiving samples', str(line)) result = re.search('\[PHY\]\s+problem receiving samples', str(line))
if result is not None: if result is not None:
...@@ -897,12 +902,7 @@ class RANManagement(): ...@@ -897,12 +902,7 @@ class RANManagement():
statMsg = '[RAPROC] PUSCH with TC_RNTI message check for ' + nodeB_prefix + 'NB : PASS ' statMsg = '[RAPROC] PUSCH with TC_RNTI message check for ' + nodeB_prefix + 'NB : PASS '
htmlMsg = statMsg+'\n' htmlMsg = statMsg+'\n'
else: else:
statMsg = '[RAPROC] PUSCH with TC_RNTI message check for ' + nodeB_prefix + 'NB : FAIL ' statMsg = '[RAPROC] PUSCH with TC_RNTI message check for ' + nodeB_prefix + 'NB : FAIL or not relevant'
htmlMsg = statMsg+'\n'
logging.debug(statMsg)
htmleNBFailureMsg += htmlMsg
#L1 thread not ready log
statMsg = '[PHY] L1 thread is not ready msg count = '+str(L1_thread_not_ready_cnt)
htmlMsg = statMsg+'\n' htmlMsg = statMsg+'\n'
logging.debug(statMsg) logging.debug(statMsg)
htmleNBFailureMsg += htmlMsg htmleNBFailureMsg += htmlMsg
...@@ -920,6 +920,18 @@ class RANManagement(): ...@@ -920,6 +920,18 @@ class RANManagement():
logging.debug(dlsch_ulsch_stats[key]) logging.debug(dlsch_ulsch_stats[key])
htmleNBFailureMsg += statMsg htmleNBFailureMsg += statMsg
#real time statistics statistics
if len(real_time_stats)!=0: #check if dictionary is not empty
statMsg=''
for key in real_time_stats: #for each dictionary key
statMsg += real_time_stats[key] + '\n'
logging.debug(real_time_stats[key])
htmleNBFailureMsg += statMsg
else:
statMsg = 'No real time stats found in the log file\n'
logging.debug('No real time stats found in the log file')
htmleNBFailureMsg += statMsg
if uciStatMsgCount > 0: if uciStatMsgCount > 0:
statMsg = nodeB_prefix + 'NB showed ' + str(uciStatMsgCount) + ' "uci->stat" message(s)' statMsg = nodeB_prefix + 'NB showed ' + str(uciStatMsgCount) + ' "uci->stat" message(s)'
logging.debug('\u001B[1;30;43m ' + statMsg + ' \u001B[0m') logging.debug('\u001B[1;30;43m ' + statMsg + ' \u001B[0m')
......
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<testCaseList>
<htmlTabRef>gNB-PHY-Test</htmlTabRef>
<htmlTabName>Run-gNB-PHY-Test</htmlTabName>
<htmlTabIcon>tasks</htmlTabIcon>
<repeatCount>2</repeatCount>
<TestCaseRequestedList>
090101 000001 090109
</TestCaseRequestedList>
<TestCaseExclusionList></TestCaseExclusionList>
<testCase id="090101">
<class>Initialize_eNB</class>
<desc>Initialize gNB USRP</desc>
<Initialize_eNB_args>-O ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf --phy-test -q -U 787200 -T 106 -t 28 -D 130175 -m 28 -M 106</Initialize_eNB_args>
<air_interface>NR</air_interface>
</testCase>
<testCase id="000001">
<class>IdleSleep</class>
<desc>Sleep</desc>
<idle_sleep_time_in_sec>180</idle_sleep_time_in_sec>
</testCase>
<testCase id="090109">
<class>Terminate_eNB</class>
<desc>Terminate gNB</desc>
<air_interface>NR</air_interface>
</testCase>
</testCaseList>
...@@ -2828,8 +2828,6 @@ endif (${T_TRACER}) ...@@ -2828,8 +2828,6 @@ endif (${T_TRACER})
#This rule and the following deal with it. #This rule and the following deal with it.
add_custom_command ( add_custom_command (
OUTPUT ${OPENAIR_DIR}/common/utils/T/T_IDs.h OUTPUT ${OPENAIR_DIR}/common/utils/T/T_IDs.h
COMMAND make clean
COMMAND make -j2
COMMAND make check_vcd COMMAND make check_vcd
WORKING_DIRECTORY ${OPENAIR_DIR}/common/utils/T WORKING_DIRECTORY ${OPENAIR_DIR}/common/utils/T
DEPENDS ${OPENAIR_DIR}/common/utils/T/T_messages.txt DEPENDS ${OPENAIR_DIR}/common/utils/T/T_messages.txt
...@@ -2837,6 +2835,10 @@ add_custom_command ( ...@@ -2837,6 +2835,10 @@ add_custom_command (
${OPENAIR_DIR}/common/utils/LOG/vcd_signal_dumper.h ${OPENAIR_DIR}/common/utils/LOG/vcd_signal_dumper.h
) )
execute_process (
COMMAND make check_vcd
WORKING_DIRECTORY ${OPENAIR_DIR}/common/utils/T
)
#This rule is specifically needed to generate T files #This rule is specifically needed to generate T files
#before anything else in a project that uses the T. #before anything else in a project that uses the T.
#See below, there are some 'add_dependencies' showing that. #See below, there are some 'add_dependencies' showing that.
......
...@@ -18,7 +18,7 @@ T_messages.txt.h: T_messages.txt ...@@ -18,7 +18,7 @@ T_messages.txt.h: T_messages.txt
T_IDs.h: $(GENIDS) T_messages.txt T_IDs.h: $(GENIDS) T_messages.txt
./$(GENIDS) T_messages.txt T_IDs.h ./$(GENIDS) T_messages.txt T_IDs.h
check_vcd: check_vcd: T_IDs.h T_messages.txt.h
gcc -Wall -I. -I.. -I../itti -I../../../openair2/COMMON -Itracer -o _check_vcd check_vcd.c tracer/database.c tracer/utils.c -lm -pthread gcc -Wall -I. -I.. -I../itti -I../../../openair2/COMMON -Itracer -o _check_vcd check_vcd.c tracer/database.c tracer/utils.c -lm -pthread
./_check_vcd || (rm -f ./_check_vcd ./T_IDs.h ./T_messages.txt.h && false) ./_check_vcd || (rm -f ./_check_vcd ./T_IDs.h ./T_messages.txt.h && false)
rm -f ./_check_vcd rm -f ./_check_vcd
......
...@@ -228,16 +228,6 @@ void rx_func(void *param) { ...@@ -228,16 +228,6 @@ void rx_func(void *param) {
rnti_to_remove_count = 0; rnti_to_remove_count = 0;
if (pthread_mutex_unlock(&rnti_to_remove_mutex)) exit(1); if (pthread_mutex_unlock(&rnti_to_remove_mutex)) exit(1);
// Call the scheduler
pthread_mutex_lock(&gNB->UL_INFO_mutex);
gNB->UL_INFO.frame = frame_rx;
gNB->UL_INFO.slot = slot_rx;
gNB->UL_INFO.module_id = gNB->Mod_id;
gNB->UL_INFO.CC_id = gNB->CC_id;
gNB->if_inst->NR_UL_indication(&gNB->UL_INFO);
pthread_mutex_unlock(&gNB->UL_INFO_mutex);
// RX processing // RX processing
int tx_slot_type = nr_slot_select(cfg,frame_tx,slot_tx); int tx_slot_type = nr_slot_select(cfg,frame_tx,slot_tx);
int rx_slot_type = nr_slot_select(cfg,frame_rx,slot_rx); int rx_slot_type = nr_slot_select(cfg,frame_rx,slot_rx);
...@@ -264,6 +254,18 @@ void rx_func(void *param) { ...@@ -264,6 +254,18 @@ void rx_func(void *param) {
stop_meas( &softmodem_stats_rxtx_sf ); stop_meas( &softmodem_stats_rxtx_sf );
LOG_D(PHY,"%s() Exit proc[rx:%d%d tx:%d%d]\n", __FUNCTION__, frame_rx, slot_rx, frame_tx, slot_tx); LOG_D(PHY,"%s() Exit proc[rx:%d%d tx:%d%d]\n", __FUNCTION__, frame_rx, slot_rx, frame_tx, slot_tx);
// Call the scheduler
start_meas(&gNB->ul_indication_stats);
pthread_mutex_lock(&gNB->UL_INFO_mutex);
gNB->UL_INFO.frame = frame_rx;
gNB->UL_INFO.slot = slot_rx;
gNB->UL_INFO.module_id = gNB->Mod_id;
gNB->UL_INFO.CC_id = gNB->CC_id;
gNB->if_inst->NR_UL_indication(&gNB->UL_INFO);
pthread_mutex_unlock(&gNB->UL_INFO_mutex);
stop_meas(&gNB->ul_indication_stats);
notifiedFIFO_elt_t *res; notifiedFIFO_elt_t *res;
if (tx_slot_type == NR_DOWNLINK_SLOT || tx_slot_type == NR_MIXED_SLOT) { if (tx_slot_type == NR_DOWNLINK_SLOT || tx_slot_type == NR_MIXED_SLOT) {
...@@ -323,18 +325,24 @@ static void *process_stats_thread(void *param) { ...@@ -323,18 +325,24 @@ static void *process_stats_thread(void *param) {
PHY_VARS_gNB *gNB = (PHY_VARS_gNB *)param; PHY_VARS_gNB *gNB = (PHY_VARS_gNB *)param;
reset_meas(&gNB->phy_proc_tx);
reset_meas(&gNB->dlsch_encoding_stats); reset_meas(&gNB->dlsch_encoding_stats);
reset_meas(&gNB->dlsch_scrambling_stats); reset_meas(&gNB->phy_proc_rx);
reset_meas(&gNB->dlsch_modulation_stats); reset_meas(&gNB->ul_indication_stats);
reset_meas(&gNB->rx_pusch_stats);
reset_meas(&gNB->ulsch_decoding_stats);
wait_sync("process_stats_thread"); wait_sync("process_stats_thread");
while(!oai_exit) while(!oai_exit)
{ {
sleep(1); sleep(1);
print_meas(&gNB->dlsch_encoding_stats, "pdsch_encoding", NULL, NULL); print_meas(&gNB->phy_proc_tx, "L1 Tx processing", NULL, NULL);
print_meas(&gNB->dlsch_scrambling_stats, "pdsch_scrambling", NULL, NULL); print_meas(&gNB->dlsch_encoding_stats, "DLSCH encoding", NULL, NULL);
print_meas(&gNB->dlsch_modulation_stats, "pdsch_modulation", NULL, NULL); print_meas(&gNB->phy_proc_rx, "L1 Rx processing", NULL, NULL);
print_meas(&gNB->ul_indication_stats, "UL Indication", NULL, NULL);
print_meas(&gNB->rx_pusch_stats, "PUSCH inner-receiver", NULL, NULL);
print_meas(&gNB->ulsch_decoding_stats, "PUSCH decoding", NULL, NULL);
} }
return(NULL); return(NULL);
} }
......
...@@ -68,11 +68,15 @@ ...@@ -68,11 +68,15 @@
#define CONFIG_HLP_SOFTS "Enable soft scope and L1 and L2 stats (Xforms)\n" #define CONFIG_HLP_SOFTS "Enable soft scope and L1 and L2 stats (Xforms)\n"
#define CONFIG_HLP_EXMCAL "Calibrate the EXMIMO borad, available files: exmimo2_2arxg.lime exmimo2_2brxg.lime \n" #define CONFIG_HLP_EXMCAL "Calibrate the EXMIMO borad, available files: exmimo2_2arxg.lime exmimo2_2brxg.lime \n"
#define CONFIG_HLP_ITTIL "Generate ITTI analyzser logs (similar to wireshark logs but with more details)\n" #define CONFIG_HLP_ITTIL "Generate ITTI analyzser logs (similar to wireshark logs but with more details)\n"
#define CONFIG_HLP_DLMCS "Set the maximum downlink MCS\n" #define CONFIG_HLP_DLMCS_PHYTEST "Set the downlink MCS for PHYTEST mode\n"
#define CONFIG_HLP_STMON "Enable processing timing measurement of lte softmodem on per subframe basis \n" #define CONFIG_HLP_STMON "Enable processing timing measurement of lte softmodem on per subframe basis \n"
#define CONFIG_HLP_PRB "Set the PRB, valid values: 6, 25, 50, 100 \n" #define CONFIG_HLP_PRB "Set the PRB, valid values: 6, 25, 50, 100 \n"
#define CONFIG_HLP_MSLOTS "Skip the missed slots/subframes \n" #define CONFIG_HLP_MSLOTS "Skip the missed slots/subframes \n"
#define CONFIG_HLP_ULMCS "Set the maximum uplink MCS\n" #define CONFIG_HLP_ULMCS_PHYTEST "Set the uplink MCS for PHYTEST mode\n"
#define CONFIG_HLP_DLBW_PHYTEST "Set the number of PRBs used for DLSCH in PHYTEST mode\n"
#define CONFIG_HLP_ULBW_PHYTEST "Set the number of PRBs used for ULSCH in PHYTEST mode\n"
#define CONFIG_HLP_DLBM_PHYTEST "Bitmap for DLSCH slots (slot 0 starts at LSB)\n"
#define CONFIG_HLP_ULBM_PHYTEST "Bitmap for ULSCH slots (slot 0 starts at LSB)\n"
#define CONFIG_HLP_TDD "Set hardware to TDD mode (default: FDD). Used only with -U (otherwise set in config file).\n" #define CONFIG_HLP_TDD "Set hardware to TDD mode (default: FDD). Used only with -U (otherwise set in config file).\n"
#define CONFIG_HLP_UE "Set the lte softmodem as a UE\n" #define CONFIG_HLP_UE "Set the lte softmodem as a UE\n"
#define CONFIG_HLP_L2MONW "Enable L2 wireshark messages on localhost \n" #define CONFIG_HLP_L2MONW "Enable L2 wireshark messages on localhost \n"
......
...@@ -161,8 +161,6 @@ int otg_enabled; ...@@ -161,8 +161,6 @@ int otg_enabled;
//static NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]; //static NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs];
//static nfapi_nr_config_request_t *config[MAX_NUM_CCs]; //static nfapi_nr_config_request_t *config[MAX_NUM_CCs];
uint32_t target_dl_mcs = 28; //maximum allowed mcs
uint32_t target_ul_mcs = 20;
uint32_t timing_advance = 0; uint32_t timing_advance = 0;
uint64_t num_missed_slots=0; // counter for the number of missed slots uint64_t num_missed_slots=0; // counter for the number of missed slots
......
...@@ -21,12 +21,24 @@ ...@@ -21,12 +21,24 @@
{"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \ {"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \
{"A" , CONFIG_HLP_TADV, 0, uptr:&timing_advance, defintval:0, TYPE_UINT, 0}, \ {"A" , CONFIG_HLP_TADV, 0, uptr:&timing_advance, defintval:0, TYPE_UINT, 0}, \
{"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, i8ptr:&threequarter_fs, defintval:0, TYPE_INT8, 0}, \ {"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, i8ptr:&threequarter_fs, defintval:0, TYPE_INT8, 0}, \
{"m" , CONFIG_HLP_DLMCS_PHYTEST,0, uptr:&target_dl_mcs, defintval:0, TYPE_UINT, 0}, \
{"t" , CONFIG_HLP_ULMCS_PHYTEST,0, uptr:&target_ul_mcs, defintval:0, TYPE_UINT, 0}, \
{"M" , CONFIG_HLP_DLBW_PHYTEST,0, uptr:&target_dl_bw, defintval:0, TYPE_UINT, 0}, \
{"T" , CONFIG_HLP_ULBW_PHYTEST,0, uptr:&target_ul_bw, defintval:0, TYPE_UINT, 0}, \
{"D" , CONFIG_HLP_DLBM_PHYTEST,0, u64ptr:&dlsch_slot_bitmap, defintval:0, TYPE_UINT64, 0}, \
{"U" , CONFIG_HLP_ULBM_PHYTEST,0, u64ptr:&ulsch_slot_bitmap, defintval:0, TYPE_UINT64, 0}, \
{"usrp-tx-thread-config", CONFIG_HLP_USRP_THREAD, 0, iptr:&usrp_tx_thread, defstrval:0, TYPE_INT, 0}, \ {"usrp-tx-thread-config", CONFIG_HLP_USRP_THREAD, 0, iptr:&usrp_tx_thread, defstrval:0, TYPE_INT, 0}, \
{"s" , CONFIG_HLP_SNR, 0, dblptr:&snr_dB, defdblval:25, TYPE_DOUBLE, 0}, \ {"s" , CONFIG_HLP_SNR, 0, dblptr:&snr_dB, defdblval:25, TYPE_DOUBLE, 0}, \
} }
#include "threads_t.h" #include "threads_t.h"
extern threads_t threads; extern threads_t threads;
extern uint32_t target_dl_mcs;
extern uint32_t target_ul_mcs;
extern uint32_t target_dl_bw;
extern uint32_t target_ul_bw;
extern uint64_t dlsch_slot_bitmap;
extern uint64_t ulsch_slot_bitmap;
// In nr-gnb.c // In nr-gnb.c
extern void init_gNB(int single_thread_flag,int wait_for_sync); extern void init_gNB(int single_thread_flag,int wait_for_sync);
......
...@@ -691,7 +691,7 @@ typedef struct ...@@ -691,7 +691,7 @@ typedef struct
typedef struct typedef struct
{ {
uint16_t pm_idx;//Index to precoding matrix (PM) pre-stored at cell configuration. Note: If precoding is not used this parameter should be set to 0. Value: 0->65535. uint16_t pm_idx;//Index to precoding matrix (PM) pre-stored at cell configuration. Note: If precoding is not used this parameter should be set to 0. Value: 0->65535.
nfapi_nr_dig_bf_interface_t dig_bf_interface_list[255];//max dig_bf_interfaces nfapi_nr_dig_bf_interface_t dig_bf_interface_list[1];//max dig_bf_interfaces
}nfapi_nr_tx_precoding_and_beamforming_number_of_prgs_t; }nfapi_nr_tx_precoding_and_beamforming_number_of_prgs_t;
...@@ -702,7 +702,7 @@ typedef struct ...@@ -702,7 +702,7 @@ typedef struct
uint16_t prg_size;//Size in RBs of a precoding resource block group (PRG) – to which same precoding and digital beamforming gets applied. Value: 1->275 uint16_t prg_size;//Size in RBs of a precoding resource block group (PRG) – to which same precoding and digital beamforming gets applied. Value: 1->275
//watchout: dig_bf_interfaces here, in table 3-53 it's dig_bf_interface //watchout: dig_bf_interfaces here, in table 3-53 it's dig_bf_interface
uint8_t dig_bf_interfaces;//Number of STD ant ports (parallel streams) feeding into the digBF Value: 0->255 uint8_t dig_bf_interfaces;//Number of STD ant ports (parallel streams) feeding into the digBF Value: 0->255
nfapi_nr_tx_precoding_and_beamforming_number_of_prgs_t prgs_list[275];//max prg_size nfapi_nr_tx_precoding_and_beamforming_number_of_prgs_t prgs_list[1];//max prg_size
}nfapi_nr_tx_precoding_and_beamforming_t; }nfapi_nr_tx_precoding_and_beamforming_t;
......
...@@ -86,7 +86,7 @@ static void copyPrimary( struct complex16 *out, struct complex16 *in, int ofdmSi ...@@ -86,7 +86,7 @@ static void copyPrimary( struct complex16 *out, struct complex16 *in, int ofdmSi
} }
int lte_sync_time_init(LTE_DL_FRAME_PARMS *frame_parms ) { // LTE_UE_COMMON *common_vars int lte_sync_time_init(LTE_DL_FRAME_PARMS *frame_parms ) { // LTE_UE_COMMON *common_vars
struct complex16 syncF_tmp[2048]__attribute__((aligned(32)))= {0}; struct complex16 syncF_tmp[2048]__attribute__((aligned(32)))= {{0}};
int sz=frame_parms->ofdm_symbol_size*sizeof(*primary_synch0_time); int sz=frame_parms->ofdm_symbol_size*sizeof(*primary_synch0_time);
AssertFatal( NULL != (primary_synch0_time = (struct complex16 *)malloc16(sz)),""); AssertFatal( NULL != (primary_synch0_time = (struct complex16 *)malloc16(sz)),"");
bzero(primary_synch0_time,sz); bzero(primary_synch0_time,sz);
...@@ -153,7 +153,7 @@ int lte_sync_time(int **rxdata, ///rx data in time domain ...@@ -153,7 +153,7 @@ int lte_sync_time(int **rxdata, ///rx data in time domain
// perform a time domain correlation using the oversampled sync sequence // perform a time domain correlation using the oversampled sync sequence
unsigned int n, ar, s, peak_pos, peak_val, sync_source; unsigned int n, ar, s, peak_pos, peak_val, sync_source;
int result,result2; int result,result2;
struct complexd sync_out[3]= {0}, sync_out2[3]= {0}; struct complexd sync_out[3]= {{0}}, sync_out2[3]= {{0}};
int length = LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_tti>>1; int length = LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_tti>>1;
peak_val = 0; peak_val = 0;
peak_pos = 0; peak_pos = 0;
......
...@@ -103,10 +103,11 @@ void print_meas(time_stats_t *ts, ...@@ -103,10 +103,11 @@ void print_meas(time_stats_t *ts,
if (ts->trials>0) { if (ts->trials>0) {
//printf("%20s: total: %10.3f ms, average: %10.3f us (%10d trials)\n", name, ts->diff/cpu_freq_GHz/1000000.0, ts->diff/ts->trials/cpu_freq_GHz/1000.0, ts->trials); //printf("%20s: total: %10.3f ms, average: %10.3f us (%10d trials)\n", name, ts->diff/cpu_freq_GHz/1000000.0, ts->diff/ts->trials/cpu_freq_GHz/1000.0, ts->trials);
if ((total_exec_time == NULL) || (sf_exec_time== NULL)) { if ((total_exec_time == NULL) || (sf_exec_time== NULL)) {
fprintf(stderr, "%25s: %15.3f us; %15d;\n", fprintf(stderr, "%25s: %15.3f us; %15d; %15.3f us;\n",
name, name,
(ts->diff/ts->trials/cpu_freq_GHz/1000.0), (ts->diff/ts->trials/cpu_freq_GHz/1000.0),
ts->trials); ts->trials,
ts->max/cpu_freq_GHz/1000.0);
} else { } else {
fprintf(stderr, "%25s: %15.3f ms (%5.2f%%); %15.3f us (%5.2f%%); %15d;\n", fprintf(stderr, "%25s: %15.3f ms (%5.2f%%); %15.3f us (%5.2f%%); %15d;\n",
name, name,
......
...@@ -824,6 +824,7 @@ typedef struct PHY_VARS_gNB_s { ...@@ -824,6 +824,7 @@ typedef struct PHY_VARS_gNB_s {
time_stats_t dlsch_segmentation_stats; time_stats_t dlsch_segmentation_stats;
time_stats_t rx_pusch_stats; time_stats_t rx_pusch_stats;
time_stats_t ul_indication_stats;
time_stats_t ulsch_decoding_stats; time_stats_t ulsch_decoding_stats;
time_stats_t ulsch_rate_unmatching_stats; time_stats_t ulsch_rate_unmatching_stats;
time_stats_t ulsch_ldpc_decoding_stats; time_stats_t ulsch_ldpc_decoding_stats;
......
...@@ -194,6 +194,8 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, ...@@ -194,6 +194,8 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_DLSCH,0); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_DLSCH,0);
} }
if (do_meas==1) stop_meas(&gNB->phy_proc_tx);
if ((frame&127) == 0) dump_pdsch_stats(gNB); if ((frame&127) == 0) dump_pdsch_stats(gNB);
//apply the OFDM symbol rotation here //apply the OFDM symbol rotation here
...@@ -539,6 +541,8 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) ...@@ -539,6 +541,8 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
int power_rxF = signal_energy_nodc(&gNB->common_vars.rxdataF[0][offset],12*18); int power_rxF = signal_energy_nodc(&gNB->common_vars.rxdataF[0][offset],12*18);
LOG_D(PHY,"frame %d, slot %d: UL signal energy %d\n",frame_rx,slot_rx,power_rxF); LOG_D(PHY,"frame %d, slot %d: UL signal energy %d\n",frame_rx,slot_rx,power_rxF);
start_meas(&gNB->phy_proc_rx);
for (int i=0;i<NUMBER_OF_NR_PUCCH_MAX;i++){ for (int i=0;i<NUMBER_OF_NR_PUCCH_MAX;i++){
NR_gNB_PUCCH_t *pucch = gNB->pucch[i]; NR_gNB_PUCCH_t *pucch = gNB->pucch[i];
if (pucch) { if (pucch) {
...@@ -644,7 +648,7 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) ...@@ -644,7 +648,7 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
start_meas(&gNB->rx_pusch_stats); start_meas(&gNB->rx_pusch_stats);
for(uint8_t symbol = symbol_start; symbol < symbol_end; symbol++) { for(uint8_t symbol = symbol_start; symbol < symbol_end; symbol++) {
no_sig = nr_rx_pusch(gNB, ULSCH_id, frame_rx, slot_rx, symbol, harq_pid); no_sig = nr_rx_pusch(gNB, ULSCH_id, frame_rx, slot_rx, symbol, harq_pid);
if (no_sig) { if (no_sig && (get_softmodem_params()->phy_test == 0)) {
LOG_I(PHY, "PUSCH not detected in symbol %d\n",symbol); LOG_I(PHY, "PUSCH not detected in symbol %d\n",symbol);
nr_fill_indication(gNB,frame_rx, slot_rx, ULSCH_id, harq_pid, 1); nr_fill_indication(gNB,frame_rx, slot_rx, ULSCH_id, harq_pid, 1);
return; return;
...@@ -662,6 +666,7 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) ...@@ -662,6 +666,7 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
} }
} }
} }
stop_meas(&gNB->phy_proc_rx);
// figure out a better way to choose slot_rx, 19 is ok for a particular TDD configuration with 30kHz SCS // figure out a better way to choose slot_rx, 19 is ok for a particular TDD configuration with 30kHz SCS
if ((frame_rx&127) == 0 && slot_rx==19) { if ((frame_rx&127) == 0 && slot_rx==19) {
dump_pusch_stats(gNB); dump_pusch_stats(gNB);
......
...@@ -277,7 +277,7 @@ int main(int argc, char **argv) ...@@ -277,7 +277,7 @@ int main(int argc, char **argv)
//float psnr; //float psnr;
float eff_tp_check = 0.7; float eff_tp_check = 0.7;
uint8_t snrRun; uint8_t snrRun;
uint32_t TBS; uint32_t TBS = 0;
int **txdata; int **txdata;
double **s_re,**s_im,**r_re,**r_im; double **s_re,**s_im,**r_re,**r_im;
//double iqim = 0.0; //double iqim = 0.0;
...@@ -995,7 +995,7 @@ int main(int argc, char **argv) ...@@ -995,7 +995,7 @@ int main(int argc, char **argv)
if (run_initial_sync) if (run_initial_sync)
nr_common_signal_procedures(gNB,frame,slot,gNB->ssb[0].ssb_pdu); nr_common_signal_procedures(gNB,frame,slot,gNB->ssb[0].ssb_pdu);
else else
phy_procedures_gNB_TX(gNB,frame,slot,0); phy_procedures_gNB_TX(gNB,frame,slot,1);
int txdataF_offset = (slot%2) * frame_parms->samples_per_slot_wCP; int txdataF_offset = (slot%2) * frame_parms->samples_per_slot_wCP;
......
...@@ -66,6 +66,7 @@ uint8_t const nr_rv_round_map[4] = {0, 2, 1, 3}; ...@@ -66,6 +66,7 @@ uint8_t const nr_rv_round_map[4] = {0, 2, 1, 3};
uint8_t const nr_rv_round_map_ue[4] = {0, 2, 1, 3}; uint8_t const nr_rv_round_map_ue[4] = {0, 2, 1, 3};
uint64_t get_softmodem_optmask(void) {return 0;} uint64_t get_softmodem_optmask(void) {return 0;}
softmodem_params_t *get_softmodem_params(void) {return 0;}
void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq) {} void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq) {}
......
...@@ -1170,7 +1170,6 @@ int main(int argc, char **argv) ...@@ -1170,7 +1170,6 @@ int main(int argc, char **argv)
gNB->UL_INFO.rx_ind.number_of_pdus = 0; gNB->UL_INFO.rx_ind.number_of_pdus = 0;
gNB->UL_INFO.crc_ind.number_crcs = 0; gNB->UL_INFO.crc_ind.number_crcs = 0;
start_meas(&gNB->phy_proc_rx);
phy_procedures_gNB_common_RX(gNB, frame, slot); phy_procedures_gNB_common_RX(gNB, frame, slot);
phy_procedures_gNB_uespec_RX(gNB, frame, slot); phy_procedures_gNB_uespec_RX(gNB, frame, slot);
...@@ -1202,7 +1201,6 @@ int main(int argc, char **argv) ...@@ -1202,7 +1201,6 @@ int main(int argc, char **argv)
LOG_M("rxsigF0_llr.m","rxsF0_llr", LOG_M("rxsigF0_llr.m","rxsF0_llr",
&gNB->pusch_vars[0]->llr[0],(nb_symb_sch-1)*NR_NB_SC_PER_RB * pusch_pdu->rb_size * mod_order,1,0); &gNB->pusch_vars[0]->llr[0],(nb_symb_sch-1)*NR_NB_SC_PER_RB * pusch_pdu->rb_size * mod_order,1,0);
} }
start_meas(&gNB->phy_proc_rx);
//////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////
if (gNB->ulsch[0][0]->last_iteration_cnt >= if (gNB->ulsch[0][0]->last_iteration_cnt >=
......
...@@ -324,12 +324,12 @@ typedef enum { ...@@ -324,12 +324,12 @@ typedef enum {
/* optname helpstr paramflags XXXptr defXXXval type numelt */ /* optname helpstr paramflags XXXptr defXXXval type numelt */
/*--------------------------------------------------------------------------------------------------------------------------------------------------*/ /*--------------------------------------------------------------------------------------------------------------------------------------------------*/
#define GNBNETPARAMS_DESC { \ #define GNBNETPARAMS_DESC { \
{GNB_CONFIG_STRING_GNB_INTERFACE_NAME_FOR_NG_AMF, NULL, 0, strptr:NULL, defstrval:"lo", TYPE_STRING, 0}, \ {GNB_CONFIG_STRING_GNB_INTERFACE_NAME_FOR_NG_AMF, NULL, 0, strptr:NULL, defstrval:NULL, TYPE_STRING, 0}, \
{GNB_CONFIG_STRING_GNB_IPV4_ADDRESS_FOR_NG_AMF, NULL, 0, strptr:NULL, defstrval:"127.0.0.1", TYPE_STRING, 0}, \ {GNB_CONFIG_STRING_GNB_IPV4_ADDRESS_FOR_NG_AMF, NULL, 0, strptr:NULL, defstrval:NULL, TYPE_STRING, 0}, \
{GNB_CONFIG_STRING_GNB_INTERFACE_NAME_FOR_NGU, NULL, 0, strptr:NULL, defstrval:"lo", TYPE_STRING, 0}, \ {GNB_CONFIG_STRING_GNB_INTERFACE_NAME_FOR_NGU, NULL, 0, strptr:NULL, defstrval:NULL, TYPE_STRING, 0}, \
{GNB_CONFIG_STRING_GNB_IPV4_ADDR_FOR_NGU, NULL, 0, strptr:NULL, defstrval:"127.0.0.1", TYPE_STRING, 0}, \ {GNB_CONFIG_STRING_GNB_IPV4_ADDR_FOR_NGU, NULL, 0, strptr:NULL, defstrval:NULL, TYPE_STRING, 0}, \
{GNB_CONFIG_STRING_GNB_PORT_FOR_NGU, NULL, 0, uptr:NULL, defintval:2152L, TYPE_UINT, 0}, \ {GNB_CONFIG_STRING_GNB_PORT_FOR_NGU, NULL, 0, uptr:NULL, defintval:2152L, TYPE_UINT, 0}, \
{GNB_CONFIG_STRING_ENB_IPV4_ADDR_FOR_X2C, NULL, 0, strptr:NULL, defstrval:"127.0.0.1", TYPE_STRING, 0}, \ {GNB_CONFIG_STRING_ENB_IPV4_ADDR_FOR_X2C, NULL, 0, strptr:NULL, defstrval:NULL, TYPE_STRING, 0}, \
{GNB_CONFIG_STRING_ENB_PORT_FOR_X2C, NULL, 0, uptr:NULL, defintval:0L, TYPE_UINT, 0} \ {GNB_CONFIG_STRING_ENB_PORT_FOR_X2C, NULL, 0, uptr:NULL, defintval:0L, TYPE_UINT, 0} \
} }
......
...@@ -53,6 +53,7 @@ ...@@ -53,6 +53,7 @@
#include "executables/softmodem-common.h" #include "executables/softmodem-common.h"
#include "nfapi/oai_integration/vendor_ext.h" #include "nfapi/oai_integration/vendor_ext.h"
#include "executables/nr-softmodem.h"
uint16_t nr_pdcch_order_table[6] = { 31, 31, 511, 2047, 2047, 8191 }; uint16_t nr_pdcch_order_table[6] = { 31, 31, 511, 2047, 2047, 8191 };
...@@ -91,6 +92,7 @@ void dump_mac_stats(gNB_MAC_INST *gNB) ...@@ -91,6 +92,7 @@ void dump_mac_stats(gNB_MAC_INST *gNB)
LOG_I(MAC, "UE %d: LCID %d: %d bytes RX\n", UE_id, lc_id, stats->lc_bytes_rx[lc_id]); LOG_I(MAC, "UE %d: LCID %d: %d bytes RX\n", UE_id, lc_id, stats->lc_bytes_rx[lc_id]);
} }
} }
print_meas(&gNB->eNB_scheduler, "DL & UL scheduling timing stats", NULL, NULL);
} }
void clear_nr_nfapi_information(gNB_MAC_INST * gNB, void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
......
...@@ -255,12 +255,17 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP, ...@@ -255,12 +255,17 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
} }
} }
extern int getNrOfSymbols(NR_BWP_Downlink_t *bwp, int tda);
extern uint8_t getN_PRB_DMRS(NR_BWP_Downlink_t *bwp, int numDmrsCdmGrpsNoData);
uint32_t target_dl_mcs = 9;
uint32_t target_dl_bw = 50;
uint64_t dlsch_slot_bitmap = (1<<1);
/* schedules whole bandwidth for first user, all the time */ /* schedules whole bandwidth for first user, all the time */
void nr_preprocessor_phytest(module_id_t module_id, void nr_preprocessor_phytest(module_id_t module_id,
frame_t frame, frame_t frame,
sub_frame_t slot) sub_frame_t slot)
{ {
if (slot != 1) if (!is_xlsch_in_slot(dlsch_slot_bitmap, slot))
return; return;
NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info; NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info;
const int UE_id = 0; const int UE_id = 0;
...@@ -273,24 +278,25 @@ void nr_preprocessor_phytest(module_id_t module_id, ...@@ -273,24 +278,25 @@ void nr_preprocessor_phytest(module_id_t module_id,
/* find largest unallocated chunk */ /* find largest unallocated chunk */
const int bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); const int bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
int rbStart = 0; int rbStart = 0;
int tStart = 0;
int rbSize = 0; int rbSize = 0;
uint16_t *vrb_map = RC.nrmac[module_id]->common_channels[CC_id].vrb_map; uint16_t *vrb_map = RC.nrmac[module_id]->common_channels[CC_id].vrb_map;
/* find largest unallocated RB region */ /* loop ensures that we allocate exactly target_dl_bw, or return */
do { while (true) {
/* advance to first free RB */ /* advance to first free RB */
while (tStart < bwpSize && vrb_map[tStart]) while (rbStart < bwpSize && vrb_map[rbStart])
tStart++; rbStart++;
/* find maximum rbSize at current rbStart */ rbSize = 1;
int tSize = 1; /* iterate until we are at target_dl_bw or no available RBs */
while (tStart + tSize < bwpSize && !vrb_map[tStart + tSize]) while (rbStart + rbSize < bwpSize && !vrb_map[rbStart + rbSize] && rbSize < target_dl_bw)
tSize++; rbSize++;
if (tSize > rbSize) { /* found target_dl_bw? */
rbStart = tStart; if (rbSize == target_dl_bw)
rbSize = tSize; break;
/* at end and below target_dl_bw? */
if (rbStart + rbSize >= bwpSize)
return;
rbStart += rbSize;
} }
tStart += tSize;
} while (tStart < bwpSize);
sched_ctrl->num_total_bytes = 0; sched_ctrl->num_total_bytes = 0;
const int lcid = DL_SCH_LCID_DTCH; const int lcid = DL_SCH_LCID_DTCH;
...@@ -363,7 +369,7 @@ void nr_preprocessor_phytest(module_id_t module_id, ...@@ -363,7 +369,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
else else
sched_ctrl->mcsTableIdx = 2; sched_ctrl->mcsTableIdx = 2;
} }
sched_ctrl->mcs = 9; sched_ctrl->mcs = target_dl_mcs;
sched_ctrl->numDmrsCdmGrpsNoData = 1; sched_ctrl->numDmrsCdmGrpsNoData = 1;
/* get the PID of a HARQ process awaiting retransmission, or -1 otherwise */ /* get the PID of a HARQ process awaiting retransmission, or -1 otherwise */
sched_ctrl->dl_harq_pid = sched_ctrl->retrans_dl_harq.head; sched_ctrl->dl_harq_pid = sched_ctrl->retrans_dl_harq.head;
...@@ -373,6 +379,9 @@ void nr_preprocessor_phytest(module_id_t module_id, ...@@ -373,6 +379,9 @@ void nr_preprocessor_phytest(module_id_t module_id,
vrb_map[rb + sched_ctrl->rbStart] = 1; vrb_map[rb + sched_ctrl->rbStart] = 1;
} }
uint32_t target_ul_mcs = 9;
uint32_t target_ul_bw = 50;
uint64_t ulsch_slot_bitmap = (1<<8);
bool nr_ul_preprocessor_phytest(module_id_t module_id, bool nr_ul_preprocessor_phytest(module_id_t module_id,
frame_t frame, frame_t frame,
sub_frame_t slot, sub_frame_t slot,
...@@ -409,19 +418,20 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, ...@@ -409,19 +418,20 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id,
/* check if slot is UL, and that slot is 8 (assuming K2=6 because of UE /* check if slot is UL, and that slot is 8 (assuming K2=6 because of UE
* limitations). Note that if K2 or the TDD configuration is changed, below * limitations). Note that if K2 or the TDD configuration is changed, below
* conditions might exclude each other and never be true */ * conditions might exclude each other and never be true */
if (!(is_xlsch_in_slot(ulsch_in_slot_bitmap, sched_slot) && sched_slot == 8)) if (!is_xlsch_in_slot(ulsch_slot_bitmap, sched_slot))
return false; return false;
const int bw = NRRIV2BW(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
uint16_t rbStart = 0; uint16_t rbStart = 0;
uint16_t rbSize = 50; /* due to OAI UE limitations */ uint16_t rbSize = target_ul_bw;
if (rbSize>bw)
rbSize = bw;
uint16_t *vrb_map_UL = uint16_t *vrb_map_UL =
&RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[sched_slot * MAX_BWP_SIZE]; &RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[sched_slot * MAX_BWP_SIZE];
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
int startSymbolIndex, nrOfSymbols;
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
const uint16_t symb = ((1 << nrOfSymbols) - 1) << startSymbolIndex;
for (int i = rbStart; i < rbStart + rbSize; ++i) { for (int i = rbStart; i < rbStart + rbSize; ++i) {
if (vrb_map_UL[i]) { if ((vrb_map_UL[i] & symb) != 0) {
LOG_E(MAC, LOG_E(MAC,
"%s(): %4d.%2d RB %d is already reserved, cannot schedule UE\n", "%s(): %4d.%2d RB %d is already reserved, cannot schedule UE\n",
__func__, __func__,
...@@ -477,7 +487,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, ...@@ -477,7 +487,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id,
num_dmrs_cdm_grps_no_data, num_dmrs_cdm_grps_no_data,
ps); ps);
const int mcs = 9; const int mcs = target_ul_mcs;
NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch; NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch;
sched_pusch->mcs = mcs; sched_pusch->mcs = mcs;
sched_pusch->rbStart = rbStart; sched_pusch->rbStart = rbStart;
......
...@@ -978,7 +978,7 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id, ...@@ -978,7 +978,7 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id,
for (int harq_bit = 0; harq_bit < uci_01->harq->num_harq; harq_bit++) { for (int harq_bit = 0; harq_bit < uci_01->harq->num_harq; harq_bit++) {
const uint8_t harq_value = uci_01->harq->harq_list[harq_bit].harq_value; const uint8_t harq_value = uci_01->harq->harq_list[harq_bit].harq_value;
const uint8_t harq_confidence = uci_01->harq->harq_confidence_level; const uint8_t harq_confidence = uci_01->harq->harq_confidence_level;
const int feedback_slot = (slot - 1 + num_slots) % num_slots; const int feedback_slot = (slot + num_slots) % num_slots;
/* In case of realtime problems: we can only identify a HARQ process by /* In case of realtime problems: we can only identify a HARQ process by
* timing. If the HARQ process's feedback_slot is not the one we * timing. If the HARQ process's feedback_slot is not the one we
* expected, we assume that processing has been aborted and we need to * expected, we assume that processing has been aborted and we need to
...@@ -1030,7 +1030,7 @@ void handle_nr_uci_pucch_2_3_4(module_id_t mod_id, ...@@ -1030,7 +1030,7 @@ void handle_nr_uci_pucch_2_3_4(module_id_t mod_id,
// iterate over received harq bits // iterate over received harq bits
for (int harq_bit = 0; harq_bit < uci_234->harq.harq_bit_len; harq_bit++) { for (int harq_bit = 0; harq_bit < uci_234->harq.harq_bit_len; harq_bit++) {
const int acknack = ((uci_234->harq.harq_payload[harq_bit >> 3]) >> harq_bit) & 0x01; const int acknack = ((uci_234->harq.harq_payload[harq_bit >> 3]) >> harq_bit) & 0x01;
const int feedback_slot = (slot - 1 + num_slots) % num_slots; const int feedback_slot = (slot + num_slots) % num_slots;
/* In case of realtime problems: we can only identify a HARQ process by /* In case of realtime problems: we can only identify a HARQ process by
* timing. If the HARQ process's feedback_slot is not the one we * timing. If the HARQ process's feedback_slot is not the one we
* expected, we assume that processing has been aborted and we need to * expected, we assume that processing has been aborted and we need to
......
...@@ -597,7 +597,8 @@ int trx_usrp_write_init(openair0_device *device){ ...@@ -597,7 +597,8 @@ int trx_usrp_write_init(openair0_device *device){
write_thread->end = 0; write_thread->end = 0;
write_thread->count_write = 0; write_thread->count_write = 0;
printf("end of tx write thread\n"); printf("end of tx write thread\n");
pthread_mutex_init(&write_thread->mutex_write, NULL);
pthread_cond_init(&write_thread->cond_write, NULL);
pthread_create(&write_thread->pthread_write,NULL,trx_usrp_write_thread,(void *)device); pthread_create(&write_thread->pthread_write,NULL,trx_usrp_write_thread,(void *)device);
return(0); return(0);
......
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