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Commit 9a330b3d authored by Robert Schmidt's avatar Robert Schmidt
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Merge branch 'integration_2022_wk15b' into 'develop' 

integration_2022_wk15b

See merge request oai/openairinterface5g!1524

MR !1508 Remove NR UE PDCCH
parents ef6ea331 06b637c1
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Showing with 268 additions and 250 deletions
executables/nr-ue.c
View file @ 9a330b3d
......@@ -663,6 +663,7 @@ void processSlotRX(void *arg) {
int rx_slot_type = nr_ue_slot_select(cfg, proc->frame_rx, proc->nr_slot_rx);
int tx_slot_type = nr_ue_slot_select(cfg, proc->frame_tx, proc->nr_slot_tx);
uint8_t gNB_id = 0;
NR_UE_PDCCH_CONFIG phy_pdcch_config={0};
if (IS_SOFTMODEM_NOS1 || get_softmodem_params()->sa) {
/* send tick to RLC and PDCP every ms */
......@@ -678,7 +679,7 @@ void processSlotRX(void *arg) {
if(UE->if_inst != NULL && UE->if_inst->dl_indication != NULL) {
nr_downlink_indication_t dl_indication;
nr_fill_dl_indication(&dl_indication, NULL, NULL, proc, UE, gNB_id);
nr_fill_dl_indication(&dl_indication, NULL, NULL, proc, UE, gNB_id, &phy_pdcch_config);
UE->if_inst->dl_indication(&dl_indication, NULL);
}
......@@ -687,7 +688,7 @@ void processSlotRX(void *arg) {
phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, no_relay, NULL );
#else
uint64_t a=rdtsc_oai();
phy_procedures_nrUE_RX(UE, proc, gNB_id, get_nrUE_params()->nr_dlsch_parallel, &rxtxD->txFifo);
phy_procedures_nrUE_RX(UE, proc, gNB_id, get_nrUE_params()->nr_dlsch_parallel, &phy_pdcch_config, &rxtxD->txFifo);
LOG_D(PHY, "In %s: slot %d, time %llu\n", __FUNCTION__, proc->nr_slot_rx, (rdtsc_oai()-a)/3500);
#endif
......
openair1/PHY/INIT/nr_init_ue.c
View file @ 9a330b3d
......@@ -159,7 +159,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
NR_UE_COMMON *const common_vars = &ue->common_vars;
NR_UE_PBCH **const pbch_vars = ue->pbch_vars;
NR_UE_PRACH **const prach_vars = ue->prach_vars;
int i,j,slot,symb, gNB_id, th_id;
int i,slot,symb, gNB_id, th_id;
NR_UE_SRS **const srs_vars = ue->srs_vars;
......@@ -359,36 +359,6 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
ue->nr_srs_info->srs_estimated_channel_time_shifted[i] = (int32_t *) malloc16_clear(fp->ofdm_symbol_size*MAX_NUM_NR_SRS_SYMBOLS*sizeof(int32_t));
}
// 100 PRBs * 12 REs/PRB * 4 PDCCH SYMBOLS * 2 LLRs/RE
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
ue->pdcch_vars[th_id][gNB_id]->llr = (int16_t *)malloc16_clear( 2*4*100*12*sizeof(uint16_t) );
ue->pdcch_vars[th_id][gNB_id]->llr16 = (int16_t *)malloc16_clear( 2*4*100*12*sizeof(uint16_t) );
ue->pdcch_vars[th_id][gNB_id]->wbar = (int16_t *)malloc16_clear( 2*4*100*12*sizeof(uint16_t) );
ue->pdcch_vars[th_id][gNB_id]->e_rx = (int16_t *)malloc16_clear( 4*2*100*12 );
ue->pdcch_vars[th_id][gNB_id]->rxdataF_comp = (int32_t **)malloc16_clear( 4*fp->nb_antennas_rx*sizeof(int32_t *) );
ue->pdcch_vars[th_id][gNB_id]->rho = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
ue->pdcch_vars[th_id][gNB_id]->rxdataF_ext = (int32_t **)malloc16_clear( 4*fp->nb_antennas_rx*sizeof(int32_t *) );
ue->pdcch_vars[th_id][gNB_id]->dl_ch_estimates_ext = (int32_t **)malloc16_clear( 4*fp->nb_antennas_rx*sizeof(int32_t *) );
// Channel estimates
ue->pdcch_vars[th_id][gNB_id]->dl_ch_estimates = (int32_t **)malloc16_clear(4*fp->nb_antennas_rx*sizeof(int32_t *));
ue->pdcch_vars[th_id][gNB_id]->dl_ch_estimates_time = (int32_t **)malloc16_clear(4*fp->nb_antennas_rx*sizeof(int32_t *));
for (i=0; i<fp->nb_antennas_rx; i++) {
ue->pdcch_vars[th_id][gNB_id]->rho[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*(100*12*4));
for (j=0; j<4; j++) {
int idx = (j*fp->nb_antennas_rx)+i;
ue->pdcch_vars[th_id][gNB_id]->dl_ch_estimates[idx] = (int32_t *)malloc16_clear( sizeof(int32_t)*fp->symbols_per_slot*(fp->ofdm_symbol_size+LTE_CE_FILTER_LENGTH) );
ue->pdcch_vars[th_id][gNB_id]->dl_ch_estimates_time[idx] = (int32_t *)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size*2 );
// size_t num = 7*2*fp->N_RB_DL*12;
size_t num = 4*273*12; // 4 symbols, 100 PRBs, 12 REs per PRB
ue->pdcch_vars[th_id][gNB_id]->rxdataF_comp[idx] = (int32_t *)malloc16_clear(sizeof(int32_t) * num);
ue->pdcch_vars[th_id][gNB_id]->rxdataF_ext[idx] = (int32_t *)malloc16_clear(sizeof(int32_t) * num);
ue->pdcch_vars[th_id][gNB_id]->dl_ch_estimates_ext[idx] = (int32_t *)malloc16_clear(sizeof(int32_t) * num);
}
}
}
// RACH
prach_vars[gNB_id]->prachF = (int16_t *)malloc16_clear( sizeof(int)*(7*2*sizeof(int)*(fp->ofdm_symbol_size*12)) );
prach_vars[gNB_id]->prach = (int16_t *)malloc16_clear( sizeof(int)*(7*2*sizeof(int)*(fp->ofdm_symbol_size*12)) );
......@@ -485,28 +455,6 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
for (int gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) {
for (int th_id = 0; th_id < RX_NB_TH_MAX; th_id++) {
for (int i = 0; i < fp->nb_antennas_rx; i++) {
for (int j = 0; j < 4; j++) {
int idx = j * fp->nb_antennas_rx + i;
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->dl_ch_estimates[idx]);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->dl_ch_estimates_time[idx]);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->rxdataF_comp[idx]);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->rxdataF_ext[idx]);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->dl_ch_estimates_ext[idx]);
}
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->rho[i]);
}
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->llr);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->llr16);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->wbar);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->e_rx);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->rxdataF_comp);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->rho);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->rxdataF_ext);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->dl_ch_estimates_ext);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->dl_ch_estimates);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]->dl_ch_estimates_time);
free_and_zero(ue->pdcch_vars[th_id][gNB_id]);
}
......
openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
View file @ 9a330b3d
......@@ -468,7 +468,9 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
unsigned char symbol,
unsigned short scrambling_id,
unsigned short coreset_start_subcarrier,
unsigned short nb_rb_coreset)
unsigned short nb_rb_coreset,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size])
{
unsigned char aarx;
......@@ -477,7 +479,6 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
int16_t ch[2],*pil,*rxF,*dl_ch,*fl,*fm,*fr;
int ch_offset,symbol_offset;
int **dl_ch_estimates =ue->pdcch_vars[proc->thread_id][gNB_id]->dl_ch_estimates;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
ch_offset = ue->frame_parms.ofdm_symbol_size*symbol;
......@@ -510,7 +511,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
k = coreset_start_subcarrier;
pil = (int16_t *)&pilot[0];
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+1)];
dl_ch = (int16_t *)&dl_ch_estimates[aarx][ch_offset];
dl_ch = (int16_t *)&pdcch_dl_ch_estimates[aarx][ch_offset];
memset(dl_ch,0,4*(ue->frame_parms.ofdm_symbol_size));
......
openair1/PHY/NR_UE_ESTIMATION/nr_estimation.h
View file @ 9a330b3d
......@@ -46,7 +46,9 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
unsigned char symbol,
unsigned short scrambling_id,
unsigned short coreset_start_subcarrier,
unsigned short nb_rb_coreset);
unsigned short nb_rb_coreset,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size]);
int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
......
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
View file @ 9a330b3d
This diff is collapsed.
openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c
View file @ 9a330b3d
......@@ -101,7 +101,7 @@ void free_list(NR_UE_SSB *node) {
}
int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_initial_symbol)
int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_initial_symbol, NR_UE_PDCCH_CONFIG *phy_pdcch_config)
{
NR_DL_FRAME_PARMS *frame_parms=&ue->frame_parms;
int ret =-1;
......@@ -165,6 +165,7 @@ int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_ini
0,
temp_ptr->i_ssb,
SISO,
phy_pdcch_config,
&result);
temp_ptr=temp_ptr->next_ssb;
......@@ -216,6 +217,8 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
int ret=-1;
int rx_power=0; //aarx,
NR_UE_PDCCH_CONFIG phy_pdcch_config={0};
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_INITIAL_UE_SYNC, VCD_FUNCTION_IN);
......@@ -334,7 +337,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
}
nr_gold_pbch(ue);
ret = nr_pbch_detection(proc, ue, 1); // start pbch detection at first symbol after pss
ret = nr_pbch_detection(proc, ue, 1, &phy_pdcch_config); // start pbch detection at first symbol after pss
if (ret == 0) {
// sync at symbol ue->symbol_offset
......@@ -531,34 +534,40 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
// if stand alone and sync on ssb do sib1 detection as part of initial sync
if (sa==1 && ret==0) {
bool dec = false;
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[proc->thread_id][0];
int gnb_id = 0; //FIXME
int coreset_nb_rb=0;
int coreset_start_rb=0;
for(int n_ss = 0; n_ss<pdcch_vars->nb_search_space; n_ss++) {
uint8_t nb_symb_pdcch = pdcch_vars->pdcch_config[n_ss].coreset.duration;
int start_symb = pdcch_vars->pdcch_config[n_ss].coreset.StartSymbolIndex;
get_coreset_rballoc(pdcch_vars->pdcch_config[n_ss].coreset.frequency_domain_resource,&coreset_nb_rb,&coreset_start_rb);
// Hold the channel estimates in frequency domain.
int32_t pdcch_est_size = fp->symbols_per_slot*(fp->ofdm_symbol_size+LTE_CE_FILTER_LENGTH);
int32_t pdcch_dl_ch_estimates[4*fp->nb_antennas_rx][pdcch_est_size];
for(int n_ss = 0; n_ss<phy_pdcch_config.nb_search_space; n_ss++) {
uint8_t nb_symb_pdcch = phy_pdcch_config.pdcch_config[n_ss].coreset.duration;
int start_symb = phy_pdcch_config.pdcch_config[n_ss].coreset.StartSymbolIndex;
get_coreset_rballoc(phy_pdcch_config.pdcch_config[n_ss].coreset.frequency_domain_resource,&coreset_nb_rb,&coreset_start_rb);
for (uint16_t l=start_symb; l<start_symb+nb_symb_pdcch; l++) {
nr_slot_fep_init_sync(ue,
proc,
l, // the UE PHY has no notion of the symbols to be monitored in the search space
pdcch_vars->slot,
is*fp->samples_per_frame+pdcch_vars->sfn*fp->samples_per_frame+ue->rx_offset);
phy_pdcch_config.slot,
is*fp->samples_per_frame+phy_pdcch_config.sfn*fp->samples_per_frame+ue->rx_offset);
if (coreset_nb_rb > 0)
nr_pdcch_channel_estimation(ue,
proc,
0,
pdcch_vars->slot,
phy_pdcch_config.slot,
l,
fp->Nid_cell,
fp->first_carrier_offset+(pdcch_vars->pdcch_config[n_ss].BWPStart + coreset_start_rb)*12,
coreset_nb_rb);
fp->first_carrier_offset+(phy_pdcch_config.pdcch_config[n_ss].BWPStart + coreset_start_rb)*12,
coreset_nb_rb,
pdcch_est_size,
pdcch_dl_ch_estimates);
}
int dci_cnt = nr_ue_pdcch_procedures(gnb_id, ue, proc, n_ss);
int dci_cnt = nr_ue_pdcch_procedures(gnb_id, ue, proc, pdcch_est_size, pdcch_dl_ch_estimates, &phy_pdcch_config, n_ss);
if (dci_cnt>0){
NR_UE_DLSCH_t *dlsch = ue->dlsch_SI[gnb_id];
if (dlsch && (dlsch->active == 1)) {
......@@ -571,8 +580,8 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
nr_slot_fep_init_sync(ue,
proc,
m,
pdcch_vars->slot, // same slot and offset as pdcch
is*fp->samples_per_frame+pdcch_vars->sfn*fp->samples_per_frame+ue->rx_offset);
phy_pdcch_config.slot, // same slot and offset as pdcch
is*fp->samples_per_frame+phy_pdcch_config.sfn*fp->samples_per_frame+ue->rx_offset);
}
int ret = nr_ue_pdsch_procedures(ue,
......
openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
View file @ 9a330b3d
......@@ -391,6 +391,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
uint8_t gNB_id,
uint8_t i_ssb,
MIMO_mode_t mimo_mode,
NR_UE_PDCCH_CONFIG *phy_pdcch_config,
fapiPbch_t *result) {
NR_UE_COMMON *nr_ue_common_vars = &ue->common_vars;
int max_h=0;
......@@ -577,7 +578,8 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
nr_downlink_indication_t dl_indication;
fapi_nr_rx_indication_t *rx_ind=calloc(sizeof(*rx_ind),1);
uint16_t number_pdus = 1;
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, gNB_id);
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, gNB_id, phy_pdcch_config);
nr_fill_rx_indication(rx_ind, FAPI_NR_RX_PDU_TYPE_SSB, gNB_id, ue, NULL, NULL, number_pdus, proc,(void *)result);
if (ue->if_inst && ue->if_inst->dl_indication)
......
openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
View file @ 9a330b3d
......@@ -1076,6 +1076,9 @@ uint32_t dlsch_decoding_emul(PHY_VARS_NR_UE *phy_vars_ue,
int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
int16_t *pdcch_e_rx,
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15);
......@@ -1130,11 +1133,13 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
uint8_t eNB_id,
uint8_t i_ssb,
MIMO_mode_t mimo_mode,
NR_UE_PDCCH_CONFIG *phy_pdcch_config,
fapiPbch_t* result);
int nr_pbch_detection(UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
int pbch_initial_symbol);
int pbch_initial_symbol,
NR_UE_PDCCH_CONFIG *phy_pdcch_config);
uint16_t rx_pbch_emul(PHY_VARS_NR_UE *phy_vars_ue,
uint8_t eNB_id,
......@@ -1640,8 +1645,10 @@ uint8_t get_prach_prb_offset(NR_DL_FRAME_PARMS *frame_parms,
uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int16_t *pdcch_e_rx,
fapi_nr_dci_indication_t *dci_ind,
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15);
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15,
NR_UE_PDCCH_CONFIG *phy_pdcch_config);
/** \brief This function is the top-level entry point to PDSCH demodulation, after frequency-domain transformation and channel estimation. It performs
......
openair1/PHY/TOOLS/nr_phy_scope.c
View file @ 9a330b3d
......@@ -678,52 +678,42 @@ static void uePbchIQ (scopeGraphData_t **data, OAIgraph_t *graph, PHY_VARS_NR_U
static void uePcchLLR (scopeGraphData_t **data, OAIgraph_t *graph, PHY_VARS_NR_UE *phy_vars_ue, int eNB_id, int UE_id) {
// PDCCH LLRs
if (!phy_vars_ue->pdcch_vars[0][eNB_id]->llr)
if (!data[pdcchLlr])
return;
//int num_re = 4*273*12; // 12*frame_parms->N_RB_DL*num_pdcch_symbols
//int Qm = 2;
int coded_bits_per_codeword = 2*4*100*12; //num_re*Qm;
const int sz=data[pdcchLlr]->lineSz;
float *llr, *bit;
oai_xygraph_getbuff(graph, &bit, &llr, coded_bits_per_codeword*RX_NB_TH_MAX, 0);
int base=0;
oai_xygraph_getbuff(graph, &bit, &llr, sz, 0);
for (int thr=0 ; thr < RX_NB_TH_MAX ; thr ++ ) {
int16_t *pdcch_llr = (int16_t *) phy_vars_ue->pdcch_vars[thr][eNB_id]->llr;
for (int i=0; i<coded_bits_per_codeword; i++) {
llr[base+i] = (float) pdcch_llr[i];
}
int16_t *pdcch_llr = (int16_t *)(data[pdcchLlr]+1);
base+=coded_bits_per_codeword;
for (int i=0; i<sz; i++) {
llr[i] = (float) pdcch_llr[i];
}
AssertFatal(base <= coded_bits_per_codeword*RX_NB_TH_MAX, "");
oai_xygraph(graph,bit,llr,base,0,10);
oai_xygraph(graph,bit,llr,sz,0,10);
}
static void uePcchIQ (scopeGraphData_t **data, OAIgraph_t *graph, PHY_VARS_NR_UE *phy_vars_ue, int eNB_id, int UE_id) {
// PDCCH I/Q of MF Output
if (!phy_vars_ue->pdcch_vars[0][eNB_id]->rxdataF_comp[0])
if (!data[pdcchRxdataF_comp])
return;
int nb=4*273*12; // 12*frame_parms->N_RB_DL*num_pdcch_symbols
const int sz=data[pdcchRxdataF_comp]->lineSz;
//const int antennas=data[pdcchRxdataF_comp]->colSz;
// We take the first antenna only for now
float *I, *Q;
oai_xygraph_getbuff(graph, &I, &Q, nb*RX_NB_TH_MAX, 0);
int base=0;
for (int thr=0 ; thr < RX_NB_TH_MAX ; thr ++ ) {
scopeSample_t *pdcch_comp = (scopeSample_t *) phy_vars_ue->pdcch_vars[thr][eNB_id]->rxdataF_comp[0];
oai_xygraph_getbuff(graph, &I, &Q, sz, 0);
for (int i=0; i< nb; i++) {
I[base+i] = pdcch_comp[i].r;
Q[base+i] = pdcch_comp[i].i;
}
scopeSample_t *pdcch_comp = (scopeSample_t *) (data[pdcchRxdataF_comp]+1);
base+=nb;
for (int i=0; i<sz; i++) {
I[i] = pdcch_comp[i].r;
Q[i] = pdcch_comp[i].i;
}
AssertFatal(base <= nb*RX_NB_TH_MAX, "");
oai_xygraph(graph,I,Q,base,0,10);
oai_xygraph(graph,I,Q,sz,0,10);
}
static void uePdschLLR (scopeGraphData_t **data, OAIgraph_t *graph, PHY_VARS_NR_UE *phy_vars_ue, int eNB_id, int UE_id) {
// PDSCH LLRs
......@@ -908,7 +898,6 @@ static void *nrUEscopeThread(void *arg) {
char *name="5G-UE-scope";
fl_initialize (&fl_argc, &name, NULL, 0, 0);
OAI_phy_scope_t *form_nrue=create_phy_scope_nrue(0);
(( scopeData_t *)ue->scopeData)->liveData=calloc(sizeof(scopeGraphData_t *), UEdataTypeNumberOfItems);
while (!oai_exit) {
fl_freeze_form(form_nrue->phy_scope);
......@@ -925,28 +914,43 @@ static void *nrUEscopeThread(void *arg) {
}
void UEcopyData(PHY_VARS_NR_UE *ue, enum UEdataType type, void *dataIn, int elementSz, int colSz, int lineSz) {
// Local static copy of the scope data bufs
// The active data buf is alterned to avoid interference between the Scope thread (display) and the Rx thread (data input)
// Index of "2" could be set to the number of Rx threads + 1
static scopeGraphData_t *copyDataBufs[UEdataTypeNumberOfItems][2] = {0};
static int copyDataBufsIdx[UEdataTypeNumberOfItems] = {0};
scopeData_t *tmp=(scopeData_t *)ue->scopeData;
if (tmp) {
scopeGraphData_t *live= ((scopeGraphData_t **)tmp->liveData)[type];
// Begin of critical zone between UE Rx threads that might copy new data at the same time: might require a mutex
int newCopyDataIdx = (copyDataBufsIdx[type]==0)?1:0;
copyDataBufsIdx[type] = newCopyDataIdx;
// End of critical zone between UE Rx threads
if (live == NULL || live->dataSize < elementSz*colSz*lineSz) {
scopeGraphData_t *ptr=realloc(live, sizeof(scopeGraphData_t) + elementSz*colSz*lineSz);
// New data will be copied in a different buffer than the live one
scopeGraphData_t *copyData= copyDataBufs[type][newCopyDataIdx];
if (copyData == NULL || copyData->dataSize < elementSz*colSz*lineSz) {
scopeGraphData_t *ptr=realloc(copyData, sizeof(scopeGraphData_t) + elementSz*colSz*lineSz);
if (!ptr) {
LOG_E(PHY,"can't realloc\n");
return;
} else {
live=ptr;
copyData=ptr;
}
}
live->dataSize=elementSz*colSz*lineSz;
live->elementSz=elementSz;
live->colSz=colSz;
live->lineSz=lineSz;
memcpy(live+1, dataIn, elementSz*colSz*lineSz);
((scopeGraphData_t **)tmp->liveData)[type]=live;
copyData->dataSize=elementSz*colSz*lineSz;
copyData->elementSz=elementSz;
copyData->colSz=colSz;
copyData->lineSz=lineSz;
memcpy(copyData+1, dataIn, elementSz*colSz*lineSz);
copyDataBufs[type][newCopyDataIdx] = copyData;
// The new data just copied in the local static buffer becomes live now
((scopeGraphData_t **)tmp->liveData)[type]=copyData;
}
}
......@@ -954,6 +958,7 @@ void nrUEinitScope(PHY_VARS_NR_UE *ue) {
AssertFatal(ue->scopeData=malloc(sizeof(scopeData_t)),"");
scopeData_t *scope=(scopeData_t *) ue->scopeData;
scope->copyData=UEcopyData;
AssertFatal(scope->liveData=calloc(sizeof(scopeGraphData_t *), UEdataTypeNumberOfItems),"");
pthread_t forms_thread;
threadCreate(&forms_thread, nrUEscopeThread, ue, "scope", -1, OAI_PRIORITY_RT_LOW);
}
......
openair1/PHY/TOOLS/phy_scope_interface.h
View file @ 9a330b3d
......@@ -45,6 +45,8 @@ enum UEdataType {
pbchDlChEstimateTime,
pbchLlr,
pbchRxdataF_comp,
pdcchLlr,
pdcchRxdataF_comp,
UEdataTypeNumberOfItems
};
......
openair1/PHY/defs_nr_UE.h
View file @ 9a330b3d
......@@ -550,60 +550,20 @@ typedef struct {
} NR_UE_PDCCH_SEARCHSPACE;
#endif
typedef struct {
/// \brief Pointers to extracted PDCCH symbols in frequency-domain.
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_DL[
int32_t **rxdataF_ext;
/// \brief Pointers to extracted and compensated PDCCH symbols in frequency-domain.
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_DL[
int32_t **rxdataF_comp;
/// \brief Hold the channel estimates in frequency domain.
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: samples? [0..symbols_per_tti*(ofdm_symbol_size+LTE_CE_FILTER_LENGTH)[
int32_t **dl_ch_estimates;
/// \brief Hold the channel estimates in time domain (used for tracking).
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: samples? [0..2*ofdm_symbol_size[
int32_t **dl_ch_estimates_time;
/// \brief Pointers to extracted channel estimates of PDCCH symbols.
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_DL[
int32_t **dl_ch_estimates_ext;
/// \brief Pointers to channel cross-correlation vectors for multi-gNB detection.
/// - first index: rx antenna [0..nb_antennas_rx[
/// - second index: ? [0..]
int32_t **rho;
/// \brief Pointer to llrs, 4-bit resolution.
/// - first index: ? [0..48*N_RB_DL[
int16_t *llr;
/// \brief Pointer to llrs, 16-bit resolution.
/// - first index: ? [0..96*N_RB_DL[
int16_t *llr16;
/// \brief \f$\overline{w}\f$ from 36-211.
/// - first index: ? [0..48*N_RB_DL[
int16_t *wbar;
/// \brief PDCCH/DCI e-sequence (input to rate matching).
/// - first index: ? [0..96*N_RB_DL[
int16_t *e_rx;
/// Total number of PDU errors (diagnostic mode)
uint32_t dci_errors;
int nb_search_space;
uint16_t sfn;
uint16_t slot;
fapi_nr_dl_config_dci_dl_pdu_rel15_t pdcch_config[FAPI_NR_MAX_SS];
} NR_UE_PDCCH_CONFIG;
typedef struct {
/// Total number of PDU received
uint32_t dci_received;
/// Total number of DCI False detection (diagnostic mode)
uint32_t dci_false;
/// Total number of DCI missed (diagnostic mode)
uint32_t dci_missed;
/// nCCE for PDCCH per subframe
uint8_t nCCE[10];
//Check for specific DCIFormat and AgregationLevel
uint8_t dciFormat;
uint8_t agregationLevel;
int nb_search_space;
fapi_nr_dl_config_dci_dl_pdu_rel15_t pdcch_config[FAPI_NR_MAX_SS];
// frame and slot for sib1 in initial sync
uint16_t sfn;
uint16_t slot;
/*
#ifdef NR_PDCCH_DEFS_NR_UE
int nb_searchSpaces;
......
openair1/SCHED_NR_UE/defs.h
View file @ 9a330b3d
......@@ -120,12 +120,14 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t
@param proc Pointer to proc information
@param gNB_id Local id of eNB on which to act
@param dlsch_parallel use multithreaded dlsch processing
@param phy_pdcch_config PDCCH Config for this slot
@param txFifo Result fifo if PDSCH is run in parallel
*/
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t gNB_id,
uint8_t dlsch_parallel,
NR_UE_PDCCH_CONFIG *phy_pdcch_config,
notifiedFIFO_t *txFifo);
int phy_procedures_slot_parallelization_nrUE_RX(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB_id, uint8_t abstraction_flag, uint8_t do_pdcch_flag, relaying_type_t r_type);
......@@ -383,7 +385,8 @@ void nr_fill_dl_indication(nr_downlink_indication_t *dl_ind,
fapi_nr_rx_indication_t *rx_ind,
UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
uint8_t gNB_id);
uint8_t gNB_id,
void *phy_data);
/*@}*/
......@@ -419,6 +422,9 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
int nr_ue_pdcch_procedures(uint8_t gNB_id,
PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
NR_UE_PDCCH_CONFIG *phy_pdcch_config,
int n_ss);
......
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
View file @ 9a330b3d
......@@ -353,15 +353,14 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
// Note: we have to handle the thread IDs for this. To be revisited completely.
thread_id = scheduled_response->thread_id;
NR_UE_DLSCH_t *dlsch0 = NULL;
NR_UE_PDCCH *pdcch_vars = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0];
NR_UE_ULSCH_t *ulsch = PHY_vars_UE_g[module_id][cc_id]->ulsch[thread_id][0];
NR_UE_PUCCH *pucch_vars = PHY_vars_UE_g[module_id][cc_id]->pucch_vars[thread_id][0];
NR_UE_PDCCH_CONFIG *phy_pdcch_config = NULL;
if(scheduled_response->dl_config != NULL){
fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config;
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu;
fapi_nr_dl_config_dci_dl_pdu_rel15_t *pdcch_config;
pdcch_vars->nb_search_space = 0;
for (int i = 0; i < dl_config->number_pdus; ++i){
AssertFatal(dl_config->number_pdus < FAPI_NR_DL_CONFIG_LIST_NUM,"dl_config->number_pdus %d out of bounds\n",dl_config->number_pdus);
......@@ -371,12 +370,16 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
switch(dl_config->dl_config_list[i].pdu_type) {
case FAPI_NR_DL_CONFIG_TYPE_DCI:
if (NULL == phy_pdcch_config) {
phy_pdcch_config = (NR_UE_PDCCH_CONFIG *)scheduled_response->phy_data;
phy_pdcch_config->nb_search_space = 0;
}
pdcch_config = &dl_config->dl_config_list[i].dci_config_pdu.dci_config_rel15;
memcpy(&pdcch_vars->pdcch_config[pdcch_vars->nb_search_space],pdcch_config,sizeof(*pdcch_config));
pdcch_vars->nb_search_space = pdcch_vars->nb_search_space + 1;
pdcch_vars->sfn = scheduled_response->frame;
pdcch_vars->slot = slot;
LOG_D(PHY,"Number of DCI SearchSpaces %d\n",pdcch_vars->nb_search_space);
memcpy((void*)&phy_pdcch_config->pdcch_config[phy_pdcch_config->nb_search_space],(void*)pdcch_config,sizeof(*pdcch_config));
phy_pdcch_config->nb_search_space = phy_pdcch_config->nb_search_space + 1;
phy_pdcch_config->sfn = scheduled_response->frame;
phy_pdcch_config->slot = slot;
LOG_D(PHY,"Number of DCI SearchSpaces %d\n",phy_pdcch_config->nb_search_space);
break;
case FAPI_NR_DL_CONFIG_TYPE_CSI_IM:
LOG_I(PHY,"Received CSI-IM PDU at FAPI\n");
......
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @ 9a330b3d
......@@ -87,7 +87,8 @@ void nr_fill_dl_indication(nr_downlink_indication_t *dl_ind,
fapi_nr_rx_indication_t *rx_ind,
UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
uint8_t gNB_id){
uint8_t gNB_id,
void *phy_data){
memset((void*)dl_ind, 0, sizeof(nr_downlink_indication_t));
......@@ -97,6 +98,7 @@ void nr_fill_dl_indication(nr_downlink_indication_t *dl_ind,
dl_ind->frame = proc->frame_rx;
dl_ind->slot = proc->nr_slot_rx;
dl_ind->thread_id = proc->thread_id;
dl_ind->phy_data = phy_data;
if (dci_ind) {
......@@ -360,7 +362,7 @@ void nr_ue_measurement_procedures(uint16_t l,
static void nr_ue_pbch_procedures(uint8_t gNB_id,
PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,int estimateSz, struct complex16 dl_ch_estimates[][estimateSz])
UE_nr_rxtx_proc_t *proc,int estimateSz, struct complex16 dl_ch_estimates[][estimateSz], NR_UE_PDCCH_CONFIG *phy_pdcch_config)
{
int ret = 0;
......@@ -380,6 +382,7 @@ static void nr_ue_pbch_procedures(uint8_t gNB_id,
gNB_id,
(ue->frame_parms.ssb_index)&7,
SISO,
phy_pdcch_config,
&result);
if (ret==0) {
......@@ -486,6 +489,9 @@ unsigned int nr_get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb
int nr_ue_pdcch_procedures(uint8_t gNB_id,
PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
NR_UE_PDCCH_CONFIG *phy_pdcch_config,
int n_ss)
{
int frame_rx = proc->frame_rx;
......@@ -494,13 +500,16 @@ int nr_ue_pdcch_procedures(uint8_t gNB_id,
fapi_nr_dci_indication_t *dci_ind = calloc(1, sizeof(*dci_ind));
nr_downlink_indication_t dl_indication;
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[proc->thread_id][gNB_id];
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &pdcch_vars->pdcch_config[n_ss];
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &phy_pdcch_config->pdcch_config[n_ss];
start_meas(&ue->dlsch_rx_pdcch_stats);
/// PDCCH/DCI e-sequence (input to rate matching).
int32_t pdcch_e_rx_size = 2*4*100*12;
int16_t pdcch_e_rx[pdcch_e_rx_size];
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PDCCH, VCD_FUNCTION_IN);
nr_rx_pdcch(ue, proc, rel15);
nr_rx_pdcch(ue, proc, pdcch_est_size, pdcch_dl_ch_estimates, pdcch_e_rx, rel15);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PDCCH, VCD_FUNCTION_OUT);
......@@ -511,7 +520,7 @@ int nr_ue_pdcch_procedures(uint8_t gNB_id,
n_ss);
#endif
dci_cnt = nr_dci_decoding_procedure(ue, proc, dci_ind, rel15);
dci_cnt = nr_dci_decoding_procedure(ue, proc, pdcch_e_rx, dci_ind, rel15, phy_pdcch_config);
#ifdef NR_PDCCH_SCHED_DEBUG
LOG_I(PHY,"<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Ending function nr_dci_decoding_procedure() -> dci_cnt=%u\n",dci_cnt);
......@@ -531,11 +540,13 @@ int nr_ue_pdcch_procedures(uint8_t gNB_id,
ue->pdcch_vars[proc->thread_id][gNB_id]->dci_received += dci_cnt;
dci_ind->number_of_dcis = dci_cnt;
// fill dl_indication message
nr_fill_dl_indication(&dl_indication, dci_ind, NULL, proc, ue, gNB_id);
nr_fill_dl_indication(&dl_indication, dci_ind, NULL, proc, ue, gNB_id, phy_pdcch_config);
// send to mac
ue->if_inst->dl_indication(&dl_indication, NULL);
stop_meas(&ue->dlsch_rx_pdcch_stats);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PDCCH_PROCEDURES, VCD_FUNCTION_OUT);
......@@ -801,16 +812,16 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
switch (pdsch) {
case RA_PDSCH:
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, gNB_id);
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, gNB_id, NULL);
nr_fill_rx_indication(rx_ind, FAPI_NR_RX_PDU_TYPE_RAR, gNB_id, ue, dlsch0, NULL, number_pdus, proc, NULL);
ue->UE_mode[gNB_id] = RA_RESPONSE;
break;
case PDSCH:
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, gNB_id);
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, gNB_id, NULL);
nr_fill_rx_indication(rx_ind, FAPI_NR_RX_PDU_TYPE_DLSCH, gNB_id, ue, dlsch0, NULL, number_pdus, proc, NULL);
break;
case SI_PDSCH:
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, gNB_id);
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, gNB_id, NULL);
nr_fill_rx_indication(rx_ind, FAPI_NR_RX_PDU_TYPE_SIB, gNB_id, ue, dlsch0, NULL, number_pdus, proc, NULL);
break;
default:
......@@ -1368,6 +1379,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t gNB_id,
uint8_t dlsch_parallel,
NR_UE_PDCCH_CONFIG *phy_pdcch_config,
notifiedFIFO_t *txFifo
)
{
......@@ -1375,10 +1387,9 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
int nr_slot_rx = proc->nr_slot_rx;
int slot_pbch;
int slot_ssb;
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[proc->thread_id][0];
fapi_nr_config_request_t *cfg = &ue->nrUE_config;
uint8_t nb_symb_pdcch = pdcch_vars->nb_search_space > 0 ? pdcch_vars->pdcch_config[0].coreset.duration : 0;
uint8_t nb_symb_pdcch = phy_pdcch_config->nb_search_space > 0 ? phy_pdcch_config->pdcch_config[0].coreset.duration : 0;
uint8_t dci_cnt = 0;
NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
......@@ -1397,8 +1408,8 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
int coreset_nb_rb=0;
int coreset_start_rb=0;
if (pdcch_vars->nb_search_space > 0)
get_coreset_rballoc(pdcch_vars->pdcch_config[0].coreset.frequency_domain_resource,&coreset_nb_rb,&coreset_start_rb);
if (phy_pdcch_config->nb_search_space > 0)
get_coreset_rballoc(phy_pdcch_config->pdcch_config[0].coreset.frequency_domain_resource,&coreset_nb_rb,&coreset_start_rb);
slot_pbch = is_pbch_in_slot(cfg, frame_rx, nr_slot_rx, fp);
slot_ssb = is_ssb_in_slot(cfg, frame_rx, nr_slot_rx, fp);
......@@ -1429,7 +1440,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
if ((ue->decode_MIB == 1) && slot_pbch) {
LOG_D(PHY," ------ Decode MIB: frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx);
nr_ue_pbch_procedures(gNB_id, ue, proc, estimateSz, dl_ch_estimates);
nr_ue_pbch_procedures(gNB_id, ue, proc, estimateSz, dl_ch_estimates, phy_pdcch_config);
if (ue->no_timing_correction==0) {
LOG_D(PHY,"start adjust sync slot = %d no timing %d\n", nr_slot_rx, ue->no_timing_correction);
......@@ -1470,13 +1481,17 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
nr_slot_rx);
}
// Hold the channel estimates in frequency domain.
int32_t pdcch_est_size = ((((fp->symbols_per_slot*(fp->ofdm_symbol_size+LTE_CE_FILTER_LENGTH))+15)/16)*16);
__attribute__ ((aligned(16))) int32_t pdcch_dl_ch_estimates[4*fp->nb_antennas_rx][pdcch_est_size];
dci_cnt = 0;
for(int n_ss = 0; n_ss<pdcch_vars->nb_search_space; n_ss++) {
for(int n_ss = 0; n_ss<phy_pdcch_config->nb_search_space; n_ss++) {
for (uint16_t l=0; l<nb_symb_pdcch; l++) {
// note: this only works if RBs for PDCCH are contigous!
LOG_D(PHY, "pdcch_channel_estimation: first_carrier_offset %d, BWPStart %d, coreset_start_rb %d, coreset_nb_rb %d\n",
fp->first_carrier_offset, pdcch_vars->pdcch_config[n_ss].BWPStart, coreset_start_rb, coreset_nb_rb);
fp->first_carrier_offset, phy_pdcch_config->pdcch_config[n_ss].BWPStart, coreset_start_rb, coreset_nb_rb);
if (coreset_nb_rb > 0)
nr_pdcch_channel_estimation(ue,
......@@ -1484,14 +1499,16 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
gNB_id,
nr_slot_rx,
l,
pdcch_vars->pdcch_config[n_ss].coreset.pdcch_dmrs_scrambling_id,
fp->first_carrier_offset+(pdcch_vars->pdcch_config[n_ss].BWPStart + coreset_start_rb)*12,
coreset_nb_rb);
phy_pdcch_config->pdcch_config[n_ss].coreset.pdcch_dmrs_scrambling_id,
fp->first_carrier_offset+(phy_pdcch_config->pdcch_config[n_ss].BWPStart + coreset_start_rb)*12,
coreset_nb_rb,
pdcch_est_size,
pdcch_dl_ch_estimates);
stop_meas(&ue->ofdm_demod_stats);
}
dci_cnt = dci_cnt + nr_ue_pdcch_procedures(gNB_id, ue, proc, n_ss);
dci_cnt = dci_cnt + nr_ue_pdcch_procedures(gNB_id, ue, proc, pdcch_est_size, pdcch_dl_ch_estimates, phy_pdcch_config, n_ss);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_PDCCH, VCD_FUNCTION_OUT);
......
openair1/SIMULATION/NR_PHY/dlsim.c
View file @ 9a330b3d
......@@ -1003,6 +1003,8 @@ int main(int argc, char **argv)
nr_dcireq_t dcireq;
nr_scheduled_response_t scheduled_response;
NR_UE_PDCCH_CONFIG phy_pdcch_config={0};
memset((void*)&dcireq,0,sizeof(dcireq));
memset((void*)&scheduled_response,0,sizeof(scheduled_response));
dcireq.module_id = 0;
......@@ -1017,6 +1019,7 @@ int main(int argc, char **argv)
scheduled_response.frame = frame;
scheduled_response.slot = slot;
scheduled_response.thread_id = 0;
scheduled_response.phy_data = &phy_pdcch_config;
nr_ue_phy_config_request(&UE_mac->phy_config);
//NR_COMMON_channels_t *cc = RC.nrmac[0]->common_channels;
......@@ -1259,6 +1262,7 @@ int main(int argc, char **argv)
&UE_proc,
0,
dlsch_threads,
&phy_pdcch_config,
NULL);
//printf("dlsim round %d ends\n",round);
......@@ -1407,8 +1411,6 @@ int main(int argc, char **argv)
LOG_M("chestF0.m","chF0",&UE->pdsch_vars[0][0]->dl_ch_estimates_ext[0][0],g_rbSize*12*14,1,1);
write_output("rxF_comp.m","rxFc",&UE->pdsch_vars[0][0]->rxdataF_comp0[0][0],N_RB_DL*12*14,1,1);
LOG_M("rxF_llr.m","rxFllr",UE->pdsch_vars[UE_proc.thread_id][0]->llr[0],available_bits,1,0);
LOG_M("pdcch_rxFcomp.m","pdcch_rxFcomp",&UE->pdcch_vars[0][0]->rxdataF_comp[0][0],96*12,1,1);
LOG_M("pdcch_rxFllr.m","pdcch_rxFllr",UE->pdcch_vars[0][0]->llr,96*12,1,1);
break;
}
......
openair1/SIMULATION/NR_PHY/nr_dummy_functions.c
View file @ 9a330b3d
......@@ -28,7 +28,8 @@ void nr_fill_dl_indication(nr_downlink_indication_t *dl_ind,
fapi_nr_rx_indication_t *rx_ind,
UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
uint8_t gNB_id) {}
uint8_t gNB_id,
void *phy_data) {}
void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
uint8_t pdu_type,
uint8_t gNB_id,
......
openair1/SIMULATION/NR_PHY/pbchsim.c
View file @ 9a330b3d
......@@ -74,6 +74,9 @@ void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq) {}
int nr_ue_pdcch_procedures(uint8_t gNB_id,
PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
NR_UE_PDCCH_CONFIG *phy_pdcch_config,
int n_ss) {
return 0;
}
......@@ -722,6 +725,8 @@ int main(int argc, char **argv)
}
else {
UE_nr_rxtx_proc_t proc={0};
NR_UE_PDCCH_CONFIG phy_pdcch_config={0};
UE->rx_offset=0;
uint8_t ssb_index = 0;
const int estimateSz=7*2*sizeof(int)*frame_parms->ofdm_symbol_size;
......@@ -750,6 +755,7 @@ int main(int argc, char **argv)
0,
ssb_index%8,
SISO,
&phy_pdcch_config,
&result);
if (ret==0) {
......
openair2/LAYER2/NR_MAC_UE/mac_proto.h
View file @ 9a330b3d
......@@ -48,6 +48,7 @@ void nr_ue_init_mac(module_id_t module_idP);
\param module_id module id
\param cc_id component carrier id
\param gNB_index gNB index
\param phy_data PHY structure to be filled in by the callee in the FAPI call (L1 caller -> indication to L2 -> FAPI call to L1 callee)
\param extra_bits extra bits for frame calculation
\param l_ssb_equal_64 check if ssb number of candicate is equal 64, 1=equal; 0=non equal. Reference 38.212 7.1.1
\param pduP pointer to pdu
......@@ -57,6 +58,7 @@ int8_t nr_ue_decode_mib(
module_id_t module_id,
int cc_id,
uint8_t gNB_index,
void *phy_data,
uint8_t extra_bits,
uint32_t ssb_length,
uint32_t ssb_index,
......@@ -132,7 +134,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
@param int cc_id CC ID
@param frame_t frame frame number
@param int slot reference number
@param UE_nr_rxtx_proc_t *proc pointer to process context */
@param void *phy_pata pointer to a PHY specific structure to be filled in the scheduler response (can be null) */
void fill_scheduled_response(nr_scheduled_response_t *scheduled_response,
fapi_nr_dl_config_request_t *dl_config,
fapi_nr_ul_config_request_t *ul_config,
......@@ -141,7 +143,8 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response,
int cc_id,
frame_t frame,
int slot,
int thread_id);
int thread_id,
void *phy_data);
/*! \fn int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slotP);
\brief Called by PHY to get sdu for PUSCH transmission. It performs the following operations: Checks BSR for DCCH, DCCH1 and DTCH corresponding to previous values computed either in SR or BSR procedures. It gets rlc status indications on DCCH,DCCH1 and DTCH and forms BSR elements and PHR in MAC header. CRNTI element is not supported yet. It computes transport block for up to 3 SDUs and generates header and forms the complete MAC SDU.
......@@ -373,7 +376,8 @@ void nr_ue_sib1_scheduler(module_id_t module_idP,
uint8_t ssb_subcarrier_offset,
uint32_t ssb_index,
uint16_t ssb_start_subcarrier,
frequency_range_t frequency_range);
frequency_range_t frequency_range,
void *phy_data);
/* \brief Function called by PHY to process the received RAR and check that the preamble matches what was sent by the gNB. It provides the timing advance and t-CRNTI.
@param Mod_id Index of UE instance
......
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @ 9a330b3d
......@@ -287,6 +287,7 @@ int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti){
int8_t nr_ue_decode_mib(module_id_t module_id,
int cc_id,
uint8_t gNB_index,
void *phy_data,
uint8_t extra_bits, // 8bits 38.212 c7.1.1
uint32_t ssb_length,
uint32_t ssb_index,
......@@ -362,7 +363,8 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
ssb_subcarrier_offset,
ssb_index,
ssb_start_subcarrier,
mac->frequency_range);
mac->frequency_range,
phy_data);
}
else {
NR_ServingCellConfigCommon_t *scc = mac->scc;
......
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
View file @ 9a330b3d
......@@ -93,7 +93,8 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response,
int cc_id,
frame_t frame,
int slot,
int thread_id){
int thread_id,
void *phy_data){
scheduled_response->dl_config = dl_config;
scheduled_response->ul_config = ul_config;
......@@ -103,6 +104,7 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response,
scheduled_response->frame = frame;
scheduled_response->slot = slot;
scheduled_response->thread_id = thread_id;
scheduled_response->phy_data = phy_data;
}
......@@ -1072,7 +1074,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
nr_ue_dcireq(&dcireq); //to be replaced with function pointer later
mac->dl_config_request = dcireq.dl_config_req;
fill_scheduled_response(&scheduled_response, &dcireq.dl_config_req, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->thread_id);
fill_scheduled_response(&scheduled_response, &dcireq.dl_config_req, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->thread_id, dl_info->phy_data);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL)
mac->if_module->scheduled_response(&scheduled_response);
}
......@@ -1088,7 +1090,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
fill_dci_search_candidates(mac->ra.ss, rel15);
dl_config->number_pdus = 1;
LOG_D(MAC,"mac->cg %p: Calling fill_scheduled_response rnti %x, type0_pdcch, num_pdus %d\n",mac->cg,rel15->rnti,dl_config->number_pdus);
fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->thread_id);
fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->thread_id, dl_info->phy_data);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL)
mac->if_module->scheduled_response(&scheduled_response);
}
......@@ -1197,7 +1199,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
}
pthread_mutex_unlock(&ul_config->mutex_ul_config); // avoid double lock
fill_scheduled_response(&scheduled_response, NULL, ul_config, &tx_req, mod_id, cc_id, frame_tx, slot_tx, ul_info->thread_id);
fill_scheduled_response(&scheduled_response, NULL, ul_config, &tx_req, mod_id, cc_id, frame_tx, slot_tx, ul_info->thread_id, NULL);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL){
mac->if_module->scheduled_response(&scheduled_response);
}
......@@ -2352,7 +2354,7 @@ void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, in
O_SR, O_ACK, O_CSI);
LOG_D(NR_MAC, "Configuring pucch, is_common = %d\n", pucch.is_common);
nr_scheduled_response_t scheduled_response;
fill_scheduled_response(&scheduled_response, NULL, ul_config, NULL, module_idP, 0 /*TBR fix*/, frameP, slotP, thread_id);
fill_scheduled_response(&scheduled_response, NULL, ul_config, NULL, module_idP, 0 /*TBR fix*/, frameP, slotP, thread_id, NULL);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL)
mac->if_module->scheduled_response(&scheduled_response);
}
......@@ -2699,7 +2701,7 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s
}
} // if format1
fill_scheduled_response(&scheduled_response, NULL, ul_config, NULL, module_idP, 0 /*TBR fix*/, frameP, slotP, thread_id);
fill_scheduled_response(&scheduled_response, NULL, ul_config, NULL, module_idP, 0 /*TBR fix*/, frameP, slotP, thread_id, NULL);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL)
mac->if_module->scheduled_response(&scheduled_response);
} // is_nr_prach_slot
......@@ -2714,7 +2716,8 @@ void nr_ue_sib1_scheduler(module_id_t module_idP,
uint8_t ssb_subcarrier_offset,
uint32_t ssb_index,
uint16_t ssb_start_subcarrier,
frequency_range_t frequency_range) {
frequency_range_t frequency_range,
void *phy_data) {
NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP);
nr_scheduled_response_t scheduled_response;
......@@ -2762,7 +2765,7 @@ void nr_ue_sib1_scheduler(module_id_t module_idP,
slot_s = mac->type0_PDCCH_CSS_config.n_c;
}
LOG_D(MAC,"Calling fill_scheduled_response, type0_pdcch, num_pdus %d\n",dl_config->number_pdus);
fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, module_idP, cc_id, frame_s, slot_s, 0); // TODO fix thread_id, for now assumed 0
fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, module_idP, cc_id, frame_s, slot_s, 0, phy_data); // TODO fix thread_id, for now assumed 0
if (dl_config->number_pdus) {
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL)
......
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
View file @ 9a330b3d
......@@ -1064,7 +1064,7 @@ void *nrue_standalone_pnf_task(void *context)
// L2 Abstraction Layer
int handle_bcch_bch(module_id_t module_id, int cc_id,
unsigned int gNB_index, uint8_t *pduP,
unsigned int gNB_index, void *phy_data, uint8_t *pduP,
unsigned int additional_bits,
uint32_t ssb_index, uint32_t ssb_length,
uint16_t ssb_start_subcarrier, uint16_t cell_id){
......@@ -1072,6 +1072,7 @@ int handle_bcch_bch(module_id_t module_id, int cc_id,
return nr_ue_decode_mib(module_id,
cc_id,
gNB_index,
phy_data,
additional_bits,
ssb_length, // Lssb = 64 is not support
ssb_index,
......@@ -1208,7 +1209,7 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_
if (ret >= 0) {
AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is NULL!\n" );
AssertFatal( nr_ue_if_module_inst[module_id]->scheduled_response != NULL, "scheduled_response is NULL!\n" );
fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, dl_info->module_id, dl_info->cc_id, dl_info->frame, dl_info->slot, dl_info->thread_id);
fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, dl_info->module_id, dl_info->cc_id, dl_info->frame, dl_info->slot, dl_info->thread_id, dl_info->phy_data);
nr_ue_if_module_inst[module_id]->scheduled_response(&scheduled_response);
}
memset(def_dci_pdu_rel15, 0, sizeof(*def_dci_pdu_rel15));
......@@ -1229,7 +1230,7 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_
switch(dl_info->rx_ind->rx_indication_body[i].pdu_type){
case FAPI_NR_RX_PDU_TYPE_SSB:
mac->ssb_rsrp_dBm = (dl_info->rx_ind->rx_indication_body+i)->ssb_pdu.rsrp_dBm;
ret_mask |= (handle_bcch_bch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
ret_mask |= (handle_bcch_bch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index, dl_info->phy_data,
(dl_info->rx_ind->rx_indication_body+i)->ssb_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->ssb_pdu.additional_bits,
(dl_info->rx_ind->rx_indication_body+i)->ssb_pdu.ssb_index,
......
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h
View file @ 9a330b3d
......@@ -123,6 +123,9 @@ typedef struct {
/// dci reception indication structure
fapi_nr_dci_indication_t *dci_ind;
/// PHY specific data structure that can be passed on to L2 via nr_downlink_indication_t and
/// back to L1 via the nr_scheduled_response_t
void *phy_data;
} nr_downlink_indication_t;
......@@ -176,6 +179,9 @@ typedef struct {
/// data transmission request structure
fapi_nr_tx_request_t *tx_request;
/// PHY data structure initially passed on to L2 via the nr_downlink_indication_t and
/// returned to L1 via nr_scheduled_response_t
void *phy_data;
} nr_scheduled_response_t;
typedef struct {
......@@ -286,6 +292,7 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq);
// TODO check
/**\brief handle BCCH-BCH message from dl_indication
\param phy_data PHY structure to be filled in by the callee in the FAPI call (L1 caller -> indication to L2 -> FAPI call to L1 callee)
\param pduP pointer to bch pdu
\param additional_bits corresponding to 38.212 ch.7
\param ssb_index SSB index within 0 - (L_ssb-1) corresponding to 38.331 ch.13 parameter i
......@@ -294,6 +301,7 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq);
int handle_bcch_bch(module_id_t module_id,
int cc_id,
unsigned int gNB_index,
void *phy_data,
uint8_t *pduP,
unsigned int additional_bits,
uint32_t ssb_index,
......
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