Commit acd996d2 authored by shahab's avatar shahab

ul proto msg

parent cd74f4d6
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...@@ -16,6 +16,12 @@ message flex_dl_data { ...@@ -16,6 +16,12 @@ message flex_dl_data {
optional uint32 act_deact_ce = 6; //Hex content of MAC CE for Activation/Deactivation in CA optional uint32 act_deact_ce = 6; //Hex content of MAC CE for Activation/Deactivation in CA
} }
message flex_ul_data {
optional uint32 rnti = 1;
optional flex_ul_dci ul_dci = 2;
}
// //
// Body of the RAR scheduler configuration // Body of the RAR scheduler configuration
// //
......
...@@ -30,6 +30,7 @@ message flexran_message { ...@@ -30,6 +30,7 @@ message flexran_message {
flex_control_delegation control_delegation_msg = 16; flex_control_delegation control_delegation_msg = 16;
flex_agent_reconfiguration agent_reconfiguration_msg = 17; flex_agent_reconfiguration agent_reconfiguration_msg = 17;
flex_rrc_triggering rrc_triggering = 18; flex_rrc_triggering rrc_triggering = 18;
flex_ul_mac_config ul_mac_config_msg = 19;
} }
} }
...@@ -166,6 +167,18 @@ message flex_dl_mac_config { ...@@ -166,6 +167,18 @@ message flex_dl_mac_config {
repeated flex_pdcch_ofdm_sym_count ofdm_sym = 6; // OFDM symbol count for each CC repeated flex_pdcch_ofdm_sym_count ofdm_sym = 6; // OFDM symbol count for each CC
} }
message flex_ul_mac_config {
optional flex_header header = 1;
optional uint32 sfn_sf = 2;
repeated flex_ul_data ul_ue_data = 3;
}
message flex_rrc_triggering {
optional flex_header header = 1;
optional string rrc_trigger = 2;
}
// //
// UE state change message // UE state change message
// //
......
...@@ -41,5 +41,6 @@ enum flex_type { ...@@ -41,5 +41,6 @@ enum flex_type {
FLPT_DELEGATE_CONTROL = 15; FLPT_DELEGATE_CONTROL = 15;
FLPT_RECONFIGURE_AGENT = 16; FLPT_RECONFIGURE_AGENT = 16;
FLPT_RRC_TRIGGERING = 17; FLPT_RRC_TRIGGERING = 17;
FLPT_UL_MAC_CONFIG = 18;
} }
...@@ -34,6 +34,38 @@ message flex_dl_dci { ...@@ -34,6 +34,38 @@ message flex_dl_dci {
optional uint32 pdcch_power_offset = 25; // DL PDCCH power boosting in dB optional uint32 pdcch_power_offset = 25; // DL PDCCH power boosting in dB
optional uint32 cif_present = 26; // Boolean. Indication of CIF field optional uint32 cif_present = 26; // Boolean. Indication of CIF field
optional uint32 cif = 27; // CIF for cross-carrier scheduling optional uint32 cif = 27; // CIF for cross-carrier scheduling
}
message flex_ul_dci {
optional uint32 rnti = 1;
optional uint32 rb_start = 2; // The start RB allocated to the UE
optional uint32 rb_len = 3; // The number of RBs allocated to the UE
optional uint32 mcs = 4; // Modulation and coding scheme
optional uint32 cyclic_shift2 = 5; // match DCI format 0/4 PDU
optional uint32 freq_hop_flag = 6; // 0 no hopping, 1 hoppping
optional uint32 freq_hop_map = 7; // Frequency hopping bits (0..4)
optional uint32 ndi = 8; // New data indicator
optional uint32 rv = 9; // Redundancy version
optional uint32 harq_pid = 10; // The harq process id
optional uint32 ultx_mode = 11; // A FLULM_* value
optional uint32 tbs_size = 12; // The size of each TBS
optional uint32 n_srs = 13; // Overlap indication with srs
optional uint32 res_alloc = 14; // Type of resource allocation
optional uint32 size = 15; // Size of the ULSCH PDU in bytes for UL Grant.
optional uint32 dai = 16; // TDD only
// optional uint32 tb_swap = 17; // Boolean. TB to codeword swap flag
// optional uint32 pdcch_order = 19;
// optional uint32 preamble_index = 20; // Only valid if pdcch_order = 1
// optional uint32 prach_mask_index = 21; // Only valid if pdcch_order = 1
// optional uint32 tbs_idx = 23; // The TBS index for Format 1A
} }
......
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