Commit b55bff37 authored by Robert Schmidt's avatar Robert Schmidt

Merge remote-tracking branch 'origin/ue-code-cleanup' into integration_2023_w28

parents 3a49a44c 9121541b
...@@ -103,6 +103,7 @@ get_distribution_release() { ...@@ -103,6 +103,7 @@ get_distribution_release() {
check_supported_distribution() { check_supported_distribution() {
local distribution=$(get_distribution_release) local distribution=$(get_distribution_release)
case "$distribution" in case "$distribution" in
"ubuntu23.10") return 0 ;;
"ubuntu22.04") return 0 ;; "ubuntu22.04") return 0 ;;
"ubuntu21.04") return 0 ;; "ubuntu21.04") return 0 ;;
"ubuntu20.04") return 0 ;; "ubuntu20.04") return 0 ;;
......
...@@ -140,7 +140,7 @@ extern "C" { ...@@ -140,7 +140,7 @@ extern "C" {
t->message_queue.insert(t->message_queue.begin(), message); t->message_queue.insert(t->message_queue.begin(), message);
eventfd_t sem_counter = 1; eventfd_t sem_counter = 1;
AssertFatal ( sizeof(sem_counter) == write(t->sem_fd, &sem_counter, sizeof(sem_counter)), ""); AssertFatal ( sizeof(sem_counter) == write(t->sem_fd, &sem_counter, sizeof(sem_counter)), "");
LOG_D(ITTI,"sent messages id=%d to %s\n",message_id, t->admin.name); LOG_D(ITTI, "sent messages id=%s messages_info to %s\n", messages_info[message_id].name, t->admin.name);
return 0; return 0;
} }
......
...@@ -339,9 +339,6 @@ int history_cmd(char *buff, int debug, telnet_printfunc_t prnt) { ...@@ -339,9 +339,6 @@ int history_cmd(char *buff, int debug, telnet_printfunc_t prnt) {
memset(cmds,0,sizeof(cmds)); memset(cmds,0,sizeof(cmds));
sscanf(buff,"%9s %9s %9s %9s %9s", cmds[0],cmds[1],cmds[2],cmds[3],cmds[4] ); sscanf(buff,"%9s %9s %9s %9s %9s", cmds[0],cmds[1],cmds[2],cmds[3],cmds[4] );
if (cmds[0] == NULL)
return CMDSTATUS_VARNOTFOUND;
if (strncasecmp(cmds[0],"list",4) == 0) { if (strncasecmp(cmds[0],"list",4) == 0) {
HIST_ENTRY **hist = history_list(); HIST_ENTRY **hist = history_list();
......
...@@ -505,8 +505,7 @@ static void RU_write(nr_rxtx_thread_data_t *rxtxD) { ...@@ -505,8 +505,7 @@ static void RU_write(nr_rxtx_thread_data_t *rxtxD) {
void *txp[NB_ANTENNAS_TX]; void *txp[NB_ANTENNAS_TX];
for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++) for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++)
txp[i] = (void *)&UE->common_vars.txdata[i][UE->frame_parms.get_samples_slot_timestamp( txp[i] = (void *)&UE->common_vars.txData[i][UE->frame_parms.get_samples_slot_timestamp(proc->nr_slot_tx, &UE->frame_parms, 0)];
proc->nr_slot_tx, &UE->frame_parms, 0)];
radio_tx_burst_flag_t flags = TX_BURST_INVALID; radio_tx_burst_flag_t flags = TX_BURST_INVALID;
...@@ -868,7 +867,6 @@ void *UE_thread(void *arg) { ...@@ -868,7 +867,6 @@ void *UE_thread(void *arg) {
nr_rxtx_thread_data_t curMsg = {0}; nr_rxtx_thread_data_t curMsg = {0};
curMsg.UE=UE; curMsg.UE=UE;
// update thread index for received subframe // update thread index for received subframe
curMsg.proc.CC_id = UE->CC_id;
curMsg.proc.nr_slot_rx = slot_nr; curMsg.proc.nr_slot_rx = slot_nr;
curMsg.proc.nr_slot_tx = (absolute_slot + DURATION_RX_TO_TX) % nb_slot_frame; curMsg.proc.nr_slot_tx = (absolute_slot + DURATION_RX_TO_TX) % nb_slot_frame;
curMsg.proc.frame_rx = (absolute_slot/nb_slot_frame) % MAX_FRAME_NUMBER; curMsg.proc.frame_rx = (absolute_slot/nb_slot_frame) % MAX_FRAME_NUMBER;
......
...@@ -149,16 +149,16 @@ void init_nr_prs_ue_vars(PHY_VARS_NR_UE *ue) ...@@ -149,16 +149,16 @@ void init_nr_prs_ue_vars(PHY_VARS_NR_UE *ue)
// PRS vars init // PRS vars init
for(int idx = 0; idx < NR_MAX_PRS_COMB_SIZE; idx++) for(int idx = 0; idx < NR_MAX_PRS_COMB_SIZE; idx++)
{ {
prs_vars[idx] = (NR_UE_PRS *)malloc16_clear(sizeof(NR_UE_PRS)); prs_vars[idx] = malloc16_clear(sizeof(NR_UE_PRS));
// PRS channel estimates // PRS channel estimates
for(int k = 0; k < NR_MAX_PRS_RESOURCES_PER_SET; k++) for(int k = 0; k < NR_MAX_PRS_RESOURCES_PER_SET; k++)
{ {
prs_vars[idx]->prs_resource[k].prs_meas = (prs_meas_t **)malloc16_clear( fp->nb_antennas_rx*sizeof(prs_meas_t *) ); prs_vars[idx]->prs_resource[k].prs_meas = malloc16_clear(fp->nb_antennas_rx * sizeof(prs_meas_t *));
AssertFatal((prs_vars[idx]->prs_resource[k].prs_meas!=NULL), "%s: PRS measurements malloc failed for gNB_id %d\n", __FUNCTION__, idx); AssertFatal((prs_vars[idx]->prs_resource[k].prs_meas!=NULL), "%s: PRS measurements malloc failed for gNB_id %d\n", __FUNCTION__, idx);
for (int j=0; j<fp->nb_antennas_rx; j++) { for (int j=0; j<fp->nb_antennas_rx; j++) {
prs_vars[idx]->prs_resource[k].prs_meas[j] = (prs_meas_t *)malloc16_clear(sizeof(prs_meas_t) ); prs_vars[idx]->prs_resource[k].prs_meas[j] = malloc16_clear(sizeof(prs_meas_t));
AssertFatal((prs_vars[idx]->prs_resource[k].prs_meas[j]!=NULL), "%s: PRS measurements malloc failed for gNB_id %d, rx_ant %d\n", __FUNCTION__, idx, j); AssertFatal((prs_vars[idx]->prs_resource[k].prs_meas[j]!=NULL), "%s: PRS measurements malloc failed for gNB_id %d, rx_ant %d\n", __FUNCTION__, idx, j);
} }
} }
...@@ -168,23 +168,23 @@ void init_nr_prs_ue_vars(PHY_VARS_NR_UE *ue) ...@@ -168,23 +168,23 @@ void init_nr_prs_ue_vars(PHY_VARS_NR_UE *ue)
RCconfig_nrUE_prs(ue); RCconfig_nrUE_prs(ue);
//PRS sequence init //PRS sequence init
ue->nr_gold_prs = (uint32_t *****)malloc16(ue->prs_active_gNBs*sizeof(uint32_t ****)); ue->nr_gold_prs = malloc16(ue->prs_active_gNBs * sizeof(uint32_t ****));
uint32_t *****prs = ue->nr_gold_prs; uint32_t *****prs = ue->nr_gold_prs;
AssertFatal(prs!=NULL, "%s: positioning reference signal malloc failed\n", __FUNCTION__); AssertFatal(prs!=NULL, "%s: positioning reference signal malloc failed\n", __FUNCTION__);
for (int gnb = 0; gnb < ue->prs_active_gNBs; gnb++) { for (int gnb = 0; gnb < ue->prs_active_gNBs; gnb++) {
prs[gnb] = (uint32_t ****)malloc16(ue->prs_vars[gnb]->NumPRSResources*sizeof(uint32_t ***)); prs[gnb] = malloc16(ue->prs_vars[gnb]->NumPRSResources * sizeof(uint32_t ***));
AssertFatal(prs[gnb]!=NULL, "%s: positioning reference signal for gnb %d - malloc failed\n", __FUNCTION__, gnb); AssertFatal(prs[gnb]!=NULL, "%s: positioning reference signal for gnb %d - malloc failed\n", __FUNCTION__, gnb);
for (int rsc = 0; rsc < ue->prs_vars[gnb]->NumPRSResources; rsc++) { for (int rsc = 0; rsc < ue->prs_vars[gnb]->NumPRSResources; rsc++) {
prs[gnb][rsc] = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **)); prs[gnb][rsc] = malloc16(fp->slots_per_frame * sizeof(uint32_t **));
AssertFatal(prs[gnb][rsc]!=NULL, "%s: positioning reference signal for gnb %d rsc %d- malloc failed\n", __FUNCTION__, gnb, rsc); AssertFatal(prs[gnb][rsc]!=NULL, "%s: positioning reference signal for gnb %d rsc %d- malloc failed\n", __FUNCTION__, gnb, rsc);
for (int slot=0; slot<fp->slots_per_frame; slot++) { for (int slot=0; slot<fp->slots_per_frame; slot++) {
prs[gnb][rsc][slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t *)); prs[gnb][rsc][slot] = malloc16(fp->symbols_per_slot * sizeof(uint32_t *));
AssertFatal(prs[gnb][rsc][slot]!=NULL, "%s: positioning reference signal for gnb %d rsc %d slot %d - malloc failed\n", __FUNCTION__, gnb, rsc, slot); AssertFatal(prs[gnb][rsc][slot]!=NULL, "%s: positioning reference signal for gnb %d rsc %d slot %d - malloc failed\n", __FUNCTION__, gnb, rsc, slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++) { for (int symb=0; symb<fp->symbols_per_slot; symb++) {
prs[gnb][rsc][slot][symb] = (uint32_t *)malloc16(NR_MAX_PRS_INIT_LENGTH_DWORD*sizeof(uint32_t)); prs[gnb][rsc][slot][symb] = malloc16(NR_MAX_PRS_INIT_LENGTH_DWORD * sizeof(uint32_t));
AssertFatal(prs[gnb][rsc][slot][symb]!=NULL, "%s: positioning reference signal for gnb %d rsc %d slot %d symbol %d - malloc failed\n", __FUNCTION__, gnb, rsc, slot, symb); AssertFatal(prs[gnb][rsc][slot][symb]!=NULL, "%s: positioning reference signal for gnb %d rsc %d slot %d symbol %d - malloc failed\n", __FUNCTION__, gnb, rsc, slot, symb);
} // for symb } // for symb
} // for slot } // for slot
...@@ -251,19 +251,19 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB) ...@@ -251,19 +251,19 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
// ceil(((NB_RB*6(k)*2(QPSK)/32) // 3 RE *2(QPSK) // ceil(((NB_RB*6(k)*2(QPSK)/32) // 3 RE *2(QPSK)
int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1; int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
ue->nr_gold_pusch_dmrs = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t ***)); ue->nr_gold_pusch_dmrs = malloc16(fp->slots_per_frame * sizeof(uint32_t ***));
uint32_t ****pusch_dmrs = ue->nr_gold_pusch_dmrs; uint32_t ****pusch_dmrs = ue->nr_gold_pusch_dmrs;
for (slot=0; slot<fp->slots_per_frame; slot++) { for (slot=0; slot<fp->slots_per_frame; slot++) {
pusch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t **)); pusch_dmrs[slot] = malloc16(fp->symbols_per_slot * sizeof(uint32_t **));
AssertFatal(pusch_dmrs[slot]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d - malloc failed\n", slot); AssertFatal(pusch_dmrs[slot]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d - malloc failed\n", slot);
for (symb=0; symb<fp->symbols_per_slot; symb++) { for (symb=0; symb<fp->symbols_per_slot; symb++) {
pusch_dmrs[slot][symb] = (uint32_t **)malloc16(NR_NB_NSCID*sizeof(uint32_t *)); pusch_dmrs[slot][symb] = malloc16(NR_NB_NSCID * sizeof(uint32_t *));
AssertFatal(pusch_dmrs[slot][symb]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb); AssertFatal(pusch_dmrs[slot][symb]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
for (int q=0; q<NR_NB_NSCID; q++) { for (int q=0; q<NR_NB_NSCID; q++) {
pusch_dmrs[slot][symb][q] = (uint32_t *)malloc16(pusch_dmrs_init_length*sizeof(uint32_t)); pusch_dmrs[slot][symb][q] = malloc16(pusch_dmrs_init_length * sizeof(uint32_t));
AssertFatal(pusch_dmrs[slot][symb][q]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d symbol %d nscid %d - malloc failed\n", slot, symb, q); AssertFatal(pusch_dmrs[slot][symb][q]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d symbol %d nscid %d - malloc failed\n", slot, symb, q);
} }
} }
...@@ -291,36 +291,34 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB) ...@@ -291,36 +291,34 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
ue->tx_power_dBm[i]=-127; ue->tx_power_dBm[i]=-127;
// init TX buffers // init TX buffers
common_vars->txdata = (c16_t **)malloc16(fp->nb_antennas_tx*sizeof(c16_t *)); common_vars->txData = malloc16(fp->nb_antennas_tx * sizeof(c16_t *));
common_vars->txdataF = (c16_t **)malloc16(fp->nb_antennas_tx*sizeof(c16_t *));
for (i=0; i<fp->nb_antennas_tx; i++) { for (i=0; i<fp->nb_antennas_tx; i++) {
common_vars->txdata[i] = (c16_t *)malloc16_clear((fp->samples_per_frame) * sizeof(c16_t)); common_vars->txData[i] = malloc16_clear((fp->samples_per_frame) * sizeof(c16_t));
common_vars->txdataF[i] = (c16_t *)malloc16_clear((fp->samples_per_frame) * sizeof(c16_t));
} }
// init RX buffers // init RX buffers
common_vars->rxdata = (c16_t **)malloc16( fp->nb_antennas_rx*sizeof(c16_t *)); common_vars->rxdata = malloc16(fp->nb_antennas_rx * sizeof(c16_t *));
common_vars->rxdataF = (c16_t **)malloc16( fp->nb_antennas_rx*sizeof(c16_t *)); common_vars->rxdataF = malloc16(fp->nb_antennas_rx * sizeof(c16_t *));
for (i=0; i<fp->nb_antennas_rx; i++) { for (i=0; i<fp->nb_antennas_rx; i++) {
common_vars->rxdata[i] = (c16_t *)malloc16_clear((2 * (fp->samples_per_frame)+fp->ofdm_symbol_size) * sizeof(c16_t)); common_vars->rxdata[i] = malloc16_clear((2 * (fp->samples_per_frame) + fp->ofdm_symbol_size) * sizeof(c16_t));
common_vars->rxdataF[i] = (c16_t *)malloc16_clear((2 * (fp->samples_per_frame)+fp->ofdm_symbol_size) * sizeof(c16_t)); common_vars->rxdataF[i] = malloc16_clear((2 * (fp->samples_per_frame) + fp->ofdm_symbol_size) * sizeof(c16_t));
} }
// ceil(((NB_RB<<1)*3)/32) // 3 RE *2(QPSK) // ceil(((NB_RB<<1)*3)/32) // 3 RE *2(QPSK)
int pdcch_dmrs_init_length = (((fp->N_RB_DL<<1)*3)>>5)+1; int pdcch_dmrs_init_length = (((fp->N_RB_DL<<1)*3)>>5)+1;
//PDCCH DMRS init (gNB offset = 0) //PDCCH DMRS init (gNB offset = 0)
ue->nr_gold_pdcch[0] = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **)); ue->nr_gold_pdcch[0] = malloc16(fp->slots_per_frame * sizeof(uint32_t **));
uint32_t ***pdcch_dmrs = ue->nr_gold_pdcch[0]; uint32_t ***pdcch_dmrs = ue->nr_gold_pdcch[0];
AssertFatal(pdcch_dmrs!=NULL, "NR init: pdcch_dmrs malloc failed\n"); AssertFatal(pdcch_dmrs!=NULL, "NR init: pdcch_dmrs malloc failed\n");
for (int slot=0; slot<fp->slots_per_frame; slot++) { for (int slot=0; slot<fp->slots_per_frame; slot++) {
pdcch_dmrs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t *)); pdcch_dmrs[slot] = malloc16(fp->symbols_per_slot * sizeof(uint32_t *));
AssertFatal(pdcch_dmrs[slot]!=NULL, "NR init: pdcch_dmrs for slot %d - malloc failed\n", slot); AssertFatal(pdcch_dmrs[slot]!=NULL, "NR init: pdcch_dmrs for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++) { for (int symb=0; symb<fp->symbols_per_slot; symb++) {
pdcch_dmrs[slot][symb] = (uint32_t *)malloc16(pdcch_dmrs_init_length*sizeof(uint32_t)); pdcch_dmrs[slot][symb] = malloc16(pdcch_dmrs_init_length * sizeof(uint32_t));
AssertFatal(pdcch_dmrs[slot][symb]!=NULL, "NR init: pdcch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb); AssertFatal(pdcch_dmrs[slot][symb]!=NULL, "NR init: pdcch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
} }
} }
...@@ -329,19 +327,19 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB) ...@@ -329,19 +327,19 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
int pdsch_dmrs_init_length = ((fp->N_RB_DL*12)>>5)+1; int pdsch_dmrs_init_length = ((fp->N_RB_DL*12)>>5)+1;
//PDSCH DMRS init (eNB offset = 0) //PDSCH DMRS init (eNB offset = 0)
ue->nr_gold_pdsch[0] = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t ***)); ue->nr_gold_pdsch[0] = malloc16(fp->slots_per_frame * sizeof(uint32_t ***));
uint32_t ****pdsch_dmrs = ue->nr_gold_pdsch[0]; uint32_t ****pdsch_dmrs = ue->nr_gold_pdsch[0];
for (int slot=0; slot<fp->slots_per_frame; slot++) { for (int slot=0; slot<fp->slots_per_frame; slot++) {
pdsch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t **)); pdsch_dmrs[slot] = malloc16(fp->symbols_per_slot * sizeof(uint32_t **));
AssertFatal(pdsch_dmrs[slot]!=NULL, "NR init: pdsch_dmrs for slot %d - malloc failed\n", slot); AssertFatal(pdsch_dmrs[slot]!=NULL, "NR init: pdsch_dmrs for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++) { for (int symb=0; symb<fp->symbols_per_slot; symb++) {
pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(NR_NB_NSCID*sizeof(uint32_t *)); pdsch_dmrs[slot][symb] = malloc16(NR_NB_NSCID * sizeof(uint32_t *));
AssertFatal(pdsch_dmrs[slot][symb]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb); AssertFatal(pdsch_dmrs[slot][symb]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
for (int q=0; q<NR_NB_NSCID; q++) { for (int q=0; q<NR_NB_NSCID; q++) {
pdsch_dmrs[slot][symb][q] = (uint32_t *)malloc16(pdsch_dmrs_init_length*sizeof(uint32_t)); pdsch_dmrs[slot][symb][q] = malloc16(pdsch_dmrs_init_length * sizeof(uint32_t));
AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d nscid %d - malloc failed\n", slot, symb, q); AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d nscid %d - malloc failed\n", slot, symb, q);
} }
} }
...@@ -349,10 +347,10 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB) ...@@ -349,10 +347,10 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
// DLSCH // DLSCH
for (gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) { for (gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) {
prach_vars[gNB_id] = (NR_UE_PRACH *)malloc16_clear(sizeof(NR_UE_PRACH)); prach_vars[gNB_id] = malloc16_clear(sizeof(NR_UE_PRACH));
csiim_vars[gNB_id] = (NR_UE_CSI_IM *)malloc16_clear(sizeof(NR_UE_CSI_IM)); csiim_vars[gNB_id] = malloc16_clear(sizeof(NR_UE_CSI_IM));
csirs_vars[gNB_id] = (NR_UE_CSI_RS *)malloc16_clear(sizeof(NR_UE_CSI_RS)); csirs_vars[gNB_id] = malloc16_clear(sizeof(NR_UE_CSI_RS));
srs_vars[gNB_id] = (NR_UE_SRS *)malloc16_clear(sizeof(NR_UE_SRS)); srs_vars[gNB_id] = malloc16_clear(sizeof(NR_UE_SRS));
csiim_vars[gNB_id]->active = false; csiim_vars[gNB_id]->active = false;
csirs_vars[gNB_id]->active = false; csirs_vars[gNB_id]->active = false;
...@@ -360,24 +358,23 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB) ...@@ -360,24 +358,23 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
// ceil((NB_RB*8(max allocation per RB)*2(QPSK))/32) // ceil((NB_RB*8(max allocation per RB)*2(QPSK))/32)
int csi_dmrs_init_length = ((fp->N_RB_DL<<4)>>5)+1; int csi_dmrs_init_length = ((fp->N_RB_DL<<4)>>5)+1;
ue->nr_csi_info = (nr_csi_info_t *)malloc16_clear(sizeof(nr_csi_info_t)); ue->nr_csi_info = malloc16_clear(sizeof(nr_csi_info_t));
ue->nr_csi_info->nr_gold_csi_rs = (uint32_t ***)malloc16(fp->slots_per_frame * sizeof(uint32_t **)); ue->nr_csi_info->nr_gold_csi_rs = malloc16(fp->slots_per_frame * sizeof(uint32_t **));
AssertFatal(ue->nr_csi_info->nr_gold_csi_rs != NULL, "NR init: csi reference signal malloc failed\n"); AssertFatal(ue->nr_csi_info->nr_gold_csi_rs != NULL, "NR init: csi reference signal malloc failed\n");
for (int slot=0; slot<fp->slots_per_frame; slot++) { for (int slot=0; slot<fp->slots_per_frame; slot++) {
ue->nr_csi_info->nr_gold_csi_rs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot * sizeof(uint32_t *)); ue->nr_csi_info->nr_gold_csi_rs[slot] = malloc16(fp->symbols_per_slot * sizeof(uint32_t *));
AssertFatal(ue->nr_csi_info->nr_gold_csi_rs[slot] != NULL, "NR init: csi reference signal for slot %d - malloc failed\n", slot); AssertFatal(ue->nr_csi_info->nr_gold_csi_rs[slot] != NULL, "NR init: csi reference signal for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++) { for (int symb=0; symb<fp->symbols_per_slot; symb++) {
ue->nr_csi_info->nr_gold_csi_rs[slot][symb] = (uint32_t *)malloc16(csi_dmrs_init_length * sizeof(uint32_t)); ue->nr_csi_info->nr_gold_csi_rs[slot][symb] = malloc16(csi_dmrs_init_length * sizeof(uint32_t));
AssertFatal(ue->nr_csi_info->nr_gold_csi_rs[slot][symb] != NULL, "NR init: csi reference signal for slot %d symbol %d - malloc failed\n", slot, symb); AssertFatal(ue->nr_csi_info->nr_gold_csi_rs[slot][symb] != NULL, "NR init: csi reference signal for slot %d symbol %d - malloc failed\n", slot, symb);
} }
} }
ue->nr_csi_info->csi_rs_generated_signal = (int32_t **)malloc16(NR_MAX_NB_PORTS * sizeof(int32_t *) ); ue->nr_csi_info->csi_rs_generated_signal = malloc16(NR_MAX_NB_PORTS * sizeof(int32_t *));
for (i=0; i<NR_MAX_NB_PORTS; i++) { for (i=0; i<NR_MAX_NB_PORTS; i++) {
ue->nr_csi_info->csi_rs_generated_signal[i] = (int32_t *) malloc16_clear(fp->samples_per_frame_wCP * sizeof(int32_t)); ue->nr_csi_info->csi_rs_generated_signal[i] = malloc16_clear(fp->samples_per_frame_wCP * sizeof(int32_t));
} }
ue->nr_srs_info = (nr_srs_info_t *)malloc16_clear(sizeof(nr_srs_info_t)); ue->nr_srs_info = malloc16_clear(sizeof(nr_srs_info_t));
} }
ue->init_averaging = 1; ue->init_averaging = 1;
...@@ -411,12 +408,10 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB) ...@@ -411,12 +408,10 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
NR_UE_COMMON* common_vars = &ue->common_vars; NR_UE_COMMON* common_vars = &ue->common_vars;
for (int i = 0; i < fp->nb_antennas_tx; i++) { for (int i = 0; i < fp->nb_antennas_tx; i++) {
free_and_zero(common_vars->txdata[i]); free_and_zero(common_vars->txData[i]);
free_and_zero(common_vars->txdataF[i]);
} }
free_and_zero(common_vars->txdata); free_and_zero(common_vars->txData);
free_and_zero(common_vars->txdataF);
for (int i = 0; i < fp->nb_antennas_rx; i++) { for (int i = 0; i < fp->nb_antennas_rx; i++) {
free_and_zero(common_vars->rxdata[i]); free_and_zero(common_vars->rxdata[i]);
......
...@@ -173,7 +173,7 @@ void set_scs_parameters (NR_DL_FRAME_PARMS *fp, int mu, int N_RB_DL) ...@@ -173,7 +173,7 @@ void set_scs_parameters (NR_DL_FRAME_PARMS *fp, int mu, int N_RB_DL)
N_RB_DL,fp->first_carrier_offset,fp->nb_prefix_samples,fp->nb_prefix_samples0, fp->ofdm_symbol_size); N_RB_DL,fp->first_carrier_offset,fp->nb_prefix_samples,fp->nb_prefix_samples0, fp->ofdm_symbol_size);
} }
uint32_t get_samples_per_slot(int slot, NR_DL_FRAME_PARMS* fp) uint32_t get_samples_per_slot(int slot, const NR_DL_FRAME_PARMS *fp)
{ {
uint32_t samp_count; uint32_t samp_count;
...@@ -185,7 +185,7 @@ uint32_t get_samples_per_slot(int slot, NR_DL_FRAME_PARMS* fp) ...@@ -185,7 +185,7 @@ uint32_t get_samples_per_slot(int slot, NR_DL_FRAME_PARMS* fp)
return samp_count; return samp_count;
} }
uint32_t get_slot_from_timestamp(openair0_timestamp timestamp_rx, NR_DL_FRAME_PARMS* fp) uint32_t get_slot_from_timestamp(openair0_timestamp timestamp_rx, const NR_DL_FRAME_PARMS *fp)
{ {
uint32_t slot_idx = 0; uint32_t slot_idx = 0;
int samples_till_the_slot = fp->get_samples_per_slot(slot_idx,fp)-1; int samples_till_the_slot = fp->get_samples_per_slot(slot_idx,fp)-1;
...@@ -198,7 +198,7 @@ uint32_t get_slot_from_timestamp(openair0_timestamp timestamp_rx, NR_DL_FRAME_PA ...@@ -198,7 +198,7 @@ uint32_t get_slot_from_timestamp(openair0_timestamp timestamp_rx, NR_DL_FRAME_PA
return slot_idx; return slot_idx;
} }
uint32_t get_samples_slot_timestamp(int slot, NR_DL_FRAME_PARMS* fp, uint8_t sl_ahead) uint32_t get_samples_slot_timestamp(int slot, const NR_DL_FRAME_PARMS *fp, uint8_t sl_ahead)
{ {
uint32_t samp_count = 0; uint32_t samp_count = 0;
......
...@@ -49,7 +49,7 @@ void PHY_ofdm_mod(int *input, ...@@ -49,7 +49,7 @@ void PHY_ofdm_mod(int *input,
void normal_prefix_mod(int32_t *txdataF,int32_t *txdata,uint8_t nsymb,LTE_DL_FRAME_PARMS *frame_parms); void normal_prefix_mod(int32_t *txdataF,int32_t *txdata,uint8_t nsymb,LTE_DL_FRAME_PARMS *frame_parms);
void nr_normal_prefix_mod(c16_t *txdataF, c16_t *txdata, uint8_t nsymb, NR_DL_FRAME_PARMS *frame_parms, uint32_t slot); void nr_normal_prefix_mod(c16_t *txdataF, c16_t *txdata, uint8_t nsymb, const NR_DL_FRAME_PARMS *frame_parms, uint32_t slot);
void do_OFDM_mod(c16_t **txdataF, c16_t **txdata, uint32_t frame,uint16_t next_slot, LTE_DL_FRAME_PARMS *frame_parms); void do_OFDM_mod(c16_t **txdataF, c16_t **txdata, uint32_t frame,uint16_t next_slot, LTE_DL_FRAME_PARMS *frame_parms);
......
...@@ -108,9 +108,9 @@ int nr_beam_precoding(c16_t **txdataF, ...@@ -108,9 +108,9 @@ int nr_beam_precoding(c16_t **txdataF,
int offset int offset
); );
void apply_nr_rotation_TX(NR_DL_FRAME_PARMS *fp, void apply_nr_rotation_TX(const NR_DL_FRAME_PARMS *fp,
c16_t *txdataF, c16_t *txdataF,
c16_t *symbol_rotation, const c16_t *symbol_rotation,
int slot, int slot,
int nb_rb, int nb_rb,
int first_symbol, int first_symbol,
......
...@@ -64,7 +64,7 @@ void normal_prefix_mod(int32_t *txdataF,int32_t *txdata,uint8_t nsymb,LTE_DL_FRA ...@@ -64,7 +64,7 @@ void normal_prefix_mod(int32_t *txdataF,int32_t *txdata,uint8_t nsymb,LTE_DL_FRA
} }
void nr_normal_prefix_mod(c16_t *txdataF, c16_t *txdata, uint8_t nsymb, NR_DL_FRAME_PARMS *frame_parms, uint32_t slot) void nr_normal_prefix_mod(c16_t *txdataF, c16_t *txdata, uint8_t nsymb, const NR_DL_FRAME_PARMS *frame_parms, uint32_t slot)
{ {
// This function works only slot wise. For more generic symbol generation refer nr_feptx0() // This function works only slot wise. For more generic symbol generation refer nr_feptx0()
if (frame_parms->numerology_index != 0) { // case where numerology != 0 if (frame_parms->numerology_index != 0) { // case where numerology != 0
...@@ -334,9 +334,9 @@ void do_OFDM_mod(c16_t **txdataF, c16_t **txdata, uint32_t frame,uint16_t next_s ...@@ -334,9 +334,9 @@ void do_OFDM_mod(c16_t **txdataF, c16_t **txdata, uint32_t frame,uint16_t next_s
} }
void apply_nr_rotation_TX(NR_DL_FRAME_PARMS *fp, void apply_nr_rotation_TX(const NR_DL_FRAME_PARMS *fp,
c16_t *txdataF, c16_t *txdataF,
c16_t *symbol_rotation, const c16_t *symbol_rotation,
int slot, int slot,
int nb_rb, int nb_rb,
int first_symbol, int first_symbol,
...@@ -347,7 +347,7 @@ void apply_nr_rotation_TX(NR_DL_FRAME_PARMS *fp, ...@@ -347,7 +347,7 @@ void apply_nr_rotation_TX(NR_DL_FRAME_PARMS *fp,
symbol_rotation += symb_offset; symbol_rotation += symb_offset;
for (int sidx = first_symbol; sidx < first_symbol + nsymb; sidx++) { for (int sidx = first_symbol; sidx < first_symbol + nsymb; sidx++) {
c16_t *this_rotation = symbol_rotation + sidx; const c16_t *this_rotation = symbol_rotation + sidx;
c16_t *this_symbol = (txdataF) + sidx * fp->ofdm_symbol_size; c16_t *this_symbol = (txdataF) + sidx * fp->ofdm_symbol_size;
LOG_D(PHY,"Rotating symbol %d, slot %d, symbol_subframe_index %d (%d,%d)\n", LOG_D(PHY,"Rotating symbol %d, slot %d, symbol_subframe_index %d (%d,%d)\n",
......
...@@ -75,11 +75,11 @@ void free_context_sss_nr(void); ...@@ -75,11 +75,11 @@ void free_context_sss_nr(void);
void insert_sss_nr(int16_t *sss_time, void insert_sss_nr(int16_t *sss_time,
NR_DL_FRAME_PARMS *frame_parms); NR_DL_FRAME_PARMS *frame_parms);
int rx_sss_nr(PHY_VARS_NR_UE *ue, bool rx_sss_nr(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc, UE_nr_rxtx_proc_t *proc,
int32_t *tot_metric, int32_t *tot_metric,
uint8_t *phase_max, uint8_t *phase_max,
int *freq_offset_sss, int *freq_offset_sss,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]); c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]);
#endif /* SSS_NR_H */ #endif /* SSS_NR_H */
...@@ -30,7 +30,7 @@ ...@@ -30,7 +30,7 @@
* \warning * \warning
*/ */
extern int16_t nr_ru[2 * 839]; // quantized roots of unity extern c16_t nr_ru[839]; // quantized roots of unity
extern uint16_t nr_du[838]; extern uint16_t nr_du[838];
static const char* const prachfmt[] = {"0", "1", "2", "3", "A1", "A2", "A3", "B1", "B4", "C0", "C2", "A1/B1", "A2/B2", "A3/B3"}; static const char* const prachfmt[] = {"0", "1", "2", "3", "A1", "A2", "A3", "B1", "B4", "C0", "C2", "A1/B1", "A2/B2", "A3/B3"};
......
...@@ -38,7 +38,7 @@ ...@@ -38,7 +38,7 @@
#include "common/utils/LOG/log.h" #include "common/utils/LOG/log.h"
#include "common/utils/LOG/vcd_signal_dumper.h" #include "common/utils/LOG/vcd_signal_dumper.h"
#include "T.h" #include "T.h"
int16_t nr_ru[2 * 839]; // quantized roots of unity c16_t nr_ru[839]; // quantized roots of unity
static uint32_t nr_ZC_inv[839]; // multiplicative inverse for roots u static uint32_t nr_ZC_inv[839]; // multiplicative inverse for roots u
uint16_t nr_du[838]; uint16_t nr_du[838];
...@@ -97,11 +97,8 @@ void nr_fill_du(uint16_t N_ZC, const uint16_t *prach_root_sequence_map) ...@@ -97,11 +97,8 @@ void nr_fill_du(uint16_t N_ZC, const uint16_t *prach_root_sequence_map)
} }
void compute_nr_prach_seq(uint8_t short_sequence, void compute_nr_prach_seq(uint8_t short_sequence, uint8_t num_sequences, uint8_t rootSequenceIndex, c16_t X_u[64][839])
uint8_t num_sequences, {
uint8_t rootSequenceIndex,
uint32_t X_u[64][839]){
// Compute DFT of x_u => X_u[k] = x_u(inv(u)*k)^* X_u[k] = exp(j\pi u*inv(u)*k*(inv(u)*k+1)/N_ZC) // Compute DFT of x_u => X_u[k] = x_u(inv(u)*k)^* X_u[k] = exp(j\pi u*inv(u)*k*(inv(u)*k+1)/N_ZC)
unsigned int k,inv_u,i; unsigned int k,inv_u,i;
int N_ZC; int N_ZC;
...@@ -147,7 +144,7 @@ void compute_nr_prach_seq(uint8_t short_sequence, ...@@ -147,7 +144,7 @@ void compute_nr_prach_seq(uint8_t short_sequence,
for (k=0; k<N_ZC; k++) { for (k=0; k<N_ZC; k++) {
// multiply by inverse of 2 (required since ru is exp[j 2\pi n]) // multiply by inverse of 2 (required since ru is exp[j 2\pi n])
X_u[i][k] = ((uint32_t*)nr_ru)[(((k*(1+(inv_u*k)))%N_ZC)*nr_ZC_inv[2])%N_ZC]; X_u[i][k] = nr_ru[(((k * (1 + (inv_u * k))) % N_ZC) * nr_ZC_inv[2]) % N_ZC];
} }
} }
...@@ -181,12 +178,12 @@ void init_nr_prach_tables(int N_ZC) ...@@ -181,12 +178,12 @@ void init_nr_prach_tables(int N_ZC)
// Compute quantized roots of unity // Compute quantized roots of unity
for (i=0; i<N_ZC; i++) { for (i=0; i<N_ZC; i++) {
nr_ru[i<<1] = (int16_t)(floor(32767.0*cos(2*M_PI*(double)i/N_ZC))); nr_ru[i].r = (int16_t)(floor(32767.0 * cos(2 * M_PI * (double)i / N_ZC)));
nr_ru[1+(i<<1)] = (int16_t)(floor(32767.0*sin(2*M_PI*(double)i/N_ZC))); nr_ru[i].i = (int16_t)(floor(32767.0 * sin(2 * M_PI * (double)i / N_ZC)));
#ifdef PRACH_DEBUG #ifdef PRACH_DEBUG
if (i<16) if (i<16)
printf("i %d : runity %d,%d\n",i,nr_ru[i<<1],nr_ru[1+(i<<1)]); printf("i %d : runity %d,%d\n", i, nr_ru[i].r, nr_ru[i].i);
#endif #endif
} }
......
...@@ -59,10 +59,7 @@ uint32_t nr_get_G(uint16_t nb_rb, uint16_t nb_symb_sch, uint8_t nb_re_dmrs, uint ...@@ -59,10 +59,7 @@ uint32_t nr_get_G(uint16_t nb_rb, uint16_t nb_symb_sch, uint8_t nb_re_dmrs, uint
uint32_t nr_get_E(uint32_t G, uint8_t C, uint8_t Qm, uint8_t Nl, uint8_t r); uint32_t nr_get_E(uint32_t G, uint8_t C, uint8_t Qm, uint8_t Nl, uint8_t r);
void compute_nr_prach_seq(uint8_t short_sequence, void compute_nr_prach_seq(uint8_t short_sequence, uint8_t num_sequences, uint8_t rootSequenceIndex, c16_t X_u[64][839]);
uint8_t num_sequences,
uint8_t rootSequenceIndex,
uint32_t X_u[64][839]);
void nr_fill_du(uint16_t N_ZC, const uint16_t *prach_root_sequence_map); void nr_fill_du(uint16_t N_ZC, const uint16_t *prach_root_sequence_map);
......
...@@ -886,7 +886,8 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue, ...@@ -886,7 +886,8 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
break; break;
} }
} }
if (dci_found==1) continue; if (dci_found == 1)
continue;
int dci_length = rel15->dci_length_options[k]; int dci_length = rel15->dci_length_options[k];
uint64_t dci_estimation[2]= {0}; uint64_t dci_estimation[2]= {0};
...@@ -920,8 +921,7 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue, ...@@ -920,8 +921,7 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
if (mb > (ue->dci_thres+30)) { if (mb > (ue->dci_thres+30)) {
LOG_W(PHY,"DCI false positive. Dropping DCI index %d. Mismatched bits: %d/%d. Current DCI threshold: %d\n",j,mb,L*108,ue->dci_thres); LOG_W(PHY,"DCI false positive. Dropping DCI index %d. Mismatched bits: %d/%d. Current DCI threshold: %d\n",j,mb,L*108,ue->dci_thres);
continue; continue;
} } else {
else {
dci_ind->SFN = proc->frame_rx; dci_ind->SFN = proc->frame_rx;
dci_ind->slot = proc->nr_slot_rx; dci_ind->slot = proc->nr_slot_rx;
dci_ind->dci_list[dci_ind->number_of_dcis].rnti = n_rnti; dci_ind->dci_list[dci_ind->number_of_dcis].rnti = n_rnti;
......
...@@ -515,15 +515,14 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, ...@@ -515,15 +515,14 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
stop_meas(&ue->generic_stat_bis[slot]); stop_meas(&ue->generic_stat_bis[slot]);
} }
if (cpumeas(CPUMEAS_GETSTATE)) if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY, LOG_D(PHY,
"[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n", "[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d Channel Comp %5.2f \n",
frame, frame,
nr_slot_rx, nr_slot_rx,
slot, slot,
symbol, symbol,
*log2_maxh, *log2_maxh,
proc->channel_level, ue->generic_stat_bis[slot].p_time / (cpuf * 1000.0));
ue->generic_stat_bis[slot].p_time / (cpuf * 1000.0));
start_meas(&ue->generic_stat_bis[slot]); start_meas(&ue->generic_stat_bis[slot]);
......
...@@ -208,8 +208,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, ...@@ -208,8 +208,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
int32_t sync_pos, sync_pos_frame; // k_ssb, N_ssb_crb, sync_pos2, int32_t sync_pos, sync_pos_frame; // k_ssb, N_ssb_crb, sync_pos2,
int32_t metric_tdd_ncp=0; int32_t metric_tdd_ncp=0;
uint8_t phase_tdd_ncp; uint8_t phase_tdd_ncp;
double im, re; int frame_id;
int is;
NR_DL_FRAME_PARMS *fp = &ue->frame_parms; NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
int ret=-1; int ret=-1;
...@@ -244,14 +243,13 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, ...@@ -244,14 +243,13 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
// initial sync performed on two successive frames, if pbch passes on first frame, no need to process second frame // initial sync performed on two successive frames, if pbch passes on first frame, no need to process second frame
// only one frame is used for symulation tools // only one frame is used for symulation tools
for(is=0; is<n_frames;is++) { for (frame_id = 0; frame_id < n_frames; frame_id++) {
/* process pss search on received buffer */
sync_pos = pss_synchro_nr(ue, frame_id, NO_RATE_CHANGE);
if (sync_pos < fp->nb_prefix_samples)
continue;
/* process pss search on received buffer */ ue->ssb_offset = sync_pos - fp->nb_prefix_samples;
sync_pos = pss_synchro_nr(ue, is, NO_RATE_CHANGE);
if (sync_pos < fp->nb_prefix_samples)
continue;
ue->ssb_offset = sync_pos - fp->nb_prefix_samples;
#ifdef DEBUG_INITIAL_SYNCH #ifdef DEBUG_INITIAL_SYNCH
LOG_I(PHY, "[UE%d] Initial sync : Estimated PSS position %d, Nid2 %d\n", ue->Mod_id, sync_pos, ue->common_vars.nid2); LOG_I(PHY, "[UE%d] Initial sync : Estimated PSS position %d, Nid2 %d\n", ue->Mod_id, sync_pos, ue->common_vars.nid2);
...@@ -269,23 +267,17 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, ...@@ -269,23 +267,17 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
// In SA we need to perform frequency offset correction until the end of buffer because we need to decode SIB1 // In SA we need to perform frequency offset correction until the end of buffer because we need to decode SIB1
// and we do not know yet in which slot it goes. // and we do not know yet in which slot it goes.
// start for offset correction for (int n = frame_id * fp->samples_per_frame; n < (frame_id + 1) * fp->samples_per_frame; n++) {
int start = is*fp->samples_per_frame;
// loop over samples
int end = start + fp->samples_per_frame;
for(int n=start; n<end; n++){
for (int ar=0; ar<fp->nb_antennas_rx; ar++) { for (int ar=0; ar<fp->nb_antennas_rx; ar++) {
re = ((double)(((short *)ue->common_vars.rxdata[ar]))[2*n]); const double re = ue->common_vars.rxdata[ar][n].r;
im = ((double)(((short *)ue->common_vars.rxdata[ar]))[2*n+1]); const double im = ue->common_vars.rxdata[ar][n].i;
((short *)ue->common_vars.rxdata[ar])[2*n] = (short)(round(re*cos(n*off_angle) - im*sin(n*off_angle))); ue->common_vars.rxdata[ar][n].r = (short)(round(re * cos(n * off_angle) - im * sin(n * off_angle)));
((short *)ue->common_vars.rxdata[ar])[2*n+1] = (short)(round(re*sin(n*off_angle) + im*cos(n*off_angle))); ue->common_vars.rxdata[ar][n].i = (short)(round(re * sin(n * off_angle) + im * cos(n * off_angle)));
} }
} }
} }
/* slop_fep function works for lte and takes into account begining of frame with prefix for subframe 0 */ /* slot_fep function works for lte and takes into account begining of frame with prefix for subframe 0 */
/* for NR this is not the case but slot_fep is still used for computing FFT of samples */ /* for NR this is not the case but slot_fep is still used for computing FFT of samples */
/* in order to achieve correct processing for NR prefix samples is forced to 0 and then restored after function call */ /* in order to achieve correct processing for NR prefix samples is forced to 0 and then restored after function call */
/* symbol number are from beginning of SS/PBCH blocks as below: */ /* symbol number are from beginning of SS/PBCH blocks as below: */
...@@ -295,21 +287,15 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, ...@@ -295,21 +287,15 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
/* rxdataF stores SS/PBCH from beginning of buffers in the same symbol order as in time domain */ /* rxdataF stores SS/PBCH from beginning of buffers in the same symbol order as in time domain */
for (int i = 0; i < NR_N_SYMBOLS_SSB; i++) for (int i = 0; i < NR_N_SYMBOLS_SSB; i++)
nr_slot_fep_init_sync(ue, nr_slot_fep_init_sync(ue, proc, i, frame_id * fp->samples_per_frame + ue->ssb_offset, false, rxdataF, link_type_dl);
proc,
i,
is * fp->samples_per_frame + ue->ssb_offset,
false,
rxdataF,
link_type_dl);
#ifdef DEBUG_INITIAL_SYNCH #ifdef DEBUG_INITIAL_SYNCH
LOG_I(PHY,"Calling sss detection (normal CP)\n"); LOG_I(PHY,"Calling sss detection (normal CP)\n");
#endif #endif
int freq_offset_sss = 0; int freq_offset_sss = 0;
ret = rx_sss_nr(ue, proc, &metric_tdd_ncp, &phase_tdd_ncp, &freq_offset_sss, rxdataF); bool ret_sss = rx_sss_nr(ue, proc, &metric_tdd_ncp, &phase_tdd_ncp, &freq_offset_sss, rxdataF);
ret = !ret_sss;
// digital compensation of FFO for SSB symbols // digital compensation of FFO for SSB symbols
if (ue->UE_fo_compensation){ if (ue->UE_fo_compensation){
double s_time = 1/(1.0e3*fp->samples_per_subframe); // sampling time double s_time = 1/(1.0e3*fp->samples_per_subframe); // sampling time
...@@ -317,19 +303,12 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, ...@@ -317,19 +303,12 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
// In SA we need to perform frequency offset correction until the end of buffer because we need to decode SIB1 // In SA we need to perform frequency offset correction until the end of buffer because we need to decode SIB1
// and we do not know yet in which slot it goes. // and we do not know yet in which slot it goes.
for (int n = frame_id * fp->samples_per_frame; n < (frame_id + 1) * fp->samples_per_frame; n++) {
// start for offset correction
int start = is*fp->samples_per_frame;
// loop over samples
int end = start + fp->samples_per_frame;
for(int n=start; n<end; n++){
for (int ar=0; ar<fp->nb_antennas_rx; ar++) { for (int ar=0; ar<fp->nb_antennas_rx; ar++) {
re = ((double)(((short *)ue->common_vars.rxdata[ar]))[2*n]); const double re = ue->common_vars.rxdata[ar][n].r;
im = ((double)(((short *)ue->common_vars.rxdata[ar]))[2*n+1]); const double im = ue->common_vars.rxdata[ar][n].i;
((short *)ue->common_vars.rxdata[ar])[2*n] = (short)(round(re*cos(n*off_angle) - im*sin(n*off_angle))); ue->common_vars.rxdata[ar][n].r = (short)(round(re * cos(n * off_angle) - im * sin(n * off_angle)));
((short *)ue->common_vars.rxdata[ar])[2*n+1] = (short)(round(re*sin(n*off_angle) + im*cos(n*off_angle))); ue->common_vars.rxdata[ar][n].i = (short)(round(re * sin(n * off_angle) + im * cos(n * off_angle)));
} }
} }
...@@ -351,7 +330,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, ...@@ -351,7 +330,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
int n_symb_prefix0 = (ue->symbol_offset/(7*(1<<mu)))+1; int n_symb_prefix0 = (ue->symbol_offset/(7*(1<<mu)))+1;
sync_pos_frame = n_symb_prefix0*(fp->ofdm_symbol_size + fp->nb_prefix_samples0)+(ue->symbol_offset-n_symb_prefix0)*(fp->ofdm_symbol_size + fp->nb_prefix_samples); sync_pos_frame = n_symb_prefix0*(fp->ofdm_symbol_size + fp->nb_prefix_samples0)+(ue->symbol_offset-n_symb_prefix0)*(fp->ofdm_symbol_size + fp->nb_prefix_samples);
// for a correct computation of frame number to sync with the one decoded at MIB we need to take into account in which of the n_frames we got sync // for a correct computation of frame number to sync with the one decoded at MIB we need to take into account in which of the n_frames we got sync
ue->init_sync_frame = n_frames - 1 - is; ue->init_sync_frame = n_frames - 1 - frame_id;
// compute the scramblingID_pdcch and the gold pdcch // compute the scramblingID_pdcch and the gold pdcch
ue->scramblingID_pdcch = fp->Nid_cell; ue->scramblingID_pdcch = fp->Nid_cell;
...@@ -409,7 +388,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, ...@@ -409,7 +388,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
#endif #endif
} }
if (ret == 0) break; if (ret == 0) break;
} }
} }
else { else {
ret = -1; ret = -1;
...@@ -533,7 +512,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, ...@@ -533,7 +512,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
nr_slot_fep_init_sync(ue, nr_slot_fep_init_sync(ue,
proc, proc,
l, // the UE PHY has no notion of the symbols to be monitored in the search space l, // the UE PHY has no notion of the symbols to be monitored in the search space
is*fp->samples_per_frame+phy_pdcch_config->sfn*fp->samples_per_frame+ue->rx_offset, frame_id * fp->samples_per_frame + phy_pdcch_config->sfn * fp->samples_per_frame + ue->rx_offset,
true, true,
rxdataF, rxdataF,
link_type_dl); link_type_dl);
...@@ -560,7 +539,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, ...@@ -560,7 +539,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
nr_slot_fep_init_sync(ue, nr_slot_fep_init_sync(ue,
proc, proc,
m, m,
is*fp->samples_per_frame+phy_pdcch_config->sfn*fp->samples_per_frame+ue->rx_offset, frame_id * fp->samples_per_frame + phy_pdcch_config->sfn * fp->samples_per_frame + ue->rx_offset,
true, true,
rxdataF, rxdataF,
link_type_dl); link_type_dl);
......
...@@ -62,20 +62,18 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, int frame, uint8_t ...@@ -62,20 +62,18 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, int frame, uint8_t
uint16_t rootSequenceIndex, prach_fmt_id, NCS, preamble_offset = 0; uint16_t rootSequenceIndex, prach_fmt_id, NCS, preamble_offset = 0;
const uint16_t *prach_root_sequence_map; const uint16_t *prach_root_sequence_map;
uint16_t preamble_shift = 0, preamble_index0, n_shift_ra, n_shift_ra_bar, d_start=INT16_MAX, numshift, N_ZC, u, offset, offset2, first_nonzero_root_idx; uint16_t preamble_shift = 0, preamble_index0, n_shift_ra, n_shift_ra_bar, d_start=INT16_MAX, numshift, N_ZC, u, offset, offset2, first_nonzero_root_idx;
int16_t prach_tmp[(4688+4*24576)*4*2] __attribute__((aligned(32))) = {0}; c16_t prach[(4688 + 4 * 24576) * 2] __attribute__((aligned(32))) = {0};
int16_t prachF_tmp[(4688+4*24576)*4*2] __attribute__((aligned(32))) = {0}; int16_t prachF_tmp[(4688+4*24576)*4*2] __attribute__((aligned(32))) = {0};
int16_t Ncp = 0, amp, *prach, *prach2, *prachF, *Xu; int16_t Ncp = 0;
int32_t Xu_re, Xu_im;
int prach_start, prach_sequence_length, i, prach_len, dftlen, mu, kbar, K, n_ra_prb, k, prachStartSymbol, sample_offset_slot; int prach_start, prach_sequence_length, i, prach_len, dftlen, mu, kbar, K, n_ra_prb, k, prachStartSymbol, sample_offset_slot;
fd_occasion = 0; fd_occasion = 0;
prach_len = 0; prach_len = 0;
dftlen = 0; dftlen = 0;
first_nonzero_root_idx = 0; first_nonzero_root_idx = 0;
prach = prach_tmp; int16_t amp = ue->prach_vars[gNB_id]->amp;
amp = ue->prach_vars[gNB_id]->amp; int16_t *prachF = prachF_tmp;
prachF = prachF_tmp;
Mod_id = ue->Mod_id; Mod_id = ue->Mod_id;
prach_sequence_length = nrUE_config->prach_config.prach_sequence_length; prach_sequence_length = nrUE_config->prach_config.prach_sequence_length;
N_ZC = (prach_sequence_length == 0) ? 839:139; N_ZC = (prach_sequence_length == 0) ? 839:139;
...@@ -390,9 +388,9 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, int frame, uint8_t ...@@ -390,9 +388,9 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, int frame, uint8_t
* *
*********************************************************/ *********************************************************/
Xu = (int16_t*)ue->X_u[preamble_offset-first_nonzero_root_idx]; c16_t *Xu = ue->X_u[preamble_offset - first_nonzero_root_idx];
#if defined (PRACH_WRITE_OUTPUT_DEBUG) #if defined (PRACH_WRITE_OUTPUT_DEBUG)
LOG_M("X_u.m", "X_u", (int16_t*)ue->X_u[preamble_offset-first_nonzero_root_idx], N_ZC, 1, 1); LOG_M("X_u.m", "X_u", (int16_t*)ue->X_u[preamble_offset-first_nonzero_root_idx], N_ZC, 1, 1);
#endif #endif
...@@ -400,11 +398,10 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, int frame, uint8_t ...@@ -400,11 +398,10 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, int frame, uint8_t
if (offset2 >= N_ZC) if (offset2 >= N_ZC)
offset2 -= N_ZC; offset2 -= N_ZC;
const int32_t Xu_re = (Xu[offset].r * amp) >> 15;
Xu_re = (((int32_t)Xu[offset<<1]*amp)>>15); const int32_t Xu_im = (Xu[offset].i * amp) >> 15;
Xu_im = (((int32_t)Xu[1+(offset<<1)]*amp)>>15); prachF[k++] = (Xu_re * nr_ru[offset2].r - Xu_im * nr_ru[offset2].i) >> 15;
prachF[k++]= ((Xu_re*nr_ru[offset2<<1]) - (Xu_im*nr_ru[1+(offset2<<1)]))>>15; prachF[k++] = (Xu_im * nr_ru[offset2].r + Xu_re * nr_ru[offset2].i) >> 15;
prachF[k++]= ((Xu_im*nr_ru[offset2<<1]) + (Xu_re*nr_ru[1+(offset2<<1)]))>>15;
if (k==dftlen) k=0; if (k==dftlen) k=0;
} }
...@@ -415,78 +412,78 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, int frame, uint8_t ...@@ -415,78 +412,78 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, int frame, uint8_t
#endif #endif
// This is after cyclic prefix // This is after cyclic prefix
prach2 = prach+(2*Ncp); // times 2 for complex samples c16_t *prach2 = prach + Ncp;
const idft_size_idx_t idft_size = get_idft(dftlen); const idft_size_idx_t idft_size = get_idft(dftlen);
idft(idft_size, prachF, prach, 1); idft(idft_size, prachF, (int16_t *)prach, 1);
memmove(prach2, prach, (dftlen<<2)); memmove(prach2, prach, (dftlen << 2));
if (prach_sequence_length == 0) { if (prach_sequence_length == 0) {
if (prach_fmt_id == 0) { if (prach_fmt_id == 0) {
// here we have | empty | Prach | // here we have | empty | Prach |
memcpy(prach, prach+(dftlen<<1), (Ncp<<2)); memcpy(prach, prach + dftlen, (Ncp << 2));
// here we have | Prefix | Prach | // here we have | Prefix | Prach |
prach_len = dftlen+Ncp; prach_len = dftlen + Ncp;
} else if (prach_fmt_id == 1) { } else if (prach_fmt_id == 1) {
// here we have | empty | Prach | empty | // here we have | empty | Prach | empty |
memcpy(prach2+(dftlen<<1), prach2, (dftlen<<2)); memcpy(prach2 + dftlen, prach2, (dftlen << 2));
// here we have | empty | Prach | Prach | // here we have | empty | Prach | Prach |
memcpy(prach, prach+(dftlen<<2), (Ncp<<2)); memcpy(prach, prach + dftlen * 2, (Ncp << 2));
// here we have | Prefix | Prach | Prach | // here we have | Prefix | Prach | Prach |
prach_len = (dftlen*2)+Ncp; prach_len = (dftlen * 2) + Ncp;
} else if (prach_fmt_id == 2 || prach_fmt_id == 3) { } else if (prach_fmt_id == 2 || prach_fmt_id == 3) {
// here we have | empty | Prach | empty | empty | empty | // here we have | empty | Prach | empty | empty | empty |
memcpy(prach2+(dftlen<<1), prach2, (dftlen<<2)); memcpy(prach2 + dftlen, prach2, (dftlen << 2));
// here we have | empty | Prach | Prach | empty | empty | // here we have | empty | Prach | Prach | empty | empty |
memcpy(prach2+(dftlen<<2), prach2, (dftlen<<3)); memcpy(prach2 + dftlen * 2, prach2, (dftlen << 3));
// here we have | empty | Prach | Prach | Prach | Prach | // here we have | empty | Prach | Prach | Prach | Prach |
memcpy(prach, prach+(dftlen<<3), (Ncp<<2)); memcpy(prach, prach + dftlen * 4, (Ncp << 2));
// here we have | Prefix | Prach | Prach | Prach | Prach | // here we have | Prefix | Prach | Prach | Prach | Prach |
prach_len = (dftlen*4)+Ncp; prach_len = (dftlen * 4) + Ncp;
} }
} else { // short PRACH sequence } else { // short PRACH sequence
if (prach_fmt_id == 9) { if (prach_fmt_id == 9) {
// here we have | empty | Prach | // here we have | empty | Prach |
memcpy(prach, prach+(dftlen<<1), (Ncp<<2)); memcpy(prach, prach + dftlen, (Ncp << 2));
// here we have | Prefix | Prach | // here we have | Prefix | Prach |
prach_len = (dftlen*1)+Ncp; prach_len = (dftlen*1)+Ncp;
} else if (prach_fmt_id == 4 || prach_fmt_id == 7) { } else if (prach_fmt_id == 4 || prach_fmt_id == 7) {
// here we have | empty | Prach | empty | // here we have | empty | Prach | empty |
memcpy(prach2+(dftlen<<1), prach2, (dftlen<<2)); memcpy(prach2 + dftlen, prach2, (dftlen << 2));
// here we have | empty | Prach | Prach | // here we have | empty | Prach | Prach |
memcpy(prach, prach+(dftlen<<1), (Ncp<<2)); memcpy(prach, prach+(dftlen<<1), (Ncp<<2));
// here we have | Prefix | Prach | Prach | // here we have | Prefix | Prach | Prach |
prach_len = (dftlen*2)+Ncp; prach_len = (dftlen*2)+Ncp;
} else if (prach_fmt_id == 5 || prach_fmt_id == 10) { // 4xdftlen } else if (prach_fmt_id == 5 || prach_fmt_id == 10) { // 4xdftlen
// here we have | empty | Prach | empty | empty | empty | // here we have | empty | Prach | empty | empty | empty |
memcpy(prach2+(dftlen<<1), prach2, (dftlen<<2)); memcpy(prach2 + dftlen, prach2, (dftlen << 2));
// here we have | empty | Prach | Prach | empty | empty | // here we have | empty | Prach | Prach | empty | empty |
memcpy(prach2+(dftlen<<2), prach2, (dftlen<<3)); memcpy(prach2 + dftlen * 2, prach2, (dftlen << 3));
// here we have | empty | Prach | Prach | Prach | Prach | // here we have | empty | Prach | Prach | Prach | Prach |
memcpy(prach, prach+(dftlen<<1), (Ncp<<2)); memcpy(prach, prach + dftlen, (Ncp << 2));
// here we have | Prefix | Prach | Prach | Prach | Prach | // here we have | Prefix | Prach | Prach | Prach | Prach |
prach_len = (dftlen*4)+Ncp; prach_len = (dftlen*4)+Ncp;
} else if (prach_fmt_id == 6) { // 6xdftlen } else if (prach_fmt_id == 6) { // 6xdftlen
// here we have | empty | Prach | empty | empty | empty | empty | empty | // here we have | empty | Prach | empty | empty | empty | empty | empty |
memcpy(prach2+(dftlen<<1), prach2, (dftlen<<2)); memcpy(prach2 + dftlen, prach2, (dftlen << 2));
// here we have | empty | Prach | Prach | empty | empty | empty | empty | // here we have | empty | Prach | Prach | empty | empty | empty | empty |
memcpy(prach2+(dftlen<<2), prach2, (dftlen<<3)); memcpy(prach2 + dftlen * 2, prach2, (dftlen << 3));
// here we have | empty | Prach | Prach | Prach | Prach | empty | empty | // here we have | empty | Prach | Prach | Prach | Prach | empty | empty |
memcpy(prach2+(dftlen<<3), prach2, (dftlen<<3)); memcpy(prach2 + dftlen * 4, prach2, (dftlen << 3));
// here we have | empty | Prach | Prach | Prach | Prach | Prach | Prach | // here we have | empty | Prach | Prach | Prach | Prach | Prach | Prach |
memcpy(prach, prach+(dftlen<<1), (Ncp<<2)); memcpy(prach, prach + dftlen, (Ncp << 2));
// here we have | Prefix | Prach | Prach | Prach | Prach | Prach | Prach | // here we have | Prefix | Prach | Prach | Prach | Prach | Prach | Prach |
prach_len = (dftlen*6)+Ncp; prach_len = (dftlen*6)+Ncp;
} else if (prach_fmt_id == 8) { // 12xdftlen } else if (prach_fmt_id == 8) { // 12xdftlen
// here we have | empty | Prach | empty | empty | empty | empty | empty | empty | empty | empty | empty | empty | empty | // here we have | empty | Prach | empty | empty | empty | empty | empty | empty | empty | empty | empty | empty | empty |
memcpy(prach2+(dftlen<<1), prach2, (dftlen<<2)); memcpy(prach2 + dftlen, prach2, (dftlen << 2));
// here we have | empty | Prach | Prach | empty | empty | empty | empty | empty | empty | empty | empty | empty | empty | // here we have | empty | Prach | Prach | empty | empty | empty | empty | empty | empty | empty | empty | empty | empty |
memcpy(prach2+(dftlen<<2), prach2, (dftlen<<3)); memcpy(prach2 + dftlen * 2, prach2, (dftlen << 3));
// here we have | empty | Prach | Prach | Prach | Prach | empty | empty | empty | empty | empty | empty | empty | empty | // here we have | empty | Prach | Prach | Prach | Prach | empty | empty | empty | empty | empty | empty | empty | empty |
memcpy(prach2+(dftlen<<3), prach2, (dftlen<<3)); memcpy(prach2 + dftlen * 4, prach2, (dftlen << 3));
// here we have | empty | Prach | Prach | Prach | Prach | Prach | Prach | empty | empty | empty | empty | empty | empty | // here we have | empty | Prach | Prach | Prach | Prach | Prach | Prach | empty | empty | empty | empty | empty | empty |
memcpy(prach2+(dftlen<<1)*6, prach2, (dftlen<<2)*6); memcpy(prach2 + dftlen * 6, prach2, (dftlen << 2) * 6);
// here we have | empty | Prach | Prach | Prach | Prach | Prach | Prach | Prach | Prach | Prach | Prach | Prach | Prach | // here we have | empty | Prach | Prach | Prach | Prach | Prach | Prach | Prach | Prach | Prach | Prach | Prach | Prach |
memcpy(prach, prach+(dftlen<<1), (Ncp<<2)); memcpy(prach, prach + dftlen, (Ncp << 2));
// here we have | Prefix | Prach | Prach | Prach | Prach | Prach | Prach | Prach | Prach | Prach | Prach | Prach | Prach | // here we have | Prefix | Prach | Prach | Prach | Prach | Prach | Prach | Prach | Prach | Prach | Prach | Prach | Prach |
prach_len = (dftlen*12)+Ncp; prach_len = (dftlen*12)+Ncp;
} }
...@@ -499,18 +496,10 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, int frame, uint8_t ...@@ -499,18 +496,10 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, int frame, uint8_t
prach_len); prach_len);
#endif #endif
for (i=0; i<prach_len; i++) { for (i = 0; i < prach_len; i++)
((int16_t*)(&ue->common_vars.txdata[0][prach_start]))[2*i] = prach[2*i]; ue->common_vars.txData[0][prach_start + i] = prach[i];
((int16_t*)(&ue->common_vars.txdata[0][prach_start]))[2*i+1] = prach[2*i+1];
}
//printf("----------------------\n");
//for(int ii = prach_start; ii<2*(prach_start + prach_len); ii++){
// printf("PRACH rx data[%d] = %d\n", ii, ue->common_vars.txdata[0][ii]);
//}
//printf(" \n");
#ifdef PRACH_WRITE_OUTPUT_DEBUG #ifdef PRACH_WRITE_OUTPUT_DEBUG
LOG_M("prach_tx0.m", "prachtx0", prach+(Ncp<<1), prach_len-Ncp, 1, 1); LOG_M("prach_tx0.m", "prachtx0", prach+(Ncp<<1), prach_len-Ncp, 1, 1);
LOG_M("Prach_txsig.m","txs",(int16_t*)(&ue->common_vars.txdata[0][prach_start]), 2*(prach_start+prach_len), 1, 1) LOG_M("Prach_txsig.m","txs",(int16_t*)(&ue->common_vars.txdata[0][prach_start]), 2*(prach_start+prach_len), 1, 1)
#endif #endif
......
...@@ -238,20 +238,21 @@ void nr_pusch_codeword_scrambling(uint8_t *in, ...@@ -238,20 +238,21 @@ void nr_pusch_codeword_scrambling(uint8_t *in,
*/ */
void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
unsigned char harq_pid, const unsigned char harq_pid,
uint32_t frame, const uint32_t frame,
uint8_t slot, const uint8_t slot,
int gNB_id, const int gNB_id,
nr_phy_data_tx_t *phy_data); nr_phy_data_tx_t *phy_data,
c16_t **txdataF);
/** \brief This function does IFFT for PUSCH /** \brief This function does IFFT for PUSCH
*/ */
uint8_t nr_ue_pusch_common_procedures(PHY_VARS_NR_UE *UE, uint8_t nr_ue_pusch_common_procedures(PHY_VARS_NR_UE *UE,
uint8_t slot, const uint8_t slot,
NR_DL_FRAME_PARMS *frame_parms, const NR_DL_FRAME_PARMS *frame_parms,
uint8_t Nl); const uint8_t n_antenna_ports,
c16_t **txdataF);
int8_t clean_UE_ulsch(PHY_VARS_NR_UE *UE, uint8_t gNB_id); int8_t clean_UE_ulsch(PHY_VARS_NR_UE *UE, uint8_t gNB_id);
......
...@@ -107,12 +107,13 @@ void nr_pusch_codeword_scrambling(uint8_t *in, ...@@ -107,12 +107,13 @@ void nr_pusch_codeword_scrambling(uint8_t *in,
} }
void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
unsigned char harq_pid, const unsigned char harq_pid,
uint32_t frame, const uint32_t frame,
uint8_t slot, const uint8_t slot,
int gNB_id, const int gNB_id,
nr_phy_data_tx_t *phy_data) { nr_phy_data_tx_t *phy_data,
c16_t **txdataF)
{
LOG_D(PHY,"nr_ue_ulsch_procedures hard_id %d %d.%d\n",harq_pid,frame,slot); LOG_D(PHY,"nr_ue_ulsch_procedures hard_id %d %d.%d\n",harq_pid,frame,slot);
int8_t Wf[2], Wt[2]; int8_t Wf[2], Wt[2];
...@@ -122,14 +123,13 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -122,14 +123,13 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
int sample_offsetF, N_RE_prime; int sample_offsetF, N_RE_prime;
NR_DL_FRAME_PARMS *frame_parms = &UE->frame_parms; NR_DL_FRAME_PARMS *frame_parms = &UE->frame_parms;
c16_t **txdataF = UE->common_vars.txdataF;
int N_PRB_oh = 0; // higher layer (RRC) parameter xOverhead in PUSCH-ServingCellConfig int N_PRB_oh = 0; // higher layer (RRC) parameter xOverhead in PUSCH-ServingCellConfig
uint16_t number_dmrs_symbols = 0; uint16_t number_dmrs_symbols = 0;
NR_UE_ULSCH_t *ulsch_ue = &phy_data->ulsch; NR_UE_ULSCH_t *ulsch_ue = &phy_data->ulsch;
NR_UL_UE_HARQ_t *harq_process_ul_ue = &UE->ul_harq_processes[harq_pid]; NR_UL_UE_HARQ_t *harq_process_ul_ue = &UE->ul_harq_processes[harq_pid];
nfapi_nr_ue_pusch_pdu_t *pusch_pdu = &ulsch_ue->pusch_pdu; const nfapi_nr_ue_pusch_pdu_t *pusch_pdu = &ulsch_ue->pusch_pdu;
int start_symbol = pusch_pdu->start_symbol_index; int start_symbol = pusch_pdu->start_symbol_index;
uint16_t ul_dmrs_symb_pos = pusch_pdu->ul_dmrs_symb_pos; uint16_t ul_dmrs_symb_pos = pusch_pdu->ul_dmrs_symb_pos;
...@@ -585,30 +585,17 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -585,30 +585,17 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
/////////// ///////////
//////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////
} }
uint8_t nr_ue_pusch_common_procedures(PHY_VARS_NR_UE *UE, uint8_t nr_ue_pusch_common_procedures(PHY_VARS_NR_UE *UE,
uint8_t slot, const uint8_t slot,
NR_DL_FRAME_PARMS *frame_parms, const NR_DL_FRAME_PARMS *frame_parms,
uint8_t n_antenna_ports) const uint8_t n_antenna_ports,
c16_t **txdataF)
{ {
/////////////////////////IFFT/////////////////////// const int tx_offset = frame_parms->get_samples_slot_timestamp(slot, frame_parms, 0);
///////////
int tx_offset = frame_parms->get_samples_slot_timestamp(slot, frame_parms, 0);
// clear the transmit data array for the current subframe
/*for (int aa=0; aa<UE->frame_parms.nb_antennas_tx; aa++) {
memset(&UE->common_vars.txdata[aa][tx_offset],0,UE->frame_parms.samples_per_slot*sizeof(int32_t));
//memset(&UE->common_vars.txdataF[aa][tx_offset],0,UE->frame_parms.samples_per_slot*sizeof(int32_t));
}*/
c16_t **txdata = UE->common_vars.txdata;
c16_t **txdataF = UE->common_vars.txdataF;
c16_t **txdata = UE->common_vars.txData;
for(int ap = 0; ap < n_antenna_ports; ap++) { for(int ap = 0; ap < n_antenna_ports; ap++) {
apply_nr_rotation_TX(frame_parms, apply_nr_rotation_TX(frame_parms,
txdataF[ap], txdataF[ap],
......
...@@ -50,12 +50,12 @@ ...@@ -50,12 +50,12 @@
//#define ONE_OVER_SQRT2 23170 // 32767/sqrt(2) = 23170 (ONE_OVER_SQRT2) //#define ONE_OVER_SQRT2 23170 // 32767/sqrt(2) = 23170 (ONE_OVER_SQRT2)
void nr_generate_pucch0(PHY_VARS_NR_UE *ue, void nr_generate_pucch0(const PHY_VARS_NR_UE *ue,
c16_t **txdataF, c16_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms, const NR_DL_FRAME_PARMS *frame_parms,
int16_t amp, const int16_t amp,
int nr_slot_tx, const int nr_slot_tx,
fapi_nr_ul_config_pucch_pdu *pucch_pdu) const fapi_nr_ul_config_pucch_pdu *pucch_pdu)
{ {
#ifdef DEBUG_NR_PUCCH_TX #ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch0] start function at slot(nr_slot_tx)=%d\n",nr_slot_tx); printf("\t [nr_generate_pucch0] start function at slot(nr_slot_tx)=%d\n",nr_slot_tx);
...@@ -168,12 +168,12 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue, ...@@ -168,12 +168,12 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
} }
} }
void nr_generate_pucch1(PHY_VARS_NR_UE *ue, void nr_generate_pucch1(const PHY_VARS_NR_UE *ue,
c16_t **txdataF, c16_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms, const NR_DL_FRAME_PARMS *frame_parms,
int16_t amp, const int16_t amp,
int nr_slot_tx, const int nr_slot_tx,
fapi_nr_ul_config_pucch_pdu *pucch_pdu) const fapi_nr_ul_config_pucch_pdu *pucch_pdu)
{ {
uint16_t m0 = pucch_pdu->initial_cyclic_shift; uint16_t m0 = pucch_pdu->initial_cyclic_shift;
uint64_t payload = pucch_pdu->payload; uint64_t payload = pucch_pdu->payload;
...@@ -652,12 +652,13 @@ static void nr_uci_encoding(uint64_t payload, ...@@ -652,12 +652,13 @@ static void nr_uci_encoding(uint64_t payload,
} }
//#if 0 //#if 0
void nr_generate_pucch2(PHY_VARS_NR_UE *ue, void nr_generate_pucch2(const PHY_VARS_NR_UE *ue,
c16_t **txdataF, c16_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms, const NR_DL_FRAME_PARMS *frame_parms,
int16_t amp, const int16_t amp,
int nr_slot_tx, const int nr_slot_tx,
fapi_nr_ul_config_pucch_pdu *pucch_pdu) { const fapi_nr_ul_config_pucch_pdu *pucch_pdu)
{
#ifdef DEBUG_NR_PUCCH_TX #ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch2] start function at slot(nr_slot_tx)=%d with payload=%lu and nr_bit=%d\n",nr_slot_tx, pucch_pdu->payload, pucch_pdu->n_bit); printf("\t [nr_generate_pucch2] start function at slot(nr_slot_tx)=%d with payload=%lu and nr_bit=%d\n",nr_slot_tx, pucch_pdu->payload, pucch_pdu->n_bit);
#endif #endif
...@@ -848,12 +849,13 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue, ...@@ -848,12 +849,13 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
free(btilde); free(btilde);
} }
//#if 0 //#if 0
void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue, void nr_generate_pucch3_4(const PHY_VARS_NR_UE *ue,
c16_t **txdataF, c16_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms, const NR_DL_FRAME_PARMS *frame_parms,
int16_t amp, const int16_t amp,
int nr_slot_tx, const int nr_slot_tx,
fapi_nr_ul_config_pucch_pdu *pucch_pdu) { const fapi_nr_ul_config_pucch_pdu *pucch_pdu)
{
#ifdef DEBUG_NR_PUCCH_TX #ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch3_4] start function at slot(nr_slot_tx)=%d with payload=%lu and nr_bit=%d\n", nr_slot_tx, pucch_pdu->payload, pucch_pdu->n_bit); printf("\t [nr_generate_pucch3_4] start function at slot(nr_slot_tx)=%d with payload=%lu and nr_bit=%d\n", nr_slot_tx, pucch_pdu->payload, pucch_pdu->n_bit);
#endif #endif
...@@ -1317,4 +1319,3 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue, ...@@ -1317,4 +1319,3 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
free(z_im); free(z_im);
free(btilde); free(btilde);
} }
...@@ -44,34 +44,33 @@ ...@@ -44,34 +44,33 @@
#include "T.h" #include "T.h"
#define ONE_OVER_SQRT2 23170 // 32767/sqrt(2) = 23170 (ONE_OVER_SQRT2) #define ONE_OVER_SQRT2 23170 // 32767/sqrt(2) = 23170 (ONE_OVER_SQRT2)
void nr_generate_pucch0(const PHY_VARS_NR_UE *ue,
void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
c16_t **txdataF, c16_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms, const NR_DL_FRAME_PARMS *frame_parms,
int16_t amp, const int16_t amp,
int nr_slot_tx, const int nr_slot_tx,
fapi_nr_ul_config_pucch_pdu *pucch_pdu); const fapi_nr_ul_config_pucch_pdu *pucch_pdu);
void nr_generate_pucch1(PHY_VARS_NR_UE *ue, void nr_generate_pucch1(const PHY_VARS_NR_UE *ue,
c16_t **txdataF, c16_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms, const NR_DL_FRAME_PARMS *frame_parms,
int16_t amp, const int16_t amp,
int nr_slot_tx, const int nr_slot_tx,
fapi_nr_ul_config_pucch_pdu *pucch_pdu); const fapi_nr_ul_config_pucch_pdu *pucch_pdu);
void nr_generate_pucch2(PHY_VARS_NR_UE *ue, void nr_generate_pucch2(const PHY_VARS_NR_UE *ue,
c16_t **txdataF, c16_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms, const NR_DL_FRAME_PARMS *frame_parms,
int16_t amp, const int16_t amp,
int nr_slot_tx, const int nr_slot_tx,
fapi_nr_ul_config_pucch_pdu *pucch_pdu); const fapi_nr_ul_config_pucch_pdu *pucch_pdu);
void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue, void nr_generate_pucch3_4(const PHY_VARS_NR_UE *ue,
c16_t **txdataF, c16_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms, const NR_DL_FRAME_PARMS *frame_parms,
int16_t amp, const int16_t amp,
int nr_slot_tx, const int nr_slot_tx,
fapi_nr_ul_config_pucch_pdu *pucch_pdu); const fapi_nr_ul_config_pucch_pdu *pucch_pdu);
// tables for mcs values for different payloads // tables for mcs values for different payloads
static const uint8_t table1_mcs[]={0,6,3,9}; static const uint8_t table1_mcs[]={0,6,3,9};
......
...@@ -432,7 +432,7 @@ int generate_srs_nr(nfapi_nr_srs_pdu_t *srs_config_pdu, ...@@ -432,7 +432,7 @@ int generate_srs_nr(nfapi_nr_srs_pdu_t *srs_config_pdu,
* send srs according to current configuration * send srs according to current configuration
* *
*********************************************************************/ *********************************************************************/
int ue_srs_procedures_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc) int ue_srs_procedures_nr(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, c16_t **txdataF)
{ {
if(!ue->srs_vars[0]->active) { if(!ue->srs_vars[0]->active) {
return -1; return -1;
...@@ -471,8 +471,15 @@ int ue_srs_procedures_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc) ...@@ -471,8 +471,15 @@ int ue_srs_procedures_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc)
NR_DL_FRAME_PARMS *frame_parms = &(ue->frame_parms); NR_DL_FRAME_PARMS *frame_parms = &(ue->frame_parms);
uint16_t symbol_offset = (frame_parms->symbols_per_slot - 1 - srs_config_pdu->time_start_position)*frame_parms->ofdm_symbol_size; uint16_t symbol_offset = (frame_parms->symbols_per_slot - 1 - srs_config_pdu->time_start_position)*frame_parms->ofdm_symbol_size;
if (generate_srs_nr(srs_config_pdu, frame_parms, (int32_t **)ue->common_vars.txdataF, symbol_offset, ue->nr_srs_info, if (generate_srs_nr(srs_config_pdu,
AMP, proc->frame_tx, proc->nr_slot_tx) == 0) { frame_parms,
(int32_t **)txdataF,
symbol_offset,
ue->nr_srs_info,
AMP,
proc->frame_tx,
proc->nr_slot_tx)
== 0) {
return 0; return 0;
} else { } else {
return -1; return -1;
......
...@@ -177,7 +177,7 @@ int is_srs_period_nr(SRS_Resource_t *p_SRS_Resource, ...@@ -177,7 +177,7 @@ int is_srs_period_nr(SRS_Resource_t *p_SRS_Resource,
@param current gNB_id identifier @param current gNB_id identifier
@returns 0 if srs is transmitted -1 otherwise */ @returns 0 if srs is transmitted -1 otherwise */
int ue_srs_procedures_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc); int ue_srs_procedures_nr(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, c16_t **txdataF);
#undef EXTERN #undef EXTERN
#undef INIT_VARIABLES_SRS_MODULATION_NR_H #undef INIT_VARIABLES_SRS_MODULATION_NR_H
......
...@@ -350,24 +350,23 @@ static int pss_sss_extract_nr(PHY_VARS_NR_UE *phy_vars_ue, ...@@ -350,24 +350,23 @@ static int pss_sss_extract_nr(PHY_VARS_NR_UE *phy_vars_ue,
} }
/******************************************************************* /*******************************************************************
* *
* NAME : rx_sss_nr * NAME : rx_sss_nr
* *
* PARAMETERS : none * PARAMETERS : none
* *
* RETURN : Set Nid_cell in ue context * RETURN : Set Nid_cell in ue context, return true if cell detected
* *
* DESCRIPTION : Determine element Nid1 of cell identity * DESCRIPTION : Determine element Nid1 of cell identity
* so Nid_cell in ue context is set according to Nid1 & Nid2 * so Nid_cell in ue context is set according to Nid1 & Nid2
* *
*********************************************************************/ *********************************************************************/
bool rx_sss_nr(PHY_VARS_NR_UE *ue,
int rx_sss_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc,
UE_nr_rxtx_proc_t *proc, int32_t *tot_metric,
int32_t *tot_metric, uint8_t *phase_max,
uint8_t *phase_max, int *freq_offset_sss,
int *freq_offset_sss, c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
{ {
uint8_t i; uint8_t i;
c16_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR]; c16_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR];
...@@ -506,13 +505,13 @@ int rx_sss_nr(PHY_VARS_NR_UE *ue, ...@@ -506,13 +505,13 @@ int rx_sss_nr(PHY_VARS_NR_UE *ue,
//#endif //#endif
if (Nid1==N_ID_1_NUMBER) if (Nid1==N_ID_1_NUMBER)
return -1; return false;
int re = 0; int re = 0;
int im = 0; int im = 0;
if (Nid1 == N_ID_1_NUMBER) { if (Nid1 == N_ID_1_NUMBER) {
LOG_I(PHY,"Failed to detect SSS after PSS\n"); LOG_I(PHY,"Failed to detect SSS after PSS\n");
return -1; return false;
} }
d = (int16_t *)&d_sss[Nid2][Nid1]; d = (int16_t *)&d_sss[Nid2][Nid1];
for(i = 0; i<LENGTH_SSS_NR; i++) { for(i = 0; i<LENGTH_SSS_NR; i++) {
...@@ -523,8 +522,16 @@ int rx_sss_nr(PHY_VARS_NR_UE *ue, ...@@ -523,8 +522,16 @@ int rx_sss_nr(PHY_VARS_NR_UE *ue,
*freq_offset_sss = (int)(ffo_sss*frame_parms->subcarrier_spacing); *freq_offset_sss = (int)(ffo_sss*frame_parms->subcarrier_spacing);
double ffo_pss = ((double)ue->common_vars.freq_offset)/frame_parms->subcarrier_spacing; double ffo_pss = ((double)ue->common_vars.freq_offset)/frame_parms->subcarrier_spacing;
LOG_I(NR_PHY, "ffo_pss %f (%i Hz), ffo_sss %f (%i Hz), ffo_pss+ffo_sss %f (%i Hz)\n", LOG_W(NR_PHY,
ffo_pss, (int)(ffo_pss*frame_parms->subcarrier_spacing), ffo_sss, *freq_offset_sss, ffo_pss+ffo_sss, (int)((ffo_pss+ffo_sss)*frame_parms->subcarrier_spacing)); "ffo_pss %f (%i Hz), ffo_sss %f (%i Hz), ffo_pss+ffo_sss %f (%i Hz), nid1: %d, nid2: %d\n",
ffo_pss,
return(0); (int)(ffo_pss * frame_parms->subcarrier_spacing),
ffo_sss,
*freq_offset_sss,
ffo_pss + ffo_sss,
(int)((ffo_pss + ffo_sss) * frame_parms->subcarrier_spacing),
Nid1,
Nid2);
return true;
} }
...@@ -83,11 +83,7 @@ void multadd_real_vector_complex_scalar(const int16_t *x, const int16_t *alpha, ...@@ -83,11 +83,7 @@ void multadd_real_vector_complex_scalar(const int16_t *x, const int16_t *alpha,
} }
} }
void rotate_cpx_vector(c16_t *x, void rotate_cpx_vector(const c16_t *const x, const c16_t *const alpha, c16_t *y, uint32_t N, uint16_t output_shift)
c16_t *alpha,
c16_t *y,
uint32_t N,
uint16_t output_shift)
{ {
// multiply a complex vector with a complex value (alpha) // multiply a complex vector with a complex value (alpha)
// stores result in y // stores result in y
...@@ -98,12 +94,41 @@ void rotate_cpx_vector(c16_t *x, ...@@ -98,12 +94,41 @@ void rotate_cpx_vector(c16_t *x,
// output is 32 bytes aligned, but not the input // output is 32 bytes aligned, but not the input
const c16_t for_re={alpha->r, -alpha->i}; const c16_t for_re={alpha->r, -alpha->i};
__m256i const alpha_for_real = simde_mm256_set1_epi32(*(uint32_t*)&for_re); const __m256i alpha_for_real = simde_mm256_set1_epi32(*(uint32_t *)&for_re);
const c16_t for_im={alpha->i, alpha->r}; const c16_t for_im={alpha->i, alpha->r};
__m256i const alpha_for_im= simde_mm256_set1_epi32(*(uint32_t*)&for_im); const __m256i alpha_for_im = simde_mm256_set1_epi32(*(uint32_t *)&for_im);
__m256i const perm_mask = const __m256i perm_mask = simde_mm256_set_epi8(31,
simde_mm256_set_epi8(31,30,23,22,29,28,21,20,27,26,19,18,25,24,17,16, 30,
15,14,7,6,13,12,5,4,11,10,3,2,9,8,1,0); 23,
22,
29,
28,
21,
20,
27,
26,
19,
18,
25,
24,
17,
16,
15,
14,
7,
6,
13,
12,
5,
4,
11,
10,
3,
2,
9,
8,
1,
0);
__m256i* xd= (__m256i*)x; __m256i* xd= (__m256i*)x;
const __m256i *end=xd+N/8; const __m256i *end=xd+N/8;
for( __m256i* yd = (__m256i *)y; xd<end ; yd++, xd++) { for( __m256i* yd = (__m256i *)y; xd<end ; yd++, xd++) {
......
...@@ -455,6 +455,9 @@ static void timeSignal (OAIgraph_t *graph, PHY_VARS_gNB *phy_vars_gnb, RU_t *phy ...@@ -455,6 +455,9 @@ static void timeSignal (OAIgraph_t *graph, PHY_VARS_gNB *phy_vars_gnb, RU_t *phy
static void timeResponse (OAIgraph_t *graph, scopeData_t *p, int nb_UEs) { static void timeResponse (OAIgraph_t *graph, scopeData_t *p, int nb_UEs) {
const int len = p->gNB->frame_parms.ofdm_symbol_size; const int len = p->gNB->frame_parms.ofdm_symbol_size;
if (!len)
// gnb not yet initialized, many race conditions in the scope
return;
#ifdef WEBSRVSCOPE #ifdef WEBSRVSCOPE
websrv_scopedata_msg_t *msg = NULL; websrv_scopedata_msg_t *msg = NULL;
websrv_nf_getdata(graph->graph, 0, &msg); websrv_nf_getdata(graph->graph, 0, &msg);
......
...@@ -34,8 +34,10 @@ ...@@ -34,8 +34,10 @@
#ifdef __cplusplus #ifdef __cplusplus
#include <atomic> #include <atomic>
#ifndef _Atomic
#define _Atomic(X) std::atomic< X > #define _Atomic(X) std::atomic< X >
#endif #endif
#endif
#include <openair1/PHY/defs_gNB.h> #include <openair1/PHY/defs_gNB.h>
#include <openair1/PHY/defs_nr_UE.h> #include <openair1/PHY/defs_nr_UE.h>
......
...@@ -741,12 +741,7 @@ This function performs componentwise multiplication of a vector with a complex s ...@@ -741,12 +741,7 @@ This function performs componentwise multiplication of a vector with a complex s
The function implemented is : \f$\mathbf{y} = \alpha\mathbf{x}\f$ The function implemented is : \f$\mathbf{y} = \alpha\mathbf{x}\f$
*/ */
void rotate_cpx_vector(c16_t *x, void rotate_cpx_vector(const c16_t *const x, const c16_t *const alpha, c16_t *y, uint32_t N, uint16_t output_shift);
c16_t *alpha,
c16_t *y,
uint32_t N,
uint16_t output_shift);
//cadd_sv.c //cadd_sv.c
......
...@@ -679,7 +679,7 @@ typedef struct PHY_VARS_gNB_s { ...@@ -679,7 +679,7 @@ typedef struct PHY_VARS_gNB_s {
uint32_t ****nr_gold_prs; uint32_t ****nr_gold_prs;
/// PRACH root sequence /// PRACH root sequence
uint32_t X_u[64][839]; c16_t X_u[64][839];
/// OFDM symbol offset divisor for UL /// OFDM symbol offset divisor for UL
uint32_t ofdm_offset_divisor; uint32_t ofdm_offset_divisor;
......
...@@ -221,7 +221,7 @@ typedef struct { ...@@ -221,7 +221,7 @@ typedef struct {
/// For IFFT_FPGA this points to the same memory as PHY_vars->tx_vars[a].TX_DMA_BUFFER. /// For IFFT_FPGA this points to the same memory as PHY_vars->tx_vars[a].TX_DMA_BUFFER.
/// - first index: tx antenna [0..nb_antennas_tx[ /// - first index: tx antenna [0..nb_antennas_tx[
/// - second index: sample [0..FRAME_LENGTH_COMPLEX_SAMPLES[ /// - second index: sample [0..FRAME_LENGTH_COMPLEX_SAMPLES[
c16_t **txdata; c16_t **txData;
/// \brief Holds the transmit data in the frequency domain. /// \brief Holds the transmit data in the frequency domain.
/// For IFFT_FPGA this points to the same memory as PHY_vars->rx_vars[a].RX_DMA_BUFFER. /// For IFFT_FPGA this points to the same memory as PHY_vars->rx_vars[a].RX_DMA_BUFFER.
/// - first index: tx antenna [0..nb_antennas_tx[ /// - first index: tx antenna [0..nb_antennas_tx[
...@@ -485,8 +485,8 @@ typedef struct { ...@@ -485,8 +485,8 @@ typedef struct {
// PRS sequence per gNB, per resource // PRS sequence per gNB, per resource
uint32_t *****nr_gold_prs; uint32_t *****nr_gold_prs;
uint32_t X_u[64][839]; c16_t X_u[64][839];
// flag to activate PRB based averaging of channel estimates // flag to activate PRB based averaging of channel estimates
// when off, defaults to frequency domain interpolation // when off, defaults to frequency domain interpolation
...@@ -664,6 +664,24 @@ typedef struct { ...@@ -664,6 +664,24 @@ typedef struct {
int tx_wait_for_dlsch[NR_MAX_SLOTS_PER_FRAME]; int tx_wait_for_dlsch[NR_MAX_SLOTS_PER_FRAME];
} PHY_VARS_NR_UE; } PHY_VARS_NR_UE;
typedef struct {
openair0_timestamp timestamp_tx;
int gNB_id;
/// NR slot index within frame_tx [0 .. slots_per_frame - 1] to act upon for transmission
int nr_slot_tx;
int rx_slot_type;
/// NR slot index within frame_rx [0 .. slots_per_frame - 1] to act upon for transmission
int nr_slot_rx;
int tx_slot_type;
//#endif
/// frame to act upon for transmission
int frame_tx;
/// frame to act upon for reception
int frame_rx;
int frame_number_4lsb;
int decoded_frame_rx;
} UE_nr_rxtx_proc_t;
typedef struct nr_phy_data_tx_s { typedef struct nr_phy_data_tx_s {
NR_UE_ULSCH_t ulsch; NR_UE_ULSCH_t ulsch;
NR_UE_PUCCH pucch_vars; NR_UE_PUCCH pucch_vars;
......
...@@ -131,10 +131,10 @@ typedef struct { ...@@ -131,10 +131,10 @@ typedef struct {
typedef struct NR_DL_FRAME_PARMS NR_DL_FRAME_PARMS; typedef struct NR_DL_FRAME_PARMS NR_DL_FRAME_PARMS;
typedef uint32_t (*get_samples_per_slot_t)(int slot, NR_DL_FRAME_PARMS* fp); typedef uint32_t (*get_samples_per_slot_t)(int slot, const NR_DL_FRAME_PARMS *fp);
typedef uint32_t (*get_slot_from_timestamp_t)(openair0_timestamp timestamp_rx, NR_DL_FRAME_PARMS* fp); typedef uint32_t (*get_slot_from_timestamp_t)(openair0_timestamp timestamp_rx, const NR_DL_FRAME_PARMS *fp);
typedef uint32_t (*get_samples_slot_timestamp_t)(int slot, NR_DL_FRAME_PARMS* fp, uint8_t sl_ahead); typedef uint32_t (*get_samples_slot_timestamp_t)(int slot, const NR_DL_FRAME_PARMS *fp, uint8_t sl_ahead);
struct NR_DL_FRAME_PARMS { struct NR_DL_FRAME_PARMS {
/// frequency range /// frequency range
......
#ifndef __thread_NR_UE__
#define __thread_NR_UE__
#include <pthread.h>
#include <radio/COMMON/common_lib.h>
/// Context data structure for RX/TX portion of subframe processing
typedef struct {
/// Component Carrier index
uint8_t CC_id;
/// timestamp transmitted to HW
openair0_timestamp timestamp_tx;
//#ifdef UE_NR_PHY_DEMO
int gNB_id;
/// NR slot index within frame_tx [0 .. slots_per_frame - 1] to act upon for transmission
int nr_slot_tx;
int rx_slot_type;
/// NR slot index within frame_rx [0 .. slots_per_frame - 1] to act upon for transmission
int nr_slot_rx;
int tx_slot_type;
//#endif
/// frame to act upon for transmission
int frame_tx;
/// frame to act upon for reception
int frame_rx;
int decoded_frame_rx;
/// internal This variable is protected by ref mutex_fep_slot1.
//int instance_cnt_slot0_dl_processing;
int instance_cnt_slot1_dl_processing;
/// pthread descriptor fep_slot1 thread
//pthread_t pthread_slot0_dl_processing;
pthread_t pthread_slot1_dl_processing;
/// pthread attributes for fep_slot1 processing thread
/// condition variable for UE fep_slot1 thread;
//pthread_cond_t cond_slot0_dl_processing;
pthread_cond_t cond_slot1_dl_processing;
/// mutex for UE synch thread
//pthread_mutex_t mutex_slot0_dl_processing;
pthread_mutex_t mutex_slot1_dl_processing;
//int instance_cnt_slot0_dl_processing;
int instance_cnt_dlsch_td;
/// pthread descriptor fep_slot1 thread
//pthread_t pthread_slot0_dl_processing;
pthread_t pthread_dlsch_td;
/// pthread attributes for fep_slot1 processing thread
/// condition variable for UE fep_slot1 thread;
//pthread_cond_t cond_slot0_dl_processing;
pthread_cond_t cond_dlsch_td;
/// mutex for UE synch thread
uint8_t chan_est_pilot0_slot1_available;
uint8_t chan_est_slot1_available;
uint8_t llr_slot1_available;
uint8_t dci_slot0_available;
uint8_t first_symbol_available;
uint8_t decoder_thread_available;
uint8_t decoder_main_available;
uint8_t decoder_switch;
int num_seg;
uint8_t channel_level;
int eNB_id;
int harq_pid;
int llr8_flag;
/// scheduling parameters for fep_slot1 thread
struct sched_param sched_param_fep_slot1;
int sub_frame_start;
int sub_frame_step;
uint8_t decoder_thread_available1;
int dci_err_cnt;
} UE_nr_rxtx_proc_t;
#endif
...@@ -96,7 +96,7 @@ typedef struct { ...@@ -96,7 +96,7 @@ typedef struct {
@param proc Pointer to RXn-TXnp4 proc information @param proc Pointer to RXn-TXnp4 proc information
@param eNB_id Local id of eNB on which to act @param eNB_id Local id of eNB on which to act
*/ */
void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, nr_phy_data_tx_t *phy_data); void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, nr_phy_data_tx_t *phy_data);
void send_slot_ind(notifiedFIFO_t *nf, int slot); void send_slot_ind(notifiedFIFO_t *nf, int slot);
...@@ -117,7 +117,7 @@ void processSlotTX(void *arg); ...@@ -117,7 +117,7 @@ void processSlotTX(void *arg);
@param @param
@param @param
*/ */
void nr_ue_prach_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc); void nr_ue_prach_procedures(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc);
int8_t nr_find_ue(uint16_t rnti, PHY_VARS_eNB *phy_vars_eNB); int8_t nr_find_ue(uint16_t rnti, PHY_VARS_eNB *phy_vars_eNB);
......
...@@ -301,13 +301,12 @@ int8_t nr_ue_scheduled_response_stub(nr_scheduled_response_t *scheduled_response ...@@ -301,13 +301,12 @@ int8_t nr_ue_scheduled_response_stub(nr_scheduled_response_t *scheduled_response
return 0; return 0;
} }
static void configure_dlsch(NR_UE_DLSCH_t *dlsch0,
void configure_dlsch(NR_UE_DLSCH_t *dlsch0, NR_DL_UE_HARQ_t *harq_list,
NR_DL_UE_HARQ_t *harq_list, fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu, module_id_t module_id,
module_id_t module_id, int rnti)
int rnti) { {
const uint8_t current_harq_pid = dlsch_config_pdu->harq_process_nbr; const uint8_t current_harq_pid = dlsch_config_pdu->harq_process_nbr;
dlsch0->active = true; dlsch0->active = true;
dlsch0->rnti = rnti; dlsch0->rnti = rnti;
...@@ -331,7 +330,6 @@ void configure_dlsch(NR_UE_DLSCH_t *dlsch0, ...@@ -331,7 +330,6 @@ void configure_dlsch(NR_UE_DLSCH_t *dlsch0,
} }
} }
void configure_ta_command(PHY_VARS_NR_UE *ue, fapi_nr_ta_command_pdu *ta_command_pdu) void configure_ta_command(PHY_VARS_NR_UE *ue, fapi_nr_ta_command_pdu *ta_command_pdu)
{ {
......
...@@ -54,7 +54,6 @@ ...@@ -54,7 +54,6 @@
#include <openair1/PHY/TOOLS/phy_scope_interface.h> #include <openair1/PHY/TOOLS/phy_scope_interface.h>
//#define DEBUG_PHY_PROC //#define DEBUG_PHY_PROC
#define NR_PDCCH_SCHED
//#define NR_PDCCH_SCHED_DEBUG //#define NR_PDCCH_SCHED_DEBUG
//#define NR_PUCCH_SCHED //#define NR_PUCCH_SCHED
//#define NR_PUCCH_SCHED_DEBUG //#define NR_PUCCH_SCHED_DEBUG
...@@ -264,43 +263,43 @@ void ue_ta_procedures(PHY_VARS_NR_UE *ue, int slot_tx, int frame_tx) ...@@ -264,43 +263,43 @@ void ue_ta_procedures(PHY_VARS_NR_UE *ue, int slot_tx, int frame_tx)
} }
} }
void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue, void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, nr_phy_data_tx_t *phy_data)
UE_nr_rxtx_proc_t *proc, {
nr_phy_data_tx_t *phy_data) { const int slot_tx = proc->nr_slot_tx;
const int frame_tx = proc->frame_tx;
int slot_tx = proc->nr_slot_tx; const int gNB_id = proc->gNB_id;
int frame_tx = proc->frame_tx;
int gNB_id = proc->gNB_id;
AssertFatal(ue->CC_id == 0, "Transmission on secondary CCs is not supported yet\n"); AssertFatal(ue->CC_id == 0, "Transmission on secondary CCs is not supported yet\n");
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX,VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX,VCD_FUNCTION_IN);
const int samplesF_per_slot = NR_SYMBOLS_PER_SLOT * ue->frame_parms.ofdm_symbol_size;
c16_t txdataF_buf[ue->frame_parms.nb_antennas_tx * samplesF_per_slot] __attribute__((aligned(32)));
memset(txdataF_buf, 0, sizeof(txdataF_buf));
c16_t *txdataF[ue->frame_parms.nb_antennas_tx]; /* workaround to be compatible with current txdataF usage in all tx procedures. */
for(int i=0; i< ue->frame_parms.nb_antennas_tx; ++i) for(int i=0; i< ue->frame_parms.nb_antennas_tx; ++i)
memset(ue->common_vars.txdataF[i], 0, sizeof(int)*14*ue->frame_parms.ofdm_symbol_size); txdataF[i] = &txdataF_buf[i * samplesF_per_slot];
LOG_D(PHY,"****** start TX-Chain for AbsSubframe %d.%d ******\n", frame_tx, slot_tx); LOG_D(PHY,"****** start TX-Chain for AbsSubframe %d.%d ******\n", frame_tx, slot_tx);
start_meas(&ue->phy_proc_tx); start_meas(&ue->phy_proc_tx);
for (uint8_t harq_pid = 0; harq_pid < NR_MAX_ULSCH_HARQ_PROCESSES; harq_pid++) { for (uint8_t harq_pid = 0; harq_pid < NR_MAX_ULSCH_HARQ_PROCESSES; harq_pid++) {
if (ue->ul_harq_processes[harq_pid].status == ACTIVE) if (ue->ul_harq_processes[harq_pid].status == ACTIVE) {
nr_ue_ulsch_procedures(ue, harq_pid, frame_tx, slot_tx, gNB_id, phy_data); nr_ue_ulsch_procedures(ue, harq_pid, frame_tx, slot_tx, gNB_id, phy_data, (c16_t **)&txdataF);
}
} }
ue_srs_procedures_nr(ue, proc); ue_srs_procedures_nr(ue, proc, (c16_t **)&txdataF);
pucch_procedures_ue_nr(ue, proc, phy_data); pucch_procedures_ue_nr(ue, proc, phy_data, (c16_t **)&txdataF);
LOG_D(PHY, "Sending Uplink data \n"); LOG_D(PHY, "Sending Uplink data \n");
nr_ue_pusch_common_procedures(ue, nr_ue_pusch_common_procedures(ue, proc->nr_slot_tx, &ue->frame_parms, ue->frame_parms.nb_antennas_tx, (c16_t **)txdataF);
proc->nr_slot_tx,
&ue->frame_parms,
ue->frame_parms.nb_antennas_tx);
nr_ue_prach_procedures(ue, proc); nr_ue_prach_procedures(ue, proc);
LOG_D(PHY,"****** end TX-Chain for AbsSubframe %d.%d ******\n", proc->frame_tx, proc->nr_slot_tx); LOG_D(PHY, "****** end TX-Chain for AbsSubframe %d.%d ******\n", proc->frame_tx, proc->nr_slot_tx);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX, VCD_FUNCTION_OUT); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX, VCD_FUNCTION_OUT);
stop_meas(&ue->phy_proc_tx); stop_meas(&ue->phy_proc_tx);
...@@ -405,37 +404,12 @@ static int nr_ue_pbch_procedures(PHY_VARS_NR_UE *ue, ...@@ -405,37 +404,12 @@ static int nr_ue_pbch_procedures(PHY_VARS_NR_UE *ue,
#endif #endif
} else { } else {
LOG_E(PHY,"[UE %d] frame %d, nr_slot_rx %d, Error decoding PBCH!\n", LOG_E(PHY, "[UE %d] frame %d, nr_slot_rx %d, Error decoding PBCH!\n", ue->Mod_id, frame_rx, nr_slot_rx);
ue->Mod_id,frame_rx, nr_slot_rx);
/*FILE *fd;
if ((fd = fopen("rxsig_frame0.dat","w")) != NULL) {
fwrite((void *)&ue->common_vars.rxdata[0][0],
sizeof(int32_t),
ue->frame_parms.samples_per_frame,
fd);
LOG_I(PHY,"Dummping Frame ... bye bye \n");
fclose(fd);
exit(0);
}*/
/*
write_output("rxsig0.m","rxs0", ue->common_vars.rxdata[0],ue->frame_parms.samples_per_subframe,1,1);
write_output("H00.m","h00",&(ue->common_vars.dl_ch_estimates[0][0][0]),((ue->frame_parms.Ncp==0)?7:6)*(ue->frame_parms.ofdm_symbol_size),1,1);
write_output("H10.m","h10",&(ue->common_vars.dl_ch_estimates[0][2][0]),((ue->frame_parms.Ncp==0)?7:6)*(ue->frame_parms.ofdm_symbol_size),1,1);
write_output("rxsigF0.m","rxsF0", ue->common_vars.rxdataF[0],8*ue->frame_parms.ofdm_symbol_size,1,1);
exit(-1);
*/
} }
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PBCH_PROCEDURES, VCD_FUNCTION_OUT); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PBCH_PROCEDURES, VCD_FUNCTION_OUT);
return ret; return ret;
} }
unsigned int nr_get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb) unsigned int nr_get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb)
{ {
...@@ -453,8 +427,6 @@ unsigned int nr_get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb ...@@ -453,8 +427,6 @@ unsigned int nr_get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb
return(0); return(0);
} }
#ifdef NR_PDCCH_SCHED
int nr_ue_pdcch_procedures(PHY_VARS_NR_UE *ue, int nr_ue_pdcch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc, UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size, int32_t pdcch_est_size,
...@@ -481,7 +453,7 @@ int nr_ue_pdcch_procedures(PHY_VARS_NR_UE *ue, ...@@ -481,7 +453,7 @@ int nr_ue_pdcch_procedures(PHY_VARS_NR_UE *ue,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PDCCH, VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PDCCH, VCD_FUNCTION_IN);
nr_rx_pdcch(ue, proc, pdcch_est_size, pdcch_dl_ch_estimates, pdcch_e_rx, rel15, rxdataF); nr_rx_pdcch(ue, proc, pdcch_est_size, pdcch_dl_ch_estimates, pdcch_e_rx, rel15, rxdataF);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PDCCH, VCD_FUNCTION_OUT); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PDCCH, VCD_FUNCTION_OUT);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DCI_DECODING, VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DCI_DECODING, VCD_FUNCTION_IN);
...@@ -495,9 +467,8 @@ int nr_ue_pdcch_procedures(PHY_VARS_NR_UE *ue, ...@@ -495,9 +467,8 @@ int nr_ue_pdcch_procedures(PHY_VARS_NR_UE *ue,
#ifdef NR_PDCCH_SCHED_DEBUG #ifdef NR_PDCCH_SCHED_DEBUG
LOG_I(PHY,"<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Ending function nr_dci_decoding_procedure() -> dci_cnt=%u\n",dci_cnt); LOG_I(PHY,"<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Ending function nr_dci_decoding_procedure() -> dci_cnt=%u\n",dci_cnt);
#endif #endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DCI_DECODING, VCD_FUNCTION_OUT); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DCI_DECODING, VCD_FUNCTION_OUT);
//LOG_D(PHY,"[UE %d][PUSCH] Frame %d nr_slot_rx %d PHICH RX\n",ue->Mod_id,frame_rx,nr_slot_rx);
for (int i=0; i<dci_cnt; i++) { for (int i=0; i<dci_cnt; i++) {
LOG_D(PHY,"[UE %d] AbsSubFrame %d.%d: DCI %i of %d total DCIs found --> rnti %x : format %d\n", LOG_D(PHY,"[UE %d] AbsSubFrame %d.%d: DCI %i of %d total DCIs found --> rnti %x : format %d\n",
...@@ -515,13 +486,11 @@ int nr_ue_pdcch_procedures(PHY_VARS_NR_UE *ue, ...@@ -515,13 +486,11 @@ int nr_ue_pdcch_procedures(PHY_VARS_NR_UE *ue,
// send to mac // send to mac
ue->if_inst->dl_indication(&dl_indication); ue->if_inst->dl_indication(&dl_indication);
stop_meas(&ue->dlsch_rx_pdcch_stats); stop_meas(&ue->dlsch_rx_pdcch_stats);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PDCCH_PROCEDURES, VCD_FUNCTION_OUT); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PDCCH_PROCEDURES, VCD_FUNCTION_OUT);
return(dci_cnt); return(dci_cnt);
} }
#endif // NR_PDCCH_SCHED
int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc, UE_nr_rxtx_proc_t *proc,
...@@ -661,10 +630,12 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, ...@@ -661,10 +630,12 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
stop_meas(&ue->dlsch_llr_stats_parallelization[slot]); stop_meas(&ue->dlsch_llr_stats_parallelization[slot]);
if (cpumeas(CPUMEAS_GETSTATE)) if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY, "[AbsSFN %d.%d] LLR Computation Symbol %d %5.2f \n",frame_rx,nr_slot_rx,m,ue->dlsch_llr_stats_parallelization[slot].p_time/(cpuf*1000.0)); LOG_D(PHY,
if(first_symbol_flag) { "[AbsSFN %d.%d] LLR Computation Symbol %d %5.2f \n",
proc->first_symbol_available = 1; frame_rx,
} nr_slot_rx,
m,
ue->dlsch_llr_stats_parallelization[slot].p_time / (cpuf * 1000.0));
} // CRNTI active } // CRNTI active
stop_meas(&ue->rx_pdsch_stats); stop_meas(&ue->rx_pdsch_stats);
} }
...@@ -1007,8 +978,6 @@ void pbch_pdcch_processing(PHY_VARS_NR_UE *ue, ...@@ -1007,8 +978,6 @@ void pbch_pdcch_processing(PHY_VARS_NR_UE *ue,
LOG_I(NR_PHY,"============================================\n"); LOG_I(NR_PHY,"============================================\n");
} }
#ifdef NR_PDCCH_SCHED
LOG_D(PHY," ------ --> PDCCH ChannelComp/LLR Frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx); LOG_D(PHY," ------ --> PDCCH ChannelComp/LLR Frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_PDCCH, VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_PDCCH, VCD_FUNCTION_IN);
...@@ -1061,7 +1030,6 @@ void pdsch_processing(PHY_VARS_NR_UE *ue, ...@@ -1061,7 +1030,6 @@ void pdsch_processing(PHY_VARS_NR_UE *ue,
int gNB_id = proc->gNB_id; int gNB_id = proc->gNB_id;
NR_UE_DLSCH_t *dlsch = &phy_data->dlsch[0]; NR_UE_DLSCH_t *dlsch = &phy_data->dlsch[0];
#endif //NR_PDCCH_SCHED
start_meas(&ue->generic_stat); start_meas(&ue->generic_stat);
// do procedures for C-RNTI // do procedures for C-RNTI
int ret_pdsch = 0; int ret_pdsch = 0;
...@@ -1202,7 +1170,7 @@ void pdsch_processing(PHY_VARS_NR_UE *ue, ...@@ -1202,7 +1170,7 @@ void pdsch_processing(PHY_VARS_NR_UE *ue,
stop_meas(&ue->generic_stat); stop_meas(&ue->generic_stat);
if (cpumeas(CPUMEAS_GETSTATE)) if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY,"after tubo until end of Rx %5.2f \n",ue->generic_stat.p_time/(cpuf*1000.0)); LOG_D(PHY, "after ldpc decode until end of Rx %5.2f \n", ue->generic_stat.p_time / (cpuf * 1000.0));
#ifdef EMOS #ifdef EMOS
phy_procedures_emos_UE_RX(ue,slot,gNB_id); phy_procedures_emos_UE_RX(ue,slot,gNB_id);
...@@ -1222,8 +1190,8 @@ void pdsch_processing(PHY_VARS_NR_UE *ue, ...@@ -1222,8 +1190,8 @@ void pdsch_processing(PHY_VARS_NR_UE *ue,
// todo: // todo:
// - power control as per 38.213 ch 7.4 // - power control as per 38.213 ch 7.4
void nr_ue_prach_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc) { void nr_ue_prach_procedures(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc)
{
int gNB_id = proc->gNB_id; int gNB_id = proc->gNB_id;
int frame_tx = proc->frame_tx, nr_slot_tx = proc->nr_slot_tx, prach_power; // tx_amp int frame_tx = proc->frame_tx, nr_slot_tx = proc->nr_slot_tx, prach_power; // tx_amp
uint8_t mod_id = ue->Mod_id; uint8_t mod_id = ue->Mod_id;
...@@ -1231,7 +1199,6 @@ void nr_ue_prach_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc) { ...@@ -1231,7 +1199,6 @@ void nr_ue_prach_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX_PRACH, VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX_PRACH, VCD_FUNCTION_IN);
if (ue->prach_vars[gNB_id]->active) { if (ue->prach_vars[gNB_id]->active) {
fapi_nr_ul_config_prach_pdu *prach_pdu = &ue->prach_vars[gNB_id]->prach_pdu; fapi_nr_ul_config_prach_pdu *prach_pdu = &ue->prach_vars[gNB_id]->prach_pdu;
ue->tx_power_dBm[nr_slot_tx] = prach_pdu->prach_tx_power; ue->tx_power_dBm[nr_slot_tx] = prach_pdu->prach_tx_power;
......
...@@ -198,18 +198,14 @@ void nr_generate_pucch3_4(int32_t **txdataF, ...@@ -198,18 +198,14 @@ void nr_generate_pucch3_4(int32_t **txdataF,
* *
*********************************************************************/ *********************************************************************/
void pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, void pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, nr_phy_data_tx_t *phy_data, c16_t **txdataF)
UE_nr_rxtx_proc_t *proc, {
nr_phy_data_tx_t *phy_data) { const int nr_slot_tx = proc->nr_slot_tx;
int nr_slot_tx = proc->nr_slot_tx;
fapi_nr_ul_config_pucch_pdu *pucch_pdu;
NR_UE_PUCCH *pucch_vars = &phy_data->pucch_vars; NR_UE_PUCCH *pucch_vars = &phy_data->pucch_vars;
for (int i=0; i<2; i++) { for (int i=0; i<2; i++) {
if(pucch_vars->active[i]) { if(pucch_vars->active[i]) {
const fapi_nr_ul_config_pucch_pdu *pucch_pdu = &pucch_vars->pucch_pdu[i];
pucch_pdu = &pucch_vars->pucch_pdu[i];
uint16_t nb_of_prbs = pucch_pdu->prb_size; uint16_t nb_of_prbs = pucch_pdu->prb_size;
/* Generate PUCCH signal according to its format and parameters */ /* Generate PUCCH signal according to its format and parameters */
...@@ -238,37 +234,17 @@ void pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, ...@@ -238,37 +234,17 @@ void pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue,
switch(pucch_pdu->format_type) { switch(pucch_pdu->format_type) {
case 0: case 0:
nr_generate_pucch0(ue, nr_generate_pucch0(ue, txdataF, &ue->frame_parms, tx_amp, nr_slot_tx, pucch_pdu);
ue->common_vars.txdataF,
&ue->frame_parms,
tx_amp,
nr_slot_tx,
pucch_pdu);
break; break;
case 1: case 1:
nr_generate_pucch1(ue, nr_generate_pucch1(ue, txdataF, &ue->frame_parms, tx_amp, nr_slot_tx, pucch_pdu);
ue->common_vars.txdataF,
&ue->frame_parms,
tx_amp,
nr_slot_tx,
pucch_pdu);
break; break;
case 2: case 2:
nr_generate_pucch2(ue, nr_generate_pucch2(ue, txdataF, &ue->frame_parms, tx_amp, nr_slot_tx, pucch_pdu);
ue->common_vars.txdataF,
&ue->frame_parms,
tx_amp,
nr_slot_tx,
pucch_pdu);
break; break;
case 3: case 3:
case 4: case 4:
nr_generate_pucch3_4(ue, nr_generate_pucch3_4(ue, txdataF, &ue->frame_parms, tx_amp, nr_slot_tx, pucch_pdu);
ue->common_vars.txdataF,
&ue->frame_parms,
tx_amp,
nr_slot_tx,
pucch_pdu);
break; break;
} }
} }
...@@ -276,8 +252,6 @@ void pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, ...@@ -276,8 +252,6 @@ void pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue,
} }
} }
int dummy_csi_status = 0; int dummy_csi_status = 0;
uint32_t dummy_csi_payload = 0; uint32_t dummy_csi_payload = 0;
......
...@@ -58,10 +58,7 @@ ...@@ -58,10 +58,7 @@
/*************** FUNCTIONS ****************************************/ /*************** FUNCTIONS ****************************************/
void pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, void pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, nr_phy_data_tx_t *phy_data, c16_t **txdataF);
UE_nr_rxtx_proc_t *proc,
nr_phy_data_tx_t *phy_data);
void set_csi_nr(int csi_status, uint32_t csi_payload); void set_csi_nr(int csi_status, uint32_t csi_payload);
......
...@@ -707,13 +707,11 @@ int main(int argc, char **argv) ...@@ -707,13 +707,11 @@ int main(int argc, char **argv)
N_RB_DL,g_mcsTableIdx,0); N_RB_DL,g_mcsTableIdx,0);
// TODO do a UECAP for phy-sim // TODO do a UECAP for phy-sim
const gNB_RrcConfigurationReq conf = { const gNB_RrcConfigurationReq conf = {.pdsch_AntennaPorts = pdsch_AntennaPorts,
.pdsch_AntennaPorts = pdsch_AntennaPorts, .minRXTXTIME = 6,
.minRXTXTIME = 6, .do_CSIRS = 0,
.do_CSIRS = 0, .do_SRS = 0,
.do_SRS = 0, .force_256qam_off = false};
.force_256qam_off = false
};
NR_CellGroupConfig_t *secondaryCellGroup = get_default_secondaryCellGroup(scc, scd, UE_Capability_nr, 0, 1, &conf, 0); NR_CellGroupConfig_t *secondaryCellGroup = get_default_secondaryCellGroup(scc, scd, UE_Capability_nr, 0, 1, &conf, 0);
/* RRC parameter validation for secondaryCellGroup */ /* RRC parameter validation for secondaryCellGroup */
......
...@@ -596,7 +596,7 @@ int main(int argc, char **argv){ ...@@ -596,7 +596,7 @@ int main(int argc, char **argv){
ue_prach_pdu = &UE->prach_vars[0]->prach_pdu; ue_prach_pdu = &UE->prach_vars[0]->prach_pdu;
ue_prach_config = &UE->nrUE_config.prach_config; ue_prach_config = &UE->nrUE_config.prach_config;
txdata = UE->common_vars.txdata; txdata = UE->common_vars.txData;
UE->prach_vars[0]->amp = AMP; UE->prach_vars[0]->amp = AMP;
ue_prach_pdu->root_seq_id = rootSequenceIndex; ue_prach_pdu->root_seq_id = rootSequenceIndex;
......
...@@ -633,14 +633,12 @@ int main(int argc, char **argv) ...@@ -633,14 +633,12 @@ int main(int argc, char **argv)
N_RB_UL,0,mcs_table); N_RB_UL,0,mcs_table);
// TODO do a UECAP for phy-sim // TODO do a UECAP for phy-sim
const gNB_RrcConfigurationReq conf = { const gNB_RrcConfigurationReq conf = {.pdsch_AntennaPorts = {.N1 = 1, .N2 = 1, .XP = 1},
.pdsch_AntennaPorts = { .N1 = 1, .N2 = 1, .XP = 1 }, .pusch_AntennaPorts = n_rx,
.pusch_AntennaPorts = n_rx, .minRXTXTIME = 0,
.minRXTXTIME = 0, .do_CSIRS = 0,
.do_CSIRS = 0, .do_SRS = 0,
.do_SRS = 0, .force_256qam_off = false};
.force_256qam_off = false
};
NR_CellGroupConfig_t *secondaryCellGroup = get_default_secondaryCellGroup(scc, scd, UE_Capability_nr, 0, 1, &conf, 0); NR_CellGroupConfig_t *secondaryCellGroup = get_default_secondaryCellGroup(scc, scd, UE_Capability_nr, 0, 1, &conf, 0);
...@@ -1185,14 +1183,14 @@ int main(int argc, char **argv) ...@@ -1185,14 +1183,14 @@ int main(int argc, char **argv)
phy_procedures_nrUE_TX(UE, &UE_proc, &phy_data); phy_procedures_nrUE_TX(UE, &UE_proc, &phy_data);
if (n_trials == 1) { if (n_trials == 1) {
LOG_M("txsig0.m", "txs0", &UE->common_vars.txdata[0][slot_offset], slot_length, 1, 1); LOG_M("txsig0.m", "txs0", &UE->common_vars.txData[0][slot_offset], slot_length, 1, 1);
LOG_M("txsig0F.m", "txs0F", UE->common_vars.txdataF[0], frame_parms->ofdm_symbol_size * 14, 1, 1); LOG_M("txsig0F.m", "txs0F", UE->common_vars.txdataF[0], frame_parms->ofdm_symbol_size * 14, 1, 1);
if (precod_nbr_layers > 1) { if (precod_nbr_layers > 1) {
LOG_M("txsig1.m", "txs1", &UE->common_vars.txdata[1][slot_offset], slot_length, 1, 1); LOG_M("txsig1.m", "txs1", &UE->common_vars.txData[1][slot_offset], slot_length, 1, 1);
LOG_M("txsig1F.m", "txs1F", UE->common_vars.txdataF[1], frame_parms->ofdm_symbol_size * 14, 1, 1); LOG_M("txsig1F.m", "txs1F", UE->common_vars.txdataF[1], frame_parms->ofdm_symbol_size * 14, 1, 1);
if (precod_nbr_layers == 4) { if (precod_nbr_layers == 4) {
LOG_M("txsig2.m", "txs2", &UE->common_vars.txdata[2][slot_offset], slot_length, 1, 1); LOG_M("txsig2.m", "txs2", &UE->common_vars.txData[2][slot_offset], slot_length, 1, 1);
LOG_M("txsig3.m", "txs3", &UE->common_vars.txdata[3][slot_offset], slot_length, 1, 1); LOG_M("txsig3.m", "txs3", &UE->common_vars.txData[3][slot_offset], slot_length, 1, 1);
LOG_M("txsig2F.m", "txs2F", UE->common_vars.txdataF[2], frame_parms->ofdm_symbol_size * 14, 1, 1); LOG_M("txsig2F.m", "txs2F", UE->common_vars.txdataF[2], frame_parms->ofdm_symbol_size * 14, 1, 1);
LOG_M("txsig3F.m", "txs3F", UE->common_vars.txdataF[3], frame_parms->ofdm_symbol_size * 14, 1, 1); LOG_M("txsig3F.m", "txs3F", UE->common_vars.txdataF[3], frame_parms->ofdm_symbol_size * 14, 1, 1);
} }
...@@ -1203,8 +1201,10 @@ int main(int argc, char **argv) ...@@ -1203,8 +1201,10 @@ int main(int argc, char **argv)
tx_offset = frame_parms->get_samples_slot_timestamp(slot, frame_parms, 0); tx_offset = frame_parms->get_samples_slot_timestamp(slot, frame_parms, 0);
txlev_sum = 0; txlev_sum = 0;
for (int aa = 0; aa < UE->frame_parms.nb_antennas_tx; aa++) { for (int aa = 0; aa < UE->frame_parms.nb_antennas_tx; aa++) {
atxlev[aa] = signal_energy((int32_t *)&UE->common_vars.txdata[aa][tx_offset + 5 * frame_parms->ofdm_symbol_size + 4 * frame_parms->nb_prefix_samples + frame_parms->nb_prefix_samples0], atxlev[aa] = signal_energy(
frame_parms->ofdm_symbol_size + frame_parms->nb_prefix_samples); (int32_t *)&UE->common_vars.txData[aa][tx_offset + 5 * frame_parms->ofdm_symbol_size
+ 4 * frame_parms->nb_prefix_samples + frame_parms->nb_prefix_samples0],
frame_parms->ofdm_symbol_size + frame_parms->nb_prefix_samples);
txlev_sum += atxlev[aa]; txlev_sum += atxlev[aa];
...@@ -1225,8 +1225,8 @@ int main(int argc, char **argv) ...@@ -1225,8 +1225,8 @@ int main(int argc, char **argv)
for (i = 0; i < slot_length; i++) { for (i = 0; i < slot_length; i++) {
for (int aa = 0; aa < UE->frame_parms.nb_antennas_tx; aa++) { for (int aa = 0; aa < UE->frame_parms.nb_antennas_tx; aa++) {
s_re[aa][i] = ((double)(((short *)&UE->common_vars.txdata[aa][slot_offset]))[(i << 1)]); s_re[aa][i] = (double)UE->common_vars.txData[aa][slot_offset + i].r;
s_im[aa][i] = ((double)(((short *)&UE->common_vars.txdata[aa][slot_offset]))[(i << 1) + 1]); s_im[aa][i] = (double)UE->common_vars.txData[aa][slot_offset + i].i;
} }
} }
......
...@@ -324,7 +324,6 @@ and fills the PRACH PDU per each FD occasion. ...@@ -324,7 +324,6 @@ and fills the PRACH PDU per each FD occasion.
@param slotP Slot index @param slotP Slot index
@returns void @returns void
*/ */
void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t slotP);
void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, void *phy_data); void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, void *phy_data);
void nr_schedule_csirs_reception(NR_UE_MAC_INST_t *mac, int frame, int slot); void nr_schedule_csirs_reception(NR_UE_MAC_INST_t *mac, int frame, int slot);
void nr_schedule_csi_for_im(NR_UE_MAC_INST_t *mac, int frame, int slot); void nr_schedule_csi_for_im(NR_UE_MAC_INST_t *mac, int frame, int slot);
......
...@@ -738,9 +738,7 @@ uint8_t nr_ue_get_rach(module_id_t mod_id, ...@@ -738,9 +738,7 @@ uint8_t nr_ue_get_rach(module_id_t mod_id,
((NR_MAC_SUBHEADER_FIXED *) pdu)->R = 0; ((NR_MAC_SUBHEADER_FIXED *) pdu)->R = 0;
((NR_MAC_SUBHEADER_FIXED *) pdu)->LCID = UL_SCH_LCID_PADDING; ((NR_MAC_SUBHEADER_FIXED *) pdu)->LCID = UL_SCH_LCID_PADDING;
pdu += sizeof(NR_MAC_SUBHEADER_FIXED); pdu += sizeof(NR_MAC_SUBHEADER_FIXED);
for (int j = 0; j < TBS_max - ra->Msg3_size - sizeof(NR_MAC_SUBHEADER_FIXED); j++) { memset(pdu, 0, TBS_max - ra->Msg3_size - sizeof(NR_MAC_SUBHEADER_FIXED));
pdu[j] = 0;
}
} }
// Dumping ULSCH payload // Dumping ULSCH payload
......
...@@ -59,6 +59,7 @@ ...@@ -59,6 +59,7 @@
static prach_association_pattern_t prach_assoc_pattern; static prach_association_pattern_t prach_assoc_pattern;
static ssb_list_info_t ssb_list; static ssb_list_info_t ssb_list;
static void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t slotP);
void fill_ul_config(fapi_nr_ul_config_request_t *ul_config, frame_t frame_tx, int slot_tx, uint8_t pdu_type){ void fill_ul_config(fapi_nr_ul_config_request_t *ul_config, frame_t frame_tx, int slot_tx, uint8_t pdu_type){
...@@ -2488,8 +2489,8 @@ void nr_schedule_csirs_reception(NR_UE_MAC_INST_t *mac, int frame, int slot) { ...@@ -2488,8 +2489,8 @@ void nr_schedule_csirs_reception(NR_UE_MAC_INST_t *mac, int frame, int slot) {
// PRACH formats 9, 10, 11 are corresponding to dual PRACH format configurations A1/B1, A2/B2, A3/B3. // PRACH formats 9, 10, 11 are corresponding to dual PRACH format configurations A1/B1, A2/B2, A3/B3.
// - todo: // - todo:
// - Partial configuration is actually already stored in (fapi_nr_prach_config_t) &mac->phy_config.config_req->prach_config // - Partial configuration is actually already stored in (fapi_nr_prach_config_t) &mac->phy_config.config_req->prach_config
void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) { static void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
{
NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP);
RA_config_t *ra = &mac->ra; RA_config_t *ra = &mac->ra;
ra->RA_offset = 2; // to compensate the rx frame offset at the gNB ra->RA_offset = 2; // to compensate the rx frame offset at the gNB
......
...@@ -674,6 +674,7 @@ static void fill_dci_from_dl_config(nr_downlink_indication_t*dl_ind, fapi_nr_dl_ ...@@ -674,6 +674,7 @@ static void fill_dci_from_dl_config(nr_downlink_indication_t*dl_ind, fapi_nr_dl_
} }
} }
// This piece of code is not used in "normal" ue, but in "fapi mode"
void check_and_process_dci(nfapi_nr_dl_tti_request_t *dl_tti_request, void check_and_process_dci(nfapi_nr_dl_tti_request_t *dl_tti_request,
nfapi_nr_tx_data_request_t *tx_data_request, nfapi_nr_tx_data_request_t *tx_data_request,
nfapi_nr_ul_dci_request_t *ul_dci_request, nfapi_nr_ul_dci_request_t *ul_dci_request,
...@@ -734,25 +735,24 @@ void check_and_process_dci(nfapi_nr_dl_tti_request_t *dl_tti_request, ...@@ -734,25 +735,24 @@ void check_and_process_dci(nfapi_nr_dl_tti_request_t *dl_tti_request,
nr_ue_dl_scheduler(&mac->dl_info); nr_ue_dl_scheduler(&mac->dl_info);
nr_ue_dl_indication(&mac->dl_info); nr_ue_dl_indication(&mac->dl_info);
if (pthread_mutex_unlock(&mac->mutex_dl_info)) abort(); if (pthread_mutex_unlock(&mac->mutex_dl_info))
abort();
// If we filled dl_info AFTER we got the slot indication, we want to check if we should fill tx_req:
nr_uplink_indication_t ul_info;
memset(&ul_info, 0, sizeof(ul_info));
int slots_per_frame = 20; //30 kHZ subcarrier spacing int slots_per_frame = 20; //30 kHZ subcarrier spacing
int slot_ahead = 2; // TODO: Make this dynamic int slot_ahead = 2; // TODO: Make this dynamic
ul_info.frame_rx = frame;
ul_info.slot_rx = slot;
ul_info.slot_tx = (slot + slot_ahead) % slots_per_frame;
ul_info.frame_tx = (ul_info.slot_rx + slot_ahead >= slots_per_frame) ? ul_info.frame_rx + 1 : ul_info.frame_rx;
if (mac->scc || mac->scc_SIB) { if (mac->scc || mac->scc_SIB) {
if (is_nr_UL_slot(mac->scc ? if (is_nr_UL_slot(mac->scc ? mac->scc->tdd_UL_DL_ConfigurationCommon : mac->scc_SIB->tdd_UL_DL_ConfigurationCommon,
mac->scc->tdd_UL_DL_ConfigurationCommon : (slot + slot_ahead) % slots_per_frame,
mac->scc_SIB->tdd_UL_DL_ConfigurationCommon, mac->frame_type)
ul_info.slot_tx, && mac->ra.ra_state != RA_SUCCEEDED) {
mac->frame_type) && mac->ra.ra_state != RA_SUCCEEDED) { // If we filled dl_info AFTER we got the slot indication, we want to check if we should fill tx_req:
nr_ue_ul_scheduler(&ul_info); nr_uplink_indication_t ul_info = {
} .frame_rx = frame,
.slot_rx = slot,
.slot_tx = (slot + slot_ahead) % slots_per_frame,
.frame_tx = (ul_info.slot_rx + slot_ahead >= slots_per_frame) ? ul_info.frame_rx + 1 : ul_info.frame_rx};
nr_ue_ul_scheduler(&ul_info);
}
} }
} }
...@@ -1131,7 +1131,9 @@ int nr_ue_ul_indication(nr_uplink_indication_t *ul_info) ...@@ -1131,7 +1131,9 @@ int nr_ue_ul_indication(nr_uplink_indication_t *ul_info)
LOG_T(NR_MAC, "In %s():%d not calling scheduler mac->ra.ra_state = %d\n", LOG_T(NR_MAC, "In %s():%d not calling scheduler mac->ra.ra_state = %d\n",
__FUNCTION__, __LINE__, mac->ra.ra_state); __FUNCTION__, __LINE__, mac->ra.ra_state);
NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon = mac->scc != NULL ? mac->scc->tdd_UL_DL_ConfigurationCommon : mac->scc_SIB->tdd_UL_DL_ConfigurationCommon; NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon =
mac->scc != NULL ? mac->scc->tdd_UL_DL_ConfigurationCommon
: (mac->scc_SIB ? mac->scc_SIB->tdd_UL_DL_ConfigurationCommon : NULL);
if (mac->phy_config_request_sent && is_nr_UL_slot(tdd_UL_DL_ConfigurationCommon, ul_info->slot_tx, mac->frame_type)) if (mac->phy_config_request_sent && is_nr_UL_slot(tdd_UL_DL_ConfigurationCommon, ul_info->slot_tx, mac->frame_type))
nr_ue_ul_scheduler(ul_info); nr_ue_ul_scheduler(ul_info);
...@@ -1227,6 +1229,10 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info) ...@@ -1227,6 +1229,10 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info)
break; break;
case FAPI_NR_RX_PDU_TYPE_RAR: case FAPI_NR_RX_PDU_TYPE_RAR:
ret_mask |= (handle_dlsch(dl_info, i)) << FAPI_NR_RX_PDU_TYPE_RAR; ret_mask |= (handle_dlsch(dl_info, i)) << FAPI_NR_RX_PDU_TYPE_RAR;
if (!dl_info->rx_ind->rx_indication_body[i].pdsch_pdu.ack_nack)
LOG_W(PHY, "Received a RAR-Msg2 but LDPC decode failed\n");
else
LOG_I(PHY, "RAR-Msg2 decoded\n");
break; break;
case FAPI_NR_CSIRS_IND: case FAPI_NR_CSIRS_IND:
ret_mask |= (handle_csirs_measurements(dl_info->module_id, ret_mask |= (handle_csirs_measurements(dl_info->module_id,
......
...@@ -34,7 +34,6 @@ ...@@ -34,7 +34,6 @@
#define __NR_IF_MODULE_H__ #define __NR_IF_MODULE_H__
#include "platform_types.h" #include "platform_types.h"
#include <openair1/PHY/thread_NR_UE.h>
#include <semaphore.h> #include <semaphore.h>
#include "fapi_nr_ue_interface.h" #include "fapi_nr_ue_interface.h"
#include "openair2/PHY_INTERFACE/queue_t.h" #include "openair2/PHY_INTERFACE/queue_t.h"
......
...@@ -23,7 +23,6 @@ ...@@ -23,7 +23,6 @@
#include <platform_types.h> #include <platform_types.h>
#include <nfapi_nr_interface_scf.h> #include <nfapi_nr_interface_scf.h>
#include <openair1/PHY/thread_NR_UE.h>
#include "openair2/NR_PHY_INTERFACE/NR_IF_Module.h" #include "openair2/NR_PHY_INTERFACE/NR_IF_Module.h"
#define NR_NUM_MCS 29 #define NR_NUM_MCS 29
......
...@@ -101,8 +101,8 @@ rrc_gNB_ue_context_t *rrc_gNB_get_ue_context_by_rnti(gNB_RRC_INST *rrc_instance_ ...@@ -101,8 +101,8 @@ rrc_gNB_ue_context_t *rrc_gNB_get_ue_context_by_rnti(gNB_RRC_INST *rrc_instance_
void rrc_gNB_free_mem_ue_context(rrc_gNB_ue_context_t *const ue_context_pP) void rrc_gNB_free_mem_ue_context(rrc_gNB_ue_context_t *const ue_context_pP)
//----------------------------------------------------------------------------- //-----------------------------------------------------------------------------
{ {
free(ue_context_pP);
LOG_T(NR_RRC, " Clearing UE context 0x%p (free internal structs)\n", ue_context_pP); LOG_T(NR_RRC, " Clearing UE context 0x%p (free internal structs)\n", ue_context_pP);
free(ue_context_pP);
} }
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment