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OpenXG
OpenXG-RAN
Commits
b97e1b57
Commit
b97e1b57
authored
Nov 18, 2020
by
rmagueta
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Merge develop into this branch
parent
f184239f
Changes
3
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3 changed files
with
273 additions
and
6 deletions
+273
-6
ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf
ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf
+4
-4
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
+267
-1
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+2
-1
No files found.
ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf
View file @
b97e1b57
...
@@ -66,13 +66,13 @@ gNBs =
...
@@ -66,13 +66,13 @@ gNBs =
#initialULBWPmappingType
#initialULBWPmappingType
#0=typeA,1=typeB
#0=typeA,1=typeB
initialDLBWPmappingType_0
=
0
;
initialDLBWPmappingType_0
=
0
;
#this is SS=
2,L=12
#this is SS=
1,L=13
initialDLBWPstartSymbolAndLength_0
=
53
;
initialDLBWPstartSymbolAndLength_0
=
40
;
initialDLBWPk0_1
=
0
;
initialDLBWPk0_1
=
0
;
initialDLBWPmappingType_1
=
0
;
initialDLBWPmappingType_1
=
0
;
#this is SS=
1,L=13
#this is SS=
2,L=12
initialDLBWPstartSymbolAndLength_1
=
40
;
initialDLBWPstartSymbolAndLength_1
=
53
;
initialDLBWPk0_2
=
0
;
initialDLBWPk0_2
=
0
;
initialDLBWPmappingType_2
=
0
;
initialDLBWPmappingType_2
=
0
;
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
View file @
b97e1b57
...
@@ -160,7 +160,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP,
...
@@ -160,7 +160,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP,
for
(
int
i
=
0
;
i
<
8
;
i
++
)
{
for
(
int
i
=
0
;
i
<
8
;
i
++
)
{
gNB_xtra_byte
|=
((
RC
.
gNB
[
module_idP
]
->
pbch
.
pbch_a
>>
(
31
-
i
))
&
1
)
<<
(
7
-
i
);
gNB_xtra_byte
|=
((
RC
.
gNB
[
module_idP
]
->
pbch
.
pbch_a
>>
(
31
-
i
))
&
1
)
<<
(
7
-
i
);
}
}
get_type0_PDCCH_CSS_config_parameters
(
&
RC
.
gNB
[
module_idP
]
->
type0_PDCCH_CSS_config
,
mib
,
gNB_xtra_byte
,
frame_parms
->
Lmax
,
get_type0_PDCCH_CSS_config_parameters
(
&
gNB
->
type0_PDCCH_CSS_config
,
mib
,
gNB_xtra_byte
,
frame_parms
->
Lmax
,
frame_parms
->
ssb_index
,
frame_parms
->
ssb_start_subcarrier
/
NR_NB_SC_PER_RB
);
frame_parms
->
ssb_index
,
frame_parms
->
ssb_start_subcarrier
/
NR_NB_SC_PER_RB
);
}
}
...
@@ -223,3 +223,269 @@ void fill_ssb_vrb_map (NR_COMMON_channels_t *cc, int rbStart, int CC_id) {
...
@@ -223,3 +223,269 @@ void fill_ssb_vrb_map (NR_COMMON_channels_t *cc, int rbStart, int CC_id) {
for
(
int
rb
=
0
;
rb
<
20
;
rb
++
)
for
(
int
rb
=
0
;
rb
<
20
;
rb
++
)
vrb_map
[
rbStart
+
rb
]
=
1
;
vrb_map
[
rbStart
+
rb
]
=
1
;
}
}
void
schedule_control_sib1
(
module_id_t
module_id
,
int
CC_id
,
int
time_domain_allocation
,
uint8_t
mcsTableIdx
,
uint8_t
mcs
,
uint8_t
numDmrsCdmGrpsNoData
,
int
num_total_bytes
)
{
gNB_MAC_INST
*
gNB_mac
=
RC
.
nrmac
[
module_id
];
NR_ServingCellConfigCommon_t
*
servingcellconfigcommon
=
gNB_mac
->
common_channels
[
CC_id
].
ServingCellConfigCommon
;
uint8_t
*
vrb_map
=
RC
.
nrmac
[
module_id
]
->
common_channels
[
CC_id
].
vrb_map
;
if
(
gNB_mac
->
sched_ctrlCommon
==
NULL
){
gNB_mac
->
sched_ctrlCommon
=
calloc
(
1
,
sizeof
(
*
gNB_mac
->
sched_ctrlCommon
));
gNB_mac
->
sched_ctrlCommon
->
search_space
=
calloc
(
1
,
sizeof
(
*
gNB_mac
->
sched_ctrlCommon
->
search_space
));
gNB_mac
->
sched_ctrlCommon
->
active_bwp
=
calloc
(
1
,
sizeof
(
*
gNB_mac
->
sched_ctrlCommon
->
active_bwp
));
gNB_mac
->
sched_ctrlCommon
->
coreset
=
calloc
(
1
,
sizeof
(
*
gNB_mac
->
sched_ctrlCommon
->
coreset
));
gNB_mac
->
sched_ctrlCommon
->
active_bwp
=
calloc
(
1
,
sizeof
(
*
gNB_mac
->
sched_ctrlCommon
->
active_bwp
));
fill_default_searchSpaceZero
(
gNB_mac
->
sched_ctrlCommon
->
search_space
);
fill_default_coresetZero
(
gNB_mac
->
sched_ctrlCommon
->
coreset
,
servingcellconfigcommon
);
fill_default_initialDownlinkBWP
(
gNB_mac
->
sched_ctrlCommon
->
active_bwp
,
servingcellconfigcommon
);
}
gNB_mac
->
sched_ctrlCommon
->
time_domain_allocation
=
time_domain_allocation
;
gNB_mac
->
sched_ctrlCommon
->
mcsTableIdx
=
mcsTableIdx
;
gNB_mac
->
sched_ctrlCommon
->
mcs
=
mcs
;
gNB_mac
->
sched_ctrlCommon
->
numDmrsCdmGrpsNoData
=
numDmrsCdmGrpsNoData
;
gNB_mac
->
sched_ctrlCommon
->
num_total_bytes
=
num_total_bytes
;
uint8_t
nr_of_candidates
;
find_aggregation_candidates
(
&
gNB_mac
->
sched_ctrlCommon
->
aggregation_level
,
&
nr_of_candidates
,
gNB_mac
->
sched_ctrlCommon
->
search_space
);
gNB_mac
->
sched_ctrlCommon
->
cce_index
=
allocate_nr_CCEs
(
RC
.
nrmac
[
module_id
],
gNB_mac
->
sched_ctrlCommon
->
active_bwp
,
gNB_mac
->
sched_ctrlCommon
->
coreset
,
gNB_mac
->
sched_ctrlCommon
->
aggregation_level
,
0
,
0
,
nr_of_candidates
);
if
(
gNB_mac
->
sched_ctrlCommon
->
cce_index
<
0
)
{
LOG_E
(
MAC
,
"%s(): could not find CCE for coreset0
\n
"
,
__func__
);
return
;
}
const
uint16_t
bwpSize
=
gNB_mac
->
type0_PDCCH_CSS_config
.
num_rbs
;
int
rbStart
=
gNB_mac
->
type0_PDCCH_CSS_config
.
cset_start_rb
;
// Calculate number of PRB_DMRS
uint8_t
N_PRB_DMRS
=
gNB_mac
->
sched_ctrlCommon
->
numDmrsCdmGrpsNoData
*
6
;
// Calculate number of symbols
struct
NR_PDSCH_TimeDomainResourceAllocationList
*
tdaList
=
gNB_mac
->
sched_ctrlCommon
->
active_bwp
->
bwp_Common
->
pdsch_ConfigCommon
->
choice
.
setup
->
pdsch_TimeDomainAllocationList
;
const
int
startSymbolAndLength
=
tdaList
->
list
.
array
[
gNB_mac
->
sched_ctrlCommon
->
time_domain_allocation
]
->
startSymbolAndLength
;
int
startSymbolIndex
,
nrOfSymbols
;
SLIV2SL
(
startSymbolAndLength
,
&
startSymbolIndex
,
&
nrOfSymbols
);
LOG_I
(
MAC
,
"SLIV = %i
\n
"
,
startSymbolAndLength
);
LOG_I
(
MAC
,
"startSymbolIndex = %i
\n
"
,
startSymbolIndex
);
LOG_I
(
MAC
,
"nrOfSymbols = %i
\n
"
,
nrOfSymbols
);
int
rbSize
=
0
;
uint32_t
TBS
=
0
;
do
{
rbSize
++
;
TBS
=
nr_compute_tbs
(
nr_get_Qm_dl
(
gNB_mac
->
sched_ctrlCommon
->
mcs
,
gNB_mac
->
sched_ctrlCommon
->
mcsTableIdx
),
nr_get_code_rate_dl
(
gNB_mac
->
sched_ctrlCommon
->
mcs
,
gNB_mac
->
sched_ctrlCommon
->
mcsTableIdx
),
rbSize
,
nrOfSymbols
,
N_PRB_DMRS
,
0
,
0
,
1
)
>>
3
;
}
while
(
rbStart
+
rbSize
<
bwpSize
&&
!
vrb_map
[
rbStart
+
rbSize
]
&&
TBS
<
gNB_mac
->
sched_ctrlCommon
->
num_total_bytes
);
gNB_mac
->
sched_ctrlCommon
->
rbSize
=
rbSize
;
gNB_mac
->
sched_ctrlCommon
->
rbStart
=
0
;
// Mark the corresponding RBs as used
for
(
int
rb
=
0
;
rb
<
gNB_mac
->
sched_ctrlCommon
->
rbSize
;
rb
++
)
{
vrb_map
[
rb
+
rbStart
]
=
1
;
}
}
void
nr_fill_nfapi_dl_sib1_pdu
(
int
Mod_idP
,
nfapi_nr_dl_tti_request_body_t
*
dl_req
,
uint32_t
TBS
,
int
StartSymbolIndex
,
int
NrOfSymbols
)
{
gNB_MAC_INST
*
gNB_mac
=
RC
.
nrmac
[
Mod_idP
];
NR_COMMON_channels_t
*
cc
=
gNB_mac
->
common_channels
;
NR_ServingCellConfigCommon_t
*
scc
=
cc
->
ServingCellConfigCommon
;
NR_CellGroupConfig_t
*
secondaryCellGroup
=
gNB_mac
->
secondaryCellGroupCommon
;
NR_BWP_Downlink_t
*
bwp
=
gNB_mac
->
sched_ctrlCommon
->
active_bwp
;
nfapi_nr_dl_tti_request_pdu_t
*
dl_tti_pdcch_pdu
=
&
dl_req
->
dl_tti_pdu_list
[
dl_req
->
nPDUs
];
memset
((
void
*
)
dl_tti_pdcch_pdu
,
0
,
sizeof
(
nfapi_nr_dl_tti_request_pdu_t
));
dl_tti_pdcch_pdu
->
PDUType
=
NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE
;
dl_tti_pdcch_pdu
->
PDUSize
=
(
uint8_t
)(
2
+
sizeof
(
nfapi_nr_dl_tti_pdcch_pdu
));
nfapi_nr_dl_tti_request_pdu_t
*
dl_tti_pdsch_pdu
=
&
dl_req
->
dl_tti_pdu_list
[
dl_req
->
nPDUs
+
1
];
memset
((
void
*
)
dl_tti_pdsch_pdu
,
0
,
sizeof
(
nfapi_nr_dl_tti_request_pdu_t
));
dl_tti_pdsch_pdu
->
PDUType
=
NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE
;
dl_tti_pdsch_pdu
->
PDUSize
=
(
uint8_t
)(
2
+
sizeof
(
nfapi_nr_dl_tti_pdsch_pdu
));
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu_rel15
=
&
dl_tti_pdcch_pdu
->
pdcch_pdu
.
pdcch_pdu_rel15
;
nfapi_nr_dl_tti_pdsch_pdu_rel15_t
*
pdsch_pdu_rel15
=
&
dl_tti_pdsch_pdu
->
pdsch_pdu
.
pdsch_pdu_rel15
;
pdcch_pdu_rel15
->
CoreSetType
=
NFAPI_NR_CSET_CONFIG_MIB_SIB1
;
pdsch_pdu_rel15
->
pduBitmap
=
0
;
pdsch_pdu_rel15
->
rnti
=
SI_RNTI
;
pdsch_pdu_rel15
->
pduIndex
=
gNB_mac
->
pdu_index
[
0
]
++
;
pdsch_pdu_rel15
->
BWPSize
=
gNB_mac
->
type0_PDCCH_CSS_config
.
num_rbs
;
pdsch_pdu_rel15
->
BWPStart
=
gNB_mac
->
type0_PDCCH_CSS_config
.
cset_start_rb
;
pdsch_pdu_rel15
->
SubcarrierSpacing
=
bwp
->
bwp_Common
->
genericParameters
.
subcarrierSpacing
;
if
(
bwp
->
bwp_Common
->
genericParameters
.
cyclicPrefix
)
{
pdsch_pdu_rel15
->
CyclicPrefix
=
*
bwp
->
bwp_Common
->
genericParameters
.
cyclicPrefix
;
}
else
{
pdsch_pdu_rel15
->
CyclicPrefix
=
0
;
}
pdsch_pdu_rel15
->
NrOfCodewords
=
1
;
pdsch_pdu_rel15
->
targetCodeRate
[
0
]
=
nr_get_code_rate_dl
(
gNB_mac
->
sched_ctrlCommon
->
mcs
,
0
);
pdsch_pdu_rel15
->
qamModOrder
[
0
]
=
2
;
pdsch_pdu_rel15
->
mcsIndex
[
0
]
=
gNB_mac
->
sched_ctrlCommon
->
mcs
;
pdsch_pdu_rel15
->
mcsTable
[
0
]
=
0
;
pdsch_pdu_rel15
->
rvIndex
[
0
]
=
nr_rv_round_map
[
0
];
pdsch_pdu_rel15
->
dataScramblingId
=
*
scc
->
physCellId
;
pdsch_pdu_rel15
->
nrOfLayers
=
1
;
pdsch_pdu_rel15
->
transmissionScheme
=
0
;
pdsch_pdu_rel15
->
refPoint
=
1
;
pdsch_pdu_rel15
->
dmrsConfigType
=
gNB_mac
->
sched_ctrlCommon
->
active_bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
dmrs_Type
==
NULL
?
0
:
1
;
pdsch_pdu_rel15
->
dlDmrsScramblingId
=
*
scc
->
physCellId
;
pdsch_pdu_rel15
->
SCID
=
0
;
pdsch_pdu_rel15
->
numDmrsCdmGrpsNoData
=
gNB_mac
->
sched_ctrlCommon
->
numDmrsCdmGrpsNoData
;
pdsch_pdu_rel15
->
dmrsPorts
=
1
;
pdsch_pdu_rel15
->
resourceAlloc
=
1
;
pdsch_pdu_rel15
->
rbStart
=
gNB_mac
->
sched_ctrlCommon
->
rbStart
;
pdsch_pdu_rel15
->
rbSize
=
gNB_mac
->
sched_ctrlCommon
->
rbSize
;
pdsch_pdu_rel15
->
VRBtoPRBMapping
=
0
;
pdsch_pdu_rel15
->
qamModOrder
[
0
]
=
nr_get_Qm_dl
(
gNB_mac
->
sched_ctrlCommon
->
mcs
,
gNB_mac
->
sched_ctrlCommon
->
mcsTableIdx
);
pdsch_pdu_rel15
->
TBSize
[
0
]
=
TBS
;
pdsch_pdu_rel15
->
mcsTable
[
0
]
=
gNB_mac
->
sched_ctrlCommon
->
mcsTableIdx
;
pdsch_pdu_rel15
->
StartSymbolIndex
=
StartSymbolIndex
;
pdsch_pdu_rel15
->
NrOfSymbols
=
NrOfSymbols
;
pdsch_pdu_rel15
->
dlDmrsSymbPos
=
fill_dmrs_mask
(
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
,
scc
->
dmrs_TypeA_Position
,
pdsch_pdu_rel15
->
NrOfSymbols
);
dci_pdu_rel15_t
dci_pdu_rel15
[
MAX_DCI_CORESET
];
memset
(
dci_pdu_rel15
,
0
,
sizeof
(
dci_pdu_rel15_t
)
*
MAX_DCI_CORESET
);
dci_pdu_rel15
[
0
].
bwp_indicator
.
val
=
gNB_mac
->
sched_ctrlCommon
->
active_bwp
->
bwp_Id
;
// frequency domain assignment
dci_pdu_rel15
[
0
].
frequency_domain_assignment
.
val
=
PRBalloc_to_locationandbandwidth0
(
pdsch_pdu_rel15
->
rbSize
,
pdsch_pdu_rel15
->
rbStart
,
gNB_mac
->
type0_PDCCH_CSS_config
.
num_rbs
);
dci_pdu_rel15
[
0
].
time_domain_assignment
.
val
=
gNB_mac
->
sched_ctrlCommon
->
time_domain_allocation
;
dci_pdu_rel15
[
0
].
mcs
=
gNB_mac
->
sched_ctrlCommon
->
mcs
;
dci_pdu_rel15
[
0
].
rv
=
pdsch_pdu_rel15
->
rvIndex
[
0
];
dci_pdu_rel15
[
0
].
harq_pid
=
0
;
dci_pdu_rel15
[
0
].
ndi
=
0
;
dci_pdu_rel15
[
0
].
dai
[
0
].
val
=
0
;
dci_pdu_rel15
[
0
].
tpc
=
0
;
// table 7.2.1-1 in 38.213
dci_pdu_rel15
[
0
].
pucch_resource_indicator
=
0
;
dci_pdu_rel15
[
0
].
pdsch_to_harq_feedback_timing_indicator
.
val
=
0
;
dci_pdu_rel15
[
0
].
antenna_ports
.
val
=
0
;
dci_pdu_rel15
[
0
].
dmrs_sequence_initialization
.
val
=
pdsch_pdu_rel15
->
SCID
;
nr_configure_pdcch
(
gNB_mac
,
pdcch_pdu_rel15
,
SI_RNTI
,
gNB_mac
->
sched_ctrlCommon
->
search_space
,
gNB_mac
->
sched_ctrlCommon
->
coreset
,
scc
,
bwp
,
gNB_mac
->
sched_ctrlCommon
->
aggregation_level
,
gNB_mac
->
sched_ctrlCommon
->
cce_index
);
int
dci_formats
[
2
];
int
rnti_types
[
2
];
dci_formats
[
0
]
=
NR_DL_DCI_FORMAT_1_0
;
rnti_types
[
0
]
=
NR_RNTI_SI
;
fill_dci_pdu_rel15
(
scc
,
secondaryCellGroup
,
pdcch_pdu_rel15
,
dci_pdu_rel15
,
dci_formats
,
rnti_types
,
pdsch_pdu_rel15
->
BWPSize
,
gNB_mac
->
sched_ctrlCommon
->
active_bwp
->
bwp_Id
);
dl_req
->
nPDUs
+=
2
;
LOG_D
(
MAC
,
"BWPSize: %i
\n
"
,
pdcch_pdu_rel15
->
BWPSize
);
LOG_D
(
MAC
,
"BWPStart: %i
\n
"
,
pdcch_pdu_rel15
->
BWPStart
);
LOG_D
(
MAC
,
"SubcarrierSpacing: %i
\n
"
,
pdcch_pdu_rel15
->
SubcarrierSpacing
);
LOG_D
(
MAC
,
"CyclicPrefix: %i
\n
"
,
pdcch_pdu_rel15
->
CyclicPrefix
);
LOG_D
(
MAC
,
"StartSymbolIndex: %i
\n
"
,
pdcch_pdu_rel15
->
StartSymbolIndex
);
LOG_D
(
MAC
,
"DurationSymbols: %i
\n
"
,
pdcch_pdu_rel15
->
DurationSymbols
);
for
(
int
n
=
0
;
n
<
6
;
n
++
)
LOG_D
(
MAC
,
"FreqDomainResource[%i]: %x
\n
"
,
n
,
pdcch_pdu_rel15
->
FreqDomainResource
[
n
]);
LOG_D
(
MAC
,
"CceRegMappingType: %i
\n
"
,
pdcch_pdu_rel15
->
CceRegMappingType
);
LOG_D
(
MAC
,
"RegBundleSize: %i
\n
"
,
pdcch_pdu_rel15
->
RegBundleSize
);
LOG_D
(
MAC
,
"InterleaverSize: %i
\n
"
,
pdcch_pdu_rel15
->
InterleaverSize
);
LOG_D
(
MAC
,
"CoreSetType: %i
\n
"
,
pdcch_pdu_rel15
->
CoreSetType
);
LOG_D
(
MAC
,
"ShiftIndex: %i
\n
"
,
pdcch_pdu_rel15
->
ShiftIndex
);
LOG_D
(
MAC
,
"precoderGranularity: %i
\n
"
,
pdcch_pdu_rel15
->
precoderGranularity
);
LOG_D
(
MAC
,
"numDlDci: %i
\n
"
,
pdcch_pdu_rel15
->
numDlDci
);
}
void
schedule_nr_sib1
(
module_id_t
module_idP
,
frame_t
frameP
,
sub_frame_t
slotP
)
{
LOG_D
(
MAC
,
"Schedule_nr_sib1: frameP = %i, slotP = %i
\n
"
,
frameP
,
slotP
);
// static values
const
int
CC_id
=
0
;
int
time_domain_allocation
=
2
;
// FIXME: For OAI-UE (2), For 3rd party implementation and 3GPP compliant (4)
uint8_t
mcsTableIdx
=
0
;
uint8_t
mcs
=
0
;
uint8_t
numDmrsCdmGrpsNoData
=
1
;
// FIXME: For OAI-UE (1), For 3rd party implementation and 3GPP compliant (2)
gNB_MAC_INST
*
gNB_mac
=
RC
.
nrmac
[
module_idP
];
if
(
(
frameP
%
2
==
gNB_mac
->
type0_PDCCH_CSS_config
.
sfn_c
)
&&
(
slotP
==
gNB_mac
->
type0_PDCCH_CSS_config
.
n_0
)
&&
(
gNB_mac
->
type0_PDCCH_CSS_config
.
num_rbs
>
0
)
)
{
LOG_D
(
MAC
,
"> SIB1 transmission
\n
"
);
// Get SIB1
uint8_t
sib1_payload
[
100
];
uint8_t
sib1_sdu_length
=
mac_rrc_nr_data_req
(
module_idP
,
CC_id
,
frameP
,
BCCH
,
1
,
sib1_payload
);
LOG_D
(
MAC
,
"sib1_sdu_length = %i
\n
"
,
sib1_sdu_length
);
LOG_I
(
MAC
,
"SIB1:
\n
"
);
for
(
int
i
=
0
;
i
<
sib1_sdu_length
;
i
++
)
LOG_I
(
MAC
,
"byte %d : %x
\n
"
,
i
,((
uint8_t
*
)
sib1_payload
)[
i
]);
// Configure sched_ctrlCommon for SIB1
schedule_control_sib1
(
module_idP
,
CC_id
,
time_domain_allocation
,
mcsTableIdx
,
mcs
,
numDmrsCdmGrpsNoData
,
sib1_sdu_length
);
// Calculate number of symbols
int
startSymbolIndex
,
nrOfSymbols
;
struct
NR_PDSCH_TimeDomainResourceAllocationList
*
tdaList
=
gNB_mac
->
sched_ctrlCommon
->
active_bwp
->
bwp_Common
->
pdsch_ConfigCommon
->
choice
.
setup
->
pdsch_TimeDomainAllocationList
;
const
int
startSymbolAndLength
=
tdaList
->
list
.
array
[
gNB_mac
->
sched_ctrlCommon
->
time_domain_allocation
]
->
startSymbolAndLength
;
SLIV2SL
(
startSymbolAndLength
,
&
startSymbolIndex
,
&
nrOfSymbols
);
// Calculate number of PRB_DMRS
uint8_t
N_PRB_DMRS
=
gNB_mac
->
sched_ctrlCommon
->
numDmrsCdmGrpsNoData
*
6
;
const
uint32_t
TBS
=
nr_compute_tbs
(
nr_get_Qm_dl
(
gNB_mac
->
sched_ctrlCommon
->
mcs
,
gNB_mac
->
sched_ctrlCommon
->
mcsTableIdx
),
nr_get_code_rate_dl
(
gNB_mac
->
sched_ctrlCommon
->
mcs
,
gNB_mac
->
sched_ctrlCommon
->
mcsTableIdx
),
gNB_mac
->
sched_ctrlCommon
->
rbSize
,
nrOfSymbols
,
N_PRB_DMRS
,
0
,
0
,
1
)
>>
3
;
nfapi_nr_dl_tti_request_body_t
*
dl_req
=
&
gNB_mac
->
DL_req
[
CC_id
].
dl_tti_request_body
;
nr_fill_nfapi_dl_sib1_pdu
(
module_idP
,
dl_req
,
TBS
,
startSymbolIndex
,
nrOfSymbols
);
const
int
ntx_req
=
gNB_mac
->
TX_req
[
CC_id
].
Number_of_PDUs
;
nfapi_nr_pdu_t
*
tx_req
=
&
gNB_mac
->
TX_req
[
CC_id
].
pdu_list
[
ntx_req
];
// Data to be transmitted
bzero
(
tx_req
->
TLVs
[
0
].
value
.
direct
,
MAX_NR_DLSCH_PAYLOAD_BYTES
);
memcpy
(
tx_req
->
TLVs
[
0
].
value
.
direct
,
sib1_payload
,
sib1_sdu_length
);
tx_req
->
PDU_length
=
TBS
;
tx_req
->
PDU_index
=
gNB_mac
->
pdu_index
[
0
]
++
;
tx_req
->
num_TLV
=
1
;
tx_req
->
TLVs
[
0
].
length
=
TBS
+
2
;
gNB_mac
->
TX_req
[
CC_id
].
Number_of_PDUs
++
;
gNB_mac
->
TX_req
[
CC_id
].
SFN
=
frameP
;
gNB_mac
->
TX_req
[
CC_id
].
Slot
=
slotP
;
}
}
\ No newline at end of file
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
View file @
b97e1b57
...
@@ -628,7 +628,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
...
@@ -628,7 +628,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
gNB_MAC_INST
*
gNB_mac
=
RC
.
nrmac
[
module_id
];
gNB_MAC_INST
*
gNB_mac
=
RC
.
nrmac
[
module_id
];
/* PREPROCESSOR */
/* PREPROCESSOR */
gNB_mac
->
pre_processor_dl
(
module_id
,
frame
,
slot
,
num_slots_per_tdd
);
//gNB_mac->pre_processor_dl(module_id, frame, slot, num_slots_per_tdd);
nr_simple_dlsch_preprocessor
(
module_id
,
frame
,
slot
,
num_slots_per_tdd
);
// FIXME: gNB_mac->pre_processor_dl(module_id, frame, slot, num_slots_per_tdd); - Exit by assert
NR_UE_info_t
*
UE_info
=
&
gNB_mac
->
UE_info
;
NR_UE_info_t
*
UE_info
=
&
gNB_mac
->
UE_info
;
...
...
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