From dcb48081a0b7334919ad89e09d5785697c3ab139 Mon Sep 17 00:00:00 2001
From: gabrielC <couturier.gabriel@gmail.com>
Date: Thu, 23 Feb 2017 08:54:04 +0100
Subject: [PATCH] Merge remote-tracking branch 'origin/dci_handling_br' into
develop_integration_w08
---
openair1/PHY/LTE_TRANSPORT/dci.h | 50 +
openair1/PHY/LTE_TRANSPORT/dci_tools.c | 4011 +++++++++--------
.../PHY/LTE_TRANSPORT/dlsch_demodulation.c | 2 -
.../PHY/LTE_TRANSPORT/dlsch_llr_computation.c | 3 -
openair1/PHY/LTE_TRANSPORT/phich.c | 2 +-
openair1/PHY/LTE_TRANSPORT/prach.c | 1 -
6 files changed, 2179 insertions(+), 1890 deletions(-)
mode change 100755 => 100644 openair1/PHY/LTE_TRANSPORT/dci_tools.c
diff --git a/openair1/PHY/LTE_TRANSPORT/dci.h b/openair1/PHY/LTE_TRANSPORT/dci.h
index 74c150ccab..c250e7c10a 100644
--- a/openair1/PHY/LTE_TRANSPORT/dci.h
+++ b/openair1/PHY/LTE_TRANSPORT/dci.h
@@ -2969,3 +2969,53 @@ struct DCI0A_20_MHz {
#define sizeof_DCI0A_20MHz 17
#define MAX_DCI_SIZE_BITS 45
+
+struct DCI_INFO_EXTRACTED {
+ /// type = 0 => DCI Format 0, type = 1 => DCI Format 1A
+ uint8_t type;
+ /// Resource Allocation Header
+ uint8_t rah;
+ /// HARQ Process
+ uint8_t harq_pid;
+ /// CQI Request
+ uint8_t cqi_req;
+ /// SRS Request
+ uint8_t srs_req;
+ /// Power Control
+ uint8_t TPC;
+ /// Localized/Distributed VRB
+ uint8_t vrb_type;
+ /// RB Assignment (ceil(log2(N_RB_DL/P)) bits)
+ uint32_t rballoc;
+ // Applicable only when vrb_type = 1
+ uint8_t Ngap;
+ /// Cyclic shift
+ uint8_t cshift;
+ /// Hopping flag
+ uint8_t hopping;
+ /// Downlink Assignment Index
+ uint8_t dai;
+ /// DAI (TDD)
+ uint8_t ulindex;
+
+ /// TB swap
+ uint8_t tb_swap;
+ /// TPMI information for precoding
+ uint8_t tpmi;
+ /// Redundancy version 2
+ uint8_t rv2;
+ /// New Data Indicator 2
+ uint8_t ndi2;
+ /// Modulation and Coding Scheme and Redundancy Version 2
+ uint8_t mcs2;
+ /// Redundancy version 1
+ uint8_t rv1;
+ /// New Data Indicator 1
+ uint8_t ndi1;
+ /// Modulation and Coding Scheme and Redundancy Version 1
+ uint8_t mcs1;
+
+ /// Scrambling ID
+ uint64_t ap_si_nl_id:3;
+};
+typedef struct DCI_INFO_EXTRACTED DCI_INFO_EXTRACTED_t;
diff --git a/openair1/PHY/LTE_TRANSPORT/dci_tools.c b/openair1/PHY/LTE_TRANSPORT/dci_tools.c
old mode 100755
new mode 100644
index c4dfecf848..7c1fab0350
--- a/openair1/PHY/LTE_TRANSPORT/dci_tools.c
+++ b/openair1/PHY/LTE_TRANSPORT/dci_tools.c
@@ -3941,2139 +3941,2384 @@ int dump_dci(LTE_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci)
}
-int generate_ue_dlsch_params_from_dci(int frame,
- uint8_t subframe,
- void *dci_pdu,
- uint16_t rnti,
- DCI_format_t dci_format,
- LTE_UE_DLSCH_t **dlsch,
- LTE_DL_FRAME_PARMS *frame_parms,
- PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
- uint16_t si_rnti,
- uint16_t ra_rnti,
- uint16_t p_rnti,
- uint8_t beamforming_mode,
- uint16_t tc_rnti)
+void extract_dci1A_info(uint8_t N_RB_DL, lte_frame_type_t frame_type, void *dci_pdu, DCI_INFO_EXTRACTED_t *pdci_info_extarcted)
{
+ uint8_t harq_pid=0;
+ uint32_t rballoc=0;
+ uint8_t vrb_type=0;
+ uint8_t mcs=0;
+ uint8_t rv=0;
+ uint8_t ndi=0;
+ uint8_t TPC=0;
- uint8_t harq_pid=0;
- uint32_t rballoc=0,RIV_max=0;
- uint8_t frame_type=frame_parms->frame_type;
- uint8_t vrb_type=0;
- uint8_t mcs=0,mcs1=0,mcs2=0;
- uint8_t rv=0,rv1=0,rv2=0;
- uint8_t TB0_active=0,TB1_active=0;
- uint8_t ndi=0,ndi1=0,ndi2=0;
- uint8_t rah=0;
- uint8_t TPC=0;
- uint8_t NPRB=0,tbswap=0,tpmi=0;
- uint8_t Ngap;
- uint8_t dai=0;
- LTE_UE_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
- LTE_DL_UE_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
-
- if (!dlsch[0]) return -1;
-
-#ifdef DEBUG_DCI
- LOG_D(PHY,"dci_tools.c: Filling ue dlsch params -> rnti %x, SFN/SF %d/%d, dci_format %s\n",
- rnti,
- frame%1024,
- subframe,
- (dci_format==format0? "Format 0":(
- dci_format==format1? "format 1":(
- dci_format==format1A? "format 1A":(
- dci_format==format1B? "format 1B":(
- dci_format==format1C? "format 1C":(
- dci_format==format1D? "format 1D":(
- dci_format==format1E_2A_M10PRB? "format 1E_2A_M10PRB":(
- dci_format==format2? "format 2":(
- dci_format==format2A? "format 2A":(
- dci_format==format2B? "format 2B":(
- dci_format==format2C? "format 2C":(
- dci_format==format2D? "format 2D":(
- dci_format==format3? "format 3": "UNKNOWN"
- ))))))))))))));
-#endif
-
- switch (dci_format) {
+ uint8_t dai=0;
- case format0: // This is an ULSCH allocation so nothing here, inform MAC
- LOG_E(PHY,"format0 not possible\n");
- return(-1);
- break;
+ switch (N_RB_DL) {
+ case 6:
+ if (frame_type == TDD) {
+ vrb_type = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->vrb_type;
+ mcs = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->mcs;
+ rballoc = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->rballoc;
+ rv = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->rv;
+ ndi = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->ndi;
+ TPC = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->TPC;
+ harq_pid = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->harq_pid;
+ dai = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->dai;
+ // printf("TDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
+ } else {
+ vrb_type = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->vrb_type;
+ mcs = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->mcs;
+ rballoc = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->rballoc;
+ rv = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->rv;
+ ndi = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->ndi;
+ TPC = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->TPC;
+ harq_pid = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->harq_pid;
+ //printf("FDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
+ }
+ break;
- case format1A:
- if (!dlsch[0]) return -1;
+ case 25:
- switch (frame_parms->N_RB_DL) {
- case 6:
- if (frame_type == TDD) {
- vrb_type = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->vrb_type;
- mcs = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->mcs;
- rballoc = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->rballoc;
- rv = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->rv;
- ndi = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->ndi;
- TPC = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->TPC;
- harq_pid = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->harq_pid;
- dai = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->dai;
- // printf("TDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
- } else {
- vrb_type = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->vrb_type;
- mcs = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->mcs;
- rballoc = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->rballoc;
- rv = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->rv;
- ndi = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->ndi;
- TPC = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->TPC;
- harq_pid = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->harq_pid;
- //printf("FDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
- }
+ if (frame_type == TDD) {
+ vrb_type = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->vrb_type;
+ mcs = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->mcs;
+ rballoc = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->rballoc;
+ rv = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->rv;
+ ndi = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->ndi;
+ TPC = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->TPC;
+ harq_pid = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->harq_pid;
+ dai = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->dai;
+ //printf("TDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
+ } else {
+ vrb_type = ((DCI1A_5MHz_FDD_t *)dci_pdu)->vrb_type;
+ mcs = ((DCI1A_5MHz_FDD_t *)dci_pdu)->mcs;
+ rballoc = ((DCI1A_5MHz_FDD_t *)dci_pdu)->rballoc;
+ rv = ((DCI1A_5MHz_FDD_t *)dci_pdu)->rv;
+ ndi = ((DCI1A_5MHz_FDD_t *)dci_pdu)->ndi;
+ TPC = ((DCI1A_5MHz_FDD_t *)dci_pdu)->TPC;
+ harq_pid = ((DCI1A_5MHz_FDD_t *)dci_pdu)->harq_pid;
+ //printf("FDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
+ }
- if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) { //
- harq_pid = 0;
- dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
- // see 36-212 V8.6.0 p. 45
- NPRB = (TPC&1) + 2;
- } else {
+ break;
- if (harq_pid>=8) {
- LOG_E(PHY,"Format 1A: harq_pid=%d >= 8\n", harq_pid);
- return(-1);
+ case 50:
+ if (frame_type == TDD) {
+ vrb_type = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->vrb_type;
+ mcs = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->mcs;
+ rballoc = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->rballoc;
+ rv = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->rv;
+ ndi = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->ndi;
+ TPC = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->TPC;
+ harq_pid = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->harq_pid;
+ dai = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->dai;
+ // printf("TDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
+ } else {
+ vrb_type = ((DCI1A_10MHz_FDD_t *)dci_pdu)->vrb_type;
+ mcs = ((DCI1A_10MHz_FDD_t *)dci_pdu)->mcs;
+ rballoc = ((DCI1A_10MHz_FDD_t *)dci_pdu)->rballoc;
+ rv = ((DCI1A_10MHz_FDD_t *)dci_pdu)->rv;
+ ndi = ((DCI1A_10MHz_FDD_t *)dci_pdu)->ndi;
+ TPC = ((DCI1A_10MHz_FDD_t *)dci_pdu)->TPC;
+ harq_pid = ((DCI1A_10MHz_FDD_t *)dci_pdu)->harq_pid;
+ //printf("FDD 1A: mcs %d, vrb_type %d, rballoc %x,ndi %d, rv %d, TPC %d\n",mcs,vrb_type,rballoc,ndi,rv,TPC);
}
+ break;
- dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
+ case 100:
+ if (frame_type == TDD) {
+ vrb_type = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->vrb_type;
+ mcs = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->mcs;
+ rballoc = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->rballoc;
+ rv = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->rv;
+ ndi = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->ndi;
+ TPC = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->TPC;
+ harq_pid = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->harq_pid;
+ dai = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->dai;
+ // printf("TDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
+ } else {
+ vrb_type = ((DCI1A_20MHz_FDD_t *)dci_pdu)->vrb_type;
+ mcs = ((DCI1A_20MHz_FDD_t *)dci_pdu)->mcs;
+ rballoc = ((DCI1A_20MHz_FDD_t *)dci_pdu)->rballoc;
+ rv = ((DCI1A_20MHz_FDD_t *)dci_pdu)->rv;
+ ndi = ((DCI1A_20MHz_FDD_t *)dci_pdu)->ndi;
+ TPC = ((DCI1A_20MHz_FDD_t *)dci_pdu)->TPC;
+ harq_pid = ((DCI1A_20MHz_FDD_t *)dci_pdu)->harq_pid;
+ //printf("FDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
+ }
+ break;
+ }
+ pdci_info_extarcted->vrb_type = vrb_type;
+ pdci_info_extarcted->mcs1 = mcs;
+ pdci_info_extarcted->rballoc = rballoc;
+ pdci_info_extarcted->rv1 = rv;
+ pdci_info_extarcted->ndi1 = ndi;
+ pdci_info_extarcted->TPC = TPC;
+ pdci_info_extarcted->harq_pid = harq_pid;
+ pdci_info_extarcted->dai = dai;
+}
- NPRB = RIV2nb_rb_LUT6[rballoc];
- dlsch0_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3];
+void extract_dci1C_info(uint8_t N_RB_DL, lte_frame_type_t frame_type, void *dci_pdu, DCI_INFO_EXTRACTED_t *pdci_info_extarcted)
+{
- }
+ uint32_t rballoc=0;
+ uint8_t mcs=0;
- if (vrb_type == LOCALIZED) {
- dlsch0_harq->rb_alloc_even[0] = localRIV2alloc_LUT6[rballoc];
- dlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT6[rballoc];
- }
- else {
- dlsch0_harq->rb_alloc_even[0] = distRIV2alloc_even_LUT6[rballoc];
- dlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_odd_LUT6[rballoc];
- }
- dlsch0_harq->vrb_type = vrb_type;
+ switch (N_RB_DL) {
+ case 6:
+ mcs = ((DCI1C_5MHz_t *)dci_pdu)->mcs;
+ rballoc = conv_1C_RIV(((DCI1C_5MHz_t *)dci_pdu)->rballoc,6);
+ break;
- dlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rballoc];//NPRB;
- RIV_max = RIV_max6;
+ case 25:
+ mcs = ((DCI1C_5MHz_t *)dci_pdu)->mcs;
+ rballoc = conv_1C_RIV(((DCI1C_5MHz_t *)dci_pdu)->rballoc,6);
- break;
+ break;
- case 25:
+ case 50:
+ mcs = ((DCI1C_10MHz_t *)dci_pdu)->mcs;
+ rballoc = conv_1C_RIV(((DCI1C_10MHz_t *)dci_pdu)->rballoc,6);
- if (frame_type == TDD) {
- vrb_type = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->vrb_type;
- mcs = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->mcs;
- rballoc = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->rballoc;
- rv = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->rv;
- ndi = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->ndi;
- TPC = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->TPC;
- harq_pid = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->harq_pid;
- dai = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->dai;
- //printf("TDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
- } else {
- vrb_type = ((DCI1A_5MHz_FDD_t *)dci_pdu)->vrb_type;
- mcs = ((DCI1A_5MHz_FDD_t *)dci_pdu)->mcs;
- rballoc = ((DCI1A_5MHz_FDD_t *)dci_pdu)->rballoc;
- rv = ((DCI1A_5MHz_FDD_t *)dci_pdu)->rv;
- ndi = ((DCI1A_5MHz_FDD_t *)dci_pdu)->ndi;
- TPC = ((DCI1A_5MHz_FDD_t *)dci_pdu)->TPC;
- harq_pid = ((DCI1A_5MHz_FDD_t *)dci_pdu)->harq_pid;
- //printf("FDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
- }
+ break;
- if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) { //
- harq_pid = 0;
- // see 36-212 V8.6.0 p. 45
- NPRB = (TPC&1) + 2;
- dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
- } else {
+ case 100:
+ mcs = ((DCI1C_20MHz_t *)dci_pdu)->mcs;
+ rballoc = conv_1C_RIV(((DCI1C_20MHz_t *)dci_pdu)->rballoc,6);
+ break;
- if (harq_pid>=8) {
- LOG_E(PHY,"Format 1A: harq_pid=%d >= 8\n", harq_pid);
- return(-1);
+ default:
+ AssertFatal(0,"Format 1C: Unknown N_RB_DL %d\n",N_RB_DL);
+ break;
}
- dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
- NPRB = RIV2nb_rb_LUT25[rballoc];
- dlsch0_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3];
- }
+ pdci_info_extarcted->mcs1 = mcs;
+ pdci_info_extarcted->rballoc = rballoc;
+}
- if (vrb_type == LOCALIZED) {
- dlsch0_harq->rb_alloc_even[0] = localRIV2alloc_LUT25[rballoc];
- dlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT25[rballoc];
- }
- else {
- dlsch0_harq->rb_alloc_even[0] = distRIV2alloc_even_LUT25[rballoc];
- dlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_odd_LUT25[rballoc];
- }
- dlsch0_harq->vrb_type = vrb_type;
- dlsch0_harq->nb_rb = RIV2nb_rb_LUT25[rballoc];
- RIV_max = RIV_max25;
+void extract_dci1_info(uint8_t N_RB_DL, lte_frame_type_t frame_type, void *dci_pdu, DCI_INFO_EXTRACTED_t *pdci_info_extarcted)
+{
- break;
+ uint32_t rballoc=0;
+ uint8_t mcs=0;
+ uint8_t rah=0;
+ uint8_t rv=0;
+ uint8_t TPC=0;
+ uint8_t ndi=0;
+ uint8_t harq_pid=0;
- case 50:
- if (frame_type == TDD) {
- vrb_type = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->vrb_type;
- mcs = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->mcs;
- rballoc = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->rballoc;
- rv = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->rv;
- ndi = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->ndi;
- TPC = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->TPC;
- harq_pid = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->harq_pid;
- dai = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->dai;
- // printf("TDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
- } else {
- vrb_type = ((DCI1A_10MHz_FDD_t *)dci_pdu)->vrb_type;
- mcs = ((DCI1A_10MHz_FDD_t *)dci_pdu)->mcs;
- rballoc = ((DCI1A_10MHz_FDD_t *)dci_pdu)->rballoc;
- rv = ((DCI1A_10MHz_FDD_t *)dci_pdu)->rv;
- ndi = ((DCI1A_10MHz_FDD_t *)dci_pdu)->ndi;
- TPC = ((DCI1A_10MHz_FDD_t *)dci_pdu)->TPC;
- harq_pid = ((DCI1A_10MHz_FDD_t *)dci_pdu)->harq_pid;
- //printf("FDD 1A: mcs %d, vrb_type %d, rballoc %x,ndi %d, rv %d, TPC %d\n",mcs,vrb_type,rballoc,ndi,rv,TPC);
- }
+ switch (N_RB_DL) {
+ case 6:
+ if (frame_type == TDD) {
+ mcs = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->mcs;
+ rballoc = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->rah;
+ rv = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->rv;
+ TPC = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->TPC;
+ ndi = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->ndi;
+ harq_pid = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->harq_pid;
+ } else {
+ mcs = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->mcs;
+ rah = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->rah;
+ rballoc = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->rballoc;
+ rv = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->rv;
+ TPC = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->TPC;
+ ndi = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->ndi;
+ harq_pid = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->harq_pid;
+ }
- if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) { //
- harq_pid = 0;
- dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
- // see 36-212 V8.6.0 p. 45
- NPRB = (TPC&1) + 2;
- } else {
+ break;
- if (harq_pid>=8) {
- LOG_E(PHY,"Format 1A: harq_pid=%d >= 8\n", harq_pid);
- return(-1);
+ case 25:
+ if (frame_type == TDD) {
+ mcs = ((DCI1_5MHz_TDD_t *)dci_pdu)->mcs;
+ rballoc = ((DCI1_5MHz_TDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI1_5MHz_TDD_t *)dci_pdu)->rah;
+ rv = ((DCI1_5MHz_TDD_t *)dci_pdu)->rv;
+ TPC = ((DCI1_5MHz_TDD_t *)dci_pdu)->TPC;
+ ndi = ((DCI1_5MHz_TDD_t *)dci_pdu)->ndi;
+ harq_pid = ((DCI1_5MHz_TDD_t *)dci_pdu)->harq_pid;
+ } else {
+ mcs = ((DCI1_5MHz_FDD_t *)dci_pdu)->mcs;
+ rah = ((DCI1_5MHz_FDD_t *)dci_pdu)->rah;
+ rballoc = ((DCI1_5MHz_FDD_t *)dci_pdu)->rballoc;
+ rv = ((DCI1_5MHz_FDD_t *)dci_pdu)->rv;
+ TPC = ((DCI1_5MHz_FDD_t *)dci_pdu)->TPC;
+ ndi = ((DCI1_5MHz_FDD_t *)dci_pdu)->ndi;
+ harq_pid = ((DCI1_5MHz_FDD_t *)dci_pdu)->harq_pid;
}
- dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
- NPRB = RIV2nb_rb_LUT50[rballoc];
- dlsch0_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3];
- }
+ break;
- if (vrb_type == LOCALIZED) {
- dlsch0_harq->rb_alloc_even[0] = localRIV2alloc_LUT50_0[rballoc];
- dlsch0_harq->rb_alloc_even[1] = localRIV2alloc_LUT50_1[rballoc];
- dlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT50_0[rballoc];
- dlsch0_harq->rb_alloc_odd[1] = localRIV2alloc_LUT50_1[rballoc];
- // printf("rballoc: %08x.%08x\n",dlsch0_harq->rb_alloc_even[0],dlsch0_harq->rb_alloc_even[1]);
- } else { // DISTRIBUTED
- if ((rballoc&(1<<10)) == 0) {
- rballoc = rballoc&(~(1<<10));
- dlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT50_0[rballoc];
- dlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT50_1[rballoc];
- dlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT50_0[rballoc];
- dlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT50_1[rballoc];
- }
- else {
- rballoc = rballoc&(~(1<<10));
- dlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT50_0[rballoc];
- dlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT50_1[rballoc];
- dlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT50_0[rballoc];
- dlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT50_1[rballoc];
- }
- }
- dlsch0_harq->vrb_type = vrb_type;
+ case 50:
+ if (frame_type == TDD) {
+ mcs = ((DCI1_10MHz_TDD_t *)dci_pdu)->mcs;
+ rballoc = ((DCI1_10MHz_TDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI1_10MHz_TDD_t *)dci_pdu)->rah;
+ rv = ((DCI1_10MHz_TDD_t *)dci_pdu)->rv;
+ TPC = ((DCI1_10MHz_TDD_t *)dci_pdu)->TPC;
+ ndi = ((DCI1_10MHz_TDD_t *)dci_pdu)->ndi;
+ harq_pid = ((DCI1_10MHz_TDD_t *)dci_pdu)->harq_pid;
+ } else {
+ mcs = ((DCI1_10MHz_FDD_t *)dci_pdu)->mcs;
+ rah = ((DCI1_10MHz_FDD_t *)dci_pdu)->rah;
+ rballoc = ((DCI1_10MHz_FDD_t *)dci_pdu)->rballoc;
+ rv = ((DCI1_10MHz_FDD_t *)dci_pdu)->rv;
+ TPC = ((DCI1_10MHz_FDD_t *)dci_pdu)->TPC;
+ ndi = ((DCI1_10MHz_FDD_t *)dci_pdu)->ndi;
+ harq_pid = ((DCI1_10MHz_FDD_t *)dci_pdu)->harq_pid;
+ }
- dlsch0_harq->nb_rb = RIV2nb_rb_LUT50[rballoc];//NPRB;
- RIV_max = RIV_max50;
- break;
+ break;
case 100:
- if (frame_type == TDD) {
- vrb_type = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->vrb_type;
- mcs = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->mcs;
- rballoc = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->rballoc;
- rv = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->rv;
- ndi = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->ndi;
- TPC = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->TPC;
- harq_pid = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->harq_pid;
- dai = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->dai;
- // printf("TDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
- } else {
- vrb_type = ((DCI1A_20MHz_FDD_t *)dci_pdu)->vrb_type;
- mcs = ((DCI1A_20MHz_FDD_t *)dci_pdu)->mcs;
- rballoc = ((DCI1A_20MHz_FDD_t *)dci_pdu)->rballoc;
- rv = ((DCI1A_20MHz_FDD_t *)dci_pdu)->rv;
- ndi = ((DCI1A_20MHz_FDD_t *)dci_pdu)->ndi;
- TPC = ((DCI1A_20MHz_FDD_t *)dci_pdu)->TPC;
- harq_pid = ((DCI1A_20MHz_FDD_t *)dci_pdu)->harq_pid;
- //printf("FDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
- }
-
- if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) { //
- harq_pid = 0;
- dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
- // see 36-212 V8.6.0 p. 45
- NPRB = (TPC&1) + 2;
- } else {
-
- if (harq_pid>=8) {
- LOG_E(PHY,"Format 1A: harq_pid=%d >= 8\n", harq_pid);
- return(-1);
+ if (frame_type == TDD) {
+ mcs = ((DCI1_20MHz_TDD_t *)dci_pdu)->mcs;
+ rballoc = ((DCI1_20MHz_TDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI1_20MHz_TDD_t *)dci_pdu)->rah;
+ rv = ((DCI1_20MHz_TDD_t *)dci_pdu)->rv;
+ TPC = ((DCI1_20MHz_TDD_t *)dci_pdu)->TPC;
+ ndi = ((DCI1_20MHz_TDD_t *)dci_pdu)->ndi;
+ harq_pid = ((DCI1_20MHz_TDD_t *)dci_pdu)->harq_pid;
+ } else {
+ mcs = ((DCI1_20MHz_FDD_t *)dci_pdu)->mcs;
+ rah = ((DCI1_20MHz_FDD_t *)dci_pdu)->rah;
+ rballoc = ((DCI1_20MHz_FDD_t *)dci_pdu)->rballoc;
+ rv = ((DCI1_20MHz_FDD_t *)dci_pdu)->rv;
+ TPC = ((DCI1_20MHz_FDD_t *)dci_pdu)->TPC;
+ ndi = ((DCI1_20MHz_FDD_t *)dci_pdu)->ndi;
+ harq_pid = ((DCI1_20MHz_FDD_t *)dci_pdu)->harq_pid;
}
- dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
- NPRB = RIV2nb_rb_LUT100[rballoc];
- dlsch0_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3];
- }
-
- if (vrb_type == LOCALIZED) {
- dlsch0_harq->rb_alloc_even[0] = localRIV2alloc_LUT50_0[rballoc];
- dlsch0_harq->rb_alloc_even[1] = localRIV2alloc_LUT50_1[rballoc];
- dlsch0_harq->rb_alloc_even[2] = localRIV2alloc_LUT100_2[rballoc];
- dlsch0_harq->rb_alloc_even[3] = localRIV2alloc_LUT100_3[rballoc];
- dlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT50_0[rballoc];
- dlsch0_harq->rb_alloc_odd[1] = localRIV2alloc_LUT50_1[rballoc];
- dlsch0_harq->rb_alloc_odd[2] = localRIV2alloc_LUT100_2[rballoc];
- dlsch0_harq->rb_alloc_odd[3] = localRIV2alloc_LUT100_3[rballoc];
- } else {
- if ((rballoc&(1<<10)) == 0) { //Gap 1
- rballoc = rballoc&(~(1<<12));
- dlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT50_0[rballoc];
- dlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT50_1[rballoc];
- dlsch0_harq->rb_alloc_even[2] = distRIV2alloc_gap0_even_LUT100_2[rballoc];
- dlsch0_harq->rb_alloc_even[3] = distRIV2alloc_gap0_even_LUT100_3[rballoc];
- dlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT50_0[rballoc];
- dlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT50_1[rballoc];
- dlsch0_harq->rb_alloc_odd[2] = distRIV2alloc_gap0_odd_LUT100_2[rballoc];
- dlsch0_harq->rb_alloc_odd[3] = distRIV2alloc_gap0_odd_LUT100_3[rballoc];
- }
- else { //Gap 2
- rballoc = rballoc&(~(1<<12));
- dlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap1_even_LUT50_0[rballoc];
- dlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap1_even_LUT50_1[rballoc];
- dlsch0_harq->rb_alloc_even[2] = distRIV2alloc_gap1_even_LUT100_2[rballoc];
- dlsch0_harq->rb_alloc_even[3] = distRIV2alloc_gap1_even_LUT100_3[rballoc];
- dlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap1_odd_LUT50_0[rballoc];
- dlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap1_odd_LUT50_1[rballoc];
- dlsch0_harq->rb_alloc_odd[2] = distRIV2alloc_gap1_odd_LUT100_2[rballoc];
- dlsch0_harq->rb_alloc_odd[3] = distRIV2alloc_gap1_odd_LUT100_3[rballoc];
- }
- }
- dlsch0_harq->vrb_type = vrb_type;
-
- dlsch0_harq->nb_rb = RIV2nb_rb_LUT100[rballoc];//NPRB;
- RIV_max = RIV_max100;
- break;
- }
-
- if (rballoc>RIV_max) {
- LOG_E(PHY,"Format 1A: rb_alloc > RIV_max\n");
- return(-1);
- }
-
- if (NPRB==0) {
- LOG_E(PHY,"Format 1A: NPRB=0\n");
- return(-1);
- }
-
- if((mcs>28) && ( (dlsch0_harq->round == 0) || (rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti) ))
- {
- // DCI false detection
- return(-1);
- }
- if((rv!=0) && (dlsch0_harq->round == 0) && (rnti != si_rnti) && (rnti != p_rnti) && (rnti != ra_rnti))
- {
- // DCI false detection
- return(-1);
+ break;
}
- // change the mcs limit from 7 to 8, supported by MAC
- /* if (mcs > 10) {
- LOG_E(PHY,"Format 1A: subframe %d unlikely mcs for format 1A (%d), TPC %d rv %d\n",subframe,mcs,TPC,rv);
- return(-1);
- }*/
+ pdci_info_extarcted->mcs1 = mcs;
+ pdci_info_extarcted->rah = rah;
+ pdci_info_extarcted->rballoc = rballoc;
+ pdci_info_extarcted->rv1 = rv;
+ pdci_info_extarcted->TPC = TPC;
+ pdci_info_extarcted->ndi1 = ndi;
+ pdci_info_extarcted->harq_pid = harq_pid;
- if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) { //
- // if ((dlsch0_harq->round == 4) || ( {
- dlsch0_harq->round = 0;
- dlsch0_harq->first_tx = 1;
- // }
+}
- // if (dlsch0_harq->round == 0)
- // ndi = 1-dlsch0_harq->DCINdi;
- }
+void extract_dci2_info(uint8_t N_RB_DL, lte_frame_type_t frame_type, uint8_t nb_antenna_ports_eNB, void *dci_pdu, DCI_INFO_EXTRACTED_t *pdci_info_extarcted)
+{
- dlsch[0]->current_harq_pid = harq_pid;
+ uint32_t rballoc=0;
+ uint8_t rah=0;
+ uint8_t mcs1=0;
+ uint8_t mcs2=0;
+ uint8_t rv1=0;
+ uint8_t rv2=0;
+ uint8_t ndi1=0;
+ uint8_t ndi2=0;
+ uint8_t tbswap=0;
+ uint8_t tpmi=0;
+ uint8_t harq_pid=0;
+ uint8_t TPC=0;
+
+ switch (N_RB_DL) {
- dlsch0_harq->rvidx = rv;
- dlsch0_harq->Nl = 1;
- // dlsch[0]->layer_index = 0;
+ case 6:
+ if (nb_antenna_ports_eNB == 2) {
+ if (frame_type == TDD) {
+ rah = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi2;
+ } else {
+ rah = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->ndi2;
+ }
+ } else if (nb_antenna_ports_eNB == 4) {
+ if (frame_type == TDD) {
+ rah = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->ndi2;
+ } else {
+ rah = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->ndi2;
+ }
+ } else {
+ LOG_E(PHY,"UE: Format2 DCI: unsupported number of TX antennas %d\n",nb_antenna_ports_eNB);
+ }
- dlsch0_harq->mimo_mode = frame_parms->mode1_flag == 1 ?SISO : ALAMOUTI;
- dlsch0_harq->dl_power_off = 1; //no power offset
+ break;
+ case 25:
+ if (nb_antenna_ports_eNB == 2) {
+ if (frame_type == TDD) {
+ rah = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi2;
+ } else {
+ rah = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->ndi2;
+ }
+ } else if (nb_antenna_ports_eNB == 4) {
+ if (frame_type == TDD) {
+ rah = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi2;
+ } else {
+ rah = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->ndi2;
+ }
+ } else {
+ LOG_E(PHY,"UE: Format2 DCI: unsupported number of TX antennas %d\n",nb_antenna_ports_eNB);
+ }
- dlsch0_harq->codeword=0;
+ break;
- LOG_D(PHY,"UE (%x/%d): Subframe %d Format1A DCI: ndi %d, old_ndi %d (first tx %d) harq_status %d, round %d\n",
- dlsch[0]->rnti,
- harq_pid,
- subframe,
- ndi,
- dlsch0_harq->DCINdi,
- dlsch0_harq->first_tx,
- dlsch0_harq->status,
- dlsch0_harq->round);
+ case 50:
+ if (nb_antenna_ports_eNB == 2) {
+ if (frame_type == TDD) {
+ rah = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->ndi2;
+ } else {
+ rah = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->ndi2;
+ }
+ } else if (nb_antenna_ports_eNB == 4) {
+ if (frame_type == TDD) {
+ rah = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->ndi2;
+ } else {
+ rah = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->ndi2;
+ }
+ } else {
+ LOG_E(PHY,"UE: Format2A DCI: unsupported number of TX antennas %d\n",nb_antenna_ports_eNB);
+ }
- dlsch[0]->active = 1;
+ break;
- if ((ndi!=dlsch0_harq->DCINdi)|| // DCI has been toggled or this is the first transmission
+ case 100:
+ if (nb_antenna_ports_eNB == 2) {
+ if (frame_type == TDD) {
+ rah = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->ndi2;
+ } else {
+ rah = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->ndi2;
+ }
+ } else if (nb_antenna_ports_eNB == 4) {
+ if (frame_type == TDD) {
+ rah = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->ndi2;
+ } else {
+ rah = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->rah;
+ mcs1 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->rv2;
+ harq_pid = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->TPC;
+ ndi1 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->ndi2;
+ }
+ } else {
+ LOG_E(PHY,"UE: Format2A DCI: unsupported number of TX antennas %d\n",nb_antenna_ports_eNB);
+ }
- (dlsch0_harq->first_tx==1)) {
- dlsch0_harq->round = 0;
+ break;
+ }
- if (dlsch0_harq->first_tx==1) {
- //LOG_I(PHY,"[PDSCH %x/%d] Format 1A DCI First TX: Clearing flag\n");
- dlsch0_harq->first_tx = 0;
- }
- } else if (dlsch0_harq->round == 0) { // duplicated PDSCH received. possibly eNB missed the previous DL ACK/NACK feedback
+ pdci_info_extarcted->rah = rah;
+ pdci_info_extarcted->mcs1 = mcs1;
+ pdci_info_extarcted->mcs1 = mcs2;
+ pdci_info_extarcted->rv1 = rv1;
+ pdci_info_extarcted->rv2 = rv2;
+ pdci_info_extarcted->harq_pid = harq_pid;
+ pdci_info_extarcted->rballoc = rballoc;
+ pdci_info_extarcted->tb_swap = tbswap;
+ pdci_info_extarcted->tpmi = tpmi;
+ pdci_info_extarcted->TPC = TPC;
+ pdci_info_extarcted->ndi1 = ndi1;
+ pdci_info_extarcted->ndi2 = ndi2;
- // skip PDSCH decoding
- dlsch[0]->active = 0;
- // report ACK back to eNB for this duplicated PDSCH
- dlsch0_harq->status = SCH_IDLE;
- dlsch0_harq->round = 0;
- dlsch[0]->harq_ack[subframe].ack = 1;
- dlsch[0]->harq_ack[subframe].harq_id = harq_pid;
- dlsch[0]->harq_ack[subframe].send_harq_status = 1;
- LOG_D(PHY,"UE (%x/%d): Format1A DCI: Duplicated PDSCH. Setting ACK for subframe %d (pid %d, round 0)\n",
- dlsch[0]->rnti,harq_pid, subframe,harq_pid);
- }
-
- LOG_D(PHY,"UE (%x/%d): SFN/SF %4d/%1d Format1A DCI: dai %d, ndi %d, old_ndi %d (first tx %d), harq_status %d, round %d\n",
- rnti,
- harq_pid,
- frame % 1024,
- subframe,
- dai,
- ndi,
- dlsch0_harq->DCINdi,
- dlsch0_harq->first_tx,
- dlsch0_harq->status,
- dlsch0_harq->round);
-
- if (rnti == tc_rnti) {
- dlsch0_harq->DCINdi = (uint8_t)-1;
- LOG_D(PHY,"UE (%x/%d): Format1A DCI: C-RNTI is temporary. Set NDI = %d and to be ignored\n",
- rnti,harq_pid,dlsch0_harq->DCINdi);
- } else {
- dlsch0_harq->DCINdi = ndi;
- }
+}
- dlsch[0]->harq_ack[subframe].vDAI_DL = dai+1;
- // this a retransmission
- if(dlsch0_harq->round)
- {
- // compare old TBS to new TBS
- if((mcs<29) && (dlsch0_harq->TBS != TBStable[get_I_TBS(mcs)][NPRB-1]))
- {
- // this is an eNB issue
- // retransmisison but old and new TBS are different !!!
- // work around, consider it as a new transmission
- LOG_E(PHY,"Format1A Retransmission but TBS are different: consider it as new transmission !!! \n");
- dlsch0_harq->round = 0;
- }
- }
+void extract_dci2A_info(uint8_t N_RB_DL, lte_frame_type_t frame_type, uint8_t nb_antenna_ports_eNB, void *dci_pdu, DCI_INFO_EXTRACTED_t *pdci_info_extarcted)
+{
- if(mcs<29)
- {
- dlsch0_harq->mcs = mcs;
- }
+ uint32_t rballoc=0;
+ uint8_t rah=0;
+ uint8_t mcs1=0;
+ uint8_t mcs2=0;
+ uint8_t rv1=0;
+ uint8_t rv2=0;
+ uint8_t ndi1=0;
+ uint8_t ndi2=0;
+ uint8_t tbswap=0;
+ uint8_t tpmi=0;
+ uint8_t harq_pid=0;
+ uint8_t TPC=0;
+
+ AssertFatal( (nb_antenna_ports_eNB == 2) || (nb_antenna_ports_eNB == 4), "unsupported nb_antenna_ports_eNB %d\n", nb_antenna_ports_eNB);
+ switch (N_RB_DL) {
- if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) {
- dlsch0_harq->TBS = TBStable[mcs][NPRB-1];
- dlsch0_harq->Qm = 2;
- }
- else {
- if(mcs < 29)
- dlsch0_harq->TBS = TBStable[get_I_TBS(mcs)][NPRB-1];
- dlsch0_harq->Qm = get_Qm(mcs);
- }
- dlsch[0]->rnti = rnti;
- dlsch0 = dlsch[0];
-
- if (dlsch0_harq->round == 0)
- dlsch0_harq->status = ACTIVE;
-
- //printf("Format 1A: harq_pid %d, nb_rb %d, round %d\n",harq_pid,dlsch0_harq->nb_rb,dlsch0_harq->round);
- break;
-
- case format1C:
- if (!dlsch[0]) return -1;
-
- harq_pid = 0;
- dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
-
- switch (frame_parms->N_RB_DL) {
case 6:
- mcs = ((DCI1C_1_5MHz_t *)dci_pdu)->mcs;
- rballoc = conv_1C_RIV(((DCI1C_1_5MHz_t *)dci_pdu)->rballoc,6);
- dlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rballoc];
- dlsch0_harq->rb_alloc_even[0] = distRIV2alloc_even_LUT6[rballoc];
- dlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_odd_LUT6[rballoc];
- RIV_max = RIV_max6;
+ if (nb_antenna_ports_eNB == 2) {
+ if (frame_type == TDD) {
+ mcs1 = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->tb_swap;
+ TPC = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->TPC;
+ } else {
+ mcs1 = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->tb_swap;
+ TPC = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->TPC;
+ }
+ } else if (nb_antenna_ports_eNB == 4) {
+ if (frame_type == TDD) {
+ mcs1 = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->TPC;
+ } else {
+ mcs1 = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->rballoc;
+ rv1 = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->TPC;
+ }
+ }
break;
case 25:
- mcs = ((DCI1C_5MHz_t *)dci_pdu)->mcs;
- rballoc = conv_1C_RIV(((DCI1C_5MHz_t *)dci_pdu)->rballoc,25);
- dlsch0_harq->nb_rb = RIV2nb_rb_LUT25[rballoc];
- dlsch0_harq->rb_alloc_even[0] = distRIV2alloc_even_LUT25[rballoc];
- dlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_odd_LUT25[rballoc];
- RIV_max = RIV_max25;
-
- // printf("Format1C : %x : mcs %d, rballoc %d=>%d=>%x\n",((uint32_t*)dci_pdu)[0],
- // mcs,((DCI1C_5MHz_t *)dci_pdu)->rballoc,rballoc,dlsch0_harq->rb_alloc_even[0]);
+ if (nb_antenna_ports_eNB == 2) {
+ if (frame_type == TDD) {
+ mcs1 = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->rah;
+ rv1 = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->tb_swap;
+ TPC = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->TPC;
+ } else {
+ mcs1 = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->rah;
+ rv1 = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->tb_swap;
+ TPC = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->TPC;
+ }
+ } else if (nb_antenna_ports_eNB == 4) {
+ if (frame_type == TDD) {
+ mcs1 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->rah;
+ rv1 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->TPC;
+ } else {
+ mcs1 = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->rah;
+ rv1 = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->TPC;
+ }
+ }
break;
case 50:
- mcs = ((DCI1C_10MHz_t *)dci_pdu)->mcs;
- rballoc = conv_1C_RIV(((DCI1C_10MHz_t *)dci_pdu)->rballoc,50);
- Ngap = ((DCI1C_10MHz_t *)dci_pdu)->Ngap;
- dlsch0_harq->nb_rb = RIV2nb_rb_LUT50[rballoc];
- if (Ngap == 0) {
- dlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT50_0[rballoc];
- dlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT50_0[rballoc];
- dlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT50_1[rballoc];
- dlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT50_1[rballoc];
- }
- else {
- dlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap1_even_LUT50_0[rballoc];
- dlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap1_odd_LUT50_0[rballoc];
- dlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap1_even_LUT50_1[rballoc];
- dlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap1_odd_LUT50_1[rballoc];
+ if (nb_antenna_ports_eNB == 2) {
+ if (frame_type == TDD) {
+ mcs1 = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->rah;
+ rv1 = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->tb_swap;
+ TPC = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->TPC;
+ } else {
+ mcs1 = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->rah;
+ rv1 = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->tb_swap;
+ TPC = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->TPC;
+ }
+ } else if (nb_antenna_ports_eNB == 4) {
+ if (frame_type == TDD) {
+ mcs1 = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->rah;
+ rv1 = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->TPC;
+ } else {
+ mcs1 = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->rah;
+ rv1 = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->TPC;
+ }
}
- RIV_max = RIV_max50;
break;
case 100:
- mcs = ((DCI1C_20MHz_t *)dci_pdu)->mcs;
- rballoc = conv_1C_RIV(((DCI1C_20MHz_t *)dci_pdu)->rballoc,100);
- Ngap = ((DCI1C_20MHz_t *)dci_pdu)->Ngap;
- dlsch0_harq->nb_rb = RIV2nb_rb_LUT100[rballoc];
- if (Ngap==0) {
- dlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT100_0[rballoc];
- dlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT100_0[rballoc];
- dlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT100_1[rballoc];
- dlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT100_1[rballoc];
- dlsch0_harq->rb_alloc_even[2] = distRIV2alloc_gap0_even_LUT100_2[rballoc];
- dlsch0_harq->rb_alloc_odd[2] = distRIV2alloc_gap0_odd_LUT100_2[rballoc];
- dlsch0_harq->rb_alloc_even[3] = distRIV2alloc_gap0_even_LUT100_3[rballoc];
- dlsch0_harq->rb_alloc_odd[3] = distRIV2alloc_gap0_odd_LUT100_3[rballoc];
- }
- else {
- dlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap1_even_LUT100_0[rballoc];
- dlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap1_odd_LUT100_0[rballoc];
- dlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap1_even_LUT100_1[rballoc];
- dlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap1_odd_LUT100_1[rballoc];
- dlsch0_harq->rb_alloc_even[2] = distRIV2alloc_gap1_even_LUT100_2[rballoc];
- dlsch0_harq->rb_alloc_odd[2] = distRIV2alloc_gap1_odd_LUT100_2[rballoc];
- dlsch0_harq->rb_alloc_even[3] = distRIV2alloc_gap1_even_LUT100_3[rballoc];
- dlsch0_harq->rb_alloc_odd[3] = distRIV2alloc_gap1_odd_LUT100_3[rballoc];
+ if (nb_antenna_ports_eNB == 2) {
+ if (frame_type == TDD) {
+ mcs1 = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->rah;
+ rv1 = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->tb_swap;
+ TPC = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->TPC;
+ } else {
+ mcs1 = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->rah;
+ rv1 = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->tb_swap;
+ TPC = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->TPC;
+ }
+ } else if (nb_antenna_ports_eNB == 4) {
+ if (frame_type == TDD) {
+ mcs1 = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->rah;
+ rv1 = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->TPC;
+ } else {
+ mcs1 = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->mcs1;
+ mcs2 = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->mcs2;
+ rballoc = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->rballoc;
+ rah = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->rah;
+ rv1 = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->rv1;
+ rv2 = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->rv2;
+ ndi1 = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->ndi1;
+ ndi2 = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->ndi2;
+ harq_pid = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->harq_pid;
+ tbswap = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->tb_swap;
+ tpmi = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->tpmi;
+ TPC = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->TPC;
+ }
}
- RIV_max = RIV_max100;
- /*
- printf("Format1C : %x : mcs %d, rballoc %d=>%d=>(%08x.%08x.%08x.%08x), Ngap %d\n",((uint32_t*)dci_pdu)[0],
- mcs,((DCI1C_20MHz_t *)dci_pdu)->rballoc,rballoc,
- dlsch0_harq->rb_alloc_even[0],
- dlsch0_harq->rb_alloc_even[1],
- dlsch0_harq->rb_alloc_even[2],
- dlsch0_harq->rb_alloc_even[3],
- Ngap
- );
- */
- break;
- default:
- LOG_E(PHY,"Format 1C: Unknown N_RB_DL %d\n",frame_parms->N_RB_DL);
- return(-1);
break;
}
- if (rballoc>RIV_max) {
- LOG_E(PHY,"Format 1C: rb_alloc > RIV_max\n");
- return(-1);
- }
- dlsch0_harq->round = 0;
- dlsch0_harq->first_tx = 1;
- dlsch0_harq->vrb_type = DISTRIBUTED;
- dlsch[0]->current_harq_pid = harq_pid;
+ pdci_info_extarcted->mcs1 = mcs1;
+ pdci_info_extarcted->mcs2 = mcs2;
+ pdci_info_extarcted->rballoc = rballoc;
+ pdci_info_extarcted->rah = rah;
+ pdci_info_extarcted->rv1 = rv1;
+ pdci_info_extarcted->rv2 = rv2;
+ pdci_info_extarcted->ndi1 = ndi1;
+ pdci_info_extarcted->ndi2 = ndi2;
+ pdci_info_extarcted->harq_pid = harq_pid;
+ pdci_info_extarcted->tb_swap = tbswap;
+ pdci_info_extarcted->TPC = TPC;
+ pdci_info_extarcted->tpmi = tpmi;
+}
- if (rnti==si_rnti) { // rule from Section 5.3.1 of 36.321
- if (((frame&1) == 0) && (subframe == 5))
- dlsch0_harq->rvidx = (((3*((frame>>1)&3))+1)>>1)&3; // SIB1
- else
- dlsch0_harq->rvidx = (((3*(subframe&3))+1)>>1)&3; // other SIBs
+#define DEBUG_DL_DECODING
+int check_dci_format1_1a_coherency(DCI_format_t dci_format,
+ uint8_t N_RB_DL,
+ uint16_t rnti,
+ uint16_t tc_rnti,
+ uint16_t si_rnti,
+ uint16_t ra_rnti,
+ uint16_t p_rnti,
+ DCI_INFO_EXTRACTED_t *pdci_info_extarcted,
+ LTE_DL_UE_HARQ_t *pdlsch0_harq)
+{
+ uint8_t harq_pid = pdci_info_extarcted->harq_pid;
+ uint32_t rballoc = pdci_info_extarcted->rballoc;
+ uint8_t mcs1 = pdci_info_extarcted->mcs1;
+ uint8_t rv1 = pdci_info_extarcted->rv1;
+ uint8_t ndi1 = pdci_info_extarcted->ndi1;
+ uint8_t TPC = pdci_info_extarcted->TPC;
+ uint8_t rah = pdci_info_extarcted->rah;
+
+ uint8_t NPRB = 0;
+ uint32_t RIV_max = 0;
+
+ // I- check dci content minimum coherency
+ if( ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) && harq_pid > 0)
+ {
+ return(0);
}
- else if ((rnti==p_rnti) || (rnti==ra_rnti)) { // Section 7.1.7.3
- dlsch0_harq->rvidx = 0;
+
+ if(harq_pid >8)
+ {
+ LOG_I(PHY,"bad harq id \n");
+ return(0);
}
+ if(dci_format == format1 && ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) )
+ {
+ LOG_I(PHY,"bad dci format \n");
+ return(0);
+ }
- dlsch0_harq->Nl = 1;
- dlsch0_harq->mimo_mode = frame_parms->mode1_flag == 1 ?SISO : ALAMOUTI;
- dlsch0_harq->dl_power_off = 1; //no power offset
- dlsch0_harq->codeword=0;
+ if( mcs1 > 28)
+ {
+ if(pdlsch0_harq->round == 0)
+ {
+ LOG_I(PHY,"bad dci mcs + round \n");
+ return(0);
+ }
- LOG_D(PHY,"UE (%x/%d): Subframe %d Format1C DCI: harq_status %d, round %d\n",
- dlsch[0]->rnti,
- harq_pid,
- subframe,
- dlsch0_harq->status,
- dlsch0_harq->round);
+ if((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti))
+ {
+ LOG_I(PHY,"bad dci mcs + rnti \n");
+ return(0);
+ }
+ }
- dlsch0_harq->mcs = mcs;
+ if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti))
+ {
+ NPRB = (TPC&1) + 2;
+ switch (N_RB_DL) {
+ case 6:
+ RIV_max = RIV_max6;
+ break;
+ case 25:
+ RIV_max = RIV_max25;
+ break;
+ case 50:
+ RIV_max = RIV_max50;
+ break;
+ case 100:
+ RIV_max = RIV_max100;
+ break;
+ }
+ }
+ else
+ {
+ switch (N_RB_DL) {
+ case 6:
+ NPRB = RIV2nb_rb_LUT6[rballoc];//NPRB;
+ RIV_max = RIV_max6;
+ break;
+ case 25:
+ NPRB = RIV2nb_rb_LUT25[rballoc];//NPRB;
+ RIV_max = RIV_max25;
+ break;
+ case 50:
+ NPRB = RIV2nb_rb_LUT50[rballoc];//NPRB;
+ RIV_max = RIV_max50;
+ break;
+ case 100:
+ NPRB = RIV2nb_rb_LUT100[rballoc];//NPRB;
+ RIV_max = RIV_max100;
+ break;
+ }
+ }
- dlsch0_harq->TBS = TBStable1C[mcs];
- dlsch0_harq->Qm = 2;
- dlsch[0]->rnti = rnti;
- dlsch[0]->active = 1;
- dlsch0 = dlsch[0];
- break;
- case format1:
- if (!dlsch[0]) return -1;
+ if(dci_format == format1)
+ {
+ NPRB = conv_nprb(rah, rballoc, N_RB_DL);
+ }
- switch (frame_parms->N_RB_DL) {
- case 6:
- if (frame_type == TDD) {
- mcs = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->mcs;
- rballoc = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->rballoc;
- rah = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->rah;
- rv = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->rv;
- TPC = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->TPC;
- ndi = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->ndi;
- harq_pid = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->harq_pid;
- } else {
- mcs = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->mcs;
- rah = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->rah;
- rballoc = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->rballoc;
- rv = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->rv;
- TPC = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->TPC;
- ndi = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->ndi;
- harq_pid = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->harq_pid;
- }
- break;
+ if(rballoc > RIV_max)
+ {
+ LOG_I(PHY,"bad dci rballoc rballoc %d RIV_max %d \n",rballoc, RIV_max);
+ // DCI false detection
+ return(0);
+ }
- case 25:
- if (frame_type == TDD) {
- mcs = ((DCI1_5MHz_TDD_t *)dci_pdu)->mcs;
- rballoc = ((DCI1_5MHz_TDD_t *)dci_pdu)->rballoc;
- rah = ((DCI1_5MHz_TDD_t *)dci_pdu)->rah;
- rv = ((DCI1_5MHz_TDD_t *)dci_pdu)->rv;
- TPC = ((DCI1_5MHz_TDD_t *)dci_pdu)->TPC;
- ndi = ((DCI1_5MHz_TDD_t *)dci_pdu)->ndi;
- harq_pid = ((DCI1_5MHz_TDD_t *)dci_pdu)->harq_pid;
- } else {
- mcs = ((DCI1_5MHz_FDD_t *)dci_pdu)->mcs;
- rah = ((DCI1_5MHz_FDD_t *)dci_pdu)->rah;
- rballoc = ((DCI1_5MHz_FDD_t *)dci_pdu)->rballoc;
- rv = ((DCI1_5MHz_FDD_t *)dci_pdu)->rv;
- TPC = ((DCI1_5MHz_FDD_t *)dci_pdu)->TPC;
- ndi = ((DCI1_5MHz_FDD_t *)dci_pdu)->ndi;
- harq_pid = ((DCI1_5MHz_FDD_t *)dci_pdu)->harq_pid;
- }
+ if(NPRB == 0)
+ {
+ // DCI false detection
+ LOG_I(PHY,"bad NPRB = 0 \n");
+ return(0);
+ }
- break;
+ // this a retransmission
+ if(pdlsch0_harq->round>0)
+ {
+ // compare old TBS to new TBS
+ if((mcs1<29) && (pdlsch0_harq->TBS != TBStable[get_I_TBS(mcs1)][NPRB-1]))
+ {
+ // this is an eNB issue
+ // retransmisison but old and new TBS are different !!!
+ // work around, consider it as a new transmission
+ LOG_E(PHY,"Format1A Retransmission but TBS are different: consider it as new transmission !!! \n");
+ pdlsch0_harq->round = 0;
+ //return(0); // ?? to cross check
+ }
+ }
- case 50:
- if (frame_type == TDD) {
- mcs = ((DCI1_10MHz_TDD_t *)dci_pdu)->mcs;
- rballoc = ((DCI1_10MHz_TDD_t *)dci_pdu)->rballoc;
- rah = ((DCI1_10MHz_TDD_t *)dci_pdu)->rah;
- rv = ((DCI1_10MHz_TDD_t *)dci_pdu)->rv;
- TPC = ((DCI1_10MHz_TDD_t *)dci_pdu)->TPC;
- ndi = ((DCI1_10MHz_TDD_t *)dci_pdu)->ndi;
- harq_pid = ((DCI1_10MHz_TDD_t *)dci_pdu)->harq_pid;
- } else {
- mcs = ((DCI1_10MHz_FDD_t *)dci_pdu)->mcs;
- rah = ((DCI1_10MHz_FDD_t *)dci_pdu)->rah;
- rballoc = ((DCI1_10MHz_FDD_t *)dci_pdu)->rballoc;
- rv = ((DCI1_10MHz_FDD_t *)dci_pdu)->rv;
- TPC = ((DCI1_10MHz_FDD_t *)dci_pdu)->TPC;
- ndi = ((DCI1_10MHz_FDD_t *)dci_pdu)->ndi;
- harq_pid = ((DCI1_10MHz_FDD_t *)dci_pdu)->harq_pid;
- }
+ return(1);
+}
- break;
+int check_dci_format1c_coherency(uint8_t N_RB_DL,
+ DCI_INFO_EXTRACTED_t *pdci_info_extarcted,
+ uint16_t rnti,
+ uint16_t si_rnti,
+ uint16_t ra_rnti,
+ uint16_t p_rnti,
+ LTE_DL_UE_HARQ_t *pdlsch0_harq)
+{
+ uint32_t rballoc = pdci_info_extarcted->rballoc;
- case 100:
- if (frame_type == TDD) {
- mcs = ((DCI1_20MHz_TDD_t *)dci_pdu)->mcs;
- rballoc = ((DCI1_20MHz_TDD_t *)dci_pdu)->rballoc;
- rah = ((DCI1_20MHz_TDD_t *)dci_pdu)->rah;
- rv = ((DCI1_20MHz_TDD_t *)dci_pdu)->rv;
- TPC = ((DCI1_20MHz_TDD_t *)dci_pdu)->TPC;
- ndi = ((DCI1_20MHz_TDD_t *)dci_pdu)->ndi;
- harq_pid = ((DCI1_20MHz_TDD_t *)dci_pdu)->harq_pid;
- } else {
- mcs = ((DCI1_20MHz_FDD_t *)dci_pdu)->mcs;
- rah = ((DCI1_20MHz_FDD_t *)dci_pdu)->rah;
- rballoc = ((DCI1_20MHz_FDD_t *)dci_pdu)->rballoc;
- rv = ((DCI1_20MHz_FDD_t *)dci_pdu)->rv;
- TPC = ((DCI1_20MHz_FDD_t *)dci_pdu)->TPC;
- ndi = ((DCI1_20MHz_FDD_t *)dci_pdu)->ndi;
- harq_pid = ((DCI1_20MHz_FDD_t *)dci_pdu)->harq_pid;
- }
+ uint8_t NPRB = 0;
+ uint32_t RIV_max = 0;
- break;
- }
+ // I- check dci content minimum coherency
- if (harq_pid>=8) {
- LOG_E(PHY,"Format 1: harq_pid=%d >= 8\n", harq_pid);
- return(-1);
+ if((rnti!=si_rnti) || (rnti!=p_rnti) || (rnti!=ra_rnti))
+ return(0);
+
+ switch (N_RB_DL) {
+ case 6:
+ NPRB = RIV2nb_rb_LUT6[rballoc];//NPRB;
+ RIV_max = RIV_max6;
+ break;
+ case 25:
+ NPRB = RIV2nb_rb_LUT25[rballoc];//NPRB;
+ RIV_max = RIV_max25;
+ break;
+ case 50:
+ NPRB = RIV2nb_rb_LUT50[rballoc];//NPRB;
+ RIV_max = RIV_max50;
+ break;
+ case 100:
+ NPRB = RIV2nb_rb_LUT100[rballoc];//NPRB;
+ RIV_max = RIV_max100;
+ break;
}
- dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
+ if(rballoc > RIV_max)
+ {
+ // DCI false detection
+ return(0);
+ }
- if((mcs>28) && (dlsch0_harq->round == 0) )
- {
+ if(NPRB == 0)
+ {
// DCI false detection
- return(-1);
+ return(0);
+ }
+
+ return(1);
+}
+
+int check_dci_format2_2a_coherency(DCI_format_t dci_format,
+ uint8_t N_RB_DL,
+ DCI_INFO_EXTRACTED_t *pdci_info_extarcted,
+ uint16_t rnti,
+ uint16_t si_rnti,
+ uint16_t ra_rnti,
+ uint16_t p_rnti,
+ LTE_DL_UE_HARQ_t *pdlsch0_harq,
+ LTE_DL_UE_HARQ_t *pdlsch1_harq)
+{
+ uint8_t rah = pdci_info_extarcted->rah;
+ uint8_t mcs1 = pdci_info_extarcted->mcs1;
+ uint8_t mcs2 = pdci_info_extarcted->mcs1;
+ uint8_t rv1 = pdci_info_extarcted->rv1;
+ uint8_t rv2 = pdci_info_extarcted->rv2;
+ uint8_t harq_pid = pdci_info_extarcted->harq_pid;
+ uint32_t rballoc = pdci_info_extarcted->rballoc;
+ uint8_t ndi1 = pdci_info_extarcted->ndi1;
+ uint8_t ndi2 = pdci_info_extarcted->ndi2;
+
+ uint8_t NPRB = 0;
+ long long RIV_max = 0;
+
+ LOG_I(PHY, "extarcted dci - dci_format %d \n", dci_format);
+ LOG_I(PHY, "extarcted dci - rah %d \n", rah);
+ LOG_I(PHY, "extarcted dci - mcs1 %d \n", mcs1);
+ LOG_I(PHY, "extarcted dci - mcs2 %d \n", mcs2);
+ LOG_I(PHY, "extarcted dci - rv1 %d \n", rv1);
+ LOG_I(PHY, "extarcted dci - rv2 %d \n", rv2);
+ LOG_I(PHY, "extarcted dci - ndi1 %d \n", ndi1);
+ LOG_I(PHY, "extarcted dci - ndi2 %d \n", ndi2);
+ LOG_I(PHY, "extarcted dci - rballoc %x \n", rballoc);
+ LOG_I(PHY, "extarcted dci - harq pif %d \n", harq_pid);
+ LOG_I(PHY, "extarcted dci - round0 %d \n", pdlsch0_harq->round);
+ LOG_I(PHY, "extarcted dci - round1 %d \n", pdlsch1_harq->round);
+
+ // I- check dci content minimum coherency
+ if(harq_pid >8)
+ {
+ LOG_I(PHY,"bad harq pid\n");
+ return(0);
}
- if((rv!=0) && (dlsch0_harq->round == 0) )
+ if( (rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti) )
{
- // DCI false detection
- return(-1);
+ LOG_I(PHY,"bad rnti\n");
+ return(0);
}
- dlsch0_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3];
- dlsch[0]->current_harq_pid = harq_pid;
- dlsch[0]->harq_ack[subframe].harq_id = harq_pid;
+ if( mcs1 > 28)
+ {
+ if(pdlsch0_harq->round == 0)
+ {
+ LOG_I(PHY,"bad mcs1\n");
+ return(0);
+ }
+ }
- conv_rballoc(rah,rballoc,frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even);
- dlsch0_harq->rb_alloc_odd[0]= dlsch0_harq->rb_alloc_even[0];
- dlsch0_harq->rb_alloc_odd[1]= dlsch0_harq->rb_alloc_even[1];
- dlsch0_harq->rb_alloc_odd[2]= dlsch0_harq->rb_alloc_even[2];
- dlsch0_harq->rb_alloc_odd[3]= dlsch0_harq->rb_alloc_even[3];
+ if( mcs2 > 28)
+ {
+ if(pdlsch1_harq->round == 0)
+ {
+ LOG_I(PHY,"bad mcs2\n");
+ return(0);
+ }
- dlsch0_harq->nb_rb = conv_nprb(rah,
- rballoc,
- frame_parms->N_RB_DL);
+ }
- NPRB = dlsch0_harq->nb_rb;
+ /*
+ if((pdlsch0_harq->round > 0) && (mcs1 != pdlsch0_harq->mcs))
+ {
+ // DCI false detection
+ return(0);
+ }*/
- // printf("test PDSCH NPRB %d, rah %d, rballoc %x, rballoc2 %x\n",NPRB,rah,rballoc,dlsch0_harq->rb_alloc[0]);
- if (NPRB==0) {
- LOG_E(PHY,"Format 1: NPRB=0 (rballoc %x,mcs %d, frame_type %d N_RB_DL %d)\n",rballoc,mcs,frame_parms->frame_type,frame_parms->N_RB_DL);
- return(-1);
+ switch (N_RB_DL) {
+ case 6:
+ if (rah == 0)
+ {
+ //RBG = 1;
+ RIV_max = 0x3F;
+ }
+ else
+ {
+ RIV_max = RIV_max6;
+ }
+ break;
+ case 25:
+ if (rah == 0)
+ {
+ //RBG = 2;
+ RIV_max = 0x1FFF;
+ }
+ else
+ {
+ RIV_max = RIV_max25;
+ }
+ break;
+ case 50:
+ if (rah == 0)
+ {
+ //RBG = 3;
+ RIV_max = 0x1FFFF;
+ }
+ else
+ {
+ RIV_max = RIV_max50;
+ }
+ break;
+ case 100:
+ if (rah == 0)
+ {
+ //RBG = 4;
+ RIV_max = 0x1FFFFFF;
+ }
+ else
+ {
+ RIV_max = RIV_max100;
+ }
+ break;
}
+ NPRB = conv_nprb(rah,
+ rballoc,
+ N_RB_DL);
- if (TPC!=1)
- LOG_D(PHY,"format1 TPC %d, dlsch0_harq->delta_PUCCH %d\n",TPC,dlsch0_harq->delta_PUCCH);
-
- dlsch0_harq->rvidx = rv;
- dlsch0_harq->Nl = 1;
- // dlsch[0]->layer_index = 0;
- dlsch0_harq->dl_power_off = 1; //no power offset
+ if( (rballoc > RIV_max) && (rah == 1) )
+ {
+ // DCI false detection
+ LOG_I(PHY,"bad rballoc %d RIV_max %d\n", rballoc, RIV_max);
+ return(0);
+ }
- dlsch0_harq->codeword=0;
+ if(NPRB == 0)
+ {
+ // DCI false detection
+ LOG_I(PHY,"bad NPRB\n");
+ return(0);
+ }
- LOG_D(PHY,"UE (%x/%d): Subframe %d Format1 DCI: ndi %d, old_ndi %d (first tx %d) harq_status %d\n",dlsch[0]->rnti,harq_pid,subframe,ndi,dlsch0_harq->DCINdi,
+ return(1);
+}
- dlsch0_harq->first_tx,dlsch0_harq->status);
+void prepare_dl_decoding_format1_1A(DCI_format_t dci_format,
+ uint8_t N_RB_DL,
+ DCI_INFO_EXTRACTED_t *pdci_info_extarcted,
+ LTE_DL_FRAME_PARMS *frame_parms,
+ uint8_t subframe,
+ uint16_t rnti,
+ uint16_t si_rnti,
+ uint16_t ra_rnti,
+ uint16_t p_rnti,
+ LTE_DL_UE_HARQ_t *pdlsch0_harq,
+ LTE_UE_DLSCH_t *pdlsch0)
+{
- if ((ndi!=dlsch0_harq->DCINdi)||
- (dlsch0_harq->first_tx==1)) {
- // printf("Rate: setting round to zero (ndi %d, DCINdi %d,first_tx %d)\n",ndi,dlsch0_harq->DCINdi,dlsch0_harq->first_tx);
- dlsch0_harq->round=0;
- dlsch0_harq->DCINdi = ndi;
+ uint8_t harq_pid = pdci_info_extarcted->harq_pid;
+ uint8_t vrb_type = pdci_info_extarcted->vrb_type;
+ uint32_t rballoc = pdci_info_extarcted->rballoc;
+ uint8_t mcs1 = pdci_info_extarcted->mcs1;
+ uint8_t rv1 = pdci_info_extarcted->rv1;
+ uint8_t ndi1 = pdci_info_extarcted->ndi1;
+ uint8_t TPC = pdci_info_extarcted->TPC;
+ uint8_t rah = pdci_info_extarcted->rah;
+ uint8_t dai = pdci_info_extarcted->dai;
- dlsch[0]->harq_ack[subframe].send_harq_status = 1;
- if (dlsch0_harq->first_tx==1) {
- LOG_D(PHY,"[PDSCH %x/%d] Format 1 DCI First TX: Clearing flag\n",rnti,harq_pid);
- dlsch0_harq->first_tx = 0;
- }
- }
+ uint8_t NPRB = 0;
- // this a retransmission
- if(dlsch0_harq->round)
+ if(dci_format == format1A)
{
- // compare old TBS to new TBS
- if(dlsch0_harq->TBS != TBStable[get_I_TBS(mcs)][NPRB-1])
+ if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti))
+ {
+ NPRB = (TPC&1) + 2;
+ }
+ else
{
- // this is an eNB issue
- // retransmisison but old and new TBS are different !!!
- // work around, consider it as a new transmission
- LOG_E(PHY,"Format1 Retransmission but TBS are different: consider it as new transmission !!! \n");
- dlsch0_harq->round = 0;
+ switch (N_RB_DL) {
+ case 6:
+ NPRB = RIV2nb_rb_LUT6[rballoc];//NPRB;
+ break;
+ case 25:
+ NPRB = RIV2nb_rb_LUT25[rballoc];//NPRB;
+ break;
+ case 50:
+ NPRB = RIV2nb_rb_LUT50[rballoc];//NPRB;
+ break;
+ case 100:
+ NPRB = RIV2nb_rb_LUT100[rballoc];//NPRB;
+ break;
+ }
}
}
-
- // printf("test: MCS %d, NPRB %d, TBS %d\n",mcs,NPRB,dlsch0_harq->TBS);
-
- dlsch[0]->active = 1;
-
- if (dlsch0_harq->round == 0) {
- dlsch0_harq->status = ACTIVE;
- // printf("Setting DLSCH process %d to ACTIVE\n",harq_pid);
- // MCS and TBS don't change across HARQ rounds
- dlsch0_harq->mcs = mcs;
- dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][NPRB-1];
-
- if (mcs <= 28)
- dlsch0_harq->Qm = get_Qm(mcs);
- else if (mcs<=31)
- dlsch0_harq->Qm = (mcs-28)<<1;
- else
- LOG_E(PHY,"invalid mcs %d\n",mcs);
+ else // format1
+ {
+ NPRB = conv_nprb(rah, rballoc, N_RB_DL);
}
- dlsch[0]->rnti = rnti;
-
- if (beamforming_mode == 0)
- dlsch0_harq->mimo_mode = (frame_parms->mode1_flag == 1) ? SISO : ALAMOUTI;
- else if (beamforming_mode == 7)
- dlsch0_harq->mimo_mode = TM7;
- else
- LOG_E(PHY,"Not supported beamforming mode %d\n",beamforming_mode);
-
+ pdlsch0->current_harq_pid = harq_pid;
+ pdlsch0->active = 1;
+ pdlsch0->rnti = rnti;
+ if(dci_format == format1A)
+ pdlsch0->harq_ack[subframe].vDAI_DL = dai+1;
- dlsch0 = dlsch[0];
+ if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti))
+ {
+ pdlsch0_harq->round = 0;
+ pdlsch0_harq->first_tx = 1;
+ pdlsch0_harq->status = ACTIVE;
+ }
+ else //CRNTI
+ {
+ // DCI has been toggled or this is the first transmission
+ if (ndi1!=pdlsch0_harq->DCINdi)
+ {
+ pdlsch0_harq->round = 0;
+ pdlsch0_harq->first_tx = 1;
+ pdlsch0_harq->status = ACTIVE;
+ }
- break;
+ if( ((ndi1 == pdlsch0_harq->DCINdi) && (pdlsch0_harq->round == 0)) ||
+ ((rv1 != 0) && (pdlsch0_harq->round == 0))
+ )
+ {
+ LOG_D(PHY,"skip pdsch decoding and report ack\n");
+ // skip pdsch decoding and report ack
+ pdlsch0_harq->status = SCH_IDLE;
+ pdlsch0->active = 0;
+ pdlsch0->harq_ack[subframe].ack = 1;
+ pdlsch0->harq_ack[subframe].harq_id = harq_pid;
+ pdlsch0->harq_ack[subframe].send_harq_status = 1;
+
+ pdlsch0_harq->first_tx = 0;
+ }
+ }
- case format2:
- switch (frame_parms->N_RB_DL) {
+ pdlsch0_harq->DCINdi = ndi1;
+ pdlsch0_harq->mcs = mcs1;
+ pdlsch0_harq->rvidx = rv1;
+ pdlsch0_harq->nb_rb = NPRB;
- case 6:
- if (frame_parms->nb_antenna_ports_eNB == 2) {
- if (frame_type == TDD) {
- mcs1 = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->rballoc;
- rv1 = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->tb_swap;
- tpmi = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->tpmi;
- }
- else {
- mcs1 = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->rballoc;
- rv1 = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->tb_swap;
- tpmi = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->tpmi;
- }
- }
- else if (frame_parms->nb_antenna_ports_eNB == 4) {
- if (frame_type == TDD) {
- mcs1 = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->rballoc;
- rv1 = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->tb_swap;
- tpmi = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->tpmi;
- }
- else {
- mcs1 = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->rballoc;
- rv1 = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->tb_swap;
- tpmi = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->tpmi;
- }
- }
- else {
- LOG_E(PHY,"UE: subframe %d Format2 DCI: unsupported number of TX antennas %d\n",subframe,frame_parms->nb_antenna_ports_eNB);
+ pdlsch0_harq->codeword = 0;
+ pdlsch0_harq->Nl = 1;
+ pdlsch0_harq->mimo_mode = frame_parms->mode1_flag == 1 ?SISO : ALAMOUTI;
+ pdlsch0_harq->dl_power_off = 1; //no power offset
+ pdlsch0_harq->delta_PUCCH = delta_PUCCH_lut[TPC &3];
- }
+ // compute resource allocation
+ if(dci_format == format1A)
+ {
+ switch (N_RB_DL) {
+ case 6:
+ if (vrb_type == LOCALIZED) {
+ pdlsch0_harq->rb_alloc_even[0] = localRIV2alloc_LUT6[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT6[rballoc];
+ }
+ else {
+ pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_even_LUT6[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_odd_LUT6[rballoc];
+ }
+ break;
- break;
+ case 25:
+ if (vrb_type == LOCALIZED) {
+ pdlsch0_harq->rb_alloc_even[0] = localRIV2alloc_LUT25[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT25[rballoc];
+ }
+ else {
+ pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_even_LUT25[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_odd_LUT25[rballoc];
+ }
+ break;
- case 25:
- if (frame_parms->nb_antenna_ports_eNB == 2) {
- if (frame_type == TDD) {
- mcs1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rballoc;
- rah = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rah;
- rv1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tb_swap;
- tpmi = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tpmi;
- }
- else {
- mcs1 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rballoc;
- rah = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rah;
- rv1 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tb_swap;
- tpmi = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tpmi;
- }
- }
- else if (frame_parms->nb_antenna_ports_eNB == 4) {
- if (frame_type == TDD) {
- mcs1 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rballoc;
- rah = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rah;
- rv1 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->tb_swap;
- tpmi = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->tpmi;
- }
- else {
- mcs1 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rballoc;
- rah = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rah;
- rv1 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->tb_swap;
- tpmi = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->tpmi;
- }
- }
+ case 50:
+ if (vrb_type == LOCALIZED) {
+ pdlsch0_harq->rb_alloc_even[0] = localRIV2alloc_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_even[1] = localRIV2alloc_LUT50_1[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_odd[1] = localRIV2alloc_LUT50_1[rballoc];
+ // printf("rballoc: %08x.%08x\n",pdlsch0_harq->rb_alloc_even[0],pdlsch0_harq->rb_alloc_even[1]);
+ } else { // DISTRIBUTED
+ if ((rballoc&(1<<10)) == 0) {
+ rballoc = rballoc&(~(1<<10));
+ pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT50_1[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT50_1[rballoc];
+ }
+ else {
+ rballoc = rballoc&(~(1<<10));
+ pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT50_1[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT50_1[rballoc];
+ }
+ }
+ break;
- break;
+ case 100:
+ if (vrb_type == LOCALIZED) {
+ pdlsch0_harq->rb_alloc_even[0] = localRIV2alloc_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_even[1] = localRIV2alloc_LUT50_1[rballoc];
+ pdlsch0_harq->rb_alloc_even[2] = localRIV2alloc_LUT100_2[rballoc];
+ pdlsch0_harq->rb_alloc_even[3] = localRIV2alloc_LUT100_3[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_odd[1] = localRIV2alloc_LUT50_1[rballoc];
+ pdlsch0_harq->rb_alloc_odd[2] = localRIV2alloc_LUT100_2[rballoc];
+ pdlsch0_harq->rb_alloc_odd[3] = localRIV2alloc_LUT100_3[rballoc];
+ } else {
+ if ((rballoc&(1<<10)) == 0) { //Gap 1
+ rballoc = rballoc&(~(1<<12));
+ pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT50_1[rballoc];
+ pdlsch0_harq->rb_alloc_even[2] = distRIV2alloc_gap0_even_LUT100_2[rballoc];
+ pdlsch0_harq->rb_alloc_even[3] = distRIV2alloc_gap0_even_LUT100_3[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT50_1[rballoc];
+ pdlsch0_harq->rb_alloc_odd[2] = distRIV2alloc_gap0_odd_LUT100_2[rballoc];
+ pdlsch0_harq->rb_alloc_odd[3] = distRIV2alloc_gap0_odd_LUT100_3[rballoc];
+ }
+ else { //Gap 2
+ rballoc = rballoc&(~(1<<12));
+ pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap1_even_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap1_even_LUT50_1[rballoc];
+ pdlsch0_harq->rb_alloc_even[2] = distRIV2alloc_gap1_even_LUT100_2[rballoc];
+ pdlsch0_harq->rb_alloc_even[3] = distRIV2alloc_gap1_even_LUT100_3[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap1_odd_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap1_odd_LUT50_1[rballoc];
+ pdlsch0_harq->rb_alloc_odd[2] = distRIV2alloc_gap1_odd_LUT100_2[rballoc];
+ pdlsch0_harq->rb_alloc_odd[3] = distRIV2alloc_gap1_odd_LUT100_3[rballoc];
+ }
+ }
+ break;
+ }
+ }
+ else // format1
+ {
+ conv_rballoc(rah,rballoc,frame_parms->N_RB_DL,pdlsch0_harq->rb_alloc_even);
+ pdlsch0_harq->rb_alloc_odd[0]= pdlsch0_harq->rb_alloc_even[0];
+ pdlsch0_harq->rb_alloc_odd[1]= pdlsch0_harq->rb_alloc_even[1];
+ pdlsch0_harq->rb_alloc_odd[2]= pdlsch0_harq->rb_alloc_even[2];
+ pdlsch0_harq->rb_alloc_odd[3]= pdlsch0_harq->rb_alloc_even[3];
+ }
- case 50:
- if (frame_parms->nb_antenna_ports_eNB == 2) {
- if (frame_type == TDD) {
- mcs1 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rballoc;
- rah = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rah;
- rv1 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->tb_swap;
- tpmi = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->tpmi;
- }
- else {
- mcs1 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rballoc;
- rah = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rah;
- rv1 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->tb_swap;
- tpmi = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->tpmi;
- }
- }
- else if (frame_parms->nb_antenna_ports_eNB == 4) {
- if (frame_type == TDD) {
- mcs1 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->rballoc;
- rah = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->rah;
- rv1 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->tb_swap;
- tpmi = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->tpmi;
- }
- else {
- mcs1 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->rballoc;
- rah = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->rah;
- rv1 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->tb_swap;
- tpmi = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->tpmi;
- }
- }
- else {
- LOG_E(PHY,"UE: Format2 DCI: unsupported number of TX antennas %d\n",frame_parms->nb_antenna_ports_eNB);
- }
-
- break;
-
- case 100:
- if (frame_parms->nb_antenna_ports_eNB == 2) {
- if (frame_type == TDD) {
- mcs1 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rballoc;
- rah = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rah;
- rv1 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->tb_swap;
- tpmi = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->tpmi;
- }
- else {
- mcs1 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rballoc;
- rah = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rah;
- rv1 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->tb_swap;
- tpmi = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->tpmi;
- }
- }
- else if (frame_parms->nb_antenna_ports_eNB == 4) {
- if (frame_type == TDD) {
- mcs1 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->rballoc;
- rah = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->rah;
- rv1 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->tb_swap;
- tpmi = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->tpmi;
- }
- else {
- mcs1 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->rballoc;
- rah = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->rah;
- rv1 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->tb_swap;
- tpmi = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->tpmi;
- }
- }
- else {
- LOG_E(PHY,"UE: Format2 DCI: unsupported number of TX antennas %d\n",frame_parms->nb_antenna_ports_eNB);
- }
-
- break;
- }
-
- if (harq_pid>=8) {
- LOG_E(PHY,"Format 2_2A: harq_pid=%d >= 8\n", harq_pid);
- return(-1);
- }
-
- // check if either TB is disabled (see 36-213 V8.6 p. 26)
- TB0_active = 1;
- TB1_active = 1;
-
- if ((rv1 == 1) && (mcs1 == 0)) {
- TB0_active=0;
- }
- if ((rv2 == 1) && (mcs2 == 0)) {
- TB1_active=0;
- }
-#ifdef DEBUG_HARQ
- printf("[DCI UE]: TB0 status %d , TB1 status %d\n", TB0_active, TB1_active);
-#endif
-
- //printf("RV TB0 = %d\n", rv1);
-
-
- if (TB0_active && TB1_active && tbswap==0) { //dlsch0, dlsch0_harq are at the TB level
- dlsch0=dlsch[0];
- dlsch1=dlsch[1];
- dlsch0->active = 1;
- dlsch1->active = 1;
- dlsch0_harq = dlsch0->harq_processes[harq_pid];
- dlsch1_harq = dlsch1->harq_processes[harq_pid];
- dlsch0_harq->mcs = mcs1;
- dlsch1_harq->mcs = mcs2;
- dlsch0_harq->rvidx = rv1;
- dlsch1_harq->rvidx = rv2;
- dlsch0_harq->status = ACTIVE;
- dlsch1_harq->status = ACTIVE;
- dlsch0_harq->codeword=0;
- dlsch1_harq->codeword=1;
-#ifdef DEBUG_HARQ
- printf("[DCI UE]: BOTH ACTIVE\n");
-#endif
- }
- else if (TB0_active && TB1_active && tbswap==1) {
- dlsch0=dlsch[0];
- dlsch1=dlsch[1];
- dlsch0->active = 1;
- dlsch1->active = 1;
- dlsch0_harq = dlsch0->harq_processes[harq_pid];
- dlsch1_harq = dlsch1->harq_processes[harq_pid];
- dlsch0_harq->mcs = mcs1;
- dlsch1_harq->mcs = mcs2;
- dlsch0_harq->rvidx = rv1;
- dlsch1_harq->rvidx = rv2;
- dlsch0_harq->status = ACTIVE;
- dlsch1_harq->status = ACTIVE;
- dlsch0_harq->codeword=1;
- dlsch1_harq->codeword=0;
- }
- else if (TB0_active && (TB1_active==0)) {
- dlsch0=dlsch[0];
- dlsch0->active = 1;
- dlsch0_harq = dlsch0->harq_processes[harq_pid];
- dlsch0_harq->mcs = mcs1;
- dlsch0_harq->rvidx = rv1;
- dlsch0_harq->status = ACTIVE;
- dlsch0_harq->codeword = 0;
- dlsch1=NULL;
- dlsch1_harq = NULL;
-#ifdef DEBUG_HARQ
- printf("[DCI UE]: TB1 is deactivated, retransmit TB0 transmit in TM6\n");
-#endif
- }
- else if ((TB0_active==0) && TB1_active) {
- dlsch1=dlsch[1];
- dlsch1->active = 1;
- dlsch1_harq = dlsch1->harq_processes[harq_pid];
- dlsch1_harq->mcs = mcs2;
- dlsch1_harq->rvidx = rv2;
- dlsch1_harq->status = ACTIVE;
- dlsch1_harq->codeword = 0;
- dlsch0=NULL;
- dlsch0_harq = NULL;
-#ifdef DEBUG_HARQ
- printf("[DCI UE]: TB0 is deactivated, retransmit TB1 transmit in TM6\n");
-#endif
- }
-
-
- if (dlsch0 != NULL){
- dlsch0->current_harq_pid = harq_pid;
- dlsch0->harq_ack[subframe].harq_id = harq_pid;
- }
-
- if (dlsch1 != NULL){
- dlsch1->current_harq_pid = harq_pid;
- dlsch1->harq_ack[subframe].harq_id = harq_pid;
- }
-
- if (dlsch0_harq != NULL){
- conv_rballoc(rah,
- rballoc,
- frame_parms->N_RB_DL,
- dlsch0_harq->rb_alloc_even);
-
- dlsch0_harq->rb_alloc_odd[0]= dlsch0_harq->rb_alloc_even[0];
- dlsch0_harq->rb_alloc_odd[1]= dlsch0_harq->rb_alloc_even[1];
- dlsch0_harq->rb_alloc_odd[2]= dlsch0_harq->rb_alloc_even[2];
- dlsch0_harq->rb_alloc_odd[3]= dlsch0_harq->rb_alloc_even[3];
-
- if (dlsch1_harq != NULL){
- dlsch1_harq->rb_alloc_even[0]= dlsch0_harq->rb_alloc_even[0];
- dlsch1_harq->rb_alloc_even[1]= dlsch0_harq->rb_alloc_even[1];
- dlsch1_harq->rb_alloc_even[2]= dlsch0_harq->rb_alloc_even[2];
- dlsch1_harq->rb_alloc_even[3]= dlsch0_harq->rb_alloc_even[3];
- dlsch1_harq->rb_alloc_odd[0] = dlsch0_harq->rb_alloc_odd[0];
- dlsch1_harq->rb_alloc_odd[1] = dlsch0_harq->rb_alloc_odd[1];
- dlsch1_harq->rb_alloc_odd[2] = dlsch0_harq->rb_alloc_odd[2];
- dlsch1_harq->rb_alloc_odd[3] = dlsch0_harq->rb_alloc_odd[3];
-
- dlsch1_harq->nb_rb = dlsch0_harq->nb_rb;
- }
-
- dlsch0_harq->nb_rb = conv_nprb(rah,
- rballoc,
- frame_parms->N_RB_DL);
-
- } else if ((dlsch0_harq == NULL) && (dlsch1_harq != NULL)){
-
- conv_rballoc(rah,
- rballoc,
- frame_parms->N_RB_DL,
- dlsch1_harq->rb_alloc_even);
-
- dlsch1_harq->rb_alloc_odd[0]= dlsch1_harq->rb_alloc_even[0];
- dlsch1_harq->rb_alloc_odd[1]= dlsch1_harq->rb_alloc_even[1];
- dlsch1_harq->rb_alloc_odd[2]= dlsch1_harq->rb_alloc_even[2];
- dlsch1_harq->rb_alloc_odd[3]= dlsch1_harq->rb_alloc_even[3];
- dlsch1_harq->nb_rb = conv_nprb(rah,
- rballoc,
- frame_parms->N_RB_DL);
- }
-
-
- if (dlsch0_harq != NULL) {
- dlsch0_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3];
- }
-
- if (dlsch1_harq != NULL) {
- dlsch1_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3];
- }
-
- // assume one layer per codeword (2 antenna port case)
- if (dlsch0_harq != NULL)
- dlsch0_harq->Nl = 1;
-
- if (dlsch1_harq != NULL)
- dlsch1_harq->Nl = 1;
-#ifdef DEBUG_HARQ
- printf ("[DCI UE] tpmi = %d\n", tpmi);
-#endif
-
-
- if ((dlsch0 != NULL) && (dlsch1 != NULL)){ //two CW active
- dlsch0_harq->dl_power_off = 1;
- dlsch1_harq->dl_power_off = 1;
- switch (tpmi) {
- case 0:
- dlsch0_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODING1;
- dlsch1_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODING1;
- dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,0, 1);
- dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,0, 1);
- break;
- case 1:
- dlsch0_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODINGj;
- dlsch1_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODINGj;
- dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,1, 1);
- dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,1, 1);
- break;
- case 2: // PUSCH precoding
- dlsch0_harq->mimo_mode = DUALSTREAM_PUSCH_PRECODING;
- dlsch1_harq->mimo_mode = DUALSTREAM_PUSCH_PRECODING;
- if (tbswap==0){
- dlsch0_harq->pmi_alloc = dlsch0->pmi_alloc;
- dlsch1_harq->pmi_alloc = dlsch0->pmi_alloc^0x1555;
- } else {
- dlsch1_harq->pmi_alloc = dlsch0->pmi_alloc;
- dlsch0_harq->pmi_alloc = dlsch0->pmi_alloc^0x1555;
- }
- break;
- default:
- break;
- }
- } else if ((dlsch0 != NULL) && (dlsch1 == NULL)) { // only CW 0 active
- dlsch0_harq->dl_power_off = 1;
- switch (tpmi) {
- case 0 :
- dlsch0_harq->mimo_mode = ALAMOUTI;
- break;
- case 1:
- dlsch0_harq->mimo_mode = UNIFORM_PRECODING11;
- dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,0, 0);
- break;
- case 2:
- dlsch0_harq->mimo_mode = UNIFORM_PRECODING1m1;
- dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,1, 0);
- break;
- case 3:
- dlsch0_harq->mimo_mode = UNIFORM_PRECODING1j;
- dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,2, 0);
- break;
- case 4:
- dlsch0_harq->mimo_mode = UNIFORM_PRECODING1mj;
- dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,3, 0);
- break;
- case 5:
- dlsch0_harq->mimo_mode = PUSCH_PRECODING0;
- // pmi stored from ulsch allocation routine
- // we need to extract the first column of precoding matrix (which was computed assuming rank==2)
- dlsch0_harq->pmi_alloc = dlsch0->pmi_alloc;;//pmi_convert(frame_parms,dlsch0->pmi_alloc,0);
- //LOG_I(PHY,"XXX using PMI %x\n",pmi2hex_2Ar1(dlsch0_harq->pmi_alloc));
-#ifdef DEBUG_HARQ
- printf ("[DCI UE] I am calling from the UE side pmi_alloc_new = %d\n", dlsch0->pmi_alloc);
-#endif
- break;
- case 6:
- dlsch0_harq->mimo_mode = PUSCH_PRECODING1;
- // we need to extract the second column of precoding matrix (which was computed assuming rank==2)
- dlsch0_harq->pmi_alloc = dlsch0->pmi_alloc;;//pmi_convert(frame_parms,dlsch0->pmi_alloc,1);
-#ifdef DEBUG_HARQ
- printf ("[DCI UE] I am calling from the UE side pmi_alloc_new = %d\n", dlsch0->pmi_alloc);
-#endif
- break;
-#ifdef DEBUG_HARQ
- printf("[DCI UE] harq0 MIMO mode = %d\n", dlsch0_harq->mimo_mode);
-#endif
- }
- } else {
- dlsch1_harq->dl_power_off = 1;
- switch (tpmi) {
- case 0 :
- dlsch1_harq->mimo_mode = ALAMOUTI;
- break;
- case 1:
- dlsch1_harq->mimo_mode = UNIFORM_PRECODING11;
- dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,0, 0);
- break;
- case 2:
- dlsch1_harq->mimo_mode = UNIFORM_PRECODING1m1;
- dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,1, 0);
- break;
- case 3:
- dlsch1_harq->mimo_mode = UNIFORM_PRECODING1j;
- dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,2, 0);
- break;
- case 4:
- dlsch1_harq->mimo_mode = UNIFORM_PRECODING1mj;
- dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,3, 0);
- break;
- case 5:
- dlsch1_harq->mimo_mode = PUSCH_PRECODING0;
- // pmi stored from ulsch allocation routine
- dlsch1_harq->pmi_alloc = dlsch1->pmi_alloc;
-#ifdef DEBUG_HARQ
- printf ("[DCI UE] I am calling from the UE side pmi_alloc_new = %d\n", dlsch1->pmi_alloc);
-#endif
-
- //LOG_I(PHY,"XXX using PMI %x\n",pmi2hex_2Ar1(dlsch0_harq->pmi_alloc));
- break;
- case 6:
- dlsch1_harq->mimo_mode = PUSCH_PRECODING1;
- dlsch1_harq->pmi_alloc = dlsch1->pmi_alloc;
-#ifdef DEBUG_HARQ
- printf ("[DCI UE] I am calling from the UE side pmi_alloc_new = %d\n", dlsch1->pmi_alloc);
-#endif
- return(-1);
- break;
- }
-#ifdef DEBUG_HARQ
- printf("[DCI UE] harq1 MIMO mode = %d\n", dlsch1_harq->mimo_mode);
-#endif
- }
- //printf(" UE DCI harq0 MIMO mode = %d\n", dlsch0_harq->mimo_mode);
- if ((frame_parms->mode1_flag == 1) && (dlsch0_harq != NULL))
- dlsch0_harq->mimo_mode = SISO;
-
-
- if (dlsch0 != NULL) {
- if ((ndi1!=dlsch0_harq->DCINdi) || (dlsch0_harq->first_tx==1)) {
- dlsch0_harq->round = 0;
- dlsch0_harq->status = ACTIVE;
- dlsch0_harq->DCINdi = ndi1;
-
- if ( dlsch0_harq->first_tx==1) {
- LOG_D(PHY,"Format 2 DCI First TX0: Clearing flag\n");
- dlsch0_harq->first_tx = 0;
- }
- } else if (dlsch0_harq->status == SCH_IDLE) { // we got an Ndi = 0 for a previously decoded process,
-
- // this happens if either another harq process in the same
- // is NAK or an ACK was not received
-
- dlsch0->harq_ack[subframe].ack = 1;
- dlsch0->harq_ack[subframe].harq_id = harq_pid;
- dlsch0->harq_ack[subframe].send_harq_status = 1;
- dlsch0->active = 0;
- }
- }
-
- if ((dlsch1 != NULL) && (dlsch1->active == 1 )) {
- if ((ndi2!=dlsch1_harq->DCINdi) || (dlsch1_harq->first_tx==1)) {
- dlsch1_harq->round = 0;
- dlsch1_harq->status = ACTIVE;
- dlsch1_harq->DCINdi = ndi2;
- if (dlsch1_harq->first_tx==1) {
- LOG_D(PHY,"Format 2 DCI First TX1: Clearing flag\n");
- dlsch1_harq->first_tx = 0;
- }
- }
- else if ((dlsch1 != NULL) && (dlsch1_harq->status == SCH_IDLE)) { // we got an Ndi = 0 for a previously decoded process,
- // this happens if either another harq process in the same
- // is NAK or an ACK was not received
-
- dlsch1->harq_ack[subframe].ack = 1;
- dlsch1->harq_ack[subframe].harq_id = harq_pid;
- dlsch1->harq_ack[subframe].send_harq_status = 1;
- dlsch1->active = 0;
- }
- }
-
- if (dlsch0 != NULL){
- if (dlsch0_harq->nb_rb>1) {
- dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
- if (mcs1 <= 28)
- dlsch0_harq->Qm = get_Qm(mcs1);
- else if (mcs1<=31)
- dlsch0_harq->Qm = (mcs1-28)<<1;
- else
- LOG_E(PHY,"invalid mcs1 %d\n",mcs1);
- } else
- dlsch0_harq->TBS =0;
-
- dlsch0->rnti = rnti;
- }
-
- if (dlsch1 != NULL) {
- if (dlsch1_harq->DCINdi != ndi2) {
- dlsch1_harq->round=0;
- dlsch1_harq->status = ACTIVE;
- }
-
- dlsch1_harq->DCINdi = ndi2;
-
- if (dlsch1_harq->nb_rb>1) {
- dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][dlsch1_harq->nb_rb-1];
- if (mcs2 <= 28)
- dlsch1_harq->Qm = get_Qm(mcs2);
- else if (mcs1<=31)
- dlsch1_harq->Qm = (mcs2-28)<<1;
- else
- LOG_E(PHY,"invalid mcs2 %d\n",mcs2);
- } else
- dlsch1_harq->TBS = 0;
-
- dlsch1->rnti = rnti;
+ if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti))
+ {
+ pdlsch0_harq->TBS = TBStable[mcs1][NPRB-1];
+ pdlsch0_harq->Qm = 2;
}
-#ifdef DEBUG_HARQ
- if (dlsch0 != NULL && dlsch1 != NULL)
- printf("[DCI UE] dlsch0_harq status = %d, dlsch1_harq status = %d\n", dlsch0_harq->status, dlsch1_harq->status);
- else if (dlsch0 == NULL && dlsch1 != NULL)
- printf("[DCI UE] dlsch0_harq NULL dlsch1_harq status = %d\n", dlsch1_harq->status);
- else if (dlsch0 != NULL && dlsch1 == NULL)
- printf("[DCI UE] dlsch1_harq NULL dlsch0_harq status = %d\n", dlsch0_harq->status);
-#endif
-
- break;
-
- case format2A:
-
- switch (frame_parms->N_RB_DL) {
-
- case 6:
- if (frame_parms->nb_antenna_ports_eNB == 2) {
- if (frame_type == TDD) {
- mcs1 = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->rballoc;
- rv1 = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->tb_swap;
- } else {
- mcs1 = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->rballoc;
- rv1 = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->tb_swap;
- }
- } else if (frame_parms->nb_antenna_ports_eNB == 4) {
- if (frame_type == TDD) {
- mcs1 = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->rballoc;
- rv1 = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->tb_swap;
- tpmi = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->tpmi;
- } else {
- mcs1 = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->rballoc;
- rv1 = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->tb_swap;
- tpmi = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->tpmi;
- }
- } else {
- LOG_E(PHY,"eNB: subframe %d UE %x, Format2A DCI: unsupported number of TX antennas %d\n",subframe,rnti,frame_parms->nb_antenna_ports_eNB);
- }
-
- break;
-
- case 25:
- if (frame_parms->nb_antenna_ports_eNB == 2) {
- if (frame_type == TDD) {
- mcs1 = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->rballoc;
- rah = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->rah;
- rv1 = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->tb_swap;
- } else {
- mcs1 = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->rballoc;
- rah = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->rah;
- rv1 = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->tb_swap;
- }
- } else if (frame_parms->nb_antenna_ports_eNB == 4) {
- if (frame_type == TDD) {
- mcs1 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->rballoc;
- rah = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->rah;
- rv1 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->tb_swap;
- tpmi = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->tpmi;
- } else {
- mcs1 = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->rballoc;
- rah = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->rah;
- rv1 = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->tb_swap;
- tpmi = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->tpmi;
- }
- } else {
- LOG_E(PHY,"eNB: subframe %d UE %x, Format2A DCI: unsupported number of TX antennas %d\n",subframe,rnti,frame_parms->nb_antenna_ports_eNB);
- }
-
- break;
-
- case 50:
- if (frame_parms->nb_antenna_ports_eNB == 2) {
- if (frame_type == TDD) {
- mcs1 = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->rballoc;
- rah = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->rah;
- rv1 = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->tb_swap;
- } else {
- mcs1 = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->rballoc;
- rah = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->rah;
- rv1 = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->tb_swap;
- }
- } else if (frame_parms->nb_antenna_ports_eNB == 4) {
- if (frame_type == TDD) {
- mcs1 = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->rballoc;
- rah = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->rah;
- rv1 = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->tb_swap;
- tpmi = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->tpmi;
- } else {
- mcs1 = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->rballoc;
- rah = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->rah;
- rv1 = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->tb_swap;
- tpmi = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->tpmi;
+ else
+ {
+ if(mcs1 < 29)
+ {
+ pdlsch0_harq->TBS = TBStable[get_I_TBS(mcs1)][NPRB-1];
+ pdlsch0_harq->Qm = get_Qm(mcs1);
}
- } else {
- LOG_E(PHY,"eNB: subframe %d UE %x, Format2A DCI: unsupported number of TX antennas %d\n",subframe,rnti,frame_parms->nb_antenna_ports_eNB);
+ }
+}
+
+void prepare_dl_decoding_format1C(uint8_t N_RB_DL,
+ DCI_INFO_EXTRACTED_t *pdci_info_extarcted,
+ LTE_DL_FRAME_PARMS *frame_parms,
+ uint32_t rnti,
+ uint32_t si_rnti,
+ uint32_t ra_rnti,
+ uint32_t p_rnti,
+ uint32_t frame,
+ uint8_t subframe,
+ LTE_DL_UE_HARQ_t *pdlsch0_harq,
+ LTE_UE_DLSCH_t *pdlsch0)
+{
+
+ uint8_t harq_pid = pdci_info_extarcted->harq_pid;
+ uint32_t rballoc = pdci_info_extarcted->rballoc;
+ uint8_t mcs1 = pdci_info_extarcted->mcs1;
+ uint8_t Ngap = pdci_info_extarcted->Ngap;
+
+ pdlsch0_harq->round = 0;
+ pdlsch0_harq->first_tx = 1;
+ pdlsch0_harq->vrb_type = DISTRIBUTED;
+
+ if (rnti==si_rnti) { // rule from Section 5.3.1 of 36.321
+ if (((frame&1) == 0) && (subframe == 5))
+ pdlsch0_harq->rvidx = (((3*((frame>>1)&3))+1)>>1)&3; // SIB1
+ else
+ pdlsch0_harq->rvidx = (((3*(subframe&3))+1)>>1)&3; // other SIBs
+ }
+ else if ((rnti==p_rnti) || (rnti==ra_rnti)) { // Section 7.1.7.3
+ pdlsch0_harq->rvidx = 0;
}
- break;
+
+ pdlsch0_harq->Nl = 1;
+ pdlsch0_harq->mimo_mode = frame_parms->mode1_flag == 1 ?SISO : ALAMOUTI;
+ pdlsch0_harq->dl_power_off = 1; //no power offset
+
+ pdlsch0_harq->codeword = 0;
+ pdlsch0_harq->mcs = mcs1;
+ pdlsch0_harq->TBS = TBStable1C[mcs1];
+ pdlsch0_harq->Qm = 2;
+
+
+ pdlsch0->current_harq_pid = harq_pid;
+ pdlsch0->active = 1;
+ pdlsch0->rnti = rnti;
+
+ switch (N_RB_DL) {
+ case 6:
+ pdlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rballoc];
+ pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_even_LUT6[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_odd_LUT6[rballoc];
+
+ break;
+
+ case 25:
+ pdlsch0_harq->nb_rb = RIV2nb_rb_LUT25[rballoc];
+ pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_even_LUT25[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_odd_LUT25[rballoc];
+ break;
+
+ case 50:
+ pdlsch0_harq->nb_rb = RIV2nb_rb_LUT50[rballoc];
+ if (Ngap == 0) {
+ pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT50_1[rballoc];
+ pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT50_1[rballoc];
+ }
+ else {
+ pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap1_even_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap1_odd_LUT50_0[rballoc];
+ pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap1_even_LUT50_1[rballoc];
+ pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap1_odd_LUT50_1[rballoc];
+ }
+ break;
case 100:
- if (frame_parms->nb_antenna_ports_eNB == 2) {
- if (frame_type == TDD) {
- mcs1 = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->rballoc;
- rah = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->rah;
- rv1 = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->tb_swap;
- } else {
- mcs1 = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->rballoc;
- rah = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->rah;
- rv1 = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->tb_swap;
+ pdlsch0_harq->nb_rb = RIV2nb_rb_LUT100[rballoc];
+ if (Ngap==0) {
+ pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT100_0[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT100_0[rballoc];
+ pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT100_1[rballoc];
+ pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT100_1[rballoc];
+ pdlsch0_harq->rb_alloc_even[2] = distRIV2alloc_gap0_even_LUT100_2[rballoc];
+ pdlsch0_harq->rb_alloc_odd[2] = distRIV2alloc_gap0_odd_LUT100_2[rballoc];
+ pdlsch0_harq->rb_alloc_even[3] = distRIV2alloc_gap0_even_LUT100_3[rballoc];
+ pdlsch0_harq->rb_alloc_odd[3] = distRIV2alloc_gap0_odd_LUT100_3[rballoc];
}
- } else if (frame_parms->nb_antenna_ports_eNB == 4) {
- if (frame_type == TDD) {
- mcs1 = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->rballoc;
- rah = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->rah;
- rv1 = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->tb_swap;
- tpmi = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->tpmi;
- } else {
- mcs1 = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->mcs1;
- mcs2 = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->mcs2;
- rballoc = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->rballoc;
- rah = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->rah;
- rv1 = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->rv1;
- rv2 = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->rv2;
- ndi1 = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->ndi1;
- ndi2 = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->ndi2;
- harq_pid = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->harq_pid;
- tbswap = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->tb_swap;
- tpmi = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->tpmi;
+ else {
+ pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap1_even_LUT100_0[rballoc];
+ pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap1_odd_LUT100_0[rballoc];
+ pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap1_even_LUT100_1[rballoc];
+ pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap1_odd_LUT100_1[rballoc];
+ pdlsch0_harq->rb_alloc_even[2] = distRIV2alloc_gap1_even_LUT100_2[rballoc];
+ pdlsch0_harq->rb_alloc_odd[2] = distRIV2alloc_gap1_odd_LUT100_2[rballoc];
+ pdlsch0_harq->rb_alloc_even[3] = distRIV2alloc_gap1_even_LUT100_3[rballoc];
+ pdlsch0_harq->rb_alloc_odd[3] = distRIV2alloc_gap1_odd_LUT100_3[rballoc];
}
- } else {
- LOG_E(PHY,"eNB: subframe %d UE %x, Format2A DCI: unsupported number of TX antennas %d\n",subframe,rnti,frame_parms->nb_antenna_ports_eNB);
- }
+ break;
- break;
+ default:
+ AssertFatal(0,"Format 1C: Unknown N_RB_DL %d\n",frame_parms->N_RB_DL);
+ break;
}
+}
+void compute_precoding_info_2cw(uint8_t tpmi, uint8_t tbswap, uint16_t pmi_alloc, LTE_DL_FRAME_PARMS *frame_parms, LTE_DL_UE_HARQ_t *dlsch0_harq, LTE_DL_UE_HARQ_t *dlsch1_harq)
+{
- if (harq_pid>=8) {
- LOG_E(PHY,"ERROR: Format 2_2A: harq_pid=%d >= 8\n", harq_pid);
- return(-1);
- }
+switch (tpmi) {
+ case 0:
+ dlsch0_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODING1;
+ dlsch1_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODING1;
+ dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,0, 1);
+ dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,0, 1);
+ break;
+ case 1:
+ dlsch0_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODINGj;
+ dlsch1_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODINGj;
+ dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,1, 1);
+ dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,1, 1);
+ break;
+ case 2: // PUSCH precoding
+ dlsch0_harq->mimo_mode = DUALSTREAM_PUSCH_PRECODING;
+ dlsch1_harq->mimo_mode = DUALSTREAM_PUSCH_PRECODING;
+ if (tbswap==0){
+ dlsch0_harq->pmi_alloc = pmi_alloc;
+ dlsch1_harq->pmi_alloc = pmi_alloc^0x1555;
+ } else {
+ dlsch1_harq->pmi_alloc = pmi_alloc;
+ dlsch0_harq->pmi_alloc = pmi_alloc^0x1555;
+ }
+ break;
+ default:
+ break;
+ }
+}
- // printf("UE: format 2A, rballoc=%x, harq_pid= %d, mcs1=%d,mcs2=%d, rv1=%d, rv2=%d, ndi1=%d, ndi2=%d\n",rballoc, harq_pid, mcs1,mcs2,rv1,rv2,ndi1,ndi2);
+void compute_precoding_info_1cw(uint8_t tpmi, uint16_t pmi_alloc, LTE_DL_FRAME_PARMS *frame_parms, LTE_DL_UE_HARQ_t *dlsch_harq)
+{
- // Flip the TB to codeword mapping as described in 5.3.3.1.5 of 36-212 V11.3.0
- // note that we must set tbswap=0 in eNB scheduler if one TB is deactivated
- //Needs to be done in the same manner as TM$.
- if (tbswap == 0) {
- dlsch0 = dlsch[0];
- dlsch1 = dlsch[1];
- } else {
- dlsch0 = dlsch[1];
- dlsch1 = dlsch[0];
- }
+switch (tpmi) {
+ case 0 :
+ dlsch_harq->mimo_mode = ALAMOUTI;
+ break;
+ case 1:
+ dlsch_harq->mimo_mode = UNIFORM_PRECODING11;
+ dlsch_harq->pmi_alloc = pmi_extend(frame_parms,0, 0);
+ break;
+ case 2:
+ dlsch_harq->mimo_mode = UNIFORM_PRECODING1m1;
+ dlsch_harq->pmi_alloc = pmi_extend(frame_parms,1, 0);
+ break;
+ case 3:
+ dlsch_harq->mimo_mode = UNIFORM_PRECODING1j;
+ dlsch_harq->pmi_alloc = pmi_extend(frame_parms,2, 0);
+ break;
+ case 4:
+ dlsch_harq->mimo_mode = UNIFORM_PRECODING1mj;
+ dlsch_harq->pmi_alloc = pmi_extend(frame_parms,3, 0);
+ break;
+ case 5:
+ dlsch_harq->mimo_mode = PUSCH_PRECODING0;
+ dlsch_harq->pmi_alloc = pmi_alloc;;//pmi_convert(frame_parms,dlsch0->pmi_alloc,0);
+ #ifdef DEBUG_HARQ
+ printf ("[DCI UE] I am calling from the UE side pmi_alloc_new = %d\n", dlsch0->pmi_alloc);
+ #endif
+ break;
+ case 6:
+ dlsch_harq->mimo_mode = PUSCH_PRECODING1;
+ dlsch_harq->pmi_alloc = pmi_alloc;;//pmi_convert(frame_parms,dlsch0->pmi_alloc,1);
+ #ifdef DEBUG_HARQ
+ printf ("[DCI UE] I am calling from the UE side pmi_alloc_new = %d\n", dlsch0->pmi_alloc);
+ #endif
+ break;
+ }
+}
- dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
- dlsch1_harq = dlsch[1]->harq_processes[harq_pid];
- // Needs to be checked
- dlsch0_harq->codeword=0;
- dlsch1_harq->codeword=1;
- dlsch0->current_harq_pid = harq_pid;
- dlsch1->current_harq_pid = harq_pid;
- dlsch0->harq_ack[subframe].harq_id = harq_pid;
- dlsch1->harq_ack[subframe].harq_id = harq_pid;
-
- conv_rballoc(rah,rballoc,frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even);
- dlsch0_harq->rb_alloc_odd[0]= dlsch0_harq->rb_alloc_even[0];
- dlsch0_harq->rb_alloc_odd[1]= dlsch0_harq->rb_alloc_even[1];
- dlsch0_harq->rb_alloc_odd[2]= dlsch0_harq->rb_alloc_even[2];
- dlsch0_harq->rb_alloc_odd[3]= dlsch0_harq->rb_alloc_even[3];
- dlsch1_harq->rb_alloc_even[0]= dlsch0_harq->rb_alloc_even[0];
- dlsch1_harq->rb_alloc_even[1]= dlsch0_harq->rb_alloc_even[1];
- dlsch1_harq->rb_alloc_even[2]= dlsch0_harq->rb_alloc_even[2];
- dlsch1_harq->rb_alloc_even[3]= dlsch0_harq->rb_alloc_even[3];
- dlsch1_harq->rb_alloc_odd[0]= dlsch0_harq->rb_alloc_odd[0];
- dlsch1_harq->rb_alloc_odd[1]= dlsch0_harq->rb_alloc_odd[1];
- dlsch1_harq->rb_alloc_odd[2]= dlsch0_harq->rb_alloc_odd[2];
- dlsch1_harq->rb_alloc_odd[3]= dlsch0_harq->rb_alloc_odd[3];
+void compute_precoding_info_format2A(uint8_t tpmi,
+ uint8_t nb_antenna_ports_eNB,
+ uint8_t tb0_active,
+ uint8_t tb1_active,
+ LTE_DL_UE_HARQ_t *dlsch0_harq,
+ LTE_DL_UE_HARQ_t *dlsch1_harq)
+{
- dlsch0_harq->nb_rb = conv_nprb(rah,
- rballoc,
- frame_parms->N_RB_DL);
+ dlsch0_harq->dl_power_off = 0;
+ dlsch1_harq->dl_power_off = 0;
- dlsch1_harq->nb_rb = dlsch0_harq->nb_rb;
+ if (nb_antenna_ports_eNB == 2) {
+ if ((tb0_active==1) && (tb1_active==1)) {
+ dlsch0_harq->mimo_mode = LARGE_CDD;
+ dlsch1_harq->mimo_mode = LARGE_CDD;
+ dlsch0_harq->dl_power_off = 1;
+ dlsch1_harq->dl_power_off = 1;
+ } else {
+ dlsch0_harq->mimo_mode = ALAMOUTI;
+ dlsch1_harq->mimo_mode = ALAMOUTI;
+ }
+ } else if (nb_antenna_ports_eNB == 4) { // 4 antenna case
+ if ((tb0_active==1) && (tb1_active==1)) {
+ switch (tpmi) {
+ case 0: // one layer per transport block
+ dlsch0_harq->mimo_mode = LARGE_CDD;
+ dlsch1_harq->mimo_mode = LARGE_CDD;
+ dlsch0_harq->dl_power_off = 1;
+ dlsch1_harq->dl_power_off = 1;
+ break;
- NPRB = dlsch0_harq->nb_rb;
+ case 1: // one-layers on TB 0, two on TB 1
+ dlsch0_harq->mimo_mode = LARGE_CDD;
+ dlsch1_harq->mimo_mode = LARGE_CDD;
+ dlsch1_harq->Nl = 2;
+ dlsch0_harq->dl_power_off = 1;
+ dlsch1_harq->dl_power_off = 1;
+ break;
+ case 2: // two-layers on TB 0, two on TB 1
+ dlsch0_harq->mimo_mode = LARGE_CDD;
+ dlsch1_harq->mimo_mode = LARGE_CDD;
+ dlsch0_harq->Nl = 2;
+ dlsch0_harq->dl_power_off = 1;
+ dlsch1_harq->dl_power_off = 1;
+ break;
- if (NPRB==0) {
- LOG_E(PHY,"Format 2A: NPRB=0 (rballoc %x,mcs %d, frame_type %d N_RB_DL %d)\n",rballoc,mcs,frame_parms->frame_type,frame_parms->N_RB_DL);
- return(-1);
- }
+ case 3: //
+ LOG_E(PHY,"Illegal value (3) for TPMI in Format 2A DCI\n");
+ break;
+ }
+ } else if (tb0_active == 1) {
+ switch (tpmi) {
+ case 0: // one layer per transport block
+ dlsch0_harq->mimo_mode = ALAMOUTI;
+ dlsch1_harq->mimo_mode = ALAMOUTI;
+ break;
- // printf("NPRB %d\n",NPRB);
- dlsch0_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3];
- dlsch1_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3];
+ case 1: // two-layers on TB 0
+ dlsch0_harq->mimo_mode = LARGE_CDD;
+ dlsch0_harq->Nl = 2;
+ dlsch0_harq->dl_power_off = 1;
+ break;
- dlsch0_harq->mcs = mcs1;
- dlsch1_harq->mcs = mcs2;
+ case 2: // two-layers on TB 0, two on TB 1
+ case 3: //
+ LOG_E(PHY,"Illegal value %d for TPMI in Format 2A DCI with one transport block enabled\n",tpmi);
+ break;
+ }
+ } else if (tb1_active == 1) {
+ switch (tpmi) {
+ case 0: // one layer per transport block
+ dlsch0_harq->mimo_mode = ALAMOUTI;
+ dlsch1_harq->mimo_mode = ALAMOUTI;
+ break;
- dlsch0_harq->rvidx = rv1;
- dlsch1_harq->rvidx = rv2;
+ case 1: // two-layers on TB 0
+ dlsch1_harq->mimo_mode = LARGE_CDD;
+ dlsch1_harq->Nl = 2;
+ dlsch0_harq->dl_power_off = 1;
+ break;
+ case 2: // two-layers on TB 0, two on TB 1
+ case 3: //
+ LOG_E(PHY,"Illegal value %d for TPMI in Format 2A DCI with one transport block enabled\n",tpmi);
+ break;
+ }
+ }
+ }
+ // printf("Format 2A: NPRB=%d (rballoc %x,mcs1 %d, mcs2 %d, frame_type %d N_RB_DL %d,active %d/%d)\n",NPRB,rballoc,mcs1,mcs2,frame_parms->frame_type,frame_parms->N_RB_DL,dlsch0->active,dlsch1->active);
+ //printf("UE (%x/%d): Subframe %d Format2A DCI: ndi1 %d, old_ndi1 %d, ndi2 %d, old_ndi2 %d (first tx1 %d, first tx2 %d) harq_status1 %d, harq_status2 %d\n",dlsch0->rnti,harq_pid,subframe,ndi,dlsch0_harq->DCINdi,
+ // dlsch0_harq->first_tx,dlsch1_harq->first_tx,dlsch0_harq->status,dlsch1_harq->status);
+ //printf("TBS0 %d, TBS1 %d\n",dlsch0_harq->TBS,dlsch1_harq->TBS);
+}
- dlsch0_harq->Nl = 1;
- dlsch1_harq->Nl = 1;
- // dlsch[0]->layer_index = 0;
+void prepare_dl_decoding_format2_2A(DCI_format_t dci_format,
+ DCI_INFO_EXTRACTED_t *pdci_info_extarcted,
+ LTE_DL_FRAME_PARMS *frame_parms,
+ uint8_t subframe,
+ LTE_DL_UE_HARQ_t *dlsch0_harq,
+ LTE_DL_UE_HARQ_t *dlsch1_harq,
+ LTE_UE_DLSCH_t *pdlsch0,
+ LTE_UE_DLSCH_t *pdlsch1)
+{
- dlsch0_harq->dl_power_off = 1; //no power offset
- dlsch1_harq->dl_power_off = 1; //no power offset
+ uint8_t rah = pdci_info_extarcted->rah;
+ uint8_t mcs1 = pdci_info_extarcted->mcs1;
+ uint8_t mcs2 = pdci_info_extarcted->mcs1;
+ uint8_t rv1 = pdci_info_extarcted->rv1;
+ uint8_t rv2 = pdci_info_extarcted->rv2;
+ uint8_t harq_pid = pdci_info_extarcted->harq_pid;
+ uint32_t rballoc = pdci_info_extarcted->rballoc;
+ uint8_t tbswap = pdci_info_extarcted->tb_swap;
+ uint8_t tpmi = pdci_info_extarcted->tpmi;
+ uint8_t TPC = pdci_info_extarcted->TPC;
+ uint8_t ndi1 = pdci_info_extarcted->ndi1;
+ uint8_t ndi2 = pdci_info_extarcted->ndi2;
- dlsch0->active = dlsch1->active = 1;
+ uint8_t TB0_active = 0;
+ uint8_t TB1_active = 0;
- // check if either TB is disabled (see 36-213 V11.3 Section )
- if ((dlsch0_harq->rvidx == 1) && (dlsch0_harq->mcs == 0)) {
- dlsch0->active = 0;
- }
- if ((dlsch1_harq->rvidx == 1) && (dlsch1_harq->mcs == 0)) {
- dlsch1->active = 0;
- }
+ // check if either TB is disabled (see 36-213 V8.6 p. 26)
+ TB0_active = 1;
+ TB1_active = 1;
- // printf("Format2A DCI (UE, hard pid %d): ndi %d, old_ndi %d (first tx %d)\n",harq_pid,ndi,dlsch0_harq->DCINdi,
- // dlsch0_harq->first_tx);
+ if ((rv1 == 1) && (mcs1 == 0)) {
+ TB0_active=0;
+ }
+ if ((rv2 == 1) && (mcs2 == 0)) {
+ TB1_active=0;
+ }
- if (dlsch0->active == 1) {
- if ((ndi1!=dlsch0_harq->DCINdi)||
- (dlsch0_harq->first_tx==1)) {
- // printf("Rate: setting round to zero (ndi %d, DCINdi %d,first_tx %d)\n",ndi,dlsch0_harq->DCINdi,dlsch0_harq->first_tx);
- dlsch0_harq->round=0;
- dlsch0_harq->status = ACTIVE;
- dlsch0_harq->DCINdi = ndi1;
+ //#ifdef DEBUG_HARQ
+ printf("[DCI UE]: TB0 status %d , TB1 status %d\n", TB0_active, TB1_active);
+ //#endif
- if (dlsch0_harq->first_tx==1) {
- LOG_D(PHY,"[PDSCH %x/%d] Format 2A DCI First TX0: Clearing flag\n",rnti,harq_pid);
- dlsch0_harq->first_tx = 0;
- }
- } else if (dlsch0_harq->status == SCH_IDLE) { // we got an Ndi = 0 for a previously decoded process,
- // this happens if either another harq process in the same
- // is NAK or an ACK was not received
+ dlsch0_harq->mcs = mcs1;
+ dlsch1_harq->mcs = mcs2;
+ dlsch0_harq->rvidx = rv1;
+ dlsch1_harq->rvidx = rv2;
+ dlsch0_harq->DCINdi = ndi1;
+ dlsch1_harq->DCINdi = ndi2;
- dlsch0->harq_ack[subframe].ack = 1;
- dlsch0->harq_ack[subframe].harq_id = harq_pid;
- dlsch0->harq_ack[subframe].send_harq_status = 1;
- dlsch0->active = 0;
- // printf("Got NDI=0 for correctly decoded SDU (harq_pid %d) subframe %d\n",harq_pid,subframe);
+ dlsch0_harq->codeword = 0;
+ dlsch1_harq->codeword = 1;
+ dlsch0_harq->Nl = 1;
+ dlsch1_harq->Nl = 1;
+ dlsch0_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3];
+ dlsch1_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3];
+ dlsch0_harq->dl_power_off = 1;
+ dlsch1_harq->dl_power_off = 1;
- }
- }
+ pdlsch0->current_harq_pid = harq_pid;
+ pdlsch0->harq_ack[subframe].harq_id = harq_pid;
+ pdlsch1->current_harq_pid = harq_pid;
+ pdlsch1->harq_ack[subframe].harq_id = harq_pid;
- if (dlsch1->active == 1) {
- if ((ndi2!=dlsch1_harq->DCINdi)||
- (dlsch1_harq->first_tx==1)) {
- dlsch1_harq->round=0;
- dlsch1_harq->status = ACTIVE;
- dlsch1_harq->DCINdi = ndi2;
+ // assume two CW are active
+ dlsch0_harq->status = ACTIVE;
+ dlsch1_harq->status = ACTIVE;
+ pdlsch0->active = 1;
+ pdlsch1->active = 1;
- if (dlsch1_harq->first_tx==1) {
- LOG_D(PHY,"[PDSCH %x/%d] Format 2A DCI First TX1: Clearing flag\n",rnti,harq_pid);
- dlsch1_harq->first_tx = 0;
- }
- } else if (dlsch1_harq->status == SCH_IDLE) { // we got an Ndi = 0 for a previously decoded process,
- // this happens if either another harq process in the same
- // is NAK or an ACK was not received
+ if (TB0_active && TB1_active && tbswap==1) {
+ dlsch0_harq->codeword = 1;
+ dlsch1_harq->codeword = 0;
+ }
- dlsch1->harq_ack[subframe].ack = 1;
- dlsch1->harq_ack[subframe].harq_id = harq_pid;
- dlsch1->harq_ack[subframe].send_harq_status = 1;
- dlsch1->active = 0;
- // printf("Got NDI=0 for correctly decoded SDU (harq_pid %d) subframe %d\n",harq_pid,subframe);
+ if (TB0_active==0) {
+ dlsch0_harq->status = SCH_IDLE;
+ pdlsch0->active = 0;
+ //#ifdef DEBUG_HARQ
+ printf("[DCI UE]: TB0 is deactivated, retransmit TB1 transmit in TM6\n");
+ //#endif
}
- }
- if (frame_parms->nb_antenna_ports_eNB == 2) {
- dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
- dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][dlsch0_harq->nb_rb-1];
+ if (TB1_active==0) {
+ dlsch1_harq->status = SCH_IDLE;
+ pdlsch1->active = 0;
+ //#ifdef DEBUG_HARQ
+ printf("[DCI UE]: TB1 is deactivated, retransmit TB0 transmit in TM6\n");
+ //#endif
+ }
+ printf("[DCI UE]: dlsch0_harq status %d , dlsch1_harq status %d\n", dlsch0_harq->status, dlsch1_harq->status);
- if ((dlsch0->active==1) && (dlsch1->active==1)) {
- dlsch0_harq->mimo_mode = LARGE_CDD;
- dlsch1_harq->mimo_mode = LARGE_CDD;
+ // compute resource allocation
+ if (TB0_active == 1){
+
+ dlsch0_harq->nb_rb = conv_nprb(rah,
+ rballoc,
+ frame_parms->N_RB_DL);
+ conv_rballoc(rah,
+ rballoc,
+ frame_parms->N_RB_DL,
+ dlsch0_harq->rb_alloc_even);
+
+ dlsch0_harq->rb_alloc_odd[0]= dlsch0_harq->rb_alloc_even[0];
+ dlsch0_harq->rb_alloc_odd[1]= dlsch0_harq->rb_alloc_even[1];
+ dlsch0_harq->rb_alloc_odd[2]= dlsch0_harq->rb_alloc_even[2];
+ dlsch0_harq->rb_alloc_odd[3]= dlsch0_harq->rb_alloc_even[3];
+
+ if (TB1_active == 1){
+ dlsch1_harq->rb_alloc_even[0]= dlsch0_harq->rb_alloc_even[0];
+ dlsch1_harq->rb_alloc_even[1]= dlsch0_harq->rb_alloc_even[1];
+ dlsch1_harq->rb_alloc_even[2]= dlsch0_harq->rb_alloc_even[2];
+ dlsch1_harq->rb_alloc_even[3]= dlsch0_harq->rb_alloc_even[3];
+ dlsch1_harq->rb_alloc_odd[0] = dlsch0_harq->rb_alloc_odd[0];
+ dlsch1_harq->rb_alloc_odd[1] = dlsch0_harq->rb_alloc_odd[1];
+ dlsch1_harq->rb_alloc_odd[2] = dlsch0_harq->rb_alloc_odd[2];
+ dlsch1_harq->rb_alloc_odd[3] = dlsch0_harq->rb_alloc_odd[3];
+
+ dlsch1_harq->nb_rb = dlsch0_harq->nb_rb;
+ }
+ } else if ((TB0_active == 0) && (TB1_active == 1)){
+
+ conv_rballoc(rah,
+ rballoc,
+ frame_parms->N_RB_DL,
+ dlsch1_harq->rb_alloc_even);
+
+ dlsch1_harq->rb_alloc_odd[0]= dlsch1_harq->rb_alloc_even[0];
+ dlsch1_harq->rb_alloc_odd[1]= dlsch1_harq->rb_alloc_even[1];
+ dlsch1_harq->rb_alloc_odd[2]= dlsch1_harq->rb_alloc_even[2];
+ dlsch1_harq->rb_alloc_odd[3]= dlsch1_harq->rb_alloc_even[3];
+ dlsch1_harq->nb_rb = conv_nprb(rah,
+ rballoc,
+ frame_parms->N_RB_DL);
+ }
+
+
+ // compute precoding matrix + mimo mode
+ if(dci_format == format2)
+ {
+ if ((TB0_active) && (TB1_active)){ //two CW active
+ compute_precoding_info_2cw(tpmi, tbswap, pdlsch0->pmi_alloc,frame_parms, dlsch0_harq, dlsch1_harq);
+ } else if ((TB0_active) && (!TB1_active)) { // only CW 0 active
+ compute_precoding_info_1cw(tpmi, pdlsch0->pmi_alloc, frame_parms, dlsch0_harq);
} else {
- dlsch0_harq->mimo_mode = ALAMOUTI;
- dlsch1_harq->mimo_mode = ALAMOUTI;
+ compute_precoding_info_1cw(tpmi, pdlsch0->pmi_alloc, frame_parms, dlsch1_harq);
}
- } else if (frame_parms->nb_antenna_ports_eNB == 4) { // 4 antenna case
- if ((dlsch0->active==1) && (dlsch1->active==1)) {
- switch (tpmi) {
- case 0: // one layer per transport block
- dlsch0_harq->mimo_mode = LARGE_CDD;
- dlsch1_harq->mimo_mode = LARGE_CDD;
- dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
- dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][dlsch1_harq->nb_rb-1];
+ //printf(" UE DCI harq0 MIMO mode = %d\n", dlsch0_harq->mimo_mode);
+ if ((frame_parms->mode1_flag == 1) && (TB0_active))
+ dlsch0_harq->mimo_mode = SISO;
+ }
+ else
+ {
+ compute_precoding_info_format2A( tpmi,
+ frame_parms->nb_antenna_ports_eNB,
+ TB0_active,
+ TB1_active,
+ dlsch0_harq,
+ dlsch1_harq);
+ }
+
+ // reset round + compute Qm
+ if (TB0_active) {
+ if ((ndi1!=dlsch0_harq->DCINdi) || (dlsch0_harq->first_tx==1)) {
+ dlsch0_harq->round = 0;
+
+ if ( dlsch0_harq->first_tx==1) {
+ LOG_D(PHY,"Format 2 DCI First TX0: Clearing flag\n");
+ dlsch0_harq->first_tx = 0;
+ }
+ }else{
+ if(dlsch0_harq->round == 0) {
+ // skip pdsch decoding and report ack
+ dlsch0_harq->status = SCH_IDLE;
+ pdlsch0->active = 0;
+ pdlsch0->harq_ack[subframe].ack = 1;
+ pdlsch0->harq_ack[subframe].harq_id = harq_pid;
+ pdlsch0->harq_ack[subframe].send_harq_status = 1;
+ }
+ }
- break;
+ dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
+ if(dlsch0_harq->Nl == 2)
+ dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][(dlsch0_harq->nb_rb<<1)-1];
+ if (mcs1 <= 28)
+ dlsch0_harq->Qm = get_Qm(mcs1);
+ else if (mcs1<=31)
+ dlsch0_harq->Qm = (mcs1-28)<<1;
+ }
+
+ if (TB1_active) {
+ if ((ndi2!=dlsch1_harq->DCINdi) || (dlsch1_harq->first_tx==1)) {
+ dlsch1_harq->round = 0;
+ if (dlsch1_harq->first_tx==1) {
+ LOG_D(PHY,"Format 2 DCI First TX1: Clearing flag\n");
+ dlsch1_harq->first_tx = 0;
+ }
+ }else{
+ if(dlsch1_harq->round == 0) {
+ // skip pdsch decoding and report ack
+ dlsch1_harq->status = SCH_IDLE;
+ pdlsch1->active = 0;
+ pdlsch1->harq_ack[subframe].ack = 1;
+ pdlsch1->harq_ack[subframe].harq_id = harq_pid;
+ pdlsch1->harq_ack[subframe].send_harq_status = 1;
+ }
+ }
+
+ dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][dlsch1_harq->nb_rb-1];
+ if(dlsch0_harq->Nl == 2)
+ dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][(dlsch0_harq->nb_rb<<1)-1];
+
+ if (mcs2 <= 28)
+ dlsch1_harq->Qm = get_Qm(mcs2);
+ else if (mcs1<=31)
+ dlsch1_harq->Qm = (mcs2-28)<<1;
+ }
+
+ printf("[DCI UE]: dlsch0_harq status %d , dlsch1_harq status %d\n", dlsch0_harq->status, dlsch1_harq->status);
+
+ #ifdef DEBUG_HARQ
+ if (dlsch0 != NULL && dlsch1 != NULL)
+ printf("[DCI UE] dlsch0_harq status = %d, dlsch1_harq status = %d\n", dlsch0_harq->status, dlsch1_harq->status);
+ else if (dlsch0 == NULL && dlsch1 != NULL)
+ printf("[DCI UE] dlsch0_harq NULL dlsch1_harq status = %d\n", dlsch1_harq->status);
+ else if (dlsch0 != NULL && dlsch1 == NULL)
+ printf("[DCI UE] dlsch1_harq NULL dlsch0_harq status = %d\n", dlsch0_harq->status);
+ #endif
+}
+
+int generate_ue_dlsch_params_from_dci(int frame,
+ uint8_t subframe,
+ void *dci_pdu,
+ uint16_t rnti,
+ DCI_format_t dci_format,
+ LTE_UE_DLSCH_t **dlsch,
+ LTE_DL_FRAME_PARMS *frame_parms,
+ PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
+ uint16_t si_rnti,
+ uint16_t ra_rnti,
+ uint16_t p_rnti,
+ uint8_t beamforming_mode,
+ uint16_t tc_rnti)
+{
- case 1: // one-layers on TB 0, two on TB 1
- dlsch0_harq->mimo_mode = LARGE_CDD;
- dlsch1_harq->mimo_mode = LARGE_CDD;
- dlsch1_harq->Nl = 2;
- dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][(dlsch1_harq->nb_rb<<1)-1];
- break;
- case 2: // two-layers on TB 0, two on TB 1
- dlsch0_harq->mimo_mode = LARGE_CDD;
- dlsch1_harq->mimo_mode = LARGE_CDD;
- dlsch0_harq->Nl = 2;
+ uint8_t harq_pid=0;
+ uint8_t frame_type=frame_parms->frame_type;
+ uint8_t tpmi=0;
+ LTE_UE_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
+ LTE_DL_UE_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
+ DCI_INFO_EXTRACTED_t dci_info_extarcted;
+ uint8_t status=0;
- if (frame_parms->N_RB_DL <= 56) {
- dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][(dlsch0_harq->nb_rb<<1)-1];
- dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][(dlsch1_harq->nb_rb<<1)-1];
- } else {
- LOG_E(PHY,"Add implementation of Table 7.1.7.2.2-1 for two-layer TBS conversion with N_RB_DL > 56\n");
- }
+ if (!dlsch[0]) return -1;
- break;
+ #ifdef DEBUG_DCI
+ LOG_D(PHY,"dci_tools.c: Filling ue dlsch params -> rnti %x, SFN/SF %d/%d, dci_format %s\n",
+ rnti,
+ frame%1024,
+ subframe,
+ (dci_format==format0? "Format 0":(
+ dci_format==format1? "format 1":(
+ dci_format==format1A? "format 1A":(
+ dci_format==format1B? "format 1B":(
+ dci_format==format1C? "format 1C":(
+ dci_format==format1D? "format 1D":(
+ dci_format==format1E_2A_M10PRB? "format 1E_2A_M10PRB":(
+ dci_format==format2? "format 2":(
+ dci_format==format2A? "format 2A":(
+ dci_format==format2B? "format 2B":(
+ dci_format==format2C? "format 2C":(
+ dci_format==format2D? "format 2D":(
+ dci_format==format3? "format 3": "UNKNOWN"
+ ))))))))))))));
+ #endif
+
+ memset(&dci_info_extarcted,0,sizeof(dci_info_extarcted));
+ switch (dci_format) {
+
+ case format0: // This is an ULSCH allocation so nothing here, inform MAC
+ LOG_E(PHY,"format0 not possible\n");
+ return(-1);
+ break;
- case 3: //
- LOG_E(PHY,"Illegal value (3) for TPMI in Format 2A DCI\n");
- break;
- }
- } else if (dlsch0->active == 1) {
- switch (tpmi) {
- case 0: // one layer per transport block
- dlsch0_harq->mimo_mode = ALAMOUTI;
- dlsch1_harq->mimo_mode = ALAMOUTI;
- dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
- break;
+ case format1A:
+ {
+ // extract dci infomation
+ extract_dci1A_info(frame_parms->N_RB_DL,
+ frame_type,
+ dci_pdu,
+ &dci_info_extarcted);
- case 1: // two-layers on TB 0
- dlsch0_harq->mimo_mode = LARGE_CDD;
- dlsch0_harq->Nl = 2;
- dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][(dlsch0_harq->nb_rb<<1)-1];
- break;
- case 2: // two-layers on TB 0, two on TB 1
- case 3: //
- LOG_E(PHY,"Illegal value %d for TPMI in Format 2A DCI with one transport block enabled\n",tpmi);
- break;
- }
- } else if (dlsch1->active == 1) {
- switch (tpmi) {
- case 0: // one layer per transport block
- dlsch0_harq->mimo_mode = ALAMOUTI;
- dlsch1_harq->mimo_mode = ALAMOUTI;
- dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][dlsch1_harq->nb_rb-1];
- break;
+ // check dci content
+ dlsch0 = dlsch[0];
+ dlsch0->active = 0;
+ dlsch0_harq = dlsch[0]->harq_processes[dci_info_extarcted.harq_pid];
+
+ status = check_dci_format1_1a_coherency(format1A,
+ frame_parms->N_RB_DL,
+ rnti,
+ tc_rnti,
+ si_rnti,
+ ra_rnti,
+ p_rnti,
+ &dci_info_extarcted,
+ dlsch0_harq);
+ if(status == 0)
+ return(-1);
- case 1: // two-layers on TB 0
- dlsch1_harq->mimo_mode = LARGE_CDD;
- dlsch1_harq->Nl = 2;
- dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][(dlsch1_harq->nb_rb<<1)-1];
- break;
+ // dci is correct ==> update internal structure and prepare dl decoding
+ prepare_dl_decoding_format1_1A(format1A,
+ frame_parms->N_RB_DL,
+ &dci_info_extarcted,
+ frame_parms,
+ subframe,
+ rnti,
+ si_rnti,
+ ra_rnti,
+ p_rnti,
+ dlsch0_harq,
+ dlsch0);
- case 2: // two-layers on TB 0, two on TB 1
- case 3: //
- LOG_E(PHY,"Illegal value %d for TPMI in Format 2A DCI with one transport block enabled\n",tpmi);
- break;
- }
- }
- } else {
- LOG_E(PHY,"Illegal number of antennas for eNB %d\n",frame_parms->nb_antenna_ports_eNB);
+
+
+ break;
}
+ case format1C:
+ {
+ // extract dci infomation
+#ifdef DEBUG_DL_DECODING
+ LOG_I(PHY,"[DCI Format-1C] extact dci information \n");
+#endif
+ extract_dci1C_info(frame_parms->N_RB_DL,
+ frame_type,
+ dci_pdu,
+ &dci_info_extarcted);
- if (mcs1 <= 28)
- dlsch0_harq->Qm = get_Qm(mcs1);
- else if (mcs1<=31)
- dlsch0_harq->Qm = (mcs1-28)<<1;
- else
- LOG_E(PHY,"invalid mcs1 %d\n",mcs1);
- if (mcs2 <= 28)
- dlsch1_harq->Qm = get_Qm(mcs2);
- else if (mcs2<=31)
- dlsch1_harq->Qm = (mcs2-28)<<1;
- else
- LOG_E(PHY,"invalid mcs2 %d\n",mcs2);
+ // check dci content
+#ifdef DEBUG_DL_DECODING
+ LOG_I(PHY,"[DCI Format-1C] check dci content \n");
+#endif
+ dlsch0 = dlsch[0];
+ dlsch0->active = 0;
+ dlsch0_harq = dlsch[0]->harq_processes[dci_info_extarcted.harq_pid];
+
+ status = check_dci_format1c_coherency(frame_parms->N_RB_DL,
+ &dci_info_extarcted,
+ rnti,
+ si_rnti,
+ ra_rnti,
+ p_rnti,
+ dlsch0_harq);
+ if(status == 0)
+ return(-1);
- // printf("Format 2A: NPRB=%d (rballoc %x,mcs1 %d, mcs2 %d, frame_type %d N_RB_DL %d,active %d/%d)\n",NPRB,rballoc,mcs1,mcs2,frame_parms->frame_type,frame_parms->N_RB_DL,dlsch0->active,dlsch1->active);
- //printf("UE (%x/%d): Subframe %d Format2A DCI: ndi1 %d, old_ndi1 %d, ndi2 %d, old_ndi2 %d (first tx1 %d, first tx2 %d) harq_status1 %d, harq_status2 %d\n",dlsch0->rnti,harq_pid,subframe,ndi,dlsch0_harq->DCINdi,
- // dlsch0_harq->first_tx,dlsch1_harq->first_tx,dlsch0_harq->status,dlsch1_harq->status);
- //printf("TBS0 %d, TBS1 %d\n",dlsch0_harq->TBS,dlsch1_harq->TBS);
+ // dci is correct ==> update internal structure and prepare dl decoding
+#ifdef DEBUG_DL_DECODING
+ LOG_I(PHY,"[DCI Format-1C] prepare downlink decoding \n");
+#endif
+ prepare_dl_decoding_format1C(frame_parms->N_RB_DL,
+ &dci_info_extarcted,
+ frame_parms,
+ rnti,
+ si_rnti,
+ ra_rnti,
+ p_rnti,
+ frame,
+ subframe,
+ dlsch0_harq,
+ dlsch0);
+ break;
+ }
- break;
+ case format1:
+ {
+ // extract dci infomation
+ extract_dci1_info(frame_parms->N_RB_DL,
+ frame_type,
+ dci_pdu,
+ &dci_info_extarcted);
- case format1E_2A_M10PRB:
- if (!dlsch[0]) return -1;
+ // check dci content
+ dlsch0 = dlsch[0];
+ dlsch0->active = 0;
+ dlsch0_harq = dlsch[0]->harq_processes[dci_info_extarcted.harq_pid];
+
+ status = check_dci_format1_1a_coherency(format1,
+ frame_parms->N_RB_DL,
+ rnti,
+ tc_rnti,
+ si_rnti,
+ ra_rnti,
+ p_rnti,
+ &dci_info_extarcted,
+ dlsch0_harq);
+ if(status == 0)
+ return(-1);
- harq_pid = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->harq_pid;
+ // dci is correct ==> update internal structure and prepare dl decoding
+ prepare_dl_decoding_format1_1A(format1,
+ frame_parms->N_RB_DL,
+ &dci_info_extarcted,
+ frame_parms,
+ subframe,
+ rnti,
+ si_rnti,
+ ra_rnti,
+ p_rnti,
+ dlsch0_harq,
+ dlsch0);
+ break;
+ }
+
+ case format2:
+ {
+ // extract dci infomation
+ LOG_I(PHY,"[DCI-format2] extract dci infomation \n");
+ extract_dci2_info(frame_parms->N_RB_DL,
+ frame_type,
+ frame_parms->nb_antenna_ports_eNB,
+ dci_pdu,
+ &dci_info_extarcted);
+
+ // check dci content
+ dlsch[0]->active = 0;
+ dlsch[1]->active = 0;
+
+ if (dci_info_extarcted.tb_swap == 0) {
+ dlsch0 = dlsch[0];
+ dlsch1 = dlsch[1];
+ } else {
+ dlsch0 = dlsch[1];
+ dlsch1 = dlsch[0];
+ }
+
+ dlsch0_harq = dlsch0->harq_processes[harq_pid];
+ dlsch1_harq = dlsch1->harq_processes[harq_pid];
+
+ LOG_I(PHY,"[DCI-format2] check dci content \n");
+ status = check_dci_format2_2a_coherency(format2,
+ frame_parms->N_RB_DL,
+ &dci_info_extarcted,
+ rnti,
+ si_rnti,
+ ra_rnti,
+ p_rnti,
+ dlsch0_harq,
+ dlsch1_harq);
+ if(status == 0)
+ return(-1);
+
+ // dci is correct ==> update internal structure and prepare dl decoding
+ LOG_I(PHY,"[DCI-format2] update internal structure and prepare dl decoding \n");
+ prepare_dl_decoding_format2_2A(format2,
+ &dci_info_extarcted,
+ frame_parms,
+ subframe,
+ dlsch0_harq,
+ dlsch1_harq,
+ dlsch0,
+ dlsch1);
- if (harq_pid>=8) {
- LOG_E(PHY,"Format 1E_2A_M10PRB: harq_pid=%d >= 8\n", harq_pid);
- return(-1);
}
+ break;
- dlsch[0]->current_harq_pid = harq_pid;
- dlsch[0]->harq_ack[subframe].harq_id = harq_pid;
+ case format2A:
+ {
+ // extract dci infomation
+ LOG_I(PHY,"[DCI-format2A] extract dci infomation \n");
+ extract_dci2A_info(frame_parms->N_RB_DL,
+ frame_type,
+ frame_parms->nb_antenna_ports_eNB,
+ dci_pdu,
+ &dci_info_extarcted);
+
+ // check dci content
+ LOG_I(PHY,"[DCI-format2A] check dci content \n");
+ LOG_I(PHY,"[DCI-format2A] tb_swap %d harq_pid %d\n", dci_info_extarcted.tb_swap, dci_info_extarcted.harq_pid);
+ dlsch[0]->active = 0;
+ dlsch[1]->active = 0;
- /*
- tbswap = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->tb_swap;
- if (tbswap == 0) {
+ if (dci_info_extarcted.tb_swap == 0) {
dlsch0 = dlsch[0];
dlsch1 = dlsch[1];
- }
- else{
+ } else {
dlsch0 = dlsch[1];
dlsch1 = dlsch[0];
+ }
+ dlsch0_harq = dlsch0->harq_processes[dci_info_extarcted.harq_pid];
+ dlsch1_harq = dlsch1->harq_processes[dci_info_extarcted.harq_pid];
+
+ LOG_I(PHY,"[DCI-format2A] check dci content \n");
+ status = check_dci_format2_2a_coherency(format2A,
+ frame_parms->N_RB_DL,
+ &dci_info_extarcted,
+ rnti,
+ si_rnti,
+ ra_rnti,
+ p_rnti,
+ dlsch0_harq,
+ dlsch1_harq);
+ if(status == 0)
+ return(-1);
+
+ // dci is correct ==> update internal structure and prepare dl decoding
+ LOG_I(PHY,"[DCI-format2A] update internal structure and prepare dl decoding \n");
+ prepare_dl_decoding_format2_2A(format2A,
+ &dci_info_extarcted,
+ frame_parms,
+ subframe,
+ dlsch0_harq,
+ dlsch1_harq,
+ dlsch0,
+ dlsch1);
+ }
+ break;
+
+ case format1E_2A_M10PRB:
+ if (!dlsch[0]) return -1;
+
+ harq_pid = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->harq_pid;
+
+ if (harq_pid>=8) {
+ LOG_E(PHY,"Format 1E_2A_M10PRB: harq_pid=%d >= 8\n", harq_pid);
+ return(-1);
}
- */
- dlsch0 = dlsch[0];
- dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
- // Needs to be checked
- dlsch0_harq->codeword=0;
- conv_rballoc(((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rah,
- ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rballoc,frame_parms->N_RB_DL,
- dlsch0_harq->rb_alloc_even);
+ dlsch[0]->current_harq_pid = harq_pid;
+ dlsch[0]->harq_ack[subframe].harq_id = harq_pid;
- dlsch0_harq->rb_alloc_odd[0] = dlsch0_harq->rb_alloc_even[0];
- dlsch0_harq->rb_alloc_odd[1] = dlsch0_harq->rb_alloc_even[1];
- dlsch0_harq->rb_alloc_odd[2] = dlsch0_harq->rb_alloc_even[2];
- dlsch0_harq->rb_alloc_odd[3] = dlsch0_harq->rb_alloc_even[3];
- /*
- dlsch1_harq->rb_alloc_even[0] = dlsch0_harq->rb_alloc_even[0];
- dlsch1_harq->rb_alloc_even[1] = dlsch0_harq->rb_alloc_even[1];
- dlsch1_harq->rb_alloc_even[2] = dlsch0_harq->rb_alloc_even[2];
- dlsch1_harq->rb_alloc_even[3] = dlsch0_harq->rb_alloc_even[3];
- */
- dlsch0_harq->nb_rb = conv_nprb(((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rah,
- ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rballoc,
- frame_parms->N_RB_DL);
- //dlsch1_harq->nb_rb = dlsch0_harq->nb_rb;
+ /*
+ tbswap = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->tb_swap;
+ if (tbswap == 0) {
+ dlsch0 = dlsch[0];
+ dlsch1 = dlsch[1];
+ }
+ else{
+ dlsch0 = dlsch[1];
+ dlsch1 = dlsch[0];
+ }
+ */
+ dlsch0 = dlsch[0];
- dlsch0_harq->mcs = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->mcs;
- dlsch0_harq->delta_PUCCH = delta_PUCCH_lut[((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->TPC&3];
+ dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
+ // Needs to be checked
+ dlsch0_harq->codeword=0;
+ conv_rballoc(((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rah,
+ ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rballoc,frame_parms->N_RB_DL,
+ dlsch0_harq->rb_alloc_even);
+ dlsch0_harq->rb_alloc_odd[0] = dlsch0_harq->rb_alloc_even[0];
+ dlsch0_harq->rb_alloc_odd[1] = dlsch0_harq->rb_alloc_even[1];
+ dlsch0_harq->rb_alloc_odd[2] = dlsch0_harq->rb_alloc_even[2];
+ dlsch0_harq->rb_alloc_odd[3] = dlsch0_harq->rb_alloc_even[3];
+ /*
+ dlsch1_harq->rb_alloc_even[0] = dlsch0_harq->rb_alloc_even[0];
+ dlsch1_harq->rb_alloc_even[1] = dlsch0_harq->rb_alloc_even[1];
+ dlsch1_harq->rb_alloc_even[2] = dlsch0_harq->rb_alloc_even[2];
+ dlsch1_harq->rb_alloc_even[3] = dlsch0_harq->rb_alloc_even[3];
+ */
+ dlsch0_harq->nb_rb = conv_nprb(((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rah,
+ ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rballoc,
+ frame_parms->N_RB_DL);
+ //dlsch1_harq->nb_rb = dlsch0_harq->nb_rb;
+ dlsch0_harq->mcs = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->mcs;
+ dlsch0_harq->delta_PUCCH = delta_PUCCH_lut[((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->TPC&3];
- /*
- if (dlsch0_harq->mcs>20) {
- printf("dci_tools.c: mcs > 20 disabled for now (asked %d)\n",dlsch0_harq->mcs);
- return(-1);
- }
- */
- //dlsch1_harq->mcs = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->mcs2;
- dlsch0_harq->rvidx = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rv;
- //dlsch1_harq->rvidx = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rv2;
- // check if either TB is disabled (see 36-213 V8.6 p. 26)
+ /*
+ if (dlsch0_harq->mcs>20) {
+ printf("dci_tools.c: mcs > 20 disabled for now (asked %d)\n",dlsch0_harq->mcs);
+ return(-1);
+ }
+ */
- if ((dlsch0_harq->rvidx == 1) && (dlsch0_harq->mcs == 0)) {
- dlsch0_harq->status = DISABLED;
- }
+ //dlsch1_harq->mcs = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->mcs2;
+ dlsch0_harq->rvidx = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rv;
+ //dlsch1_harq->rvidx = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rv2;
- //if ((dlsch1_harq->rvidx == 1) && (dlsch1_harq->mcs == 0)) {
- //dlsch1_harq->status = DISABLED;
- //}
- dlsch0_harq->Nl = 1;
+ // check if either TB is disabled (see 36-213 V8.6 p. 26)
- //dlsch0->layer_index = tbswap;
- //dlsch1->layer_index = 1-tbswap;
+ if ((dlsch0_harq->rvidx == 1) && (dlsch0_harq->mcs == 0)) {
+ dlsch0_harq->status = DISABLED;
+ }
+ //if ((dlsch1_harq->rvidx == 1) && (dlsch1_harq->mcs == 0)) {
+ //dlsch1_harq->status = DISABLED;
+ //}
+ dlsch0_harq->Nl = 1;
- // Fix this
- tpmi = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->tpmi;
- // printf("ue: tpmi %d\n",tpmi);
+ //dlsch0->layer_index = tbswap;
+ //dlsch1->layer_index = 1-tbswap;
- switch (tpmi) {
- case 0 :
- dlsch0_harq->mimo_mode = ALAMOUTI;
- break;
- case 1:
- dlsch0_harq->mimo_mode = UNIFORM_PRECODING11;
- dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,0,0);
- break;
+ // Fix this
+ tpmi = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->tpmi;
+ // printf("ue: tpmi %d\n",tpmi);
- case 2:
- dlsch0_harq->mimo_mode = UNIFORM_PRECODING1m1;
- dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,1, 0);
- break;
+ switch (tpmi) {
+ case 0 :
+ dlsch0_harq->mimo_mode = ALAMOUTI;
+ break;
- case 3:
- dlsch0_harq->mimo_mode = UNIFORM_PRECODING1j;
- dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,2, 0);
+ case 1:
+ dlsch0_harq->mimo_mode = UNIFORM_PRECODING11;
+ dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,0,0);
+ break;
- break;
+ case 2:
+ dlsch0_harq->mimo_mode = UNIFORM_PRECODING1m1;
+ dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,1, 0);
+ break;
- case 4:
- dlsch0_harq->mimo_mode = UNIFORM_PRECODING1mj;
- dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,3, 0);
- break;
+ case 3:
+ dlsch0_harq->mimo_mode = UNIFORM_PRECODING1j;
+ dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,2, 0);
- case 5:
- dlsch0_harq->mimo_mode = PUSCH_PRECODING0;
- // pmi stored from ulsch allocation routine
- dlsch0_harq->pmi_alloc = dlsch0->pmi_alloc;
- //LOG_I(PHY,"XXX using PMI %x\n",pmi2hex_2Ar1(dlsch0_harq->pmi_alloc));
- break;
+ break;
- case 6:
- dlsch0_harq->mimo_mode = PUSCH_PRECODING1;
- LOG_E(PHY,"Unsupported TPMI\n");
- return(-1);
- break;
- }
+ case 4:
+ dlsch0_harq->mimo_mode = UNIFORM_PRECODING1mj;
+ dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,3, 0);
+ break;
+ case 5:
+ dlsch0_harq->mimo_mode = PUSCH_PRECODING0;
+ // pmi stored from ulsch allocation routine
+ dlsch0_harq->pmi_alloc = dlsch0->pmi_alloc;
+ //LOG_I(PHY,"XXX using PMI %x\n",pmi2hex_2Ar1(dlsch0_harq->pmi_alloc));
+ break;
- if (frame_parms->mode1_flag == 1)
- dlsch0_harq->mimo_mode = SISO;
+ case 6:
+ dlsch0_harq->mimo_mode = PUSCH_PRECODING1;
+ LOG_E(PHY,"Unsupported TPMI\n");
+ return(-1);
+ break;
+ }
- if (dlsch0_harq->DCINdi != ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->ndi) {
+ if (frame_parms->mode1_flag == 1)
+ dlsch0_harq->mimo_mode = SISO;
- dlsch0_harq->round = 0;
- dlsch0_harq->status = ACTIVE;
- } else if (dlsch0_harq->status == SCH_IDLE) { // we got an Ndi = 0 for a previously decoded process,
- // this happens if either another harq process in the same
- // is NAK or an ACK was not received
- dlsch0->harq_ack[subframe].ack = 1;
- dlsch0->harq_ack[subframe].harq_id = harq_pid;
- dlsch0->harq_ack[subframe].send_harq_status = 1;
- dlsch0->active = 0;
- return(0);
- }
+ if (dlsch0_harq->DCINdi != ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->ndi) {
- dlsch0_harq->DCINdi = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->ndi;
- dlsch0_harq->mcs = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->mcs;
+ dlsch0_harq->round = 0;
+ dlsch0_harq->status = ACTIVE;
+ } else if (dlsch0_harq->status == SCH_IDLE) { // we got an Ndi = 0 for a previously decoded process,
+ // this happens if either another harq process in the same
+ // is NAK or an ACK was not received
- if (dlsch0_harq->nb_rb>1) {
- dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
- } else
- dlsch0_harq->TBS =0;
+ dlsch0->harq_ack[subframe].ack = 1;
+ dlsch0->harq_ack[subframe].harq_id = harq_pid;
+ dlsch0->harq_ack[subframe].send_harq_status = 1;
+ dlsch0->active = 0;
+ return(0);
+ }
- dlsch0->rnti = rnti;
- //dlsch1->rnti = rnti;
+ dlsch0_harq->DCINdi = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->ndi;
+ dlsch0_harq->mcs = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->mcs;
- dlsch0->active = 1;
- //dlsch1->active = 1;
+ if (dlsch0_harq->nb_rb>1) {
+ dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
+ } else
+ dlsch0_harq->TBS =0;
- dlsch0_harq->dl_power_off = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->dl_power_off;
- //dlsch1_harq->dl_power_off = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->dl_power_off;
+ dlsch0->rnti = rnti;
+ //dlsch1->rnti = rnti;
+ dlsch0->active = 1;
+ //dlsch1->active = 1;
- break;
+ dlsch0_harq->dl_power_off = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->dl_power_off;
+ //dlsch1_harq->dl_power_off = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->dl_power_off;
- default:
- LOG_E(PHY,"format %d not yet implemented\n",dci_format);
- return(-1);
- break;
- }
+ break;
-#ifdef DEBUG_DCI
+ default:
+ LOG_E(PHY,"format %d not yet implemented\n",dci_format);
+ return(-1);
+ break;
+ }
- if (dlsch[0] && (dlsch[0]->rnti != 0xffff)) {
- printf("dci_format:%d Abssubframe: %d.%d \n",dci_format,frame%1024,subframe);
- printf("PDSCH dlsch0 UE: rnti %x\n",dlsch[0]->rnti);
- printf("PDSCH dlsch0 UE: NBRB %d\n",dlsch0_harq->nb_rb);
- printf("PDSCH dlsch0 UE: rballoc %x\n",dlsch0_harq->rb_alloc_even[0]);
- printf("PDSCH dlsch0 UE: harq_pid %d\n",harq_pid);
- printf("PDSCH dlsch0 UE: tpc %d\n",TPC);
- printf("PDSCH dlsch0 UE: g %d\n",dlsch[0]->g_pucch);
- printf("PDSCH dlsch0 UE: round %d\n",dlsch0_harq->round);
- printf("PDSCH dlsch0 UE: DCINdi %d\n",dlsch0_harq->DCINdi);
- printf("PDSCH dlsch0 UE: rvidx %d\n",dlsch0_harq->rvidx);
- printf("PDSCH dlsch0 UE: TBS %d\n",dlsch0_harq->TBS);
- printf("PDSCH dlsch0 UE: mcs %d\n",dlsch0_harq->mcs);
- printf("PDSCH dlsch0 UE: pwr_off %d\n",dlsch0_harq->dl_power_off);
- }
-#endif
+ #ifdef DEBUG_DCI
-#if T_TRACER
- if( (dlsch[0]->rnti != si_rnti) && (dlsch[0]->rnti != ra_rnti) && (dlsch[0]->rnti != p_rnti))
- {
- T(T_UE_PHY_DLSCH_UE_DCI, T_INT(0), T_INT(frame%1024), T_INT(subframe), T_INT(0),
- T_INT(dlsch[0]->rnti), T_INT(dci_format),
- T_INT(harq_pid),
- T_INT(dlsch0_harq->mcs),
- T_INT(dlsch0_harq->TBS));
- }
-#endif
+ if (dlsch[0] && (dlsch[0]->rnti != 0xffff)) {
+ printf("dci_format:%d Abssubframe: %d.%d \n",dci_format,frame%1024,subframe);
+ printf("PDSCH dlsch0 UE: rnti %x\n",dlsch[0]->rnti);
+ printf("PDSCH dlsch0 UE: NBRB %d\n",dlsch0_harq->nb_rb);
+ printf("PDSCH dlsch0 UE: rballoc %x\n",dlsch0_harq->rb_alloc_even[0]);
+ printf("PDSCH dlsch0 UE: harq_pid %d\n",harq_pid);
+ printf("PDSCH dlsch0 UE: tpc %d\n",TPC);
+ printf("PDSCH dlsch0 UE: g %d\n",dlsch[0]->g_pucch);
+ printf("PDSCH dlsch0 UE: round %d\n",dlsch0_harq->round);
+ printf("PDSCH dlsch0 UE: DCINdi %d\n",dlsch0_harq->DCINdi);
+ printf("PDSCH dlsch0 UE: rvidx %d\n",dlsch0_harq->rvidx);
+ printf("PDSCH dlsch0 UE: TBS %d\n",dlsch0_harq->TBS);
+ printf("PDSCH dlsch0 UE: mcs %d\n",dlsch0_harq->mcs);
+ printf("PDSCH dlsch0 UE: pwr_off %d\n",dlsch0_harq->dl_power_off);
+ }
+ #endif
- // compute DL power control parameters
- if (dlsch0_harq != NULL){
- computeRhoA_UE(pdsch_config_dedicated, dlsch[0],dlsch0_harq->dl_power_off, frame_parms->nb_antenna_ports_eNB);
- computeRhoB_UE(pdsch_config_dedicated,&(frame_parms->pdsch_config_common),frame_parms->nb_antenna_ports_eNB,dlsch[0],dlsch0_harq->dl_power_off);
- }
+ #if T_TRACER
+ if( (dlsch[0]->rnti != si_rnti) && (dlsch[0]->rnti != ra_rnti) && (dlsch[0]->rnti != p_rnti))
+ {
+ T(T_UE_PHY_DLSCH_UE_DCI, T_INT(0), T_INT(frame%1024), T_INT(subframe), T_INT(0),
+ T_INT(dlsch[0]->rnti), T_INT(dci_format),
+ T_INT(harq_pid),
+ T_INT(dlsch0_harq->mcs),
+ T_INT(dlsch0_harq->TBS));
+ }
+ #endif
- if (dlsch1_harq != NULL) {
- computeRhoA_UE(pdsch_config_dedicated, dlsch[1],dlsch1_harq->dl_power_off, frame_parms->nb_antenna_ports_eNB);
- computeRhoB_UE(pdsch_config_dedicated,&(frame_parms->pdsch_config_common),frame_parms->nb_antenna_ports_eNB,dlsch[1],dlsch1_harq->dl_power_off);
- }
+ // compute DL power control parameters
+ if (dlsch0_harq != NULL){
+ computeRhoA_UE(pdsch_config_dedicated, dlsch[0],dlsch0_harq->dl_power_off, frame_parms->nb_antenna_ports_eNB);
+ computeRhoB_UE(pdsch_config_dedicated,&(frame_parms->pdsch_config_common),frame_parms->nb_antenna_ports_eNB,dlsch[0],dlsch0_harq->dl_power_off);
+ }
- return(0);
+ if (dlsch1_harq != NULL) {
+ computeRhoA_UE(pdsch_config_dedicated, dlsch[1],dlsch1_harq->dl_power_off, frame_parms->nb_antenna_ports_eNB);
+ computeRhoB_UE(pdsch_config_dedicated,&(frame_parms->pdsch_config_common),frame_parms->nb_antenna_ports_eNB,dlsch[1],dlsch1_harq->dl_power_off);
+ }
+
+
+ return(0);
}
diff --git a/openair1/PHY/LTE_TRANSPORT/dlsch_demodulation.c b/openair1/PHY/LTE_TRANSPORT/dlsch_demodulation.c
index 3026054994..9112725172 100644
--- a/openair1/PHY/LTE_TRANSPORT/dlsch_demodulation.c
+++ b/openair1/PHY/LTE_TRANSPORT/dlsch_demodulation.c
@@ -2090,7 +2090,6 @@ void dlsch_channel_compensation_TM34(LTE_DL_FRAME_PARMS *frame_parms,
unsigned char aarx=0,symbol_mod,pilots=0;
int precoded_signal_strength0=0,precoded_signal_strength1=0;
int rx_power_correction;
- int output_shift;
int **rxdataF_ext = pdsch_vars->rxdataF_ext;
int **dl_ch_estimates_ext = pdsch_vars->dl_ch_estimates_ext;
@@ -3153,7 +3152,6 @@ void dlsch_detection_mrc_TM34(LTE_DL_FRAME_PARMS *frame_parms,
unsigned short nb_rb,
unsigned char dual_stream_UE) {
- unsigned char aatx;
int i;
__m128i *rxdataF_comp128_0,*rxdataF_comp128_1,*rxdataF_comp128_i0,*rxdataF_comp128_i1,*dl_ch_mag128_0,*dl_ch_mag128_1,*dl_ch_mag128_0b,*dl_ch_mag128_1b,*rho128_0,*rho128_1,*rho128_i0,*rho128_i1,*dl_ch_mag128_i0,*dl_ch_mag128_i1,*dl_ch_mag128_i0b,*dl_ch_mag128_i1b;
diff --git a/openair1/PHY/LTE_TRANSPORT/dlsch_llr_computation.c b/openair1/PHY/LTE_TRANSPORT/dlsch_llr_computation.c
index 2906c47e45..91ac860ba7 100644
--- a/openair1/PHY/LTE_TRANSPORT/dlsch_llr_computation.c
+++ b/openair1/PHY/LTE_TRANSPORT/dlsch_llr_computation.c
@@ -697,7 +697,6 @@ int32_t dlsch_qpsk_llr_SIC(LTE_DL_FRAME_PARMS *frame_parms,
int16_t rho_amp_x0[2*frame_parms->N_RB_DL*12];
int16_t rho_rho_amp_x0[2*frame_parms->N_RB_DL*12];
- int16_t clean_x1[2*frame_parms->N_RB_DL*12];
uint16_t amp_tmp;
uint16_t *llr16=(uint16_t*)dlsch_llr;
int i, len, nsymb;
@@ -953,7 +952,6 @@ void dlsch_16qam_llr_SIC (LTE_DL_FRAME_PARMS *frame_parms,
{
int16_t rho_amp_x0[2*frame_parms->N_RB_DL*12];
int16_t rho_rho_amp_x0[2*frame_parms->N_RB_DL*12];
- int16_t clean_x1[2*frame_parms->N_RB_DL*12];
uint16_t amp_tmp;
uint32_t *llr32=(uint32_t*)dlsch_llr;
int i, len, nsymb;
@@ -1222,7 +1220,6 @@ void dlsch_64qam_llr_SIC(LTE_DL_FRAME_PARMS *frame_parms,
{
int16_t rho_amp_x0[2*frame_parms->N_RB_DL*12];
int16_t rho_rho_amp_x0[2*frame_parms->N_RB_DL*12];
- int16_t clean_x1[2*frame_parms->N_RB_DL*12];
uint16_t amp_tmp;
uint16_t *llr32=(uint16_t*)dlsch_llr;
int i, len, nsymb, len2;
diff --git a/openair1/PHY/LTE_TRANSPORT/phich.c b/openair1/PHY/LTE_TRANSPORT/phich.c
index ed3ef923e3..df789cd174 100644
--- a/openair1/PHY/LTE_TRANSPORT/phich.c
+++ b/openair1/PHY/LTE_TRANSPORT/phich.c
@@ -1395,7 +1395,7 @@ void rx_phich(PHY_VARS_UE *ue,
subframe,
HI16,
nseq_PHICH,
- ngroup_PHICH,ulsch->harq_processes[harq_pid]->round+1,
+ ngroup_PHICH,
ulsch->Mlimit);
//#endif
diff --git a/openair1/PHY/LTE_TRANSPORT/prach.c b/openair1/PHY/LTE_TRANSPORT/prach.c
index 1555162cb4..bffcd4b23a 100644
--- a/openair1/PHY/LTE_TRANSPORT/prach.c
+++ b/openair1/PHY/LTE_TRANSPORT/prach.c
@@ -1133,7 +1133,6 @@ void rx_prach(PHY_VARS_eNB *eNB,
int fft_size,log2_ifft_size;
uint8_t nb_ant_rx = 1; //eNB->frame_parms.nb_antennas_rx;
- int en;
for (aa=0; aa<nb_ant_rx; aa++) {
prach[aa] = (int16_t*)&eNB->common_vars.rxdata[0][aa][subframe*eNB->frame_parms.samples_per_tti-eNB->N_TA_offset];
--
2.26.2