Commit e445ba2d authored by Laurent THOMAS's avatar Laurent THOMAS Committed by Robert Schmidt

Use gold cache PUSCH decoding

Harmonize nr_gold_pusch() and nr_gold_pdsch(), as the gold sequence
calculation for PUSCH and PDSCH is the same.
parent 745ea1c1
......@@ -150,32 +150,6 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB)
nr_generate_modulation_table();
nr_init_pbch_interleaver(gNB->nr_pbch_interleaver);
//PUSCH DMRS init
gNB->nr_gold_pusch_dmrs = (uint32_t ****)malloc16(NR_NB_NSCID*sizeof(uint32_t ***));
uint32_t ****pusch_dmrs = gNB->nr_gold_pusch_dmrs;
int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
for(int nscid=0; nscid<NR_NB_NSCID; nscid++) {
pusch_dmrs[nscid] = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
AssertFatal(pusch_dmrs[nscid]!=NULL, "NR init: pusch_dmrs for nscid %d - malloc failed\n", nscid);
for (int slot=0; slot<fp->slots_per_frame; slot++) {
pusch_dmrs[nscid][slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t *));
AssertFatal(pusch_dmrs[nscid][slot]!=NULL, "NR init: pusch_dmrs for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
pusch_dmrs[nscid][slot][symb] = (uint32_t *)malloc16(pusch_dmrs_init_length*sizeof(uint32_t));
AssertFatal(pusch_dmrs[nscid][slot][symb]!=NULL, "NR init: pusch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
}
}
}
for (int nscid=0; nscid<NR_NB_NSCID; nscid++) {
gNB->pusch_gold_init[nscid] = cfg->cell_config.phy_cell_id.value;
nr_gold_pusch(gNB, nscid, gNB->pusch_gold_init[nscid]);
}
// CSI RS init
// ceil((NB_RB*8(max allocation per RB)*2(QPSK))/32)
int csi_dmrs_init_length = ((fp->N_RB_DL<<4)>>5)+1;
......@@ -292,17 +266,6 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
free_and_zero(meas->n0_subband_power);
free_and_zero(meas->n0_subband_power_dB);
uint32_t ****pusch_dmrs = gNB->nr_gold_pusch_dmrs;
for(int nscid = 0; nscid < 2; nscid++) {
for (int slot = 0; slot < fp->slots_per_frame; slot++) {
for (int symb = 0; symb < fp->symbols_per_slot; symb++)
free_and_zero(pusch_dmrs[nscid][slot][symb]);
free_and_zero(pusch_dmrs[nscid][slot]);
}
free_and_zero(pusch_dmrs[nscid]);
}
free_and_zero(pusch_dmrs);
uint32_t ***nr_gold_csi_rs = gNB->nr_csi_info->nr_gold_csi_rs;
for (int slot = 0; slot < fp->slots_per_frame; slot++) {
for (int symb = 0; symb < fp->symbols_per_slot; symb++)
......
......@@ -200,7 +200,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
NR_UE_CSI_RS **const csirs_vars = ue->csirs_vars;
NR_UE_SRS **const srs_vars = ue->srs_vars;
int i, slot, symb, gNB_id;
int i, gNB_id;
LOG_I(PHY, "Initializing UE vars for gNB TXant %u, UE RXant %u\n", fp->nb_antennas_tx, fp->nb_antennas_rx);
......@@ -245,26 +245,6 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
/////////////////////////PUSCH DMRS init/////////////////////////
///////////
// ceil(((NB_RB*6(k)*2(QPSK)/32) // 3 RE *2(QPSK)
int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
ue->nr_gold_pusch_dmrs = malloc16(fp->slots_per_frame * sizeof(uint32_t ***));
uint32_t ****pusch_dmrs = ue->nr_gold_pusch_dmrs;
for (slot=0; slot<fp->slots_per_frame; slot++) {
pusch_dmrs[slot] = malloc16(fp->symbols_per_slot * sizeof(uint32_t **));
AssertFatal(pusch_dmrs[slot]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d - malloc failed\n", slot);
for (symb=0; symb<fp->symbols_per_slot; symb++) {
pusch_dmrs[slot][symb] = malloc16(NR_NB_NSCID * sizeof(uint32_t *));
AssertFatal(pusch_dmrs[slot][symb]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
for (int q=0; q<NR_NB_NSCID; q++) {
pusch_dmrs[slot][symb][q] = malloc16(pusch_dmrs_init_length * sizeof(uint32_t));
AssertFatal(pusch_dmrs[slot][symb][q]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d symbol %d nscid %d - malloc failed\n", slot, symb, q);
}
}
}
///////////
////////////////////////////////////////////////////////////////////////////////////////////
......@@ -363,16 +343,6 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
const NR_DL_FRAME_PARMS* fp = &ue->frame_parms;
phy_term_nr_top();
for (int slot = 0; slot < fp->slots_per_frame; slot++) {
for (int symb = 0; symb < fp->symbols_per_slot; symb++) {
for (int q=0; q<NR_NB_NSCID; q++)
free_and_zero(ue->nr_gold_pusch_dmrs[slot][symb][q]);
free_and_zero(ue->nr_gold_pusch_dmrs[slot][symb]);
}
free_and_zero(ue->nr_gold_pusch_dmrs[slot]);
}
free_and_zero(ue->nr_gold_pusch_dmrs);
NR_UE_COMMON* common_vars = &ue->common_vars;
for (int i = 0; i < fp->nb_antennas_tx; i++) {
......
......@@ -103,16 +103,18 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
//------------------generate DMRS------------------//
if(pusch_pdu->ul_dmrs_scrambling_id != gNB->pusch_gold_init[pusch_pdu->scid]) {
gNB->pusch_gold_init[pusch_pdu->scid] = pusch_pdu->ul_dmrs_scrambling_id;
nr_gold_pusch(gNB, pusch_pdu->scid, pusch_pdu->ul_dmrs_scrambling_id);
}
if (pusch_pdu->transform_precoding == transformPrecoder_disabled) {
// Note: pilot returned by the following function is already the complex conjugate of the transmitted DMRS
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
const uint32_t *gold = nr_gold_pusch(fp->N_RB_UL,
fp->symbols_per_slot,
gNB->gNB_config.cell_config.phy_cell_id.value,
pusch_pdu->scid,
Ns,
symbol);
nr_pusch_dmrs_rx(gNB,
Ns,
gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol],
gold,
pilot,
(1000 + p),
0,
......@@ -552,6 +554,12 @@ void nr_pusch_ptrs_processing(PHY_VARS_gNB *gNB,
/*------------------------------------------------------------------------------------------------------- */
/* 1) Estimate common phase error per PTRS symbol */
/*------------------------------------------------------------------------------------------------------- */
const uint32_t *gold = nr_gold_pusch(frame_parms->N_RB_UL,
frame_parms->symbols_per_slot,
gNB->gNB_config.cell_config.phy_cell_id.value,
rel15_ul->scid,
nr_tti_rx,
symbol);
nr_ptrs_cpe_estimation(*K_ptrs,
*ptrsReOffset,
*nb_rb,
......@@ -560,7 +568,7 @@ void nr_pusch_ptrs_processing(PHY_VARS_gNB *gNB,
symbol,
frame_parms->ofdm_symbol_size,
(int16_t *)&pusch_vars->rxdataF_comp[aarx][(symbol * nb_re_pusch)],
gNB->nr_gold_pusch_dmrs[rel15_ul->scid][nr_tti_rx][symbol],
gold,
(int16_t *)&phase_per_symbol[symbol],
ptrs_re_symbol);
}
......
......@@ -21,26 +21,6 @@
#include "nr_refsig.h"
void nr_gold_pusch(PHY_VARS_gNB* gNB, int nscid, uint32_t nid)
{
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
int pusch_dmrs_init_length = ((fp->N_RB_UL * 12) >> 5) + 1;
for (int ns = 0; ns < fp->slots_per_frame; ns++) {
for (int l = 0; l < fp->symbols_per_slot; l++) {
int reset = 1;
uint32_t x1 = 0;
uint64_t temp_x2 = ((1UL << 17) * (fp->symbols_per_slot * ns + l + 1) * ((nid << 1) + 1) + ((nid << 1) + nscid));
uint32_t x2 = temp_x2 % (1U << 31);
LOG_D(PHY,"DMRS slot %d, symb %d, nscid %d, nid %d, x2 %x\n", ns, l, nscid, nid, x2);
for (int n = 0; n < pusch_dmrs_init_length; n++) {
gNB->nr_gold_pusch_dmrs[nscid][ns][l][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
}
void nr_init_prs(PHY_VARS_gNB* gNB)
{
unsigned int x1 = 0, x2 = 0;
......
......@@ -22,26 +22,6 @@
#include "refsig_defs_ue.h"
#include "openair1/PHY/LTE_TRANSPORT/transport_proto.h" // for lte_gold_generic()
void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue, uint16_t N_n_scid, uint8_t n_scid)
{
NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
uint32_t ****pusch_dmrs = ue->nr_gold_pusch_dmrs;
int pusch_dmrs_init_length = ((fp->N_RB_UL * 12) >> 5) + 1;
for (int slot = 0; slot < fp->slots_per_frame; slot++) {
for (int symb = 0; symb < fp->symbols_per_slot; symb++) {
int reset = 1;
uint32_t x1 = 0;
uint64_t t_x2 = ((1UL << 17) * (fp->symbols_per_slot*slot + symb + 1) * ((N_n_scid << 1) + 1) + ((N_n_scid << 1) + n_scid));
uint32_t x2 = t_x2 % (1U << 31);
LOG_D(PHY,"DMRS slot %d, symb %d, N_n_scid %d, n_scid %d, x2 %x\n", slot, symb, N_n_scid, n_scid, x2);
for (int n = 0; n < pusch_dmrs_init_length; n++) {
pusch_dmrs[slot][symb][n_scid][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
}
void init_nr_gold_prs(PHY_VARS_NR_UE* ue)
{
unsigned int x1 = 0, x2 = 0;
......
......@@ -41,8 +41,6 @@ void nr_init_prs(PHY_VARS_gNB* gNB);
*/
void nr_init_csi_rs(const NR_DL_FRAME_PARMS *fp, uint32_t ***csi_rs, uint32_t Nid);
void nr_gold_pusch(PHY_VARS_gNB* gNB, int nscid, uint32_t nid);
int nr_pusch_dmrs_delta(uint8_t dmrs_config_type, unsigned short p);
int nr_pusch_dmrs_rx(PHY_VARS_gNB *gNB,
......
......@@ -28,5 +28,6 @@ uint32_t *gold_cache(uint32_t key, int length);
uint32_t *nr_gold_pbch(int Lmax, int Nid, int n_hf, int ssb);
uint32_t *nr_gold_pdcch(int N_RB_DL, int symbols_per_slot, unsigned short n_idDMRS, int ns, int l);
uint32_t *nr_gold_pdsch(int N_RB_DL, int symbols_per_slot, int nid, int nscid, int slot, int symbol);
uint32_t *nr_gold_pusch(int N_RB_UL, int symbols_per_slot, int Nid, int nscid, int slot, int symbol);
#endif
......@@ -192,3 +192,8 @@ uint32_t *nr_gold_pdsch(int N_RB_DL, int symbols_per_slot, int nid, int nscid, i
LOG_D(PHY, "UE DMRS slot %d, symb %d, nscid %d, x2 %x\n", slot, symbol, nscid, x2);
return gold_cache(x2, pdsch_dmrs_init_length);
}
uint32_t *nr_gold_pusch(int N_RB_UL, int symbols_per_slot, int Nid, int nscid, int slot, int symbol)
{
return nr_gold_pdsch(N_RB_UL, symbols_per_slot, Nid, nscid, slot, symbol);
}
......@@ -51,10 +51,6 @@ int nr_pdsch_dmrs_rx(const PHY_VARS_NR_UE *ue,
unsigned short nb_pdsch_rb,
uint8_t config_type);
void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue,
uint16_t N_n_scid,
uint8_t n_scid);
void nr_init_csi_rs(const NR_DL_FRAME_PARMS *fp, uint32_t ***csi_rs, uint32_t Nid);
void init_nr_gold_prs(PHY_VARS_NR_UE* ue);
void sl_generate_pss(SL_NR_UE_INIT_PARAMS_t *sl_init_params, uint8_t n_sl_id2, uint16_t scaling);
......
......@@ -408,13 +408,6 @@ nr_initial_sync_t nr_initial_sync(UE_nr_rxtx_proc_t *proc,
ue->init_sync_frame = n_frames - 1 - res.syncRes.frame_id;
nr_init_csi_rs(fp, ue->nr_csi_info->nr_gold_csi_rs, fp->Nid_cell);
// initialize the pusch dmrs
for (int i = 0; i < NR_NB_NSCID; i++) {
ue->scramblingID_ulsch[i] = fp->Nid_cell;
nr_init_pusch_dmrs(ue, ue->scramblingID_ulsch[i], i);
}
// we also need to take into account the shift by samples_per_frame in case the if is true
if (res.ssbOffset < sync_pos_frame) {
res.syncRes.rx_offset = fp->samples_per_frame - sync_pos_frame + res.ssbOffset;
......
......@@ -240,12 +240,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
/////////////////////////DMRS Modulation/////////////////////////
///////////
if(pusch_pdu->ul_dmrs_scrambling_id != UE->scramblingID_ulsch[pusch_pdu->scid]) {
UE->scramblingID_ulsch[pusch_pdu->scid] = pusch_pdu->ul_dmrs_scrambling_id;
nr_init_pusch_dmrs(UE, pusch_pdu->scid, pusch_pdu->ul_dmrs_scrambling_id);
}
uint32_t ***pusch_dmrs = UE->nr_gold_pusch_dmrs[slot];
uint16_t n_dmrs = (pusch_pdu->bwp_start + start_rb + nb_rb)*((dmrs_type == pusch_dmrs_type1) ? 6:4);
c16_t mod_dmrs[n_dmrs] __attribute((aligned(16)));
......@@ -382,7 +376,13 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
// TODO: performance improvement, we can skip the modulation of DMRS symbols outside the bandwidth part
// Perform this on gold sequence, not required when SC FDMA operation is done,
LOG_D(PHY,"DMRS in symbol %d\n",l);
nr_modulation(pusch_dmrs[l][pusch_pdu->scid],
const uint32_t *gold = nr_gold_pusch(frame_parms->N_RB_UL,
frame_parms->symbols_per_slot,
pusch_pdu->ul_dmrs_scrambling_id,
pusch_pdu->scid,
slot,
l);
nr_modulation(gold,
n_dmrs * 2,
DMRS_MOD_ORDER,
(int16_t *)mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
......@@ -395,7 +395,13 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
if(is_ptrs_symbol(l, ulsch_ue->ptrs_symbols)) {
is_ptrs_sym = 1;
nr_modulation(pusch_dmrs[l][pusch_pdu->scid], nb_rb, DMRS_MOD_ORDER, (int16_t *)mod_ptrs);
const uint32_t *gold = nr_gold_pusch(frame_parms->N_RB_UL,
frame_parms->symbols_per_slot,
pusch_pdu->ul_dmrs_scrambling_id,
pusch_pdu->scid,
slot,
l);
nr_modulation(gold, nb_rb, DMRS_MOD_ORDER, (int16_t *)mod_ptrs);
}
}
......
......@@ -609,9 +609,6 @@ typedef struct PHY_VARS_gNB_s {
/// PBCH interleaver
uint8_t nr_pbch_interleaver[NR_POLAR_PBCH_PAYLOAD_BITS];
/// PUSCH DMRS
uint32_t ****nr_gold_pusch_dmrs;
/// PRS sequence
uint32_t ****nr_gold_prs;
......@@ -632,8 +629,6 @@ typedef struct PHY_VARS_gNB_s {
/// counter to average prach energh over first 100 prach opportunities
int prach_energy_counter;
int pusch_gold_init[2];
int ap_N1;
int ap_N2;
int ap_XP;
......
......@@ -408,11 +408,6 @@ typedef struct PHY_VARS_NR_UE_s {
#endif
// Scrambling IDs used in PUSCH DMRS
uint16_t scramblingID_ulsch[2];
/// PUSCH DMRS sequence
uint32_t ****nr_gold_pusch_dmrs;
// PRS sequence per gNB, per resource
uint32_t *****nr_gold_prs;
......
......@@ -703,11 +703,6 @@ int main(int argc, char *argv[])
init_nr_ue_transport(UE);
for(int n_scid = 0; n_scid<2; n_scid++) {
UE->scramblingID_ulsch[n_scid] = frame_parms->Nid_cell;
nr_init_pusch_dmrs(UE, frame_parms->Nid_cell, n_scid);
}
//Configure UE
nr_l2_init_ue(1);
NR_UE_MAC_INST_t* UE_mac = get_mac_inst(0);
......
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