Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
O
OpenXG-RAN
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
1
Merge Requests
1
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Operations
Operations
Metrics
Environments
Analytics
Analytics
CI / CD
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
OpenXG
OpenXG-RAN
Commits
edff4770
Commit
edff4770
authored
Feb 07, 2021
by
Raymond Knopp
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
reduced 5G memory limits for CI
parent
addd891a
Changes
9
Show whitespace changes
Inline
Side-by-side
Showing
9 changed files
with
13 additions
and
194 deletions
+13
-194
openair1/PHY/INIT/lte_init_ue.c
openair1/PHY/INIT/lte_init_ue.c
+1
-0
openair1/PHY/INIT/nr_init_ru.c
openair1/PHY/INIT/nr_init_ru.c
+2
-1
openair1/PHY/LTE_TRANSPORT/dci_tools.c
openair1/PHY/LTE_TRANSPORT/dci_tools.c
+2
-3
openair1/PHY/LTE_TRANSPORT/prach_common.c
openair1/PHY/LTE_TRANSPORT/prach_common.c
+0
-180
openair1/PHY/LTE_UE_TRANSPORT/prach_ue.c
openair1/PHY/LTE_UE_TRANSPORT/prach_ue.c
+4
-1
openair1/PHY/LTE_UE_TRANSPORT/transport_proto_ue.h
openair1/PHY/LTE_UE_TRANSPORT/transport_proto_ue.h
+0
-5
openair1/SIMULATION/LTE_PHY/ulsim.c
openair1/SIMULATION/LTE_PHY/ulsim.c
+1
-1
openair2/LAYER2/NR_MAC_COMMON/nr_mac.h
openair2/LAYER2/NR_MAC_COMMON/nr_mac.h
+1
-1
targets/COMMON/openairinterface5g_limits.h
targets/COMMON/openairinterface5g_limits.h
+2
-2
No files found.
openair1/PHY/INIT/lte_init_ue.c
View file @
edff4770
...
...
@@ -39,6 +39,7 @@ void init_7_5KHz(void);
uint8_t
dmrs1_tab_ue
[
8
]
=
{
0
,
2
,
3
,
4
,
6
,
8
,
9
,
10
};
void
init_sss
(
void
);
void
phy_config_sib1_ue
(
module_id_t
Mod_id
,
int
CC_id
,
uint8_t
eNB_id
,
...
...
openair1/PHY/INIT/nr_init_ru.c
View file @
edff4770
...
...
@@ -29,7 +29,8 @@
#include "assertions.h"
#include <math.h>
#include "openair1/PHY/defs_RU.h"
//#include "openair1/PHY/NR_TRANSPORT/nr_transport_proto.h"
void
init_prach_ru_list
(
RU_t
*
ru
);
extern
const
char
ru_if_types
[
MAX_RU_IF_TYPES
][
20
];
...
...
openair1/PHY/LTE_TRANSPORT/dci_tools.c
View file @
edff4770
...
...
@@ -58,8 +58,7 @@ int find_dlsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type) {
AssertFatal
(
eNB
!=
NULL
,
"eNB is null
\n
"
);
for
(
int
i
=
0
;
i
<
NUMBER_OF_DLSCH_MAX
;
i
++
)
{
AssertFatal
(
eNB
->
dlsch
[
i
]
!=
NULL
,
"eNB->dlsch[%d] is null
\n
"
,
i
);
AssertFatal
(
eNB
->
dlsch
[
i
]
!=
NULL
,
"eNB->dlsch[%d][0] is null
\n
"
,
i
);
if
(
eNB
->
dlsch
[
i
][
0
]
==
NULL
)
continue
;
LOG_D
(
PHY
,
"searching for rnti %x : UE index %d=> harq_mask %x, rnti %x, first_free_index %d
\n
"
,
rnti
,
i
,
eNB
->
dlsch
[
i
][
0
]
->
harq_mask
,
eNB
->
dlsch
[
i
][
0
]
->
rnti
,
first_free_index
);
if
((
eNB
->
dlsch
[
i
][
0
]
->
harq_mask
>
0
)
&&
...
...
@@ -82,7 +81,7 @@ int find_ulsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type) {
AssertFatal
(
eNB
!=
NULL
,
"eNB is null
\n
"
);
for
(
int
i
=
0
;
i
<
NUMBER_OF_ULSCH_MAX
;
i
++
)
{
AssertFatal
(
eNB
->
ulsch
[
i
]
!=
NULL
,
"eNB->ulsch[%d] is null
\n
"
,
i
)
;
if
(
eNB
->
ulsch
[
i
]
==
NULL
)
continue
;
if
((
eNB
->
ulsch
[
i
]
->
harq_mask
>
0
)
&&
(
eNB
->
ulsch
[
i
]
->
rnti
==
rnti
))
return
i
;
...
...
openair1/PHY/LTE_TRANSPORT/prach_common.c
View file @
edff4770
...
...
@@ -380,186 +380,6 @@ uint8_t get_fid_prach_tdd(module_id_t Mod_id,uint8_t tdd_map_index) {
LTE_DL_FRAME_PARMS
*
fp
=
&
PHY_vars_UE_g
[
Mod_id
][
0
]
->
frame_parms
;
return
(
tdd_preamble_map
[
fp
->
prach_config_common
.
prach_ConfigInfo
.
prach_ConfigIndex
][
fp
->
tdd_config
].
map
[
tdd_map_index
].
f_ra
);
}
/*
uint8_t get_prach_fmt(uint8_t prach_ConfigIndex,lte_frame_type_t frame_type) {
if (frame_type == FDD) // FDD
return(prach_ConfigIndex>>4);
else {
if (prach_ConfigIndex < 20)
return (0);
if (prach_ConfigIndex < 30)
return (1);
if (prach_ConfigIndex < 40)
return (2);
if (prach_ConfigIndex < 48)
return (3);
else
return (4);
}
}
uint8_t get_prach_prb_offset(LTE_DL_FRAME_PARMS *frame_parms,
uint8_t prach_ConfigIndex,
uint8_t n_ra_prboffset,
uint8_t tdd_mapindex, uint16_t Nf) {
lte_frame_type_t frame_type = frame_parms->frame_type;
uint8_t tdd_config = frame_parms->tdd_config;
uint8_t n_ra_prb;
uint8_t f_ra,t1_ra;
uint8_t prach_fmt = get_prach_fmt(prach_ConfigIndex,frame_type);
uint8_t Nsp=2;
if (frame_type == TDD) { // TDD
if (tdd_preamble_map[prach_ConfigIndex][tdd_config].num_prach==0) {
LOG_E(PHY, "Illegal prach_ConfigIndex %"PRIu8"", prach_ConfigIndex);
return(-1);
}
// adjust n_ra_prboffset for frequency multiplexing (p.36 36.211)
f_ra = tdd_preamble_map[prach_ConfigIndex][tdd_config].map[tdd_mapindex].f_ra;
if (prach_fmt < 4) {
if ((f_ra&1) == 0) {
n_ra_prb = n_ra_prboffset + 6*(f_ra>>1);
} else {
n_ra_prb = frame_parms->N_RB_UL - 6 - n_ra_prboffset + 6*(f_ra>>1);
}
} else {
if ((tdd_config >2) && (tdd_config<6))
Nsp = 2;
t1_ra = tdd_preamble_map[prach_ConfigIndex][tdd_config].map[0].t1_ra;
if ((((Nf&1)*(2-Nsp)+t1_ra)&1) == 0) {
n_ra_prb = 6*f_ra;
} else {
n_ra_prb = frame_parms->N_RB_UL - 6*(f_ra+1);
}
}
} else { //FDD
n_ra_prb = n_ra_prboffset;
}
return(n_ra_prb);
}
int is_prach_subframe0(LTE_DL_FRAME_PARMS *frame_parms,uint8_t prach_ConfigIndex,uint32_t frame, uint8_t subframe) {
// uint8_t prach_ConfigIndex = frame_parms->prach_config_common.prach_ConfigInfo.prach_ConfigIndex;
uint8_t tdd_config = frame_parms->tdd_config;
uint8_t t0_ra;
uint8_t t1_ra;
uint8_t t2_ra;
int prach_mask = 0;
if (frame_parms->frame_type == FDD) { //FDD
//implement Table 5.7.1-2 from 36.211 (Rel-10, p.41)
if ((((frame&1) == 1) && (subframe < 9)) ||
(((frame&1) == 0) && (subframe == 9))) // This is an odd frame, ignore even-only PRACH frames
if (((prach_ConfigIndex&0xf)<3) || // 0,1,2,16,17,18,32,33,34,48,49,50
((prach_ConfigIndex&0x1f)==18) || // 18,50
((prach_ConfigIndex&0xf)==15)) // 15,47
return(0);
switch (prach_ConfigIndex&0x1f) {
case 0:
case 3:
if (subframe==1) prach_mask = 1;
break;
case 1:
case 4:
if (subframe==4) prach_mask = 1;
break;
case 2:
case 5:
if (subframe==7) prach_mask = 1;
break;
case 6:
if ((subframe==1) || (subframe==6)) prach_mask=1;
break;
case 7:
if ((subframe==2) || (subframe==7)) prach_mask=1;
break;
case 8:
if ((subframe==3) || (subframe==8)) prach_mask=1;
break;
case 9:
if ((subframe==1) || (subframe==4) || (subframe==7)) prach_mask=1;
break;
case 10:
if ((subframe==2) || (subframe==5) || (subframe==8)) prach_mask=1;
break;
case 11:
if ((subframe==3) || (subframe==6) || (subframe==9)) prach_mask=1;
break;
case 12:
if ((subframe&1)==0) prach_mask=1;
break;
case 13:
if ((subframe&1)==1) prach_mask=1;
break;
case 14:
prach_mask=1;
break;
case 15:
if (subframe==9) prach_mask=1;
break;
}
} else { // TDD
AssertFatal(prach_ConfigIndex<64,
"Illegal prach_ConfigIndex %d for ",prach_ConfigIndex);
AssertFatal(tdd_preamble_map[prach_ConfigIndex][tdd_config].num_prach>0,
"Illegal prach_ConfigIndex %d for ",prach_ConfigIndex);
t0_ra = tdd_preamble_map[prach_ConfigIndex][tdd_config].map[0].t0_ra;
t1_ra = tdd_preamble_map[prach_ConfigIndex][tdd_config].map[0].t1_ra;
t2_ra = tdd_preamble_map[prach_ConfigIndex][tdd_config].map[0].t2_ra;
#ifdef PRACH_DEBUG
LOG_I(PHY,"[PRACH] Checking for PRACH format (ConfigIndex %d) in TDD subframe %d (%d,%d,%d)\n",
prach_ConfigIndex,
subframe,
t0_ra,t1_ra,t2_ra);
#endif
if ((((t0_ra == 1) && ((frame &1)==0))|| // frame is even and PRACH is in even frames
((t0_ra == 2) && ((frame &1)==1))|| // frame is odd and PRACH is in odd frames
(t0_ra == 0)) && // PRACH is in all frames
(((subframe<5)&&(t1_ra==0)) || // PRACH is in 1st half-frame
(((subframe>4)&&(t1_ra==1))))) { // PRACH is in 2nd half-frame
if ((prach_ConfigIndex<48) && // PRACH only in normal UL subframe
(((subframe%5)-2)==t2_ra)) prach_mask=1;
else if ((prach_ConfigIndex>47) && (((subframe%5)-1)==t2_ra)) prach_mask=1; // PRACH can be in UpPTS
}
}
return(prach_mask);
}
*/
int
is_prach_subframe
(
LTE_DL_FRAME_PARMS
*
frame_parms
,
uint32_t
frame
,
uint8_t
subframe
)
{
uint8_t
prach_ConfigIndex
=
frame_parms
->
prach_config_common
.
prach_ConfigInfo
.
prach_ConfigIndex
;
...
...
openair1/PHY/LTE_UE_TRANSPORT/prach_ue.c
View file @
edff4770
...
...
@@ -41,6 +41,7 @@
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "../LTE_TRANSPORT/prach_extern.h"
#include "common/utils/lte/prach_utils.h"
//#define PRACH_DEBUG 1
...
...
@@ -115,7 +116,9 @@ int32_t generate_prach( PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe, uint1
NCS
=
NCS_restricted
[
Ncs_config
];
}
n_ra_prb
=
get_prach_prb_offset
(
&
(
ue
->
frame_parms
),
n_ra_prb
=
get_prach_prb_offset
(
ue
->
frame_parms
.
frame_type
,
ue
->
frame_parms
.
tdd_config
,
ue
->
frame_parms
.
N_RB_UL
,
ue
->
frame_parms
.
prach_config_common
.
prach_ConfigInfo
.
prach_ConfigIndex
,
ue
->
frame_parms
.
prach_config_common
.
prach_ConfigInfo
.
prach_FreqOffset
,
tdd_mapindex
,
Nf
);
...
...
openair1/PHY/LTE_UE_TRANSPORT/transport_proto_ue.h
View file @
edff4770
...
...
@@ -1740,10 +1740,5 @@ double computeRhoB_UE(PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
LTE_UE_DLSCH_t *dlsch_ue);
*/
uint8_t
get_prach_prb_offset
(
LTE_DL_FRAME_PARMS
*
frame_parms
,
uint8_t
prach_ConfigIndex
,
uint8_t
n_ra_prboffset
,
uint8_t
tdd_mapindex
,
uint16_t
Nf
);
/**@}*/
#endif
openair1/SIMULATION/LTE_PHY/ulsim.c
View file @
edff4770
...
...
@@ -1304,7 +1304,7 @@ int main(int argc, char **argv) {
LOG_UDUMPMSG
(
SIM
,
dataArray
(
table_rx
),
table_rx
->
size
,
LOG_DUMP_DOUBLE
,
"The receiver raw data:
\n
"
);
}
dump_ulsch_stats
(
NULL
,
eNB
,
0
);
dump_ulsch_stats
(
stdout
,
eNB
,
0
);
printf
(
"
\n
**********rb: %d ***mcs : %d *********SNR = %f dB (%f): TX %u dB (gain %f dB), N0W %f dB, I0 %u dB, delta_IF %d [ (%d,%d) dB / (%u,%u) dB ]**************************
\n
"
,
nb_rb
,
mcs
,
SNR
,
SNR2
,
tx_lev_dB
,
...
...
openair2/LAYER2/NR_MAC_COMMON/nr_mac.h
View file @
edff4770
...
...
@@ -41,7 +41,7 @@
#define NR_BCCH_BCH 5 // MIB
#define CCCH_PAYLOAD_SIZE_MAX
128
#define CCCH_PAYLOAD_SIZE_MAX
512
#define RAR_PAYLOAD_SIZE_MAX 128
...
...
targets/COMMON/openairinterface5g_limits.h
View file @
edff4770
...
...
@@ -10,8 +10,8 @@
# define NUMBER_OF_ULSCH_MAX 8
# define NUMBER_OF_DLSCH_MAX 8
# define NUMBER_OF_SRS_MAX 16
# define NUMBER_OF_NR_ULSCH_MAX
16
# define NUMBER_OF_NR_DLSCH_MAX
16
# define NUMBER_OF_NR_ULSCH_MAX
8
# define NUMBER_OF_NR_DLSCH_MAX
8
# define NUMBER_OF_NR_UCI_MAX 16
# define nUMBER_OF_NR_SRS_MAX 16
# define NUMBER_OF_SCH_STATS_MAX 16
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment