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OpenXG
OpenXG-RAN
Commits
fc4e1a4f
Commit
fc4e1a4f
authored
Mar 14, 2021
by
Florian Kaltenberger
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adding Benetel RRUs to build script.
parent
73e609db
Changes
1
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28 additions
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7 deletions
+28
-7
cmake_targets/build_oai
cmake_targets/build_oai
+28
-7
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cmake_targets/build_oai
View file @
fc4e1a4f
...
...
@@ -48,7 +48,7 @@ DEADLINE_SCHEDULER_FLAG_USER=""
CPU_AFFINITY_FLAG_USER
=
"False"
#Only valid when low-latency flag is set to False
REL
=
"Rel15"
HW
=
"None"
TP
=
"
None
"
TP
=
"
Ethernet
"
EPC
=
0
VERBOSE_COMPILE
=
0
CFLAGS_PROCESSOR_USER
=
""
...
...
@@ -289,6 +289,9 @@ function main() {
esac
echo_info
"Setting hardware to:
$HW
"
shift
2
;;
-t
|
--transport
)
TP
=
$2
shift
2
;;
-P
|
--phy_simulators
)
SIMUS_PHY
=
1
echo_info
"Will compile dlsim, ulsim, ..."
...
...
@@ -936,6 +939,7 @@ function main() {
echo_info
"Building transport protocol libraries"
rm
-f
liboai_transpro.so
rm
-f
$dbin
/liboai_transpro.so
if
[
"
$TP
"
==
"Ethernet"
]
;
then
compilations
\
$build_dir
oai_eth_transpro
\
liboai_eth_transpro.so
$dbin
/liboai_eth_transpro.so.
$REL
...
...
@@ -943,6 +947,23 @@ function main() {
ln
-sf
$dbin
/liboai_eth_transpro.so.
$REL
$dbin
/liboai_transpro.so
echo_info
"liboai_transpro.so is linked to ETHERNET transport"
fi
if
[
"
$TP
"
==
"benetel4g"
]
;
then
compilations
\
$build_dir
benetel_4g
\
libbenetel_4g.so
$dbin
/libbenetel_4g.
$REL
ln
-sf
libbenetel_4g.so liboai_transpro.so
ln
-sf
$dbin
/libbenetel_4g.so.
$REL
$dbin
/liboai_transpro.so
echo_info
"liboai_transpro.so is linked to BENETEL4G transport"
fi
if
[
"
$TP
"
==
"benetel5g"
]
;
then
compilations
\
$build_dir
benetel_5g
\
libbenetel_5g.so
$dbin
/libbenetel_5g.
$REL
ln
-sf
libbenetel_5g.so liboai_transpro.so
ln
-sf
$dbin
/libbenetel_5g.so.
$REL
$dbin
/liboai_transpro.so
echo_info
"liboai_transpro.so is linked to BENETEL4G transport"
fi
fi
fi
###################
...
...
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