Commit 064b7f23 authored by Raymond Knopp's avatar Raymond Knopp

generation of CCEIndex > 0 in gNodeB and modification of unscrambling procedure for PDCCH in UE RX.

parent 12b38431
...@@ -166,7 +166,7 @@ uint8_t nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu, ...@@ -166,7 +166,7 @@ uint8_t nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
int k,l,k_prime,dci_idx, dmrs_idx; int k,l,k_prime,dci_idx, dmrs_idx;
/*First iteration: single DCI*/ /*First iteration: single DCI*/
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15; nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15=NULL;
// find coreset descriptor // find coreset descriptor
...@@ -273,9 +273,10 @@ uint8_t nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu, ...@@ -273,9 +273,10 @@ uint8_t nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
/*Reorder REG list for a freq first mapping*/ /*Reorder REG list for a freq first mapping*/
uint8_t nb_regs = pdcch_pdu_rel15->AggregationLevel[d]*NR_NB_REG_PER_CCE; uint8_t nb_regs = pdcch_pdu_rel15->AggregationLevel[d]*NR_NB_REG_PER_CCE;
uint8_t reg_idx0 = pdcch_pdu_rel15->CceIndex[d]*NR_NB_REG_PER_CCE;
/*Mapping the encoded DCI along with the DMRS */ /*Mapping the encoded DCI along with the DMRS */
for (int reg_idx=0; reg_idx<nb_regs; reg_idx++) { for (int reg_idx=reg_idx0; reg_idx<(nb_regs+reg_idx0); reg_idx++) {
k = cset_start_sc + (12*reg_idx/cset_nsymb); k = cset_start_sc + (12*reg_idx/cset_nsymb);
if (k >= frame_parms.ofdm_symbol_size) if (k >= frame_parms.ofdm_symbol_size)
......
...@@ -150,7 +150,7 @@ void nr_pdcch_demapping_deinterleaving(uint32_t *llr, ...@@ -150,7 +150,7 @@ void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
for (int i=0; i<9; i++) { for (int i=0; i<9; i++) {
z[index_z + i] = llr[index_llr + i]; z[index_z + i] = llr[index_llr + i];
LOG_DDD("[reg=%d,bundle_j=%d] z[%d]=(%d,%d) <-> \t[f_reg=%d,fbundle_j=%d] llr[%d]=(%d,%d) \n", LOG_D(PHY,"[reg=%d,bundle_j=%d] z[%d]=(%d,%d) <-> \t[f_reg=%d,fbundle_j=%d] llr[%d]=(%d,%d) \n",
reg,bundle_j,(index_z + i),*(int16_t *) &z[index_z + i],*(1 + (int16_t *) &z[index_z + i]), reg,bundle_j,(index_z + i),*(int16_t *) &z[index_z + i],*(1 + (int16_t *) &z[index_z + i]),
f_reg,f_bundle_j,(index_llr + i),*(int16_t *) &llr[index_llr + i], *(1 + (int16_t *) &llr[index_llr + i])); f_reg,f_bundle_j,(index_llr + i),*(int16_t *) &llr[index_llr + i], *(1 + (int16_t *) &llr[index_llr + i]));
} }
...@@ -678,7 +678,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue, ...@@ -678,7 +678,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
int n_rb,rb_offset; int n_rb,rb_offset;
get_coreset_rballoc(rel15->coreset.frequency_domain_resource,&n_rb,&rb_offset); get_coreset_rballoc(rel15->coreset.frequency_domain_resource,&n_rb,&rb_offset);
for (int s=rel15->coreset.StartSymbolIndex; s<(rel15->coreset.StartSymbolIndex+rel15->coreset.duration); s++) { for (int s=rel15->coreset.StartSymbolIndex; s<(rel15->coreset.StartSymbolIndex+rel15->coreset.duration); s++) {
LOG_DD("in nr_pdcch_extract_rbs_single(rxdataF -> rxdataF_ext || dl_ch_estimates -> dl_ch_estimates_ext)\n"); LOG_D(PHY,"in nr_pdcch_extract_rbs_single(rxdataF -> rxdataF_ext || dl_ch_estimates -> dl_ch_estimates_ext)\n");
nr_pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[slot]].rxdataF, nr_pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[slot]].rxdataF,
pdcch_vars->dl_ch_estimates, pdcch_vars->dl_ch_estimates,
...@@ -690,8 +690,8 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue, ...@@ -690,8 +690,8 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
n_rb, n_rb,
rel15->BWPStart); rel15->BWPStart);
LOG_DD("we enter nr_pdcch_channel_level(avgP=%d) => compute channel level based on ofdm symbol 0, pdcch_vars[eNB_id]->dl_ch_estimates_ext\n",*avgP); LOG_D(PHY,"we enter nr_pdcch_channel_level(avgP=%d) => compute channel level based on ofdm symbol 0, pdcch_vars[eNB_id]->dl_ch_estimates_ext\n",*avgP);
LOG_DD("in nr_pdcch_channel_level(dl_ch_estimates_ext -> dl_ch_estimates_ext)\n"); LOG_D(PHY,"in nr_pdcch_channel_level(dl_ch_estimates_ext -> dl_ch_estimates_ext)\n");
// compute channel level based on ofdm symbol 0 // compute channel level based on ofdm symbol 0
nr_pdcch_channel_level(pdcch_vars->dl_ch_estimates_ext, nr_pdcch_channel_level(pdcch_vars->dl_ch_estimates_ext,
frame_parms, frame_parms,
...@@ -710,8 +710,8 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue, ...@@ -710,8 +710,8 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
T(T_UE_PHY_PDCCH_ENERGY, T_INT(0), T_INT(0), T_INT(frame%1024), T_INT(slot), T(T_UE_PHY_PDCCH_ENERGY, T_INT(0), T_INT(0), T_INT(frame%1024), T_INT(slot),
T_INT(avgP[0]), T_INT(avgP[1]), T_INT(avgP[2]), T_INT(avgP[3])); T_INT(avgP[0]), T_INT(avgP[1]), T_INT(avgP[2]), T_INT(avgP[3]));
#endif #endif
LOG_DD("we enter nr_pdcch_channel_compensation(log2_maxh=%d)\n",log2_maxh); LOG_D(PHY,"we enter nr_pdcch_channel_compensation(log2_maxh=%d)\n",log2_maxh);
LOG_DD("in nr_pdcch_channel_compensation(rxdataF_ext x dl_ch_estimates_ext -> rxdataF_comp)\n"); LOG_D(PHY,"in nr_pdcch_channel_compensation(rxdataF_ext x dl_ch_estimates_ext -> rxdataF_comp)\n");
// compute LLRs for ofdm symbol 0 only // compute LLRs for ofdm symbol 0 only
nr_pdcch_channel_compensation(pdcch_vars->rxdataF_ext, nr_pdcch_channel_compensation(pdcch_vars->rxdataF_ext,
pdcch_vars->dl_ch_estimates_ext, pdcch_vars->dl_ch_estimates_ext,
...@@ -722,12 +722,12 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue, ...@@ -722,12 +722,12 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
log2_maxh, log2_maxh,
n_rb); // log2_maxh+I0_shift n_rb); // log2_maxh+I0_shift
if (frame_parms->nb_antennas_rx > 1) { if (frame_parms->nb_antennas_rx > 1) {
LOG_DD("we enter nr_pdcch_detection_mrc(frame_parms->nb_antennas_rx=%d)\n", frame_parms->nb_antennas_rx); LOG_D(PHY,"we enter nr_pdcch_detection_mrc(frame_parms->nb_antennas_rx=%d)\n", frame_parms->nb_antennas_rx);
nr_pdcch_detection_mrc(frame_parms, pdcch_vars->rxdataF_comp,s); nr_pdcch_detection_mrc(frame_parms, pdcch_vars->rxdataF_comp,s);
} }
LOG_DD("we enter nr_pdcch_llr(for symbol %d), pdcch_vars[eNB_id]->rxdataF_comp ---> pdcch_vars[eNB_id]->llr \n",s); LOG_D(PHY,"we enter nr_pdcch_llr(for symbol %d), pdcch_vars[eNB_id]->rxdataF_comp ---> pdcch_vars[eNB_id]->llr \n",s);
LOG_DD("in nr_pdcch_llr(rxdataF_comp -> llr)\n"); LOG_D(PHY,"in nr_pdcch_llr(rxdataF_comp -> llr)\n");
nr_pdcch_llr(frame_parms, nr_pdcch_llr(frame_parms,
pdcch_vars->rxdataF_comp, pdcch_vars->rxdataF_comp,
pdcch_vars->llr, pdcch_vars->llr,
...@@ -745,7 +745,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue, ...@@ -745,7 +745,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
#endif #endif
} }
LOG_DD("we enter nr_pdcch_demapping_deinterleaving()\n"); LOG_D(PHY,"we enter nr_pdcch_demapping_deinterleaving()\n");
nr_pdcch_demapping_deinterleaving((uint32_t *) pdcch_vars->llr, nr_pdcch_demapping_deinterleaving((uint32_t *) pdcch_vars->llr,
(uint32_t *) pdcch_vars->e_rx, (uint32_t *) pdcch_vars->e_rx,
frame_parms, frame_parms,
...@@ -754,6 +754,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue, ...@@ -754,6 +754,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
rel15->coreset.RegBundleSize, rel15->coreset.RegBundleSize,
rel15->coreset.InterleaverSize, rel15->coreset.InterleaverSize,
rel15->coreset.ShiftIndex); rel15->coreset.ShiftIndex);
/*
nr_pdcch_unscrambling(rel15->rnti, nr_pdcch_unscrambling(rel15->rnti,
frame_parms, frame_parms,
slot, slot,
...@@ -761,8 +762,9 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue, ...@@ -761,8 +762,9 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
rel15->coreset.duration*n_rb*9*2, rel15->coreset.duration*n_rb*9*2,
// get_nCCE(n_pdcch_symbols, frame_parms, mi) * 72, // get_nCCE(n_pdcch_symbols, frame_parms, mi) * 72,
rel15->coreset.pdcch_dmrs_scrambling_id); rel15->coreset.pdcch_dmrs_scrambling_id);
LOG_DD("we end nr_pdcch_unscrambling()\n"); */
LOG_DD("Ending nr_rx_pdcch() function\n"); LOG_D(PHY,"we end nr_pdcch_unscrambling()\n");
LOG_D(PHY,"Ending nr_rx_pdcch() function\n");
} }
return (0); return (0);
...@@ -798,7 +800,7 @@ void pdcch_scrambling(NR_DL_FRAME_PARMS *frame_parms, ...@@ -798,7 +800,7 @@ void pdcch_scrambling(NR_DL_FRAME_PARMS *frame_parms,
#ifdef NR_PDCCH_DCI_RUN #ifdef NR_PDCCH_DCI_RUN
void nr_pdcch_unscrambling(uint16_t crnti, NR_DL_FRAME_PARMS *frame_parms, uint8_t slot, void nr_pdcch_unscrambling(uint16_t crnti, NR_DL_FRAME_PARMS *frame_parms, uint8_t slot,
int16_t *z, uint32_t length, uint16_t pdcch_DMRS_scrambling_id) { int16_t *z, int16_t *z2,uint32_t length, uint16_t pdcch_DMRS_scrambling_id) {
int i; int i;
uint8_t reset; uint8_t reset;
uint32_t x1, x2, s = 0; uint32_t x1, x2, s = 0;
...@@ -818,7 +820,8 @@ void nr_pdcch_unscrambling(uint16_t crnti, NR_DL_FRAME_PARMS *frame_parms, uint8 ...@@ -818,7 +820,8 @@ void nr_pdcch_unscrambling(uint16_t crnti, NR_DL_FRAME_PARMS *frame_parms, uint8
reset = 0; reset = 0;
} }
if (((s >> (i % 32)) & 1) == 1) z[i] = -z[i]; if (((s >> (i % 32)) & 1) == 1) z2[i] = -z[i];
else z2[i]=z[i];
} }
} }
...@@ -837,15 +840,29 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue, ...@@ -837,15 +840,29 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
rel15 = &pdcch_vars->pdcch_config[i]; rel15 = &pdcch_vars->pdcch_config[i];
int dci_length = rel15->dci_length; int dci_length = rel15->dci_length;
int16_t tmp_e[16*108];
for (int j=0;j<rel15->number_of_candidates;j++) { for (int j=0;j<rel15->number_of_candidates;j++) {
LOG_D(PHY,"Trying DCI candidate %d, CCE %d (%d), L %d\n",j,rel15->CCE[j],rel15->CCE[j]*9*6*2,rel15->L[j]);
int CCEind = rel15->CCE[j]; int CCEind = rel15->CCE[j];
int L = rel15->L[j]; int L = rel15->L[j];
uint64_t dci_estimation[2]= {0}; uint64_t dci_estimation[2]= {0};
const t_nrPolar_params *currentPtrDCI=nr_polar_params(1, dci_length, L,1,&ue->polarList); const t_nrPolar_params *currentPtrDCI=nr_polar_params(1, dci_length, L,1,&ue->polarList);
uint16_t crc = polar_decoder_int16(&pdcch_vars->e_rx[CCEind*9*6*2],
nr_pdcch_unscrambling(rel15->rnti,
&ue->frame_parms,
slot,
&pdcch_vars->e_rx[CCEind*108],
tmp_e,
L*108,
// get_nCCE(n_pdcch_symbols, frame_parms, mi) * 72,
rel15->coreset.pdcch_dmrs_scrambling_id);
uint16_t crc = polar_decoder_int16(tmp_e,
dci_estimation, dci_estimation,
1, 1,
currentPtrDCI); currentPtrDCI);
LOG_D(PHY,"Decoded crc %x\n",crc);
if (crc == rel15->rnti) { if (crc == rel15->rnti) {
dci_ind->SFN = frame; dci_ind->SFN = frame;
dci_ind->slot = slot; dci_ind->slot = slot;
......
...@@ -1539,7 +1539,7 @@ uint8_t get_num_pdcch_symbols(uint8_t num_dci,DCI_ALLOC_t *dci_alloc,NR_DL_FRAME ...@@ -1539,7 +1539,7 @@ uint8_t get_num_pdcch_symbols(uint8_t num_dci,DCI_ALLOC_t *dci_alloc,NR_DL_FRAME
void pdcch_interleaving(NR_DL_FRAME_PARMS *frame_parms,int32_t **z, int32_t **wbar,uint8_t n_symbols_pdcch,uint8_t mi); void pdcch_interleaving(NR_DL_FRAME_PARMS *frame_parms,int32_t **z, int32_t **wbar,uint8_t n_symbols_pdcch,uint8_t mi);
void nr_pdcch_unscrambling(uint16_t crnti, NR_DL_FRAME_PARMS *frame_parms, uint8_t slot, void nr_pdcch_unscrambling(uint16_t crnti, NR_DL_FRAME_PARMS *frame_parms, uint8_t slot,
int16_t *z, uint32_t length, uint16_t pdcch_DMRS_scrambling_id); int16_t *z, int16_t *z2,uint32_t length, uint16_t pdcch_DMRS_scrambling_id);
......
...@@ -524,7 +524,7 @@ int main(int argc, char **argv) ...@@ -524,7 +524,7 @@ int main(int argc, char **argv)
// common configuration // common configuration
rrc_mac_config_req_gNB(0,0,1,scc,0,0,NULL); rrc_mac_config_req_gNB(0,0,1,scc,0,0,NULL);
// UE dedicated configuration // UE dedicated configuration
rrc_mac_config_req_gNB(0,0,1,NULL,1,4660/*secondaryCellGroup->spCellConfig->reconfigurationWithSync->newUE_Identity*/,secondaryCellGroup); rrc_mac_config_req_gNB(0,0,1,NULL,1,secondaryCellGroup->spCellConfig->reconfigurationWithSync->newUE_Identity,secondaryCellGroup);
phy_init_nr_gNB(gNB,0,0); phy_init_nr_gNB(gNB,0,0);
N_RB_DL = gNB->frame_parms.N_RB_DL; N_RB_DL = gNB->frame_parms.N_RB_DL;
// stub to configure frame_parms // stub to configure frame_parms
......
...@@ -49,9 +49,14 @@ void fill_dci_search_candidates(NR_SearchSpace_t *ss,fapi_nr_dl_config_dci_dl_pd ...@@ -49,9 +49,14 @@ void fill_dci_search_candidates(NR_SearchSpace_t *ss,fapi_nr_dl_config_dci_dl_pd
LOG_D(MAC,"Filling search candidates for DCI\n"); LOG_D(MAC,"Filling search candidates for DCI\n");
rel15->number_of_candidates=1; rel15->number_of_candidates=3;
rel15->CCE[0]=0; rel15->CCE[0]=0;
rel15->L[0]=4; rel15->L[0]=4;
rel15->CCE[1]=4;
rel15->L[1]=4;
rel15->CCE[2]=8;
rel15->L[2]=4;
} }
void ue_dci_configuration(NR_UE_MAC_INST_t *mac,fapi_nr_dl_config_request_t *dl_config,int frame,int slot) { void ue_dci_configuration(NR_UE_MAC_INST_t *mac,fapi_nr_dl_config_request_t *dl_config,int frame,int slot) {
......
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