Commit 069ce10a authored by Raymond Knopp's avatar Raymond Knopp

NR FAPI interface additions for DLSCH (SDU pointer now does down to L1)

parent 95e54e3b
......@@ -35,7 +35,6 @@
#include "PHY/NR_TRANSPORT/nr_ulsch.h"
#include "PHY/NR_REFSIG/nr_refsig.h"
#include "PHY/LTE_REFSIG/lte_refsig.h"
#include "SCHED_NR/fapi_nr_l1.h"
extern uint32_t from_nrarfcn(int nr_bandP,uint32_t dl_nrarfcn);
......@@ -80,11 +79,11 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
NR_DL_FRAME_PARMS *const fp = &gNB->frame_parms;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
NR_gNB_COMMON *const common_vars = &gNB->common_vars;
LTE_eNB_PUSCH **const pusch_vars = gNB->pusch_vars;
/*LTE_eNB_PUSCH **const pusch_vars = gNB->pusch_vars;
LTE_eNB_SRS *const srs_vars = gNB->srs_vars;
LTE_eNB_PRACH *const prach_vars = &gNB->prach_vars;
LTE_eNB_PRACH *const prach_vars = &gNB->prach_vars;*/
int i, UE_id;
int i;
LOG_I(PHY,"[gNB %d] %s() About to wait for gNB to be configured\n", gNB->Mod_id, __FUNCTION__);
gNB->total_dlsch_bitrate = 0;
......@@ -154,19 +153,6 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
/// Transport init necessary for NR synchro
init_nr_transport(gNB);
/*
lte_gold(fp,gNB->lte_gold_table,fp->Nid_cell);
generate_pcfich_reg_mapping(fp);
generate_phich_reg_mapping(fp);*/
for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) {
gNB->first_run_timing_advance[UE_id] =
1; ///This flag used to be static. With multiple gNBs this does no longer work, hence we put it in the structure. However it has to be initialized with 1, which is performed here.
// clear whole structure
bzero( &gNB->UE_stats[UE_id], sizeof(LTE_eNB_UE_stats) );
gNB->physicalConfigDedicated[UE_id] = NULL;
}
gNB->first_run_I0_measurements =
1; ///This flag used to be static. With multiple gNBs this does no longer work, hence we put it in the structure. However it has to be initialized with 1, which is performed here.
common_vars->rxdata = (int32_t **)NULL;
......@@ -182,6 +168,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
}
// Channel estimates for SRS
/*
for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) {
srs_vars[UE_id].srs_ch_estimates = (int32_t **)malloc16( 64*sizeof(int32_t *) );
srs_vars[UE_id].srs_ch_estimates_time = (int32_t **)malloc16( 64*sizeof(int32_t *) );
......@@ -191,11 +178,12 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
srs_vars[UE_id].srs_ch_estimates_time[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size*2 );
}
} //UE_id
*/
/*generate_ul_ref_sigs_rx();
init_ulsch_power_LUT();*/
/*
// SRS
for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) {
srs_vars[UE_id].srs = (int32_t *)malloc16_clear(2*fp->ofdm_symbol_size*sizeof(int32_t));
......@@ -210,8 +198,9 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
prach_vars->rxsigF[0] = (int16_t **)malloc16_clear(64*sizeof(int16_t *));
for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) {
for (int ulsch_id=0; ulsch_id<NUMBER_OF_NR_ULSCH_MAX; ulsch_id++) {
//FIXME
pusch_vars[UE_id] = (LTE_eNB_PUSCH *)malloc16_clear( NUMBER_OF_UE_MAX*sizeof(LTE_eNB_PUSCH) );
pusch_vars[UE_id]->rxdataF_ext = (int32_t **)malloc16( 2*sizeof(int32_t *) );
pusch_vars[UE_id]->rxdataF_ext2 = (int32_t **)malloc16( 2*sizeof(int32_t *) );
......@@ -240,6 +229,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
gNB->UE_stats_ptr[UE_id] = &gNB->UE_stats[UE_id];
gNB->pdsch_config_dedicated->p_a = dB0; //defaul value until overwritten by RRCConnectionReconfiguration
*/
return (0);
}
/*
......@@ -290,9 +280,9 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB) {
//NR_DL_FRAME_PARMS* const fp = &gNB->frame_parms;
//nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
NR_gNB_COMMON *const common_vars = &gNB->common_vars;
LTE_eNB_PUSCH **const pusch_vars = gNB->pusch_vars;
/*LTE_eNB_PUSCH **const pusch_vars = gNB->pusch_vars;
LTE_eNB_SRS *const srs_vars = gNB->srs_vars;
LTE_eNB_PRACH *const prach_vars = &gNB->prach_vars;
LTE_eNB_PRACH *const prach_vars = &gNB->prach_vars;*/
uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs;
int i, UE_id;
......@@ -305,7 +295,7 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB) {
free_and_zero(common_vars->rxdataF);
// PDCCH DMRS sequences
free_and_zero(pdcch_dmrs);
/*
// Channel estimates for SRS
for (UE_id = 0; UE_id < NUMBER_OF_UE_MAX; UE_id++) {
for (i=0; i<64; i++) {
......@@ -351,6 +341,7 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB) {
} //UE_id
for (UE_id = 0; UE_id < NUMBER_OF_UE_MAX; UE_id++) gNB->UE_stats_ptr[UE_id] = NULL;
*/
}
/*
void install_schedule_handlers(IF_Module_t *if_inst)
......@@ -492,8 +483,6 @@ void init_nr_transport(PHY_VARS_gNB *gNB) {
LOG_D(PHY,"gNB %d.%d : SI %p\n",gNB->Mod_id,gNB->CC_id,gNB->dlsch_SI);
gNB->dlsch_ra = new_gNB_dlsch(1,8,NSOFT, 0, fp, cfg);
LOG_D(PHY,"gNB %d.%d : RA %p\n",gNB->Mod_id,gNB->CC_id,gNB->dlsch_ra);
gNB->dlsch_MCH = new_gNB_dlsch(1,8,NSOFT, 0, fp, cfg);
LOG_D(PHY,"gNB %d.%d : MCH %p\n",gNB->Mod_id,gNB->CC_id,gNB->dlsch_MCH);
gNB->rx_total_gain_dB=130;
for(i=0; i<NUMBER_OF_UE_MAX; i++)
......
......@@ -45,13 +45,11 @@ void nr_pdcch_scrambling(uint32_t *in,
uint32_t n_RNTI,
uint32_t *out);
void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
int frame,
int subframe,
gNB_L1_rxtx_proc_t *proc,
NR_gNB_DCI_ALLOC_t *dci_alloc,
nfapi_nr_dl_config_dci_dl_pdu *pdu,
nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu);
void nr_fill_dci(PHY_VARS_gNB *gNB,
int frame,
int slot,
NR_gNB_DCI_ALLOC_t *dci_alloc,
nfapi_nr_dl_config_dci_dl_pdu *pdu);
void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t *dci_alloc, uint16_t n_shift, uint8_t m);
......
......@@ -120,14 +120,11 @@ void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t* dci_alloc, uint16_t n_shift, uint8_t m
return ret;
}*/
void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
int frame,
int subframe,
gNB_L1_rxtx_proc_t *proc,
NR_gNB_DCI_ALLOC_t *dci_alloc,
nfapi_nr_dl_config_dci_dl_pdu *pdcch_pdu,
nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu)
{
void nr_fill_dci(PHY_VARS_gNB *gNB,
int frame,
int slot,
NR_gNB_DCI_ALLOC_t *dci_alloc,
nfapi_nr_dl_config_dci_dl_pdu *pdcch_pdu) {
uint8_t n_shift;
......@@ -139,13 +136,29 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
NR_gNB_DLSCH_t *dlsch = gNB->dlsch[0][0];
NR_DL_gNB_HARQ_t **harq = dlsch->harq_processes;
NR_gNB_DLSCH_t *dlsch;
uint16_t N_RB = params_rel15->n_RB_BWP;
uint8_t fsize=0, pos=0, cand_idx=0;
int dlsch_id = find_nr_dlsch(params_rel15->rnti,gNB,SEARCH_EXIST_OR_FREE);
if( (dlsch_id<0) || (dlsch_id>=NUMBER_OF_NR_DLSCH_MAX) ){
LOG_E(PHY,"illegal dlsch_id found!!! rnti %04x dlsch_id %d\n",params_rel15->rnti,dlsch_id);
return;
}
dlsch = gNB->dlsch[dlsch_id][0];
dlsch->slot_tx[slot] = 1;
dlsch->harq_ids[frame%2][slot] = pdu_rel15->harq_pid;
AssertFatal(pdu_rel15->harq_pid < 8 && pdu_rel15->harq_pid >= 0,
"illegal harq_pid %d\n",pdu_rel15->harq_pid);
dlsch->harq_mask |= (1<<pdu_rel15->harq_pid);
dlsch->rnti = params_rel15->rnti;
dci_alloc->L = 8;
memcpy((void*)&dci_alloc->pdcch_params, (void*)params_rel15, sizeof(nfapi_nr_dl_config_pdcch_parameters_rel15_t));
dci_alloc->size = nr_get_dci_size(dci_alloc->pdcch_params.dci_format,
......@@ -498,7 +511,4 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
LOG_D(PHY, "DCI PDU: [0]->0x%lx \t [1]->0x%lx \n",dci_pdu[0], dci_pdu[1]);
LOG_D(PHY, "DCI type %d payload (size %d) generated on candidate %d\n", dci_alloc->pdcch_params.dci_format, dci_alloc->size, cand_idx);
/// DLSCH struct
memcpy((void*)&harq[dci_alloc->harq_pid]->dlsch_pdu, (void*)dlsch_pdu, sizeof(nfapi_nr_dl_config_dlsch_pdu));
}
......@@ -196,6 +196,7 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch,
uint32_t ***pdsch_dmrs,
int32_t** txdataF,
int16_t amp,
int frame,
uint8_t slot,
NR_DL_FRAME_PARMS frame_parms,
nfapi_nr_config_request_t config) {
......@@ -212,7 +213,7 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch,
uint16_t encoded_length = nb_symbols*Qm;
/// CRC, coding, interleaving and rate matching
nr_dlsch_encoding(harq->pdu, slot, &dlsch, &frame_parms);
nr_dlsch_encoding(harq->pdu, frame,slot, &dlsch, &frame_parms);
#ifdef DEBUG_DLSCH
printf("PDSCH encoding:\nPayload:\n");
for (int i=0; i<harq->B>>7; i++) {
......
......@@ -77,12 +77,19 @@ void nr_pdsch_layer_mapping(int16_t **mod_symbs,
uint16_t n_symbs,
int16_t **tx_layers);
void nr_fill_dlsch(PHY_VARS_gNB *gNB,
int frame,
int slot,
nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
unsigned char *sdu);
uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch,
NR_gNB_DCI_ALLOC_t dci_alloc,
uint32_t ***pdsch_dmrs,
int32_t** txdataF,
int16_t amp,
uint8_t subframe,
int frame,
uint8_t slot,
NR_DL_FRAME_PARMS frame_parms,
nfapi_nr_config_request_t config);
......@@ -96,8 +103,10 @@ void free_gNB_dlsch(NR_gNB_DLSCH_t *dlsch);
void clean_gNB_dlsch(NR_gNB_DLSCH_t *dlsch);
int nr_dlsch_encoding(unsigned char *a,
uint8_t subframe,
int16_t find_nr_dlsch(uint16_t rnti, PHY_VARS_gNB *gNB,find_type_t type);
int nr_dlsch_encoding(unsigned char *a,int frame,
uint8_t slot,
NR_gNB_DLSCH_t *dlsch,
NR_DL_FRAME_PARMS* frame_parms);
......
......@@ -163,9 +163,10 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(unsigned char Kmimo,
}
for (i=0; i<10; i++)
dlsch->harq_ids[i] = 0;
for (i=0; i<20; i++) {
dlsch->harq_ids[0][i] = 0;
dlsch->harq_ids[1][i] = 0;
}
for (i=0; i<Mdlharq; i++) {
dlsch->harq_processes[i] = (NR_DL_gNB_HARQ_t *)malloc16(sizeof(NR_DL_gNB_HARQ_t));
......@@ -248,9 +249,10 @@ void clean_gNB_dlsch(NR_gNB_DLSCH_t *dlsch)
dlsch->rnti = 0;
dlsch->active = 0;
for (i=0; i<10; i++)
dlsch->harq_ids[i] = Mdlharq;
for (i=0; i<10; i++) {
dlsch->harq_ids[0][i] = Mdlharq;
dlsch->harq_ids[1][i] = Mdlharq;
}
for (i=0; i<Mdlharq; i++) {
if (dlsch->harq_processes[i]) {
// dlsch->harq_processes[i]->Ndi = 0;
......@@ -267,7 +269,7 @@ void clean_gNB_dlsch(NR_gNB_DLSCH_t *dlsch)
}
}
int nr_dlsch_encoding(unsigned char *a,
int nr_dlsch_encoding(unsigned char *a,int frame,
uint8_t slot,
NR_gNB_DLSCH_t *dlsch,
NR_DL_FRAME_PARMS* frame_parms)
......@@ -275,7 +277,8 @@ int nr_dlsch_encoding(unsigned char *a,
unsigned int G;
unsigned int crc=1;
uint8_t harq_pid = dlsch->harq_ids[slot];
uint8_t harq_pid = dlsch->harq_ids[frame&2][slot];
AssertFatal(harq_pid<8 && harq_pid>=0,"illegal harq_pid %d\b",harq_pid);
nfapi_nr_dl_config_dlsch_pdu_rel15_t rel15 = dlsch->harq_processes[harq_pid]->dlsch_pdu.dlsch_pdu_rel15;
uint16_t nb_rb = rel15.n_prb;
uint8_t nb_symb_sch = rel15.nb_symbols;
......
......@@ -248,3 +248,44 @@ void nr_emulate_dlsch_payload(uint8_t* pdu, uint16_t size) {
for (int i=0; i<size; i++)
*(pdu+i) = (uint8_t)rand();
}
int16_t find_nr_dlsch(uint16_t rnti, PHY_VARS_gNB *gNB,find_type_t type) {
uint16_t i;
int16_t first_free_index=-1;
AssertFatal(gNB!=NULL,"gNB is null\n");
for (i=0; i<NUMBER_OF_NR_DLSCH_MAX; i++) {
AssertFatal(gNB->dlsch[i]!=NULL,"gNB->dlsch[%d] is null\n",i);
AssertFatal(gNB->dlsch[i]!=NULL,"gNB->dlsch[%d][0] is null\n",i);
LOG_D(PHY,"searching for rnti %x : dlsch_index %d=> harq_mask %x, rnti %x, first_free_index %d\n", rnti,i,gNB->dlsch[i][0]->harq_mask,gNB->dlsch[i][0]->rnti,first_free_index);
if ((gNB->dlsch[i][0]->harq_mask >0) &&
(gNB->dlsch[i][0]->rnti==rnti)) return i;
else if ((gNB->dlsch[i][0]->harq_mask == 0) && (first_free_index==-1)) first_free_index=i;
}
if (type == SEARCH_EXIST) return -1;
if (first_free_index != -1)
gNB->dlsch[first_free_index][0]->rnti = 0;
return first_free_index;
}
void nr_fill_dlsch(PHY_VARS_gNB *gNB,
int frame,
int slot,
nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
uint8_t *sdu) {
nfapi_nr_dl_config_dlsch_pdu_rel15_t *rel15 = &dlsch_pdu->dlsch_pdu_rel15;
int dlsch_id = find_nr_dlsch(rel15->rnti,gNB,SEARCH_EXIST);
AssertFatal( (dlsch_id>=0) && (dlsch_id<NUMBER_OF_NR_DLSCH_MAX),
"illegal or no dlsch_id found!!! rnti %04x dlsch_id %d\n",rel15->rnti,dlsch_id);
NR_gNB_DLSCH_t *dlsch = gNB->dlsch[dlsch_id][0];
NR_DL_gNB_HARQ_t **harq = dlsch->harq_processes;
/// DLSCH struct
memcpy((void*)&harq[dlsch->harq_ids[frame%2][slot]]->dlsch_pdu, (void*)dlsch_pdu, sizeof(nfapi_nr_dl_config_dlsch_pdu));
harq[dlsch->harq_ids[frame%2][slot]]->pdu = sdu;
}
......@@ -144,11 +144,11 @@ typedef struct {
/// HARQ process mask, indicates which processes are currently active
uint16_t harq_mask;
/// Indicator of TX activation per subframe. Used during PUCCH detection for ACK/NAK.
uint8_t subframe_tx[10];
uint8_t slot_tx[80];
/// First CCE of last PDSCH scheduling per subframe. Again used during PUCCH detection for ACK/NAK.
uint8_t nCCE[10];
/// Process ID's per subframe. Used to associate received ACKs on PUSCH/PUCCH to DLSCH harq process ids
uint8_t harq_ids[10];
uint8_t harq_ids[2][80];
/// Window size (in outgoing transport blocks) for fine-grain rate adaptation
uint8_t ra_window_size;
/// First-round error threshold for fine-grain rate adaptation
......@@ -499,30 +499,30 @@ typedef struct {
short n0_subband_power_tot_dBm[100];
// gNB measurements (per user)
//! estimated received spatial signal power (linear)
unsigned int rx_spatial_power[NUMBER_OF_UE_MAX][2][2];
unsigned int rx_spatial_power[NUMBER_OF_NR_DLSCH_MAX][2][2];
//! estimated received spatial signal power (dB)
unsigned short rx_spatial_power_dB[NUMBER_OF_UE_MAX][2][2];
unsigned short rx_spatial_power_dB[NUMBER_OF_NR_DLSCH_MAX][2][2];
//! estimated rssi (dBm)
short rx_rssi_dBm[NUMBER_OF_UE_MAX];
short rx_rssi_dBm[NUMBER_OF_NR_DLSCH_MAX];
//! estimated correlation (wideband linear) between spatial channels (computed in dlsch_demodulation)
int rx_correlation[NUMBER_OF_UE_MAX][2];
int rx_correlation[NUMBER_OF_NR_DLSCH_MAX][2];
//! estimated correlation (wideband dB) between spatial channels (computed in dlsch_demodulation)
int rx_correlation_dB[NUMBER_OF_UE_MAX][2];
int rx_correlation_dB[NUMBER_OF_NR_DLSCH_MAX][2];
/// Wideband CQI (= SINR)
int wideband_cqi[NUMBER_OF_UE_MAX][MAX_NUM_RU_PER_gNB];
int wideband_cqi[NUMBER_OF_NR_DLSCH_MAX][MAX_NUM_RU_PER_gNB];
/// Wideband CQI in dB (= SINR dB)
int wideband_cqi_dB[NUMBER_OF_UE_MAX][MAX_NUM_RU_PER_gNB];
int wideband_cqi_dB[NUMBER_OF_NR_DLSCH_MAX][MAX_NUM_RU_PER_gNB];
/// Wideband CQI (sum of all RX antennas, in dB)
char wideband_cqi_tot[NUMBER_OF_UE_MAX];
char wideband_cqi_tot[NUMBER_OF_NR_DLSCH_MAX];
/// Subband CQI per RX antenna and RB (= SINR)
int subband_cqi[NUMBER_OF_UE_MAX][MAX_NUM_RU_PER_gNB][100];
int subband_cqi[NUMBER_OF_NR_DLSCH_MAX][MAX_NUM_RU_PER_gNB][100];
/// Total Subband CQI and RB (= SINR)
int subband_cqi_tot[NUMBER_OF_UE_MAX][100];
int subband_cqi_tot[NUMBER_OF_NR_DLSCH_MAX][100];
/// Subband CQI in dB and RB (= SINR dB)
int subband_cqi_dB[NUMBER_OF_UE_MAX][MAX_NUM_RU_PER_gNB][100];
int subband_cqi_dB[NUMBER_OF_NR_DLSCH_MAX][MAX_NUM_RU_PER_gNB][100];
/// Total Subband CQI and RB
int subband_cqi_tot_dB[NUMBER_OF_UE_MAX][100];
int subband_cqi_tot_dB[NUMBER_OF_NR_DLSCH_MAX][100];
/// PRACH background noise level
int prach_I0;
} PHY_MEASUREMENTS_gNB;
......@@ -572,19 +572,19 @@ typedef struct PHY_VARS_gNB_s {
LTE_eNB_PHICH phich_vars[2];
NR_gNB_COMMON common_vars;
LTE_eNB_UCI uci_vars[NUMBER_OF_UE_MAX];
/* LTE_eNB_UCI uci_vars[NUMBER_OF_UE_MAX];
LTE_eNB_SRS srs_vars[NUMBER_OF_UE_MAX];
LTE_eNB_PUSCH *pusch_vars[NUMBER_OF_UE_MAX];
LTE_eNB_PRACH prach_vars;
NR_gNB_DLSCH_t *dlsch[NUMBER_OF_UE_MAX][2]; // Nusers times two spatial streams
NR_gNB_ULSCH_t *ulsch[NUMBER_OF_UE_MAX+1][2]; // [Nusers times + number of RA][2 codewords], index 0 in [NUMBER_OF_UE_MAX+1] is for RA
LTE_eNB_PRACH prach_vars;*/
NR_gNB_DLSCH_t *dlsch[NUMBER_OF_NR_DLSCH_MAX][2]; // Nusers times two spatial streams
NR_gNB_ULSCH_t *ulsch[NUMBER_OF_NR_ULSCH_MAX+1][2]; // [Nusers times + number of RA][2 codewords], index 0 in [NUMBER_OF_UE_MAX+1] is for RA
// LTE_eNB_ULSCH_t *ulsch[NUMBER_OF_UE_MAX+1]; // Nusers + number of RA
NR_gNB_DLSCH_t *dlsch_SI,*dlsch_ra,*dlsch_p;
NR_gNB_DLSCH_t *dlsch_MCH;
NR_gNB_DLSCH_t *dlsch_PCH;
/*
LTE_eNB_UE_stats UE_stats[NUMBER_OF_UE_MAX];
LTE_eNB_UE_stats *UE_stats_ptr[NUMBER_OF_UE_MAX];
*/
uint8_t pbch_configured;
uint8_t pbch_pdu[4]; //PBCH_PDU_SIZE
char gNB_generate_rar;
......
......@@ -30,6 +30,8 @@
* \warning
*/
#include "fapi_nr_l1.h"
#include "PHY/NR_TRANSPORT/nr_dlsch.h"
#include "PHY/NR_TRANSPORT/nr_dci.h"
int oai_nfapi_nr_dl_config_req(nfapi_nr_dl_config_request_t *dl_config_req);
int oai_nfapi_tx_req(nfapi_tx_request_t *tx_req);
......@@ -37,7 +39,6 @@ int oai_nfapi_tx_req(nfapi_tx_request_t *tx_req);
extern uint8_t nfapi_mode;
void handle_nr_nfapi_bch_pdu(PHY_VARS_gNB *gNB,
gNB_L1_rxtx_proc_t *proc,
nfapi_nr_dl_config_request_pdu_t *dl_config_pdu,
uint8_t *sdu)
{
......@@ -56,25 +57,33 @@ void handle_nr_nfapi_bch_pdu(PHY_VARS_gNB *gNB,
void handle_nfapi_nr_dci_dl_pdu(PHY_VARS_gNB *gNB,
int frame, int slot,
gNB_L1_rxtx_proc_t *proc,
nfapi_nr_dl_config_request_pdu_t *dl_config_pdu,
nfapi_nr_dl_config_request_pdu_t *dl_config_dlsch_pdu)
{
nfapi_nr_dl_config_dci_dl_pdu *dci_dl_pdu) {
int idx = slot&1;
NR_gNB_PDCCH *pdcch_vars = &gNB->pdcch_vars;
LOG_D(PHY,"Frame %d, Slot %d: DCI processing - populating pdcch_vars->dci_alloc[%d] proc:slot_tx:%d idx:%d pdcch_vars->num_dci:%d\n",frame,slot, pdcch_vars->num_dci, proc->slot_tx, idx, pdcch_vars->num_dci);
LOG_D(PHY,"Frame %d, Slot %d: DCI processing - populating pdcch_vars->dci_alloc[%d] proc:slot_tx:%d idx:%d pdcch_vars->num_dci:%d\n",frame,slot, pdcch_vars->num_dci, slot, idx, pdcch_vars->num_dci);
// copy dci configuration into gNB structure
nr_fill_dci_and_dlsch(gNB,frame,slot,proc,&pdcch_vars->dci_alloc[pdcch_vars->num_dci],&dl_config_pdu->dci_dl_pdu,&dl_config_dlsch_pdu->dlsch_pdu);
nr_fill_dci(gNB,frame,slot,&pdcch_vars->dci_alloc[pdcch_vars->num_dci],dci_dl_pdu);
LOG_D(PHY,"Frame %d, Slot %d: DCI processing - populated pdcch_vars->dci_alloc[%d] proc:slot_tx:%d idx:%d pdcch_vars->num_dci:%d\n",proc->frame_tx,proc->slot_tx, pdcch_vars->num_dci, proc->slot_tx, idx, pdcch_vars->num_dci);
LOG_D(PHY,"Frame %d, Slot %d: DCI processing - populated pdcch_vars->dci_alloc[%d] proc:slot_tx:%d idx:%d pdcch_vars->num_dci:%d\n",frame,slot, pdcch_vars->num_dci, slot, idx, pdcch_vars->num_dci);
}
void handle_nr_nfapi_dlsch_pdu(PHY_VARS_gNB *gNB,int frame,int slot,
nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
uint8_t *sdu)
{
nr_fill_dlsch(gNB,frame,slot,dlsch_pdu,sdu);
}
void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
PHY_VARS_gNB *gNB;
gNB_L1_rxtx_proc_t *proc;
// copy data from L2 interface into L1 structures
module_id_t Mod_id = Sched_INFO->module_id;
uint8_t CC_id = Sched_INFO->CC_id;
......@@ -88,12 +97,10 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
AssertFatal(RC.gNB[Mod_id][CC_id]!=NULL,"RC.gNB[%d][%d] is null\n",Mod_id,CC_id);
gNB = RC.gNB[Mod_id][CC_id];
proc = &gNB->proc.L1_proc;
uint8_t number_dl_pdu = DL_req->dl_config_request_body.number_pdu;
nfapi_nr_dl_config_request_pdu_t *dl_config_pdu;
nfapi_nr_dl_config_request_pdu_t *dl_config_dlsch_pdu;
int i;
......@@ -122,22 +129,31 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
do_oai=1;
handle_nr_nfapi_bch_pdu(gNB,
proc,
dl_config_pdu,
TX_req->tx_request_body.tx_pdu_list[dl_config_pdu->bch_pdu_rel15.pdu_index].segments[0].segment_data);
break;
case NFAPI_NR_DL_CONFIG_DCI_DL_PDU_TYPE:
dl_config_dlsch_pdu = &DL_req->dl_config_request_body.dl_config_pdu_list[++i];
handle_nfapi_nr_dci_dl_pdu(gNB,
frame, slot,
proc,
dl_config_pdu,
dl_config_dlsch_pdu);
&dl_config_pdu->dci_dl_pdu);
gNB->pdcch_vars.num_dci++;
gNB->pdcch_vars.num_pdsch_rnti++;
do_oai=1;
break;
case NFAPI_NR_DL_CONFIG_DLSCH_PDU_TYPE:
{
nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_pdu_rel15 = &dl_config_pdu->dlsch_pdu.dlsch_pdu_rel15;
uint16_t pdu_index = dlsch_pdu_rel15->pdu_index;
uint16_t tx_pdus = TX_req->tx_request_body.number_of_pdus;
uint16_t invalid_pdu = pdu_index == -1;
uint8_t *sdu = invalid_pdu ? NULL : pdu_index >= tx_pdus ? NULL : TX_req->tx_request_body.tx_pdu_list[pdu_index].segments[0].segment_data;
handle_nr_nfapi_dlsch_pdu(gNB,frame,slot,&dl_config_pdu->dlsch_pdu, sdu);
do_oai=1;
}
}
}
......
......@@ -38,6 +38,8 @@
void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO);
void handle_nfapi_nr_dci_dl_pdu(PHY_VARS_gNB *gNB,
int frame, int subframe,
gNB_L1_rxtx_proc_t *proc,
nfapi_nr_dl_config_request_pdu_t *dl_config_pdu,
nfapi_nr_dl_config_request_pdu_t *dl_config_dlsch_pdu);
nfapi_nr_dl_config_dci_dl_pdu *dcl_dl_pdu);
void handle_nr_nfapi_dlsch_pdu(PHY_VARS_gNB *gNB,int frame,int slot,
nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
uint8_t *sdu);
......@@ -176,7 +176,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
gNB->pdcch_vars.dci_alloc[0],
gNB->nr_gold_pdsch_dmrs[slot],
gNB->common_vars.txdataF,
AMP, slot, *fp, *cfg);
AMP, frame,slot, *fp, *cfg);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_DLSCH,0);
}
}
......
......@@ -45,7 +45,7 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
uint8_t CC_id;
gNB_MAC_INST *nr_mac = RC.nrmac[module_idP];
//NR_COMMON_channels_t *cc = nr_mac->common_channels;
NR_COMMON_channels_t *cc = nr_mac->common_channels;
nfapi_nr_dl_config_request_body_t *dl_req;
nfapi_nr_dl_config_request_pdu_t *dl_config_dci_pdu;
nfapi_nr_dl_config_request_pdu_t *dl_config_dlsch_pdu;
......@@ -163,6 +163,7 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
TX_req->pdu_index = nr_mac->pdu_index[CC_id]++;
TX_req->num_segments = 1;
TX_req->segments[0].segment_length = 8;
TX_req->segments[0].segment_data = cc[CC_id].RAR_pdu.payload;
nr_mac->TX_req[CC_id].tx_request_body.number_of_pdus++;
nr_mac->TX_req[CC_id].sfn_sf = sfn_sf;
nr_mac->TX_req[CC_id].tx_request_body.tl.tag = NFAPI_TX_REQUEST_BODY_TAG;
......@@ -172,7 +173,8 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
TX_req->pdu_length = dlsch_pdu_rel15->transport_block_size;
TX_req->pdu_index = nr_mac->pdu_index[CC_id]++;
TX_req->num_segments = 1;
TX_req->segments[0].segment_length = 8;
TX_req->segments[0].segment_length = TX_req->pdu_length;
TX_req->segments[0].segment_data = nr_mac->UE_list.DLSCH_pdu[CC_id][0][0].payload;
nr_mac->TX_req[CC_id].tx_request_body.number_of_pdus++;
nr_mac->TX_req[CC_id].sfn_sf = sfn_sf;
nr_mac->TX_req[CC_id].tx_request_body.tl.tag = NFAPI_TX_REQUEST_BODY_TAG;
......
......@@ -6,6 +6,8 @@
# define NUMBER_OF_gNB_MAX 1
# define NUMBER_OF_RU_MAX 2
# define NUMBER_OF_NR_RU_MAX 2
# define NUMBER_OF_NR_DLSCH_MAX 16
# define NUMBER_OF_NR_ULSCH_MAX 16
# ifndef PHYSIM
# ifndef UE_EXPANSION
# define NUMBER_OF_UE_MAX 16
......
......@@ -919,7 +919,7 @@ void init_eNB_afterRU(void) {
//LOG_I(PHY,"Overwriting gNB->prach_vars.rxsigF[0]:%p\n", gNB->prach_vars.rxsigF[0]);
gNB->prach_vars.rxsigF[0] = (int16_t**)malloc16(64*sizeof(int16_t*));
//gNB->prach_vars.rxsigF[0] = (int16_t**)malloc16(64*sizeof(int16_t*));
LOG_I(PHY,"gNB->num_RU:%d\n", gNB->num_RU);
......@@ -935,7 +935,7 @@ void init_eNB_afterRU(void) {
for (i=0;i<gNB->RU_list[ru_id]->nb_rx;aa++,i++) {
LOG_I(PHY,"Attaching RU %d antenna %d to gNB antenna %d\n",gNB->RU_list[ru_id]->idx,i,aa);
gNB->prach_vars.rxsigF[0][aa] = gNB->RU_list[ru_id]->prach_rxsigF[i];
// gNB->prach_vars.rxsigF[0][aa] = gNB->RU_list[ru_id]->prach_rxsigF[i];
gNB->common_vars.rxdataF[aa] = gNB->RU_list[ru_id]->common.rxdataF[i];
}
}
......
......@@ -691,7 +691,7 @@ void rx_rf(RU_t *ru,int *frame,int *slot) {
}
else {
if (proc->timestamp_rx - old_ts != fp->samples_per_slot) {
LOG_I(PHY,"rx_rf: rfdevice timing drift of %"PRId64" samples (ts_off %"PRId64")\n",proc->timestamp_rx - old_ts - fp->samples_per_slot,ru->ts_offset);
LOG_D(PHY,"rx_rf: rfdevice timing drift of %"PRId64" samples (ts_off %"PRId64")\n",proc->timestamp_rx - old_ts - fp->samples_per_slot,ru->ts_offset);
ru->ts_offset += (proc->timestamp_rx - old_ts - fp->samples_per_slot);
proc->timestamp_rx = ts-ru->ts_offset;
}
......
......@@ -389,7 +389,7 @@ void reset_stats(FL_OBJECT *button, long arg)
phy_vars_gNB->UE_stats[i].dlsch_NAK[k][j]=0;
phy_vars_gNB->UE_stats[i].dlsch_ACK[k][j]=0;
phy_vars_gNB->UE_stats[i].dlsch_trials[k][j]=0;
}*/
}
phy_vars_gNB->UE_stats[i].dlsch_l2_errors[k]=0;
phy_vars_gNB->UE_stats[i].ulsch_errors[k]=0;
......@@ -399,6 +399,7 @@ void reset_stats(FL_OBJECT *button, long arg)
phy_vars_gNB->UE_stats[i].dlsch_sliding_cnt=0;
phy_vars_gNB->UE_stats[i].dlsch_NAK_round0=0;
phy_vars_gNB->UE_stats[i].dlsch_mcs_offset=0;
*/
}
}
}
......
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