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Commit 44d31f04 authored by Hongzhi's avatar Hongzhi
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Merge branch 'nr_pdcch' of https://gitlab.eurecom.fr/oai/openairinterface5g into nr_pdcch 

Conflicts:
	openair1/PHY/NR_TRANSPORT/nr_pbch.c
parents 52bdf7e0 2dec82b3
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nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
View file @ 44d31f04
......@@ -37,8 +37,8 @@ typedef struct {
uint8_t sul_ind_0_1 ; // 2 SUL_IND_0_1:
uint8_t slot_format_ind ; // 3 SLOT_FORMAT_IND: size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
uint8_t pre_emption_ind ; // 4 PRE_EMPTION_IND: size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
uint8_t tpc_cmd_number ; // 5 TPC_CMD_NUMBER: The parameter xxx provided by higher layers determines the index to the TPC command number for an UL of a cell. Each TPC command number is 2 bits
uint8_t block_number ; // 6 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
uint8_t block_number ; // 5 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
uint8_t close_loop_ind ; // 6 CLOSE_LOOP_IND:
uint8_t bandwidth_part_ind ; // 7 BANDWIDTH_PART_IND:
uint8_t short_message_ind ; // 8 SHORT_MESSAGE_IND:
uint8_t short_messages ; // 9 SHORT_MESSAGES:
......@@ -81,7 +81,7 @@ typedef struct {
uint8_t antenna_ports ; // 38 ANTENNA_PORTS:
uint8_t tci ; // 39 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
uint8_t srs_request ; // 40 SRS_REQUEST:
uint8_t tpc_cmd_number_format2_3 ; // 41 TPC_CMD_NUMBER_FORMAT2_3:
uint8_t tpc_cmd ; // 41 TPC_CMD:
uint8_t csi_request ; // 42 CSI_REQUEST:
uint8_t cbgti ; // 43 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
uint8_t cbgfi ; // 44 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
......@@ -225,13 +225,19 @@ typedef struct {
typedef struct {
} fapi_nr_ul_config_pucch_pdu;
typedef enum {pusch_freq_hopping_disabled = 0 , pusch_freq_hopping_enabled = 1}pusch_freq_hopping_t;
typedef struct {
uint16_t number_rbs;
uint16_t start_rb;
uint16_t number_symbols;
uint16_t start_symbol;
pusch_freq_hopping_t pusch_freq_hopping;
uint8_t mcs;
uint8_t ndi;
uint8_t rv;
uint8_t harq_process_nbr;
int8_t accumulated_delta_PUSCH;
int8_t absolute_delta_PUSCH;
} fapi_nr_ul_config_pusch_pdu_rel15_t;
typedef struct {
......@@ -273,6 +279,7 @@ typedef struct {
fapi_nr_dl_config_dci_dl_pdu_rel15_t dci_config_rel15;
} fapi_nr_dl_config_dci_pdu;
typedef enum{vrb_to_prb_mapping_non_interleaved = 0, vrb_to_prb_mapping_interleaved = 1} vrb_to_prb_mapping_t;
//typedef fapi_nr_dci_pdu_rel15_t fapi_nr_dl_config_dlsch_pdu_rel15_t;
typedef struct {
uint16_t number_rbs;
......@@ -280,7 +287,18 @@ typedef struct {
uint16_t number_symbols;
uint16_t start_symbol;
uint8_t mcs;
uint8_t ndi;
uint8_t rv;
uint8_t tb2_mcs;
uint8_t tb2_ndi;
uint8_t tb2_rv;
uint8_t harq_process_nbr;
vrb_to_prb_mapping_t vrb_to_prb_mapping;
uint8_t dai;
double scaling_factor_S;
int8_t accumulated_delta_PUCCH;
uint8_t pucch_resource_id;
uint8_t pdsch_to_harq_feedback_time_ind;
// to be check the fields needed to L1 with NR_DL_UE_HARQ_t and NR_UE_DLSCH_t
} fapi_nr_dl_config_dlsch_pdu_rel15_t;
......
openair1/PHY/CODING/TESTBENCH/polartest.c
View file @ 44d31f04
......@@ -10,8 +10,8 @@
#include "PHY/CODING/coding_defs.h"
#include "SIMULATION/TOOLS/sim.h"
//#define DEBUG_POLAR_PARAMS
//#define DEBUG_DCI_POLAR_PARAMS
//#define DEBUG_POLAR_TIMING
int main(int argc, char *argv[]) {
......@@ -24,7 +24,6 @@ int main(int argc, char *argv[]) {
randominit(0);
crcTableInit();
uint32_t crc;
//Default simulation values (Aim for iterations = 1000000.)
int itr, iterations = 1000, arguments, polarMessageType = 0; //0=PBCH, 1=DCI, -1=UCI
double SNRstart = -20.0, SNRstop = 0.0, SNRinc= 0.5; //dB
......@@ -34,14 +33,13 @@ int main(int argc, char *argv[]) {
int8_t decoderState=0, blockErrorState=0; //0 = Success, -1 = Decoding failed, 1 = Block Error.
uint16_t testLength = 0, coderLength = 0, blockErrorCumulative=0, bitErrorCumulative=0;
double timeEncoderCumulative = 0, timeDecoderCumulative = 0;
uint8_t aggregation_level, decoderListSize, pathMetricAppr;
uint8_t aggregation_level = 8, decoderListSize = 8, pathMetricAppr = 0;
while ((arguments = getopt (argc, argv, "s:d:f:m:i:l:a:")) != -1)
switch (arguments)
{
case 's':
SNRstart = atof(optarg);
printf("SNRstart = %f\n", SNRstart);
break;
case 'd':
......@@ -93,7 +91,12 @@ int main(int argc, char *argv[]) {
folderName=getenv("HOME");
strcat(folderName,"/Desktop/polartestResults");
#ifdef DEBUG_POLAR_TIMING
sprintf(fileName,"%s/TIMING_ListSize_%d_pmAppr_%d_Payload_%d_Itr_%d",folderName,decoderListSize,pathMetricAppr,testLength,iterations);
#else
sprintf(fileName,"%s/_ListSize_%d_pmAppr_%d_Payload_%d_Itr_%d",folderName,decoderListSize,pathMetricAppr,testLength,iterations);
#endif
strftime(currentTimeInfo, 25, "_%Y-%m-%d-%H-%M-%S.csv", localtime(&currentTime));
strcat(fileName,currentTimeInfo);
......@@ -107,65 +110,45 @@ int main(int argc, char *argv[]) {
fprintf(stderr,"[polartest.c] Problem creating file %s with fopen\n",fileName);
exit(-1);
}
#ifdef DEBUG_POLAR_TIMING
fprintf(logFile,",timeEncoderCRCByte[us],timeEncoderCRCBit[us],timeEncoderInterleaver[us],timeEncoderBitInsertion[us],timeEncoder1[us],timeEncoder2[us],timeEncoderRateMatching[us],timeEncoderByte2Bit[us]\n");
#else
fprintf(logFile,",SNR,nBitError,blockErrorState,t_encoder[us],t_decoder[us]\n");
#endif
//uint8_t *testInput = malloc(sizeof(uint8_t) * testLength); //generate randomly
//uint8_t *encoderOutput = malloc(sizeof(uint8_t) * coderLength);
uint32_t testInput[4], encoderOutput[4];
memset(testInput,0,sizeof(testInput));
memset(encoderOutput,0,sizeof(encoderOutput));
uint8_t testArrayLength = ceil(testLength / 32.0);
uint8_t coderArrayLength = ceil(coderLength / 32.0);
double *modulatedInput = malloc (sizeof(double) * coderLength); //channel input
uint32_t *testInput = malloc(sizeof(uint32_t) * testArrayLength); //generate randomly
uint32_t *encoderOutput = malloc(sizeof(uint32_t) * coderArrayLength);
uint32_t *estimatedOutput = malloc(sizeof(uint32_t) * testArrayLength); //decoder output
memset(testInput,0,sizeof(uint32_t) * testArrayLength);
memset(encoderOutput,0,sizeof(uint32_t) * coderArrayLength);
memset(estimatedOutput,0,sizeof(uint32_t) * testArrayLength);
uint8_t *encoderOutputByte = malloc(sizeof(uint8_t) * coderLength);
double *modulatedInput = malloc (sizeof(double) * coderLength); //channel input
double *channelOutput = malloc (sizeof(double) * coderLength); //add noise
uint32_t *estimatedOutput = malloc(sizeof(uint8_t) * testLength); //decoder output
t_nrPolar_paramsPtr nrPolar_params = NULL, currentPtr = NULL;
nr_polar_init(&nrPolar_params, polarMessageType, testLength, aggregation_level);
currentPtr = nr_polar_params(nrPolar_params, polarMessageType, testLength, aggregation_level);
#ifdef DEBUG_DCI_POLAR_PARAMS
uint32_t crc;
unsigned int poly24c = 0xb2b11700;
testInput[0]=0x01189400;
printf("testInput: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
testInput[0], testInput[1], testInput[2], testInput[3]);
printf("encOutput: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
encoderOutput[0], encoderOutput[1], encoderOutput[2], encoderOutput[3]);
testInput[0]=0x01189400;
uint8_t testInput2[8];
nr_crc_bit2bit_uint32_8_t(testInput, 32, testInput2);
printf("testInput2: [0]->%x \t [1]->%x \t [2]->%x \t [3]->%x\n [4]->%x \t [5]->%x \t [6]->%x \t [7]->%x \t\n",
printf("testInput2: [0]->%x \t [1]->%x \t [2]->%x \t [3]->%x\n"
" [4]->%x \t [5]->%x \t [6]->%x \t [7]->%x\n",
testInput2[0], testInput2[1], testInput2[2], testInput2[3],
testInput2[4], testInput2[5], testInput2[6], testInput2[7]);
printf("crc32: [0]->0x%08x\n",crc24c(testInput2, 32));
printf("crc56: [0]->0x%08x\n",crc24c(testInput2, 56));
return 0;
uint8_t testInput8[4];
/*testInput8[0]=0x00;
testInput8[1]=0x49;
testInput8[2]=0x81;
testInput8[3]=0x10;
testInput8[4]=0x00;*/
testInput8[0]=0xff;
testInput8[1]=0xd0;
testInput8[2]=0xff;
testInput8[3]=0x82;
crc = crc24c(testInput8, 31);
for (int i=0;i<24;i++) printf("[i]=%d\n",(crc>>i)&1);
printf("crc: [0]->0x%08x\n",crc);
printf("crcbit: %x\n",crcbit(testInput8, 3, poly24c));
return 0;
unsigned char test[] = "Thebigredfox";
for (int i=0;i<8;i++) printf("[i]=%d\n",(test[0]>>i)&1);
printf("test[0]=%x\n",test[0]);
printf("%s -- sizeof=%d\n",test,sizeof(test));
printf("%x\n", crcbit(test, sizeof(test) - 1, poly24c));
printf("%x\n", crc24c(test, (sizeof(test) - 1)*8));
polarMessageType = 1;
testLength = 41;
aggregation_level=1;
coderLength = 108;
nr_polar_init(&nrPolar_params, polarMessageType, testLength, aggregation_level);
nr_polar_print_polarParams(nrPolar_params);
crc = crc24c(testInput, testLength)>>8;
for (int i=0;i<24;i++) printf("[i]=%d\n",(crc>>i)&1);
printf("crc: [0]->0x%08x\n",crc);
......@@ -174,18 +157,30 @@ int main(int argc, char *argv[]) {
testInput[2+(testLength>>3)] = ((uint8_t*)&crc)[0];
printf("testInput: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
testInput[0], testInput[1], testInput[2], testInput[3]);
return (0);
currentPtr = nr_polar_params(nrPolar_params, polarMessageType, testLength, aggregation_level);
polar_encoder(testInput, encoderOutput, currentPtr);
printf("AFTER POLAR ENCODING\n");
printf("testInput: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
testInput[0], testInput[1], testInput[2], testInput[3]);
printf("encOutput: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
encoderOutput[0], encoderOutput[1], encoderOutput[2], encoderOutput[3]);
return (0);
#endif
currentPtr = nr_polar_params(nrPolar_params, polarMessageType, testLength, aggregation_level);
#ifdef DEBUG_POLAR_TIMING
for (SNR = SNRstart; SNR <= SNRstop; SNR += SNRinc) {
SNR_lin = pow(10, SNR / 10);
for (itr = 1; itr <= iterations; itr++) {
for (int j=0; j<ceil(testLength / 32.0); j++) {
for(int i=0; i<32; i++) {
testInput[j] |= ( ((uint32_t) (rand()%2)) &1);
testInput[j]<<=1;
}
}
printf("testInput: [0]->0x%08x \n", testInput[0]);
polar_encoder_timing(testInput, encoderOutput, currentPtr, cpu_freq_GHz, logFile);
}
}
fclose(logFile);
free(testInput);
free(encoderOutput);
free(modulatedInput);
free(channelOutput);
free(estimatedOutput);
return (0);
#endif
// We assume no a priori knowledge available about the payload.
double aPrioriArray[currentPtr->payloadBits];
......@@ -195,68 +190,87 @@ int main(int argc, char *argv[]) {
SNR_lin = pow(10, SNR/10);
for (itr = 1; itr <= iterations; itr++) {
for(int i=0; i<testLength; i++) testInput[i]=(uint8_t) (rand() % 2);
for (int i = 0; i < testArrayLength; i++) {
for (int j = 0; j < (sizeof(testInput[0])*8)-1; j++) {
testInput[i] |= ( ((uint32_t) (rand()%2)) &1);
testInput[i]<<=1;
}
testInput[i] |= ( ((uint32_t) (rand()%2)) &1);
}
start_meas(&timeEncoder);
polar_encoder(testInput, encoderOutput, currentPtr);
stop_meas(&timeEncoder);
/*printf("testInput: [0]->0x%08x\n", testInput[0]);
for (int i=0; i<32; i++)
printf("%d\n",(testInput[0]>>i)&1);*/
//BPSK modulation
for(int i=0; i<coderLength; i++) {
if (encoderOutput[i] == 0)
modulatedInput[i]=1/sqrt(2);
else
modulatedInput[i]=(-1)/sqrt(2);
start_meas(&timeEncoder);
polar_encoder(testInput, encoderOutput, currentPtr);
stop_meas(&timeEncoder);
channelOutput[i] = modulatedInput[i] + (gaussdouble(0.0,1.0) * (1/sqrt(2*SNR_lin)));
//printf("%f\n",channelOutput[i]);
}
/*printf("encoderOutput: [0]->0x%08x\n", encoderOutput[0]);
printf("encoderOutput: [1]->0x%08x\n", encoderOutput[1]);
*/
//Bit-to-byte:
nr_bit2byte_uint32_8_t(encoderOutput, coderLength, encoderOutputByte);
//BPSK modulation
for(int i=0; i<coderLength; i++) {
if (encoderOutputByte[i] == 0)
modulatedInput[i]=1/sqrt(2);
else
modulatedInput[i]=(-1)/sqrt(2);
channelOutput[i] = modulatedInput[i] + (gaussdouble(0.0,1.0) * (1/sqrt(2*SNR_lin)));
}
start_meas(&timeDecoder);
/*decoderState = polar_decoder(channelOutput,
estimatedOutput,
currentPtr,
NR_POLAR_DECODER_LISTSIZE,
aPrioriArray,
NR_POLAR_DECODER_PATH_METRIC_APPROXIMATION);*/
decoderState = polar_decoder_aPriori(channelOutput,
estimatedOutput,
currentPtr,
NR_POLAR_DECODER_LISTSIZE,
NR_POLAR_DECODER_PATH_METRIC_APPROXIMATION,
aPrioriArray);
stop_meas(&timeDecoder);
//calculate errors
if (decoderState==-1) {
blockErrorState=-1;
nBitError=-1;
} else {
for(int i=0; i<testLength; i++){
if (estimatedOutput[i]!=testInput[i]) nBitError++;
start_meas(&timeDecoder);
/*decoderState = polar_decoder(channelOutput,
estimatedOutput,
currentPtr,
NR_POLAR_DECODER_LISTSIZE,
aPrioriArray,
NR_POLAR_DECODER_PATH_METRIC_APPROXIMATION);*/
decoderState = polar_decoder_aPriori(channelOutput,
estimatedOutput,
currentPtr,
NR_POLAR_DECODER_LISTSIZE,
NR_POLAR_DECODER_PATH_METRIC_APPROXIMATION,
aPrioriArray);
stop_meas(&timeDecoder);
/*printf("testInput: [0]->0x%08x\n", testInput[0]);
printf("estimatedOutput: [0]->0x%08x\n", estimatedOutput[0]);
*/
//calculate errors
if (decoderState==-1) {
blockErrorState=-1;
nBitError=-1;
} else {
for (int i = 0; i < testArrayLength; i++) {
for (int j = 0; j < (sizeof(testInput[0])*8); j++) {
if (((estimatedOutput[i]>>j) & 1) != ((testInput[i]>>j) & 1)) nBitError++;
}
}
if (nBitError>0) blockErrorState=1;
}
if (nBitError>0) blockErrorState=1;
}
//Iteration times are in microseconds.
timeEncoderCumulative+=(timeEncoder.diff_now/(cpu_freq_GHz*1000.0));
timeDecoderCumulative+=(timeDecoder.diff_now/(cpu_freq_GHz*1000.0));
fprintf(logFile,",%f,%d,%d,%f,%f\n", SNR, nBitError, blockErrorState,
(timeEncoder.diff_now/(cpu_freq_GHz*1000.0)), (timeDecoder.diff_now/(cpu_freq_GHz*1000.0)));
if (nBitError<0) {
blockErrorCumulative++;
bitErrorCumulative+=testLength;
} else {
blockErrorCumulative+=blockErrorState;
bitErrorCumulative+=nBitError;
}
//Iteration times are in microseconds.
timeEncoderCumulative+=(timeEncoder.diff_now/(cpu_freq_GHz*1000.0));
timeDecoderCumulative+=(timeDecoder.diff_now/(cpu_freq_GHz*1000.0));
fprintf(logFile,",%f,%d,%d,%f,%f\n", SNR, nBitError, blockErrorState,
(timeEncoder.diff_now/(cpu_freq_GHz*1000.0)), (timeDecoder.diff_now/(cpu_freq_GHz*1000.0)));
if (nBitError<0) {
blockErrorCumulative++;
bitErrorCumulative+=testLength;
} else {
blockErrorCumulative+=blockErrorState;
bitErrorCumulative+=nBitError;
}
decoderState=0;
nBitError=0;
blockErrorState=0;
decoderState=0;
nBitError=0;
blockErrorState=0;
}
//Calculate error statistics for the SNR.
......@@ -273,11 +287,14 @@ int main(int argc, char *argv[]) {
print_meas(&timeDecoder,"polar_decoder",NULL,NULL);
fclose(logFile);
//free(testInput);
//free(encoderOutput);
//Bit
free(testInput);
free(encoderOutput);
free(estimatedOutput);
//Byte
free(encoderOutputByte);
free(modulatedInput);
free(channelOutput);
free(estimatedOutput);
return (0);
}
openair1/PHY/CODING/nrPolar_tools/nr_polar_decoder.c
View file @ 44d31f04
......@@ -278,13 +278,268 @@ int8_t polar_decoder(
return(0);
}
int8_t polar_decoder_aPriori(
double *input,
uint32_t *out,
t_nrPolar_paramsPtr polarParams,
uint8_t listSize,
uint8_t pathMetricAppr,
double *aPrioriPayload)
int8_t polar_decoder_aPriori(double *input,
uint32_t *out,
t_nrPolar_paramsPtr polarParams,
uint8_t listSize,
uint8_t pathMetricAppr,
double *aPrioriPayload)
{
uint8_t ***bit = nr_alloc_uint8_t_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
uint8_t **bitUpdated = nr_alloc_uint8_t_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
uint8_t **llrUpdated = nr_alloc_uint8_t_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
double ***llr = nr_alloc_double_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
uint8_t **crcChecksum = nr_alloc_uint8_t_2D_array(polarParams->crcParityBits, 2*listSize);
double *pathMetric = malloc(sizeof(double)*(2*listSize));
uint8_t *crcState = malloc(sizeof(uint8_t)*(2*listSize)); //0=False, 1=True
for (int i=0; i<(2*listSize); i++) {
pathMetric[i] = 0;
crcState[i]=1;
}
for (int i=0; i<polarParams->N; i++) {
llrUpdated[i][polarParams->n]=1;
bitUpdated[i][0]=((polarParams->information_bit_pattern[i]+1) % 2);
}
uint8_t **extended_crc_generator_matrix = malloc(polarParams->K * sizeof(uint8_t *)); //G_P3
uint8_t **tempECGM = malloc(polarParams->K * sizeof(uint8_t *)); //G_P2
for (int i = 0; i < polarParams->K; i++){
extended_crc_generator_matrix[i] = malloc(polarParams->crcParityBits * sizeof(uint8_t));
tempECGM[i] = malloc(polarParams->crcParityBits * sizeof(uint8_t));
}
for (int i=0; i<polarParams->payloadBits; i++) {
for (int j=0; j<polarParams->crcParityBits; j++) {
tempECGM[i][j]=polarParams->crc_generator_matrix[i][j];
}
}
for (int i=polarParams->payloadBits; i<polarParams->K; i++) {
for (int j=0; j<polarParams->crcParityBits; j++) {
if( (i-polarParams->payloadBits) == j ){
tempECGM[i][j]=1;
} else {
tempECGM[i][j]=0;
}
}
}
for (int i=0; i<polarParams->K; i++) {
for (int j=0; j<polarParams->crcParityBits; j++) {
extended_crc_generator_matrix[i][j]=tempECGM[polarParams->interleaving_pattern[i]][j];
}
}
//The index of the last 1-valued bit that appears in each column.
uint16_t last1ind[polarParams->crcParityBits];
for (int j=0; j<polarParams->crcParityBits; j++) {
for (int i=0; i<polarParams->K; i++) {
if (extended_crc_generator_matrix[i][j]==1) last1ind[j]=i;
}
}
double *d_tilde = malloc(sizeof(double) * polarParams->N);
nr_polar_rate_matching(input, d_tilde, polarParams->rate_matching_pattern, polarParams->K, polarParams->N, polarParams->encoderLength);
for (int j = 0; j < polarParams->N; j++) llr[j][polarParams->n][0]=d_tilde[j];
/*
* SCL polar decoder.
*/
uint32_t nonFrozenBit=0;
uint8_t currentListSize=1;
uint8_t decoderIterationCheck=0;
int16_t checkCrcBits=-1;
uint8_t listIndex[2*listSize], copyIndex;
for (uint16_t currentBit=0; currentBit<polarParams->N; currentBit++){
updateLLR(llr, llrUpdated, bit, bitUpdated, currentListSize, currentBit, 0, polarParams->N, (polarParams->n+1), pathMetricAppr);
if (polarParams->information_bit_pattern[currentBit]==0) { //Frozen bit.
updatePathMetric(pathMetric, llr, currentListSize, 0, currentBit, pathMetricAppr); //approximation=0 --> 11b, approximation=1 --> 12
} else { //Information or CRC bit.
if ( (polarParams->interleaving_pattern[nonFrozenBit] <= polarParams->payloadBits) &&
(aPrioriPayload[polarParams->interleaving_pattern[nonFrozenBit]] == 0) ) {
//Information bit with known value of "0".
updatePathMetric(pathMetric, llr, currentListSize, 0, currentBit, pathMetricAppr);
bitUpdated[currentBit][0]=1; //0=False, 1=True
} else if ( (polarParams->interleaving_pattern[nonFrozenBit] <= polarParams->payloadBits) &&
(aPrioriPayload[polarParams->interleaving_pattern[nonFrozenBit]] == 1) ) {
//Information bit with known value of "1".
updatePathMetric(pathMetric, llr, currentListSize, 1, currentBit, pathMetricAppr);
for (uint8_t i=0; i<currentListSize; i++) bit[currentBit][0][i]=1;
bitUpdated[currentBit][0]=1;
updateCrcChecksum(crcChecksum, extended_crc_generator_matrix, currentListSize, nonFrozenBit, polarParams->crcParityBits);
} else {
updatePathMetric2(pathMetric, llr, currentListSize, currentBit, pathMetricAppr);
for (int i = 0; i < currentListSize; i++) {
for (int j = 0; j < polarParams->N; j++) {
for (int k = 0; k < (polarParams->n+1); k++) {
bit[j][k][i+currentListSize]=bit[j][k][i];
llr[j][k][i+currentListSize]=llr[j][k][i];}}}
for (int i = 0; i < currentListSize; i++) {
bit[currentBit][0][i]=0;
crcState[i+currentListSize]=crcState[i];
}
for (int i = currentListSize; i < 2*currentListSize; i++) bit[currentBit][0][i]=1;
bitUpdated[currentBit][0]=1;
updateCrcChecksum2(crcChecksum, extended_crc_generator_matrix, currentListSize, nonFrozenBit, polarParams->crcParityBits);
currentListSize*=2;
//Keep only the best "listSize" number of entries.
if (currentListSize > listSize) {
for (uint8_t i = 0; i < 2*listSize; i++) listIndex[i]=i;
nr_sort_asc_double_1D_array_ind(pathMetric, listIndex, currentListSize);
//sort listIndex[listSize, ..., 2*listSize-1] in descending order.
uint8_t swaps, tempInd;
for (uint8_t i = 0; i < listSize; i++) {
swaps = 0;
for (uint8_t j = listSize; j < (2*listSize - i) - 1; j++) {
if (listIndex[j+1] > listIndex[j]) {
tempInd = listIndex[j];
listIndex[j] = listIndex[j + 1];
listIndex[j + 1] = tempInd;
swaps++;
}
}
if (swaps == 0)
break;
}
//First, backup the best "listSize" number of entries.
for (int k=(listSize-1); k>0; k--) {
for (int i=0; i<polarParams->N; i++) {
for (int j=0; j<(polarParams->n+1); j++) {
bit[i][j][listIndex[(2*listSize-1)-k]]=bit[i][j][listIndex[k]];
llr[i][j][listIndex[(2*listSize-1)-k]]=llr[i][j][listIndex[k]];
}
}
}
for (int k=(listSize-1); k>0; k--) {
for (int i = 0; i < polarParams->crcParityBits; i++) {
crcChecksum[i][listIndex[(2*listSize-1)-k]] = crcChecksum[i][listIndex[k]];
}
}
for (int k=(listSize-1); k>0; k--) crcState[listIndex[(2*listSize-1)-k]]=crcState[listIndex[k]];
//Copy the best "listSize" number of entries to the first indices.
for (int k = 0; k < listSize; k++) {
if (k > listIndex[k]) {
copyIndex = listIndex[(2*listSize-1)-k];
} else { //Use the backup.
copyIndex = listIndex[k];
}
for (int i = 0; i < polarParams->N; i++) {
for (int j = 0; j < (polarParams->n + 1); j++) {
bit[i][j][k] = bit[i][j][copyIndex];
llr[i][j][k] = llr[i][j][copyIndex];
}
}
}
for (int k = 0; k < listSize; k++) {
if (k > listIndex[k]) {
copyIndex = listIndex[(2*listSize-1)-k];
} else { //Use the backup.
copyIndex = listIndex[k];
}
for (int i = 0; i < polarParams->crcParityBits; i++) {
crcChecksum[i][k]=crcChecksum[i][copyIndex];
}
}
for (int k = 0; k < listSize; k++) {
if (k > listIndex[k]) {
copyIndex = listIndex[(2*listSize-1)-k];
} else { //Use the backup.
copyIndex = listIndex[k];
}
crcState[k]=crcState[copyIndex];
}
currentListSize = listSize;
}
}
for (int i=0; i<polarParams->crcParityBits; i++) {
if (last1ind[i]==nonFrozenBit) {
checkCrcBits=i;
break;
}
}
if ( checkCrcBits > (-1) ) {
for (uint8_t i = 0; i < currentListSize; i++) {
if (crcChecksum[checkCrcBits][i]==1) {
crcState[i]=0; //0=False, 1=True
}
}
}
for (uint8_t i = 0; i < currentListSize; i++) decoderIterationCheck+=crcState[i];
if (decoderIterationCheck==0) {
//perror("[SCL polar decoder] All list entries have failed the CRC checks.");
free(d_tilde);
free(pathMetric);
free(crcState);
nr_free_uint8_t_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_double_3D_array(llr, polarParams->N, (polarParams->n+1));
nr_free_uint8_t_2D_array(crcChecksum, polarParams->crcParityBits);
return(-1);
}
nonFrozenBit++;
decoderIterationCheck=0;
checkCrcBits=-1;
}
}
for (uint8_t i = 0; i < 2*listSize; i++) listIndex[i]=i;
nr_sort_asc_double_1D_array_ind(pathMetric, listIndex, currentListSize);
for (uint8_t i = 0; i < fmin(listSize, (pow(2,polarParams->crcCorrectionBits)) ); i++) {
if ( crcState[listIndex[i]] == 1 ) {
for (int j = 0; j < polarParams->N; j++) polarParams->nr_polar_U[j]=bit[j][0][listIndex[i]];
//Extract the information bits (û to ĉ)
nr_polar_info_bit_extraction(polarParams->nr_polar_U, polarParams->nr_polar_CPrime, polarParams->information_bit_pattern, polarParams->N);
//Deinterleaving (ĉ to b)
nr_polar_deinterleaver(polarParams->nr_polar_CPrime, polarParams->nr_polar_B, polarParams->interleaving_pattern, polarParams->K);
//Remove the CRC (â)
for (int j = 0; j < polarParams->payloadBits; j++) polarParams->nr_polar_A[j]=polarParams->nr_polar_B[j];
break;
}
}
free(d_tilde);
free(pathMetric);
free(crcState);
nr_free_uint8_t_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_double_3D_array(llr, polarParams->N, (polarParams->n+1));
nr_free_uint8_t_2D_array(crcChecksum, polarParams->crcParityBits);
nr_free_uint8_t_2D_array(extended_crc_generator_matrix, polarParams->K);
nr_free_uint8_t_2D_array(tempECGM, polarParams->K);
/*
* Return bits.
*/
nr_byte2bit_uint8_32_t(polarParams->nr_polar_A, polarParams->payloadBits, out);
return(0);
}
int8_t polar_decoder_aPriori_timing(double *input,
uint32_t *out,
t_nrPolar_paramsPtr polarParams,
uint8_t listSize,
uint8_t pathMetricAppr,
double *aPrioriPayload,
double cpuFreqGHz,
FILE* logFile)
{
uint8_t ***bit = nr_alloc_uint8_t_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
......
openair1/PHY/CODING/nrPolar_tools/nr_polar_defs.h
View file @ 44d31f04
......@@ -42,6 +42,8 @@
#include "PHY/CODING/nrPolar_tools/nr_polar_dci_defs.h"
#include "PHY/CODING/nrPolar_tools/nr_polar_uci_defs.h"
#include "PHY/CODING/nrPolar_tools/nr_polar_pbch_defs.h"
#include "PHY/CODING/coding_defs.h"
#include "SIMULATION/TOOLS/sim.h"
#define NR_POLAR_DECODER_LISTSIZE 8 //uint8_t
#define NR_POLAR_DECODER_PATH_METRIC_APPROXIMATION 0 //uint8_t; 0 --> eq. (8a) and (11b), 1 --> eq. (9) and (12)
......@@ -111,6 +113,12 @@ void polar_encoder_dci(uint32_t *in,
t_nrPolar_paramsPtr polarParams,
uint16_t n_RNTI);
void polar_encoder_timing(uint32_t *in,
uint32_t *out,
t_nrPolar_paramsPtr polarParams,
double cpuFreqGHz,
FILE* logFile);
int8_t polar_decoder(double *input,
uint8_t *output,
t_nrPolar_paramsPtr polarParams,
......@@ -124,6 +132,15 @@ int8_t polar_decoder_aPriori(double *input,
uint8_t pathMetricAppr,
double *aPrioriPayload);
int8_t polar_decoder_aPriori_timing(double *input,
uint32_t *output,
t_nrPolar_paramsPtr polarParams,
uint8_t listSize,
uint8_t pathMetricAppr,
double *aPrioriPayload,
double cpuFreqGHz,
FILE* logFile);
void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
int8_t messageType,
uint16_t messageLength,
......
openair1/PHY/CODING/nrPolar_tools/nr_polar_encoder.c
View file @ 44d31f04
......@@ -30,10 +30,15 @@
* \warning
*/
//#define DEBUG_POLAR_ENCODER
//#define DEBUG_POLAR_ENCODER_DCI
//#define DEBUG_POLAR_ENCODER_TIMING
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
//input [a_31 a_30 ... a_0]
//output [f_31 f_30 ... f_0] [f_63 f_62 ... f_32] ...
void polar_encoder(uint32_t *in,
uint32_t *out,
t_nrPolar_paramsPtr polarParams)
......@@ -95,6 +100,10 @@ void polar_encoder(uint32_t *in,
/*
* Return bits.
*/
#ifdef DEBUG_POLAR_ENCODER
for (int i=0; i< polarParams->encoderLength;i++) printf("f[%d]=%d\n", i, polarParams->nr_polar_E[i]);
#endif
nr_byte2bit_uint8_32_t(polarParams->nr_polar_E, polarParams->encoderLength, out);
}
......@@ -187,3 +196,76 @@ void polar_encoder_dci(uint32_t *in,
}
#endif
}
void polar_encoder_timing(uint32_t *in,
uint32_t *out,
t_nrPolar_paramsPtr polarParams,
double cpuFreqGHz,
FILE* logFile)
{
//Initiate timing.
time_stats_t timeEncoderCRCByte, timeEncoderCRCBit, timeEncoderInterleaver, timeEncoderBitInsertion, timeEncoder1, timeEncoder2, timeEncoderRateMatching, timeEncoderByte2Bit;
reset_meas(&timeEncoderCRCByte); reset_meas(&timeEncoderCRCBit); reset_meas(&timeEncoderInterleaver); reset_meas(&timeEncoderBitInsertion); reset_meas(&timeEncoder1); reset_meas(&timeEncoder2); reset_meas(&timeEncoderRateMatching); reset_meas(&timeEncoderByte2Bit);
uint16_t n_RNTI=0x0000;
start_meas(&timeEncoderCRCByte);
nr_crc_bit2bit_uint32_8_t(in, polarParams->payloadBits, polarParams->nr_polar_aPrime); //(a to a')
polarParams->crcBit = crc24c(polarParams->nr_polar_aPrime, (polarParams->payloadBits+polarParams->crcParityBits)); //Parity bits computation (p)
uint8_t arrayInd = ceil(polarParams->payloadBits / 8.0); //(a to b)
for (int i=0; i<arrayInd-1; i++)
for (int j=0; j<8; j++)
polarParams->nr_polar_B[j+(i*8)] = ((polarParams->nr_polar_aPrime[3+i]>>(7-j)) & 1);
for (int i=0; i<((polarParams->payloadBits)%8); i++) polarParams->nr_polar_B[i+(arrayInd-1)*8] = ((polarParams->nr_polar_aPrime[3+(arrayInd-1)]>>(7-i)) & 1);
for (int i=0; i<8; i++) polarParams->nr_polar_B[polarParams->payloadBits+i] = ((polarParams->crcBit)>>(31-i))&1;
for (int i=0; i<16; i++) polarParams->nr_polar_B[polarParams->payloadBits+8+i] = ( (((polarParams->crcBit)>>(23-i))&1) + ((n_RNTI>>(15-i))&1) ) % 2; //Scrambling (b to c)
stop_meas(&timeEncoderCRCByte);
start_meas(&timeEncoderCRCBit);
nr_bit2byte_uint32_8_t(in, polarParams->payloadBits, polarParams->nr_polar_A);
nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(polarParams->nr_polar_A, polarParams->crc_generator_matrix, polarParams->nr_polar_crc, polarParams->payloadBits, polarParams->crcParityBits); //Calculate CRC.
for (uint8_t i = 0; i < polarParams->crcParityBits; i++) polarParams->nr_polar_crc[i] = (polarParams->nr_polar_crc[i] % 2);
for (uint16_t i = 0; i < polarParams->payloadBits; i++) polarParams->nr_polar_B[i] = polarParams->nr_polar_A[i]; //Attach CRC to the Transport Block. (a to b)
for (uint16_t i = polarParams->payloadBits; i < polarParams->K; i++) polarParams->nr_polar_B[i]= polarParams->nr_polar_crc[i-(polarParams->payloadBits)];
stop_meas(&timeEncoderCRCBit);
start_meas(&timeEncoderInterleaver); //Interleaving (c to c')
nr_polar_interleaver(polarParams->nr_polar_B, polarParams->nr_polar_CPrime, polarParams->interleaving_pattern, polarParams->K);
stop_meas(&timeEncoderInterleaver);
start_meas(&timeEncoderBitInsertion); //Bit insertion (c' to u)
nr_polar_bit_insertion(polarParams->nr_polar_CPrime, polarParams->nr_polar_U, polarParams->N, polarParams->K, polarParams->Q_I_N, polarParams->Q_PC_N, polarParams->n_pc);
stop_meas(&timeEncoderBitInsertion);
start_meas(&timeEncoder1); //Encoding (u to d)
nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(polarParams->nr_polar_U, polarParams->G_N, polarParams->nr_polar_D, polarParams->N, polarParams->N);
stop_meas(&timeEncoder1);
start_meas(&timeEncoder2);
for (uint16_t i = 0; i < polarParams->N; i++) polarParams->nr_polar_D[i] = (polarParams->nr_polar_D[i] % 2);
stop_meas(&timeEncoder2);
start_meas(&timeEncoderRateMatching);//Rate matching //Sub-block interleaving (d to y) and Bit selection (y to e)
nr_polar_interleaver(polarParams->nr_polar_D, polarParams->nr_polar_E, polarParams->rate_matching_pattern, polarParams->encoderLength);
stop_meas(&timeEncoderRateMatching);
start_meas(&timeEncoderByte2Bit); //Return bits.
nr_byte2bit_uint8_32_t(polarParams->nr_polar_E, polarParams->encoderLength, out);
stop_meas(&timeEncoderByte2Bit);
fprintf(logFile,",%f,%f,%f,%f,%f,%f,%f,%f\n",
(timeEncoderCRCByte.diff_now/(cpuFreqGHz*1000.0)),
(timeEncoderCRCBit.diff_now/(cpuFreqGHz*1000.0)),
(timeEncoderInterleaver.diff_now/(cpuFreqGHz*1000.0)),
(timeEncoderBitInsertion.diff_now/(cpuFreqGHz*1000.0)),
(timeEncoder1.diff_now/(cpuFreqGHz*1000.0)),
(timeEncoder2.diff_now/(cpuFreqGHz*1000.0)),
(timeEncoderRateMatching.diff_now/(cpuFreqGHz*1000.0)),
(timeEncoderByte2Bit.diff_now/(cpuFreqGHz*1000.0)));
}
openair1/PHY/NR_TRANSPORT/nr_pbch.c
View file @ 44d31f04
......@@ -246,11 +246,11 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
(*xbyte) ^= ((ssb_index>>(3+i))&1)<<(5+i); // resp. 4th, 5th and 6th bits of ssb_index
else
(*xbyte) ^= ((config->sch_config.ssb_subcarrier_offset.value>>5)&1)<<5; //MSB of k_SSB
//#ifdef DEBUG_PBCH_ENCODING
#ifdef DEBUG_PBCH_ENCODING
printf("Extra byte:\n");
for (int i=0; i<4; i++)
printf("pbch_a[%d]: 0x%02x\n", i, pbch->pbch_a[i]);
//#endif
#endif
// Payload interleaving
uint32_t in=0, out=0;
......
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
View file @ 44d31f04
......@@ -4088,13 +4088,13 @@ void nr_dci_decoding_procedure0(int s,
#endif
int reg_p,reg_e;
for (int m=0; m < (L2*6); m++){
reg_p = (((int)floor(m/coreset_time_dur))+((m%coreset_time_dur)*(L2*6/coreset_time_dur)))*9*2;
reg_e = m*9*2;
for (int i=0; i<9*2; i++){
polar_input[reg_p+i] = (pdcch_vars[eNB_id]->e_rx[((CCEind*9*6*2) + reg_e + i)]>0) ? (1.0):(-1.0);
printf("\t m=%d \tpolar_input[%d]=%lf <-> e_rx[%d]=%d\n",m,reg_p+i,polar_input[reg_p+i],
((CCEind*9*6*2) + reg_e + i),pdcch_vars[eNB_id]->e_rx[((CCEind*9*6*2) + reg_e + i)]);
}
reg_p = (((int)floor(m/coreset_time_dur))+((m%coreset_time_dur)*(L2*6/coreset_time_dur)))*9*2;
reg_e = m*9*2;
for (int i=0; i<9*2; i++){
polar_input[reg_p+i] = (pdcch_vars[eNB_id]->e_rx[((CCEind*9*6*2) + reg_e + i)]>0) ? (1.0):(-1.0);
printf("\t m=%d \tpolar_input[%d]=%lf <-> e_rx[%d]=%d\n",m,reg_p+i,polar_input[reg_p+i],
((CCEind*9*6*2) + reg_e + i),pdcch_vars[eNB_id]->e_rx[((CCEind*9*6*2) + reg_e + i)]);
}
}
#ifdef NR_PDCCH_DCI_DEBUG
......@@ -4247,12 +4247,12 @@ void nr_dci_decoding_procedure0(int s,
*dci_cnt = *dci_cnt + 1;
format_found=_format_1_0_found;
} else {
if ((dci_decoded_output[current_thread_id][7]>>(sizeof_bits-1))&1 == 0){
if (dci_decoded_output[current_thread_id][0]&1 == 0){
dci_alloc[*dci_cnt].format = format0_0;
*dci_cnt = *dci_cnt + 1;
format_found=_format_0_0_found;
}
if ((dci_decoded_output[current_thread_id][7]>>(sizeof_bits-1))&1 == 1){
if (dci_decoded_output[current_thread_id][0]&1 == 1){
dci_alloc[*dci_cnt].format = format1_0;
*dci_cnt = *dci_cnt + 1;
format_found=_format_1_0_found;
......@@ -4276,7 +4276,16 @@ void nr_dci_decoding_procedure0(int s,
*dci_cnt = *dci_cnt + 1;
}
if (format_uss == uformat0_1_and_1_1){
// Not implemented yet FIXME
if (dci_decoded_output[current_thread_id][0]&1 == 0){
dci_alloc[*dci_cnt].format = format0_1;
*dci_cnt = *dci_cnt + 1;
format_found=_format_0_1_found;
}
if (dci_decoded_output[current_thread_id][0]&1 == 1){
dci_alloc[*dci_cnt].format = format1_1;
*dci_cnt = *dci_cnt + 1;
format_found=_format_1_1_found;
}
}
// store first nCCE of group for PUCCH transmission of ACK/NAK
pdcch_vars[eNB_id]->nCCE[nr_tti_rx] = CCEind;
......@@ -4816,123 +4825,348 @@ uint16_t dci_CRNTI_decoding_procedure(PHY_VARS_NR_UE *ue,
#ifdef NR_PDCCH_DCI_RUN
uint16_t nr_dci_format_size (crc_scrambled_t crc_scrambled,
uint8_t pusch_alloc_list,
uint16_t nr_dci_format_size (PHY_VARS_NR_UE *ue,
uint16_t eNB_id,
uint8_t nr_tti_rx,
int p,
crc_scrambled_t crc_scrambled,
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS]){
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
uint8_t format){
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size)-> crc_scrambled=%d, pusch_alloc_list=%d, n_RB_ULBWP=%d, n_RB_DLBWP=%d\n",crc_scrambled,pusch_alloc_list,n_RB_ULBWP,n_RB_DLBWP);
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size)-> crc_scrambled=%d, n_RB_ULBWP=%d, n_RB_DLBWP=%d\n",crc_scrambled,n_RB_ULBWP,n_RB_DLBWP);
#endif
/*
* Formats 0_1, not completely implemented. See (*)
* function nr_dci_format_size calculates and returns the size in bits of a determined format
* it also returns an bi-dimensional array 'dci_fields_sizes' with x rows and y columns, where:
* x is the number of fields defined in TS 38.212 subclause 7.3.1 (Each field is mapped in the order in which it appears in the description in the specification)
* y is the number of formats
* e.g.: dci_fields_sizes[10][0] contains the size in bits of the field FREQ_DOM_RESOURCE_ASSIGNMENT_UL for format 0_0
*/
// format {0_0,0_1,1_0,1_1,2_0,2_1,2_2,2_3} according to 38.212 Section 7.3.1
/*
#define NBR_NR_FORMATS 8
#define NBR_NR_DCI_FIELDS 56
#define IDENTIFIER_DCI_FORMATS 0
#define CARRIER_IND 1
#define SUL_IND_0_1 2
#define SLOT_FORMAT_IND 3
#define PRE_EMPTION_IND 4
#define TPC_CMD_NUMBER 5
#define BLOCK_NUMBER 6
#define BANDWIDTH_PART_IND 7
#define SHORT_MESSAGE_IND 8
#define SHORT_MESSAGES 9
#define FREQ_DOM_RESOURCE_ASSIGNMENT_UL 10
#define FREQ_DOM_RESOURCE_ASSIGNMENT_DL 11
#define TIME_DOM_RESOURCE_ASSIGNMENT 12
#define VRB_TO_PRB_MAPPING 13
#define PRB_BUNDLING_SIZE_IND 14
#define RATE_MATCHING_IND 15
#define ZP_CSI_RS_TRIGGER 16
#define FREQ_HOPPING_FLAG 17
#define TB1_MCS 18
#define TB1_NDI 19
#define TB1_RV 20
#define TB2_MCS 21
#define TB2_NDI 22
#define TB2_RV 23
#define MCS 24
#define NDI 25
#define RV 26
#define HARQ_PROCESS_NUMBER 27
#define DAI_ 28
#define FIRST_DAI 29
#define SECOND_DAI 30
#define TB_SCALING 31
#define TPC_PUSCH 32
#define TPC_PUCCH 33
#define PUCCH_RESOURCE_IND 34
#define PDSCH_TO_HARQ_FEEDBACK_TIME_IND 35
//#define SHORT_MESSAGE_IND 33
#define SRS_RESOURCE_IND 36
#define PRECOD_NBR_LAYERS 37
#define ANTENNA_PORTS 38
#define TCI 39
#define SRS_REQUEST 40
#define TPC_CMD_NUMBER_FORMAT2_3 41
#define CSI_REQUEST 42
#define CBGTI 43
#define CBGFI 44
#define PTRS_DMRS 45
#define BETA_OFFSET_IND 46
#define DMRS_SEQ_INI 47
#define UL_SCH_IND 48
#define PADDING_NR_DCI 49
#define SUL_IND_0_0 50
#define RA_PREAMBLE_INDEX 51
#define SUL_IND_1_0 52
#define SS_PBCH_INDEX 53
#define PRACH_MASK_INDEX 54
#define RESERVED_NR_DCI 55
*/
//uint8_t pusch_alloc_list=1;
// number of ZP CSI-RS resource sets in the higher layer parameter [ZP-CSI-RS-ResourceConfigList]
uint8_t n_zp = 1;
uint8_t n_SRS=1;
// pdsch_config contains the PDSCH-Config IE is used to configure the UE specific PDSCH parameters (TS 38.331)
PDSCH_Config_t pdsch_config = ue->PDSCH_Config;
// pusch_config contains the PUSCH-Config IE is used to configure the UE specific PUSCH parameters (TS 38.331)
PUSCH_Config_t pusch_config = ue->pusch_config;
PUCCH_Config_t pucch_config_dedicated = ue->pucch_config_dedicated_nr[eNB_id];
crossCarrierSchedulingConfig_t crossCarrierSchedulingConfig = ue->crossCarrierSchedulingConfig;
dmrs_UplinkConfig_t dmrs_UplinkConfig = ue->dmrs_UplinkConfig;
dmrs_DownlinkConfig_t dmrs_DownlinkConfig = ue->dmrs_DownlinkConfig;
csi_MeasConfig_t csi_MeasConfig = ue->csi_MeasConfig;
PUSCH_ServingCellConfig_t PUSCH_ServingCellConfig= ue->PUSCH_ServingCellConfig;
PDSCH_ServingCellConfig_t PDSCH_ServingCellConfig= ue->PDSCH_ServingCellConfig;
NR_UE_PDCCH *pdcch_vars2 = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id];
// 1 CARRIER_IN
// crossCarrierSchedulingConfig from higher layers, variable crossCarrierSchedulingConfig indicates if 'cross carrier scheduling' is enabled or not:
// if No cross carrier scheduling: number of bits for CARRIER_IND is 0
// if Cross carrier scheduling: number of bits for CARRIER_IND is 3
// The IE CrossCarrierSchedulingConfig is used to specify the configuration when the cross-carrier scheduling is used in a cell
uint8_t crossCarrierSchedulingConfig_ind = 0;
if (crossCarrierSchedulingConfig.schedulingCellInfo.other.cif_InSchedulingCell !=0 ) crossCarrierSchedulingConfig_ind=1;
// 2 SUL_IND_0_1, // 40 SRS_REQUEST, // 50 SUL_IND_0_0
// UL/SUL indicator (TS 38.331, supplementary uplink is indicated in higher layer parameter ServCellAdd-SUL from IE ServingCellConfig and ServingCellConfigCommon):
// 0 bit for UEs not configured with SUL in the cell or UEs configured with SUL in the cell but only PUCCH carrier in the cell is configured for PUSCH transmission
// 1 bit for UEs configured with SUL in the cell as defined in Table 7.3.1.1.1-1
// sul_ind indicates whether SUL is configured in cell or not
uint8_t sul_ind=ue->supplementaryUplink.supplementaryUplink; // this value will be 0 or 1 depending on higher layer parameter ServCellAdd-SUL. FIXME!!!
// 7 BANDWIDTH_PART_IND
// number of UL BWPs configured by higher layers
uint8_t n_UL_BWP_RRC=1; // initialized to 1 but it has to be initialized by higher layers FIXME!!!
(n_UL_BWP_RRC > 3)?n_UL_BWP_RRC:(n_UL_BWP_RRC+1);
// number of DL BWPs configured by higher layers
uint8_t n_DL_BWP_RRC=1; // initialized to 1 but it has to be initialized by higher layers FIXME!!!
(n_DL_BWP_RRC > 3)?n_DL_BWP_RRC:(n_DL_BWP_RRC+1);
// 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL
// if format0_0, only resource allocation type 1 is allowed
// if format0_1, then resource allocation type 0 can be configured and N_RBG is defined in TS 38.214 subclause 6.1.2.2.1
// for PUSCH hopping with resource allocation type 1
// n_UL_hopping = 1 if the higher layer parameter frequencyHoppingOffsetLists contains two offset values
// n_UL_hopping = 2 if the higher layer parameter frequencyHoppingOffsetLists contains four offset values
uint8_t n_UL_hopping=0;
uint8_t n_UL_hopping=pusch_config.n_frequencyHoppingOffsetLists;
if (n_UL_hopping == 2) {
n_UL_hopping = 1;
} else if (n_UL_hopping == 4) {
n_UL_hopping = 2;
} else {
n_UL_hopping = 0;
}
ul_resourceAllocation_t ul_resource_allocation_type = pusch_config.ul_resourceAllocation;
uint8_t ul_res_alloc_type_0 = 0;
uint8_t ul_res_alloc_type_1 = 0;
if (ul_resource_allocation_type == ul_resourceAllocationType0) ul_res_alloc_type_0 = 1;
if (ul_resource_allocation_type == ul_resourceAllocationType1) ul_res_alloc_type_1 = 1;
if (ul_resource_allocation_type == ul_dynamicSwitch) {
ul_res_alloc_type_0 = 1;
ul_res_alloc_type_1 = 1;
}
uint8_t n_bits_freq_dom_res_assign_ul,n_ul_RGB_tmp;
if (ul_res_alloc_type_0 == 1){ // implementation of Table 6.1.2.2.1-1 TC 38.214 subclause 6.1.2.2.1
// config1: PUSCH-Config IE contains rbg-Size ENUMERATED {config1 config2}
ul_rgb_Size_t config = pusch_config.ul_rgbSize;
uint8_t nominal_RBG_P = (config==ul_rgb_config1?2:4);
if (n_RB_ULBWP > 36) nominal_RBG_P = (config==ul_rgb_config1?4:8);
if (n_RB_ULBWP > 72) nominal_RBG_P = (config==ul_rgb_config1?8:16);
if (n_RB_ULBWP > 144) nominal_RBG_P = 16;
n_bits_freq_dom_res_assign_ul = (uint8_t)ceil((n_RB_ULBWP+(0%nominal_RBG_P))/nominal_RBG_P); //FIXME!!! what is 0???
n_ul_RGB_tmp = n_bits_freq_dom_res_assign_ul;
}
if (ul_res_alloc_type_1 == 1) n_bits_freq_dom_res_assign_ul = (uint8_t)(ceil(log2(n_RB_ULBWP*(n_RB_ULBWP+1)/2)))-n_UL_hopping;
if ((ul_res_alloc_type_0 == 1) && (ul_res_alloc_type_1 == 1))
n_bits_freq_dom_res_assign_ul = ((n_bits_freq_dom_res_assign_ul>n_ul_RGB_tmp)?(n_bits_freq_dom_res_assign_ul+1):(n_ul_RGB_tmp+1));
// 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL
// if format1_0, only resource allocation type 1 is allowed
// if format1_1, then resource allocation type 0 can be configured and N_RBG is defined in TS 38.214 subclause 5.1.2.2.1
dl_resourceAllocation_t dl_resource_allocation_type = pdsch_config.dl_resourceAllocation;
uint8_t dl_res_alloc_type_0 = 0;
uint8_t dl_res_alloc_type_1 = 0;
if (dl_resource_allocation_type == dl_resourceAllocationType0) dl_res_alloc_type_0 = 1;
if (dl_resource_allocation_type == dl_resourceAllocationType1) dl_res_alloc_type_1 = 1;
if (dl_resource_allocation_type == dl_dynamicSwitch) {
dl_res_alloc_type_0 = 1;
dl_res_alloc_type_1 = 1;
}
uint8_t n_bits_freq_dom_res_assign_dl,n_dl_RGB_tmp;
if (dl_res_alloc_type_0 == 1){ // implementation of Table 5.1.2.2.1-1 TC 38.214 subclause 6.1.2.2.1
// config1: PDSCH-Config IE contains rbg-Size ENUMERATED {config1, config2}
dl_rgb_Size_t config = pdsch_config.dl_rgbSize;
uint8_t nominal_RBG_P = (config==dl_rgb_config1?2:4);
if (n_RB_DLBWP > 36) nominal_RBG_P = (config==dl_rgb_config1?4:8);
if (n_RB_DLBWP > 72) nominal_RBG_P = (config==dl_rgb_config1?8:16);
if (n_RB_DLBWP > 144) nominal_RBG_P = 16;
n_bits_freq_dom_res_assign_dl = (uint8_t)ceil((n_RB_DLBWP+(0%nominal_RBG_P))/nominal_RBG_P); //FIXME!!! what is 0???
n_dl_RGB_tmp = n_bits_freq_dom_res_assign_dl;
}
if (dl_res_alloc_type_1 == 1) n_bits_freq_dom_res_assign_dl = (uint8_t)(ceil(log2(n_RB_DLBWP*(n_RB_DLBWP+1)/2)));
if ((dl_res_alloc_type_0 == 1) && (dl_res_alloc_type_1 == 1))
n_bits_freq_dom_res_assign_dl = ((n_bits_freq_dom_res_assign_dl>n_dl_RGB_tmp)?(n_bits_freq_dom_res_assign_dl+1):(n_dl_RGB_tmp+1));
// 12 TIME_DOM_RESOURCE_ASSIGNMENT
uint8_t pusch_alloc_list = pusch_config.n_push_alloc_list;
uint8_t pdsch_alloc_list = pdsch_config.n_pdsh_alloc_list;
// 14 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
static_bundleSize_t static_prb_BundlingType = pdsch_config.prbBundleType.staticBundling;
bundleSizeSet1_t dynamic_prb_BundlingType1 = pdsch_config.prbBundleType.dynamicBundlig.bundleSizeSet1;
bundleSizeSet2_t dynamic_prb_BundlingType2 = pdsch_config.prbBundleType.dynamicBundlig.bundleSizeSet2;
uint8_t prb_BundlingType_size=0;
if ((static_prb_BundlingType==st_n4)||(static_prb_BundlingType==st_wideband)) prb_BundlingType_size=0;
if ((dynamic_prb_BundlingType1==dy_1_n4)||(dynamic_prb_BundlingType1==dy_1_wideband)||(dynamic_prb_BundlingType1==dy_1_n2_wideband)||(dynamic_prb_BundlingType1==dy_1_n4_wideband)||
(dynamic_prb_BundlingType2==dy_2_n4)||(dynamic_prb_BundlingType2==dy_2_wideband)) prb_BundlingType_size=1;
// 15 RATE_MATCHING_IND FIXME!!!
// according to TS 38.212: Rate matching indicator – 0, 1, or 2 bits according to higher layer parameter rateMatchPattern
uint8_t rateMatching_bits = pdsch_config.n_rateMatchPatterns;
// 16 ZP_CSI_RS_TRIGGER FIXME!!!
// 0, 1, or 2 bits as defined in Subclause 5.1.4.2 of [6, TS 38.214].
// is the number of ZP CSI-RS resource sets in the higher layer parameter zp-CSI-RS-Resource
uint8_t n_zp_bits = pdsch_config.n_zp_CSI_RS_ResourceId;
// 17 FREQ_HOPPING_FLAG
// freqHopping is defined by higher layer parameter frequencyHopping from IE PUSCH-Config. Values are ENUMERATED{mode1, mode2}
frequencyHopping_t f_hopping = pusch_config.frequencyHopping;
uint8_t freqHopping = 0;
if ((f_hopping==f_hop_mode1)||(f_hopping==f_hop_mode2)) freqHopping = 1;
// 28 DAI
pdsch_HARQ_ACK_Codebook_t pdsch_HARQ_ACK_Codebook = pdsch_config.pdsch_HARQ_ACK_Codebook;
uint8_t n_dai = 0;
uint8_t n_serving_cell_dl = 1; // this is hardcoded to 1 as we need to get this value from RRC higher layers parameters. FIXME!!!
if ((pdsch_HARQ_ACK_Codebook == dynamic) && (n_serving_cell_dl == 1)) n_dai = 2;
if ((pdsch_HARQ_ACK_Codebook == dynamic) && (n_serving_cell_dl > 1)) n_dai = 4;
// 29 FIRST_DAI
uint8_t codebook_HARQ_ACK = 0; // We need to get this value to calculate number of bits of fields 1st DAI and 2nd DAI.
if (pdsch_HARQ_ACK_Codebook == semiStatic) codebook_HARQ_ACK = 1;
if (pdsch_HARQ_ACK_Codebook == dynamic) codebook_HARQ_ACK = 2;
// 30 SECOND_DAI
uint8_t n_HARQ_ACK_sub_codebooks = 0; // We need to get this value to calculate number of bits of fields 1st DAI and 2nd DAI. FIXME!!!
// 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND
uint8_t pdsch_harq_t_ind = (uint8_t)ceil(log2(pucch_config_dedicated.dl_DataToUL_ACK[0]));
// 36 SRS_RESOURCE_IND
// n_SRS is the number of configured SRS resources in the SRS resource set associated with the higher layer parameter usage of value 'codeBook' or 'nonCodeBook'
// from SRS_ResourceSet_t type we should get the information of the usage parameter (with possible values beamManagement, codebook, nonCodebook, antennaSwitching)
// at frame_parms->srs_nr->p_SRS_ResourceSetList[]->usage
uint8_t n_SRS = ue->srs.number_srs_Resource_Set;
// 37 PRECOD_NBR_LAYERS
// 38 ANTENNA_PORTS
txConfig_t txConfig = pusch_config.txConfig;
transformPrecoder_t transformPrecoder = pusch_config.transformPrecoder;
codebookSubset_t codebookSubset = pusch_config.codebookSubset;
uint8_t maxRank = pusch_config.maxRank;
uint8_t num_antenna_ports = 1; // this is hardcoded. We need to get the real value FIXME!!!
uint8_t precond_nbr_layers_bits = 0;
uint8_t antenna_ports_bits_ul = 0;
// searching number of bits at tables 7.3.1.1.2-2/3/4/5 from TS 38.212 subclause 7.3.1.1.2
if (txConfig == txConfig_codebook){
if (num_antenna_ports == 4) {
if ((transformPrecoder == transformPrecoder_disabled) && ((maxRank == 2)||(maxRank == 3)||(maxRank == 4))) { // Table 7.3.1.1.2-2
if (codebookSubset == codebookSubset_fullyAndPartialAndNonCoherent) precond_nbr_layers_bits=6;
if (codebookSubset == codebookSubset_partialAndNonCoherent) precond_nbr_layers_bits=5;
if (codebookSubset == codebookSubset_nonCoherent) precond_nbr_layers_bits=4;
}
if (((transformPrecoder == transformPrecoder_enabled)||(transformPrecoder == transformPrecoder_disabled)) && (maxRank == 1)) { // Table 7.3.1.1.2-3
if (codebookSubset == codebookSubset_fullyAndPartialAndNonCoherent) precond_nbr_layers_bits=5;
if (codebookSubset == codebookSubset_partialAndNonCoherent) precond_nbr_layers_bits=4;
if (codebookSubset == codebookSubset_nonCoherent) precond_nbr_layers_bits=2;
}
}
if (num_antenna_ports == 2) {
if ((transformPrecoder == transformPrecoder_disabled) && (maxRank == 2)) { // Table 7.3.1.1.2-4
if (codebookSubset == codebookSubset_fullyAndPartialAndNonCoherent) precond_nbr_layers_bits=4;
if (codebookSubset == codebookSubset_nonCoherent) precond_nbr_layers_bits=2;
}
if (((transformPrecoder == transformPrecoder_enabled)||(transformPrecoder == transformPrecoder_disabled)) && (maxRank == 1)) { // Table 7.3.1.1.2-5
if (codebookSubset == codebookSubset_fullyAndPartialAndNonCoherent) precond_nbr_layers_bits=3;
if (codebookSubset == codebookSubset_nonCoherent) precond_nbr_layers_bits=1;
}
}
}
if (txConfig == txConfig_nonCodebook){
}
// searching number of bits at tables 7.3.1.1.2-6/7/8/9/10/11/12/13/14/15/16/17/18/19
if((dmrs_UplinkConfig.pusch_dmrs_type == pusch_dmrs_type1)){
if ((transformPrecoder == transformPrecoder_enabled) && (dmrs_UplinkConfig.pusch_maxLength == pusch_len1)) antenna_ports_bits_ul = 2;
if ((transformPrecoder == transformPrecoder_enabled) && (dmrs_UplinkConfig.pusch_maxLength == pusch_len2)) antenna_ports_bits_ul = 4;
if ((transformPrecoder == transformPrecoder_disabled) && (dmrs_UplinkConfig.pusch_maxLength == pusch_len1)) antenna_ports_bits_ul = 3;
if ((transformPrecoder == transformPrecoder_disabled) && (dmrs_UplinkConfig.pusch_maxLength == pusch_len2)) antenna_ports_bits_ul = 4;
}
if((dmrs_UplinkConfig.pusch_dmrs_type == pusch_dmrs_type2)){
if ((transformPrecoder == transformPrecoder_disabled) && (dmrs_UplinkConfig.pusch_maxLength == pusch_len1)) antenna_ports_bits_ul = 4;
if ((transformPrecoder == transformPrecoder_disabled) && (dmrs_UplinkConfig.pusch_maxLength == pusch_len2)) antenna_ports_bits_ul = 5;
}
// for format 1_1 number of bits as defined by Tables 7.3.1.2.2-1/2/3/4
uint8_t antenna_ports_bits_dl = 0;
if((dmrs_DownlinkConfig.pdsch_dmrs_type == pdsch_dmrs_type1) && (dmrs_DownlinkConfig.pdsch_maxLength == pdsch_len1)) antenna_ports_bits_dl = 4; // Table 7.3.1.2.2-1
if((dmrs_DownlinkConfig.pdsch_dmrs_type == pdsch_dmrs_type1) && (dmrs_DownlinkConfig.pdsch_maxLength == pdsch_len2)) antenna_ports_bits_dl = 5; // Table 7.3.1.2.2-2
if((dmrs_DownlinkConfig.pdsch_dmrs_type == pdsch_dmrs_type2) && (dmrs_DownlinkConfig.pdsch_maxLength == pdsch_len1)) antenna_ports_bits_dl = 5; // Table 7.3.1.2.2-3
if((dmrs_DownlinkConfig.pdsch_dmrs_type == pdsch_dmrs_type2) && (dmrs_DownlinkConfig.pdsch_maxLength == pdsch_len2)) antenna_ports_bits_dl = 6; // Table 7.3.1.2.2-4
// 39 TCI
uint8_t tci_bits=0;
if (pdcch_vars2->coreset[p].tciPresentInDCI == tciPresentInDCI_enabled) tci_bits=3;
// 42 CSI_REQUEST
// reportTriggerSize is defined in the CSI-MeasConfig IE (TS 38.331).
// Size of CSI request field in DCI (bits). Corresponds to L1 parameter 'ReportTriggerSize' (see 38.214, section 5.2)
uint8_t reportTriggerSize = csi_MeasConfig.reportTriggerSize; // value from 0..6
// 43 CBGTI
// for format 0_1
uint8_t maxCodeBlockGroupsPerTransportBlock = 0;
if (PUSCH_ServingCellConfig.maxCodeBlockGroupsPerTransportBlock != 0)
maxCodeBlockGroupsPerTransportBlock = (uint8_t)PUSCH_ServingCellConfig.maxCodeBlockGroupsPerTransportBlock;
// for format 1_1, as defined in Subclause 5.1.7 of [6, TS38.214]
uint8_t maxCodeBlockGroupsPerTransportBlock_dl = 0;
if (PDSCH_ServingCellConfig.maxCodeBlockGroupsPerTransportBlock_dl != 0)
maxCodeBlockGroupsPerTransportBlock_dl = pdsch_config.maxNrofCodeWordsScheduledByDCI; // FIXME!!!
// 44 CBGFI
uint8_t cbgfi_bit = PDSCH_ServingCellConfig.codeBlockGroupFlushIndicator;
// 45 PTRS_DMRS
// 0 bit if PTRS-UplinkConfig is not configured and transformPrecoder=disabled, or if transformPrecoder=enabled, or if maxRank=1
// 2 bits otherwise
uint8_t ptrs_dmrs_bits=0; //FIXME!!!
// 46 BETA_OFFSET_IND
// at IE PUSCH-Config, beta_offset indicator – 0 if the higher layer parameter betaOffsets = semiStatic; otherwise 2 bits
// uci-OnPUSCH
// Selection between and configuration of dynamic and semi-static beta-offset. If the field is absent or released, the UE applies the value 'semiStatic' and the BetaOffsets
uint8_t betaOffsets = 0;
if (pusch_config.uci_onPusch.betaOffset_type == betaOffset_semiStatic);
if (pusch_config.uci_onPusch.betaOffset_type == betaOffset_dynamic) betaOffsets = 2;
// 47 DMRS_SEQ_INI
uint8_t dmrs_seq_ini_bits_ul = 0;
uint8_t dmrs_seq_ini_bits_dl = 0;
//1 bit if both scramblingID0 and scramblingID1 are configured in DMRS-UplinkConfig
if ((transformPrecoder == transformPrecoder_disabled) && (dmrs_UplinkConfig.scramblingID0 != 0) && (dmrs_UplinkConfig.scramblingID1 != 0)) dmrs_seq_ini_bits_ul = 1;
//1 bit if both scramblingID0 and scramblingID1 are configured in DMRS-DownlinkConfig
if ((dmrs_DownlinkConfig.scramblingID0 != 0) && (dmrs_DownlinkConfig.scramblingID0 != 0)) dmrs_seq_ini_bits_dl = 1;
/*
* For format 2_2
*
* This format supports power control commands for semi-persistent scheduling.
* As we can already support power control commands dynamically with formats 0_0/0_1 (TPC PUSCH) and 1_0/1_1 (TPC PUCCH)
*
* This format will be implemented in the future FIXME!!!
*
*/
// 5 BLOCK_NUMBER: The parameter tpc-PUSCH or tpc-PUCCH provided by higher layers determines the index to the block number for an UL of a cell
// The following fields are defined for each block: Closed loop indicator and TPC command
// 6 CLOSE_LOOP_IND
// 41 TPC_CMD
uint8_t tpc_cmd_bit_2_2 = 2;
/*
* For format 2_3
*
* This format is used for power control of uplink sounding reference signals for devices which have not coupled SRS power control to the PUSCH power control
* either because independent control is desirable or because the device is configured without PUCCH and PUSCH
*
* This format will be implemented in the future FIXME!!!
*
*/
// 40 SRS_REQUEST
// 41 TPC_CMD
uint8_t tpc_cmd_bit_2_3 = 0;
uint8_t dci_field_size_table [NBR_NR_DCI_FIELDS][NBR_NR_FORMATS] = { // This table contains the number of bits for each field (row) contained in each dci format (column).
// The values of the variables indicate field sizes in number of bits
//Format0_0 Format0_1 Format1_0 Format1_1 Formats2_0/1/2/3
{1, 1, (((crc_scrambled == _p_rnti) || (crc_scrambled == _si_rnti) || (crc_scrambled == _ra_rnti)) ? 0:1),
1, 0,0,0,0}, // 0 IDENTIFIER_DCI_FORMATS:
{0, 3, 0, 3, 0,0,0,0}, // 1 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
{0, 0, 0, 0, 0,0,0,0}, // 2 SUL_IND_0_1:
{0, ((crossCarrierSchedulingConfig_ind == 0) ? 0:3),
0, ((crossCarrierSchedulingConfig_ind == 0) ? 0:3),
0,0,0,0}, // 1 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
{0, (sul_ind == 0)?0:1, 0, 0, 0,0,0,0}, // 2 SUL_IND_0_1:
{0, 0, 0, 0, 1,0,0,0}, // 3 SLOT_FORMAT_IND: size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
{0, 0, 0, 0, 0,1,0,0}, // 4 PRE_EMPTION_IND: size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
{0, 0, 0, 0, 0,0,1,0}, // 5 TPC_CMD_NUMBER: The parameter xxx provided by higher layers determines the index to the TPC command number for an UL of a cell. Each TPC command number is 2 bits
{0, 0, 0, 0, 0,0,0,1}, // 6 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
{0, ceil(log2(n_RB_ULBWP)), 0, ceil(log2(n_RB_ULBWP)), 0,0,0,0}, // 7 BANDWIDTH_PART_IND:
{0, 0, 0, 0, 0,0,0,0}, // 5 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
{0, 0, 0, 0, 0,0,1,0}, // 6 CLOSE_LOOP_IND
{0, (uint8_t)ceil(log2(n_UL_BWP_RRC)),
0, (uint8_t)ceil(log2(n_DL_BWP_RRC)),
0,0,0,0}, // 7 BANDWIDTH_PART_IND:
{0, 0, ((crc_scrambled == _p_rnti) ? 2:0),
0, 0,0,0,0}, // 8 SHORT_MESSAGE_IND 2 bits if crc scrambled with P-RNTI
{0, 0, ((crc_scrambled == _p_rnti) ? 8:0),
0, 0,0,0,0}, // 9 SHORT_MESSAGES 8 bit8 if crc scrambled with P-RNTI
{(ceil(log2(n_RB_ULBWP*(n_RB_ULBWP+1)/2)))-n_UL_hopping,
(ceil(log2(n_RB_ULBWP*(n_RB_ULBWP+1)/2)))-n_UL_hopping,
{(uint8_t)(ceil(log2(n_RB_ULBWP*(n_RB_ULBWP+1)/2)))-n_UL_hopping,
n_bits_freq_dom_res_assign_ul,
0, 0, 0,0,0,0}, // 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
// (NOTE 1) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is larger than the payload size of the DCI format 1_0 monitored in common search space
// the bitwidth of the frequency domain resource allocation field in the DCI format 0_0
// is reduced such that the size of DCI format 0_0 equals to the size of the DCI format 1_0
{0, 0, ceil(log2(n_RB_DLBWP*(n_RB_DLBWP+1)/2)),
ceil(log2(n_RB_DLBWP*(n_RB_DLBWP+1)/2)),
{0, 0, (uint8_t)ceil(log2(n_RB_DLBWP*(n_RB_DLBWP+1)/2)),
n_bits_freq_dom_res_assign_dl,
0,0,0,0}, // 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
{4, log2(pusch_alloc_list), 4, log2(pusch_alloc_list), 0,0,0,0}, // 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
{4, (uint8_t)log2(pusch_alloc_list),
4, (uint8_t)log2(pdsch_alloc_list),
0,0,0,0}, // 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
// where I the number of entries in the higher layer parameter pusch-AllocationList
{0, 1, 1, 1, 0,0,0,0}, // 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
{0, 0, 0, 1, 0,0,0,0}, // 14 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
{0, 0, 0, 2, 0,0,0,0}, // 15 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
{0, 0, 0, log2(n_zp)+1, 0,0,0,0}, // 16 ZP_CSI_RS_TRIGGER:
{1, 1, 0, 0, 0,0,0,0}, // 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
{0, 0, 1, (((dl_res_alloc_type_0==1)&&(dl_res_alloc_type_1==0))?0:1),
0,0,0,0}, // 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
{0, 0, 0, prb_BundlingType_size, 0,0,0,0}, // 14 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
{0, 0, 0, rateMatching_bits, 0,0,0,0}, // 15 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
{0, 0, 0, n_zp_bits, 0,0,0,0}, // 16 ZP_CSI_RS_TRIGGER:
{1, (((ul_res_alloc_type_0==1)&&(ul_res_alloc_type_1==0))||(freqHopping == 0))?0:1,
0, 0, 0,0,0,0}, // 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
{0, 0, 0, 5, 0,0,0,0}, // 18 TB1_MCS:
{0, 0, 0, 1, 0,0,0,0}, // 19 TB1_NDI:
{0, 0, 0, 2, 0,0,0,0}, // 20 TB1_RV:
......@@ -4944,29 +5178,34 @@ uint16_t nr_dci_format_size (crc_scrambled_t crc_scrambled,
{2, 2, (((crc_scrambled == _c_rnti) || (crc_scrambled == _si_rnti)) ? 2:0),
0, 0,0,0,0}, // 26 RV:
{4, 4, (crc_scrambled == _c_rnti)?4:0,4, 0,0,0,0}, // 27 HARQ_PROCESS_NUMBER:
{0, 0, (crc_scrambled == _c_rnti)?2:0,2, 0,0,0,0}, // 28 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
{0, 0, (crc_scrambled == _c_rnti)?2:0,n_dai, 0,0,0,0}, // 28 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
// 2 if one serving cell is configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 bits are the counter DAI
// 0 otherwise
{0, 2, 0, 0, 0,0,0,0}, // 29 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK // 2 bits for dynamic HARQ-ACK codebook with single HARQ-ACK codebook
{0, 2, 0, 0, 0,0,0,0}, // 30 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks // 0 bits otherwise
{0, codebook_HARQ_ACK, 0, 0, 0,0,0,0}, // 29 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK // 2 bits for dynamic HARQ-ACK codebook with single HARQ-ACK codebook
{0, (((codebook_HARQ_ACK == 2) && (n_HARQ_ACK_sub_codebooks==2))?2:0),
0, 0, 0,0,0,0}, // 30 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks // 0 bits otherwise
{0, 0, (((crc_scrambled == _p_rnti) || (crc_scrambled == _ra_rnti)) ? 2:0),
0, 0,0,0,0}, // 31 TB_SCALING
{2, 2, 0, 0, 0,0,0,0}, // 32 TPC_PUSCH:
{0, 0, (crc_scrambled == _c_rnti)?2:0,2, 0,0,0,0}, // 33 TPC_PUCCH:
{0, 0, (crc_scrambled == _c_rnti)?3:0,3, 0,0,0,0}, // 34 PUCCH_RESOURCE_IND:
{0, 0, (crc_scrambled == _c_rnti)?3:0,3, 0,0,0,0}, // 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
{0, log2(n_SRS), 0, 0, 0,0,0,0}, // 36 SRS_RESOURCE_IND:
{0, 0, 0, 0, 0,0,0,0}, // 37 PRECOD_NBR_LAYERS:
{0, 0, 0, 0, 0,0,0,0}, // 38 ANTENNA_PORTS:
{0, 0, 0, 3, 0,0,0,0}, // 39 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
{0, 3, 0, 0, 0,0,0,2}, // 40 SRS_REQUEST:
{0, 0, 0, 0, 0,0,0,2}, // 41 TPC_CMD_NUMBER_FORMAT2_3:
{0, 6, 0, 0, 0,0,0,0}, // 42 CSI_REQUEST:
{0, 8, 0, 8, 0,0,0,0}, // 43 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
{0, 0, 0, 1, 0,0,0,0}, // 44 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
{0, 2, 0, 0, 0,0,0,0}, // 45 PTRS_DMRS:
{0, 2, 0, 0, 0,0,0,0}, // 46 BETA_OFFSET_IND:
{0, 1, 0, 1, 0,0,0,0}, // 47 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding
{0, 0, (crc_scrambled == _c_rnti)?3:0,pdsch_harq_t_ind, 0,0,0,0}, // 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
{0, (uint8_t)log2(n_SRS), 0, 0, 0,0,0,0}, // 36 SRS_RESOURCE_IND:
{0, precond_nbr_layers_bits, 0, 0, 0,0,0,0}, // 37 PRECOD_NBR_LAYERS:
{0, antenna_ports_bits_ul, 0, antenna_ports_bits_dl, 0,0,0,0}, // 38 ANTENNA_PORTS:
{0, 0, 0, tci_bits, 0,0,0,0}, // 39 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
{0, (sul_ind == 0)?2:3, 0, (sul_ind == 0)?2:3, 0,0,0,2}, // 40 SRS_REQUEST:
{0, 0, 0, 0, 0,0,tpc_cmd_bit_2_2,
tpc_cmd_bit_2_3},
// 41 TPC_CMD:
{0, reportTriggerSize, 0, 0, 0,0,0,0}, // 42 CSI_REQUEST:
{0, maxCodeBlockGroupsPerTransportBlock,
0, maxCodeBlockGroupsPerTransportBlock_dl,
0,0,0,0}, // 43 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
{0, 0, 0, cbgfi_bit, 0,0,0,0}, // 44 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
{0, ptrs_dmrs_bits, 0, 0, 0,0,0,0}, // 45 PTRS_DMRS:
{0, betaOffsets, 0, 0, 0,0,0,0}, // 46 BETA_OFFSET_IND:
{0, dmrs_seq_ini_bits_ul, 0, dmrs_seq_ini_bits_dl, 0,0,0,0}, // 47 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding
// is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise
{0, 1, 0, 0, 0,0,0,0}, // 48 UL_SCH_IND: value of "1" indicates UL-SCH shall be transmitted on the PUSCH and a value of "0" indicates UL-SCH shall not be transmitted on the PUSCH
{0, 0, 0, 0, 0,0,0,0}, // 49 PADDING_NR_DCI:
......@@ -4975,7 +5214,7 @@ uint16_t nr_dci_format_size (crc_scrambled_t crc_scrambled,
// is less than the payload size of the DCI format 1_0 monitored in common search space
// zeros shall be appended to the DCI format 0_0
// until the payload size equals that of the DCI format 1_0
{0, 0, 0, 0, 0,0,0,0}, // 50 SUL_IND_0_0:
{(sul_ind == 0)?0:1, 0, 0, 0, 0,0,0,0}, // 50 SUL_IND_0_0:
{0, 0, 0, 0, 0,0,0,0}, // 51 RA_PREAMBLE_INDEX (random access procedure initiated by a PDCCH order not implemented, FIXME!!!)
{0, 0, 0, 0, 0,0,0,0}, // 52 SUL_IND_1_0 (random access procedure initiated by a PDCCH order not implemented, FIXME!!!)
{0, 0, 0, 0, 0,0,0,0}, // 53 SS_PBCH_INDEX (random access procedure initiated by a PDCCH order not implemented, FIXME!!!)
......@@ -5012,9 +5251,17 @@ uint8_t dci_size [8] = {0,0,0,0,0,0,0,0}; // will contain size for each format
printf("\n");
}
printf(" }\n");
printf("\n\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size) dci_size[0]=%d, dci_size[2]=%d\n",dci_size[0],dci_size[2]);
printf("\n\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size) dci_size[0_0]=%d, dci_size[0_1]=%d, dci_size[1_0]=%d, dci_size[1_1]=%d,\n",dci_size[0],dci_size[1],dci_size[2],dci_size[3]);
#endif
//UL/SUL indicator format0_0 (TS 38.212 subclause 7.3.1.1.1)
// - 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding is larger than the number of bits for DCI format 0_0 before padding;
// - 0 bit otherwise.
// The UL/SUL indicator, if present, locates in the last bit position of DCI format 0_0, after the padding bit(s)
if ((dci_field_size_table[SUL_IND_0_0][0] == 1) && (dci_size[0] > dci_size[2])){
dci_field_size_table[SUL_IND_0_0][0] = 0;
dci_size[0]=dci_size[0]-1;
}
// if ((format == format0_0) || (format == format1_0)) {
// According to Section 7.3.1.1.1 in TS 38.212
// If DCI format 0_0 is monitored in common search space and if the number of information bits in the DCI format 0_0 prior to padding
......@@ -5042,6 +5289,19 @@ uint8_t dci_size [8] = {0,0,0,0,0,0,0,0}; // will contain size for each format
#endif
//}
}
/*
* TS 38.212 subclause 7.3.1.1.2
* For a UE configured with SUL in a cell:
* if PUSCH is configured to be transmitted on both the SUL and the non-SUL of the cell and
* if the number of information bits in format 0_1 for the SUL
* is not equal to the number of information bits in format 0_1 for the non-SUL,
* zeros shall be appended to smaller format 0_1 until the payload size equals that of the larger format 0_1
*
* Not implemented. FIXME!!!
*
*/
// }
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size) dci_fields_sizes[][] = { \n");
......@@ -5053,7 +5313,7 @@ uint8_t dci_size [8] = {0,0,0,0,0,0,0,0}; // will contain size for each format
printf(" }\n");
#endif
return dci_size[0];
return dci_size[format];
}
#endif
......@@ -5190,291 +5450,225 @@ uint8_t nr_dci_decoding_procedure(int s,
// for format0_0 => we are NOT implementing format0_0 for common search spaces. FIXME!
// for format0_0 and format1_0, first we calculate dci pdu size
format_0_0_1_0_size_bits = nr_dci_format_size(_c_rnti,16,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes);
format_0_0_1_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_c_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,0);
format_0_0_1_0_size_bytes = (format_0_0_1_0_size_bits%8 == 0) ? (uint8_t)floor(format_0_0_1_0_size_bits/8) : (uint8_t)(floor(format_0_0_1_0_size_bits/8) + 1);
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for common searchSpaces with format css_dci_format=%d, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
css_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
#endif
#if 0
// for aggregation level 4. The number of candidates (L2=4) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
css_dci_format,(1<<2));
#endif
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,nrPolar_params, mi,
crc_scrambled_values, 2,
cformat0_0_and_1_0, uformat0_0_and_1_0,
format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
format_0_0_1_0_size_bits = nr_dci_format_size(crc_scrambled_,16,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes); // after decoding dci successfully we recalculate dci pdu size with correct crc scrambled to get the right field sizes
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
#endif
// for aggregation level 8. The number of candidates (L2=8) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
css_dci_format,(1<<3));
#endif
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,mi,
crc_scrambled_values, 3,
cformat0_0_and_1_0, uformat0_0_and_1_0,
format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_, pdcch_DMRS_scrambling_id,&CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
format_0_0_1_0_size_bits = nr_dci_format_size(crc_scrambled_,16,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes); // after decoding dci successfully we recalculate dci pdu size with correct crc scrambled to get the right field sizes
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
#if 0
// for aggregation level 16. The number of candidates (L2=16) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
css_dci_format,(1<<4));
#endif
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,nrPolar_params, mi,
crc_scrambled_values, 4,
cformat0_0_and_1_0, uformat0_0_and_1_0,
format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
format_0_0_1_0_size_bits = nr_dci_format_size(crc_scrambled_,16,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes); // after decoding dci successfully we recalculate dci pdu size with correct crc scrambled to get the right field sizes
for (int aggregationLevel = 3; aggregationLevel<4 ; aggregationLevel++) { // We fix aggregationLevel to 3 for testing=> nbr of CCE=8
//for (int aggregationLevel = 2; aggregationLevel<5 ; aggregationLevel++) {
// for aggregation level aggregationLevel. The number of candidates (for L2= 2^aggregationLevel) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
css_dci_format,(1<<aggregationLevel));
#endif
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,mi,
crc_scrambled_values, aggregationLevel,
cformat0_0_and_1_0, uformat0_0_and_1_0,
format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_, pdcch_DMRS_scrambling_id,&CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
// we will exit the loop as we have found the DCI
aggregationLevel = 5;
format_0_0_1_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,crc_scrambled_,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,0); // after decoding dci successfully we recalculate dci pdu size with correct crc scrambled to get the right field sizes
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
}
#endif
}
// Type3-PDCCH common search space for a DCI format with CRC scrambled by INT-RNTI, or SFI-RNTI,
// or TPC-PUSCH-RNTI, or TPC-PUCCH-RNTI, or TPC-SRS-RNTI, or C-RNTI, or CS-RNTI(s), or SP-CSI-RNTI
if (css_dci_format == cformat2_0) {
// for format2_0, first we calculate dci pdu size
format_2_0_size_bits = nr_dci_format_size(_sfi_rnti,0,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes);
format_2_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_sfi_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,4);
format_2_0_size_bytes = (format_2_0_size_bits%8 == 0) ? (uint8_t)floor(format_2_0_size_bits/8) : (uint8_t)(floor(format_2_0_size_bits/8) + 1);
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for common searchSpaces with format css_dci_format=%d, format2_0_size_bits=%d, format2_0_size_bytes=%d\n",
css_dci_format,format_2_0_size_bits,format_2_0_size_bytes);
#endif
// for aggregation level 1. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,mi,
crc_scrambled_values, 0,
cformat2_0, uformat0_0_and_1_0,
format_2_0_size_bits, format_2_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
// for aggregation level 2. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,mi,
crc_scrambled_values, 1,
cformat2_0, uformat0_0_and_1_0,
format_2_0_size_bits, format_2_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
// for aggregation level 4. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,nrPolar_params, mi,
crc_scrambled_values, 2,
cformat2_0, uformat0_0_and_1_0,
format_2_0_size_bits, format_2_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
// for aggregation level 8. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,nrPolar_params, mi,
crc_scrambled_values, 3,
cformat2_0, uformat0_0_and_1_0,
format_2_0_size_bits, format_2_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
// for aggregation level 16. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,mi,
crc_scrambled_values, 4,
cformat2_0, uformat0_0_and_1_0,
format_2_0_size_bits, format_2_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
for (int aggregationLevelSFI = 0; aggregationLevelSFI<5 ; aggregationLevelSFI++){
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
css_dci_format,(1<<aggregationLevelSFI));
#endif
// for aggregation level 'aggregationLevelSFI'. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,mi,
crc_scrambled_values, aggregationLevelSFI,
cformat2_0, uformat0_0_and_1_0,
format_2_0_size_bits, format_2_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
// we will exit the loop as we have found the DCI
aggregationLevelSFI = 5;
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
}
}
if (css_dci_format == cformat2_1) {
// for format2_1, first we calculate dci pdu size
format_2_1_size_bits = nr_dci_format_size(_int_rnti,0,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes);
format_2_1_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_int_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,5);
format_2_1_size_bytes = (format_2_1_size_bits%8 == 0) ? (uint8_t)floor(format_2_1_size_bits/8) : (uint8_t)(floor(format_2_1_size_bits/8) + 1);
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for common searchSpaces with format css_dci_format=%d, format2_1_size_bits=%d, format2_1_size_bytes=%d\n",
css_dci_format,format_2_1_size_bits,format_2_1_size_bytes);
#endif
for (int aggregationLevel = 0; aggregationLevel<5 ; aggregationLevel++){
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
css_dci_format,(1<<aggregationLevel));
#endif
// for aggregation level 'aggregationLevelSFI'. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,mi,
crc_scrambled_values, aggregationLevel,
cformat2_1, uformat0_0_and_1_0,
format_2_1_size_bits, format_2_1_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
// we will exit the loop as we have found the DCI
aggregationLevel = 5;
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
}
}
if (css_dci_format == cformat2_2) {
// for format2_2, first we calculate dci pdu size
format_2_2_size_bits = nr_dci_format_size(_tpc_pucch_rnti,0,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes);
format_2_2_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_tpc_pucch_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,6);
format_2_2_size_bytes = (format_2_2_size_bits%8 == 0) ? (uint8_t)floor(format_2_2_size_bits/8) : (uint8_t)(floor(format_2_2_size_bits/8) + 1);
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for common searchSpaces with format css_dci_format=%d, format2_2_size_bits=%d, format2_2_size_bytes=%d\n",
css_dci_format,format_2_2_size_bits,format_2_2_size_bytes);
#endif
for (int aggregationLevel = 0; aggregationLevel<5 ; aggregationLevel++){
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
css_dci_format,(1<<aggregationLevel));
#endif
// for aggregation level 'aggregationLevelSFI'. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,mi,
crc_scrambled_values, aggregationLevel,
cformat2_2, uformat0_0_and_1_0,
format_2_2_size_bits, format_2_2_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
// we will exit the loop as we have found the DCI
aggregationLevel = 5;
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
}
}
if (css_dci_format == cformat2_3) {
// for format2_1, first we calculate dci pdu size
format_2_3_size_bits = nr_dci_format_size(_tpc_srs_rnti,0,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes);
format_2_3_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_tpc_srs_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,7);
format_2_3_size_bytes = (format_2_3_size_bits%8 == 0) ? (uint8_t)floor(format_2_3_size_bits/8) : (uint8_t)(floor(format_2_3_size_bits/8) + 1);
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for common searchSpaces with format css_dci_format=%d, format2_3_size_bits=%d, format2_3_size_bytes=%d\n",
css_dci_format,format_2_3_size_bits,format_2_3_size_bytes);
#endif
for (int aggregationLevel = 0; aggregationLevel<5 ; aggregationLevel++){
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
css_dci_format,(1<<aggregationLevel));
#endif
// for aggregation level 'aggregationLevelSFI'. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,mi,
crc_scrambled_values, aggregationLevel,
cformat2_3, uformat0_0_and_1_0,
format_2_3_size_bits, format_2_3_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
// we will exit the loop as we have found the DCI
aggregationLevel = 5;
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
}
}
} else { // UE-SPECIFIC SearchSpaceType assigned to current SearchSpace/CORESET
// UE-specific search space for a DCI format with CRC scrambled by C-RNTI, or CS-RNTI(s), or SP-CSI-RNTI
if (uss_dci_format == uformat0_0_and_1_0) {
// for format0_0 and format1_0, first we calculate dci pdu size
format_0_0_1_0_size_bits = nr_dci_format_size(_c_rnti,16,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes);
format_0_0_1_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_c_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,0);
format_0_0_1_0_size_bytes = (format_0_0_1_0_size_bits%8 == 0) ? (uint8_t)floor(format_0_0_1_0_size_bits/8) : (uint8_t)(floor(format_0_0_1_0_size_bits/8) + 1);
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for UE-specific searchSpaces with format uss_dci_format=%d, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
css_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
#endif
// blind decoding format0_0 for aggregation level 1. The number of candidates (nrofCandidates) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> ue-Specific searchSpaces with format uss_dci_format=%d and aggregation level 1, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
uss_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
#endif
old_dci_cnt = dci_cnt;
/*
* To be removed, just for unitary testing
*/
//#ifdef NR_PDCCH_DCI_DEBUG
// printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> ### WE PROVOKE DCI DETECTION !!! ### old_dci_cnt=%d and dci_cnt=%d\n",
// old_dci_cnt,dci_cnt);
// dci_cnt++;
//#endif
/*
* To be removed until here
*/
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,nrPolar_params, mi,
crc_scrambled_values, 0,
cformat0_0_and_1_0, uformat0_0_and_1_0,
format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
for (int aggregationLevel = 0; aggregationLevel<5 ; aggregationLevel++) { // We fix aggregationLevel to 3 for testing=> nbr of CCE=8
//for (int aggregationLevel = 2; aggregationLevel<5 ; aggregationLevel++) {
// for aggregation level aggregationLevel. The number of candidates (for L2= 2^aggregationLevel) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
css_dci_format,(1<<aggregationLevel));
#endif
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++){
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
/*
* To be removed, just for unitary testing
*/
//#ifdef NR_PDCCH_DCI_DEBUG
// printf("dci_fields_sizes_cnt(%d,0,1][%d][%d]=(%d,%d,%d)\t\tdci_fields_sizes[%d][%d]=(%d)\n",
// dci_cnt-1,i,j,dci_fields_sizes_cnt[dci_cnt-1][i][j],dci_fields_sizes_cnt[0][i][j],dci_fields_sizes_cnt[1][i][j],i,j,dci_fields_sizes[i][j]);
//#endif
/*
* To be removed until here
*/
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,nrPolar_params, mi,
crc_scrambled_values, aggregationLevel,
cformat0_0_and_1_0, uformat0_0_and_1_0,
format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
// we will exit the loop as we have found the DCI
aggregationLevel = 5;
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
}
}
// blind decoding format0_0 for aggregation level 2. The number of candidates (nrofCandidates) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> ue-Specific searchSpaces with format uss_dci_format=%d and aggregation level 2, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
uss_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
#endif
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,nrPolar_params, mi,
crc_scrambled_values, 1,
cformat0_0_and_1_0, uformat0_0_and_1_0,
format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
// blind decoding format0_0 for aggregation level 4. The number of candidates (nrofCandidates) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> ue-Specific searchSpaces with format uss_dci_format=%d and aggregation level 4, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
uss_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
#endif
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,nrPolar_params, mi,
crc_scrambled_values, 2,
cformat0_0_and_1_0, uformat0_0_and_1_0,
format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
// blind decoding format0_0 for aggregation level 8. The number of candidates (nrofCandidates) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> ue-Specific searchSpaces with format uss_dci_format=%d and aggregation level 8, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
uss_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
#endif
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,mi,
crc_scrambled_values, 3,
cformat0_0_and_1_0, uformat0_0_and_1_0,
format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
// blind decoding format0_0 for aggregation level 16. The number of candidates (nrofCandidates) will be calculated in function nr_dci_decoding_procedure0
if (uss_dci_format == uformat0_1_and_1_1) {
// for format0_0 and format1_0, first we calculate dci pdu size
format_0_1_1_1_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_c_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,1);
format_0_1_1_1_size_bytes = (format_0_1_1_1_size_bits%8 == 0) ? (uint8_t)floor(format_0_1_1_1_size_bits/8) : (uint8_t)(floor(format_0_1_1_1_size_bits/8) + 1);
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> ue-Specific searchSpaces with format uss_dci_format=%d and aggregation level 16, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
uss_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for UE-specific searchSpaces with format uss_dci_format=%d, format_0_1_1_1_size_bits=%d, format_0_1_1_1_size_bytes=%d\n",
css_dci_format,format_0_1_1_1_size_bits,format_0_1_1_1_size_bytes);
#endif
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,mi,
crc_scrambled_values, 4,
cformat0_0_and_1_0, uformat0_0_and_1_0,
format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
for (int aggregationLevel = 0; aggregationLevel<5 ; aggregationLevel++) { // We fix aggregationLevel to 3 for testing=> nbr of CCE=8
//for (int aggregationLevel = 2; aggregationLevel<5 ; aggregationLevel++) {
// for aggregation level aggregationLevel. The number of candidates (for L2= 2^aggregationLevel) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
css_dci_format,(1<<aggregationLevel));
#endif
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,nrPolar_params, mi,
crc_scrambled_values, aggregationLevel,
cformat0_0_and_1_0, uformat0_1_and_1_1,
format_0_1_1_1_size_bits, format_0_1_1_1_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
// we will exit the loop as we have found the DCI
aggregationLevel = 5;
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
}
}
}
*crc_scrambled = crc_scrambled_;
......@@ -5509,7 +5703,7 @@ uint8_t nr_dci_decoding_procedure(int s,
// blind decoding format1_1 for aggregation level 8. The number of candidates (nrofCandidates) will be calculated in function nr_dci_decoding_procedure0
// blind decoding format1_1 for aggregation level 16. The number of candidates (nrofCandidates) will be calculated in function nr_dci_decoding_procedure0
}*/
}
//}
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> at the end dci_cnt=%d \n",dci_cnt);
#endif
......
openair1/PHY/NR_UE_TRANSPORT/dci_nr.h
View file @ 44d31f04
......@@ -49,8 +49,8 @@ struct NR_DCI_INFO_EXTRACTED {
uint8_t sul_ind_0_1 ; // 2 SUL_IND_0_1:
uint8_t slot_format_ind ; // 3 SLOT_FORMAT_IND: size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
uint8_t pre_emption_ind ; // 4 PRE_EMPTION_IND: size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
uint8_t tpc_cmd_number ; // 5 TPC_CMD_NUMBER: The parameter xxx provided by higher layers determines the index to the TPC command number for an UL of a cell. Each TPC command number is 2 bits
uint8_t block_number ; // 6 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
uint8_t block_number ; // 5 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
uint8_t close_loop_ind ; // 6 CLOSE_LOOP_IND:
uint8_t bandwidth_part_ind ; // 7 BANDWIDTH_PART_IND:
uint8_t short_message_ind ; // 8 SHORT_MESSAGE_IND:
uint8_t short_messages ; // 9 SHORT_MESSAGES:
......@@ -93,7 +93,7 @@ struct NR_DCI_INFO_EXTRACTED {
uint8_t antenna_ports ; // 38 ANTENNA_PORTS:
uint8_t tci ; // 39 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
uint8_t srs_request ; // 40 SRS_REQUEST:
uint8_t tpc_cmd_number_format2_3 ; // 41 TPC_CMD_NUMBER_FORMAT2_3:
uint8_t tpc_cmd ; // 41 TPC_CMD:
uint8_t csi_request ; // 42 CSI_REQUEST:
uint8_t cbgti ; // 43 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
uint8_t cbgfi ; // 44 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
......
openair1/PHY/NR_UE_TRANSPORT/dci_tools_nr.c
View file @ 44d31f04
......@@ -4024,8 +4024,10 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
* then we will do a right-shit of dci_length-13 positions -> (1 1010 1000 1001). And this is the content of the freq_dom_resource_assignment_DL field
*
*
* At the moment we have implemented:
* At the moment we have implemented the following formats:
*
* Format 0_0, that contains the following fields according to Specification 38.212 V15.1.1 Section 7.3.1
* with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI
* 0 IDENTIFIER_DCI_FORMATS:
* 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
* 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
......@@ -4038,30 +4040,141 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
* 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space
* 50 SUL_IND_0_0:
*
* Format 0_1, that contains the following fields
* with CRC scrambled by C-RNTI or CS-RNTI or SP-CSI-RNTI or new-RNTI
* 0 IDENTIFIER_DCI_FORMATS:
* 1 CARRIER_IND
* 2 SUL_IND_0_1
* 7 BANDWIDTH_PART_IND
* 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
* 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
* 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
* 24 MCS:
* 25 NDI:
* 26 RV:
* 27 HARQ_PROCESS_NUMBER:
* 29 FIRST_DAI
* 30 SECOND_DAI
* 32 TPC_PUSCH:
* 36 SRS_RESOURCE_IND:
* 37 PRECOD_NBR_LAYERS:
* 38 ANTENNA_PORTS:
* 40 SRS_REQUEST:
* 42 CSI_REQUEST:
* 43 CBGTI
* 45 PTRS_DMRS
* 46 BETA_OFFSET_IND
* 47 DMRS_SEQ_INI
* 48 UL_SCH_IND
* 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space
*
* Format 1_0, that contains the following fields
* with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI
* 0 IDENTIFIER_DCI_FORMATS:
* 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
* 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
* 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
* 24 MCS:
* 25 NDI:
* 26 RV:
* 27 HARQ_PROCESS_NUMBER:
* 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
* 33 TPC_PUCCH:
* 34 PUCCH_RESOURCE_IND:
* 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
* 55 RESERVED_NR_DCI
*
* If the CRC of the DCI format 1_0 is scrambled by C-RNTI and the "Frequency domain resource assignment" field are of all ones,
* the DCI format 1_0 is for random access procedure initiated by a PDCCH order.
* This is not implemented, but the fields are already included: FIXME!!!
*
* with CRC scrambled by P-RNTI
* 8 SHORT_MESSAGE_IND
* 9 SHORT_MESSAGES
* 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
* 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
* 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
* 24 MCS:
* 31 TB_SCALING
* 55 RESERVED_NR_DCI
*
* with CRC scrambled by SI-RNTI
* 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
* 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
* 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
* 24 MCS:
* 26 RV:
* 55 RESERVED_NR_DCI
*
* with CRC scrambled by RA-RNTI
* 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
* 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
* 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
* 24 MCS:
* 31 TB_SCALING
* 55 RESERVED_NR_DCI
*
* with CRC scrambled by TC-RNTI
* 0 IDENTIFIER_DCI_FORMATS:
* 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
* 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
* 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
* 24 MCS:
* 25 NDI:
* 26 RV:
* 27 HARQ_PROCESS_NUMBER:
* 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
* 31 TB_SCALING
* 33 TPC_PUCCH:
*
* Format 1_1, that contains the following fields
* with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI
* 0 IDENTIFIER_DCI_FORMATS:
* 1 CARRIER_IND:
* 7 BANDWIDTH_PART_IND:
* 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
* 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
* 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
* 14 PRB_BUNDLING_SIZE_IND:
* 15 RATE_MATCHING_IND:
* 16 ZP_CSI_RS_TRIGGER:
* 18 TB1_MCS:
* 19 TB1_NDI:
* 20 TB1_RV:
* 21 TB2_MCS:
* 22 TB2_NDI:
* 23 TB2_RV:
* 27 HARQ_PROCESS_NUMBER:
* 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
* 33 TPC_PUCCH:
* 34 PUCCH_RESOURCE_IND:
* 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
* 51 RA_PREAMBLE_INDEX:
* 52 SUL_IND_1_0:
* 53 SS_PBCH_INDEX:
* 54 PRACH_MASK_INDEX:
* 55 RESERVED_NR_DCI
* 38 ANTENNA_PORTS:
* 39 TCI:
* 40 SRS_REQUEST:
* 43 CBGTI:
* 44 CBGFI:
* 47 DMRS_SEQ_INI:
*
* We have not implemented the following formats:
*
* Format 2_0
* Used for notifying the slot format
*
* Format 2_1
* Used for notifying the PRB(s) and OFDM symbol(s) where UE may assume no transmission is intended for the UE
*
* Format 2_2
* This format supports power control commands for semi-persistent scheduling.
* As we can already support power control commands dynamically with formats 0_0/0_1 (TPC PUSCH) and 1_0/1_1 (TPC PUCCH)
* This format will be implemented in the future FIXME!!!
*
* Format 2_3
* This format is used for power control of uplink sounding reference signals for devices which have not coupled SRS power control to the PUSCH power control
* either because independent control is desirable or because the device is configured without PUCCH and PUSCH
* This format will be implemented in the future FIXME!!!
*
*/
uint8_t dci_fields_sizes_format[NBR_NR_DCI_FIELDS] ={0};
uint8_t dci_fields_sizes_format[NBR_NR_DCI_FIELDS] = {0};
for (int m=0; m<NBR_NR_DCI_FIELDS; m++) dci_fields_sizes_format[m]=dci_fields_sizes[m][dci_format];
......@@ -4081,7 +4194,7 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
#endif
uint8_t prev_ndi = pdlsch0_harq->DCINdi;
uint16_t l_RB;
/*uint16_t l_RB;
uint16_t start_RB;
uint16_t tmp_RIV;
uint16_t l_symbol;
......@@ -4202,7 +4315,7 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
{j, 8,4}, // row index 14
{j+3,0,8}, // row index 15
{j+3,0,10} // row index 16
};
};*/
/*
......@@ -4292,20 +4405,20 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->pre_emption_ind=%x\n",nr_pdci_info_extracted->pre_emption_ind);
#endif
break;
case TPC_CMD_NUMBER: // 5 TPC_CMD_NUMBER: (field defined for -,-,-,-,-,-,format2_2,-)
// The parameter xxx provided by higher layers determines the index to the TPC command number for an UL of a cell. Each TPC command number is 2 bits
nr_pdci_info_extracted->tpc_cmd_number = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
case BLOCK_NUMBER: // 5 BLOCK_NUMBER: (field defined for -,-,-,-,-,-,-,format2_3)
// starting position of a block is determined by the parameter startingBitOfFormat2_3
nr_pdci_info_extracted->block_number = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tpc_cmd_number=%x\n",nr_pdci_info_extracted->tpc_cmd_number);
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->block_number=%x\n",nr_pdci_info_extracted->block_number);
#endif
break;
case BLOCK_NUMBER: // 6 BLOCK_NUMBER: (field defined for -,-,-,-,-,-,-,format2_3)
// starting position of a block is determined by the parameter startingBitOfFormat2_3
nr_pdci_info_extracted->block_number = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
case CLOSE_LOOP_IND: // 6 CLOSE_LOOP_IND: (field defined for -,-,-,-,-,-,format2_2,-)
// The parameter xxx provided by higher layers determines the index to the TPC command number for an UL of a cell. Each TPC command number is 2 bits
nr_pdci_info_extracted->close_loop_ind = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->block_number=%x\n",nr_pdci_info_extracted->block_number);
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->close_loop_ind=%x\n",nr_pdci_info_extracted->close_loop_ind);
#endif
break;
case BANDWIDTH_PART_IND: // 7 BANDWIDTH_PART_IND: (field defined for -,format0_1,-,format1_1,-,-,-,-)
......@@ -4338,7 +4451,7 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
// The UE shall assume that when the scheduling PDCCH is received with DCI format 0_0, then uplink resource allocation type 1 is used.
nr_pdci_info_extracted->freq_dom_resource_assignment_UL = (uint16_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
if (dci_format == format0_1){ // uplink resource allocation type 0 or 1 can be used
/*if (dci_format == format0_1){ // uplink resource allocation type 0 or 1 can be used
}
if (dci_format == format0_0){ // only uplink resource allocation type 1
// At the moment we are supporting only format 1_0 (and not format 1_1), so we only support resource allocation type 1 (and not type 0).
......@@ -4356,10 +4469,10 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
}
ulsch0->harq_processes[nr_pdci_info_extracted->harq_process_number]->first_rb = start_RB;
ulsch0->harq_processes[nr_pdci_info_extracted->harq_process_number]->nb_rb = l_RB;
}
}*/
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->freq_dom_resource_assignment_UL=%x\n",nr_pdci_info_extracted->freq_dom_resource_assignment_UL);
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> l_RB=%d, start_RB=%d, n_RB_DLBWP=%d\n",l_RB,start_RB,n_RB_ULBWP);
//printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> l_RB=%d, start_RB=%d, n_RB_DLBWP=%d\n",l_RB,start_RB,n_RB_ULBWP);
#endif
break;
......@@ -4368,7 +4481,7 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
// The UE shall assume that when the scheduling grant is received with DCI format 1_0, then downlink resource allocation type 1 is used.
nr_pdci_info_extracted->freq_dom_resource_assignment_DL = (uint16_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
if (dci_format == format1_1){ // uplink resource allocation type 0 or 1 can be used
/*if (dci_format == format1_1){ // uplink resource allocation type 0 or 1 can be used
}
if (dci_format == format1_0){ // only uplink resource allocation type 1
// At the moment we are supporting only format 0_0 (and not format 0_1), so we only support resource allocation type 1 (and not type 0).
......@@ -4388,10 +4501,10 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
pdlsch0->current_harq_pid = nr_pdci_info_extracted->harq_process_number;
pdlsch0->active = 1;
pdlsch0->rnti = rnti;
}
}*/
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->freq_dom_resource_assignment_DL=%x, RIV = %d\n",nr_pdci_info_extracted->freq_dom_resource_assignment_DL,nr_pdci_info_extracted->freq_dom_resource_assignment_DL);
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> l_RB=%d, start_RB=%d, n_RB_DLBWP=%d\n",l_RB,start_RB,n_RB_DLBWP);
//printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> l_RB=%d, start_RB=%d, n_RB_DLBWP=%d\n",l_RB,start_RB,n_RB_DLBWP);
/*
* According to TC 38.212 Subclause 7.3.1.2.1 (V15.2.0) (not implemented FIXME!!!)
* If the CRC of the DCI format 1_0 is scrambled by C-RNTI
......@@ -4443,7 +4556,7 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
// where I the number of entries in the higher layer parameter pusch-AllocationList
nr_pdci_info_extracted->time_dom_resource_assignment = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
if (dci_format == format0_0 || dci_format == format0_1){ // Subclause 6.1.2.1 of [6, TS 38.214]
/*if (dci_format == format0_0 || dci_format == format0_1){ // Subclause 6.1.2.1 of [6, TS 38.214]
k_offset = table_6_1_2_1_1_2_time_dom_res_alloc_A[nr_pdci_info_extracted->time_dom_resource_assignment][0];
sliv_S = table_6_1_2_1_1_2_time_dom_res_alloc_A[nr_pdci_info_extracted->time_dom_resource_assignment][1];
sliv_L = table_6_1_2_1_1_2_time_dom_res_alloc_A[nr_pdci_info_extracted->time_dom_resource_assignment][2];
......@@ -4467,7 +4580,7 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
// k_offset = table_5_1_2_1_1_5_time_dom_res_alloc_C[nr_pdci_info_extracted->time_dom_resource_assignment][0];
// sliv_S = table_5_1_2_1_1_5_time_dom_res_alloc_C[nr_pdci_info_extracted->time_dom_resource_assignment][1];
// sliv_L = table_5_1_2_1_1_5_time_dom_res_alloc_C[nr_pdci_info_extracted->time_dom_resource_assignment][2];
}
}*/
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->time_dom_resource_assignment=%x\n",nr_pdci_info_extracted->time_dom_resource_assignment);
#endif
......@@ -4788,11 +4901,11 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->srs_request=%x\n",nr_pdci_info_extracted->srs_request);
#endif
break;
case TPC_CMD_NUMBER_FORMAT2_3: // 41 TPC_CMD_NUMBER_FORMAT2_3: (field defined for -,-,-,-,-,-,-,format2_3)
nr_pdci_info_extracted->tpc_cmd_number_format2_3 = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
case TPC_CMD: // 41 TPC_CMD: (field defined for -,-,-,-,-,-,-,format2_3)
nr_pdci_info_extracted->tpc_cmd = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tpc_cmd_number_format2_3=%x\n",nr_pdci_info_extracted->tpc_cmd_number_format2_3);
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tpc_cmd=%x\n",nr_pdci_info_extracted->tpc_cmd);
#endif
break;
case CSI_REQUEST: // 42 CSI_REQUEST: (field defined for -,format0_1,-,-,-,-,-,-)
......
openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
View file @ 44d31f04
......@@ -145,6 +145,10 @@ typedef struct {
// int calibration_flag;
/// Number of soft channel bits
uint32_t G;
// number of symbols
uint8_t nb_symbols;
// first symbol in the slot
uint8_t start_symbol;
// decode phich
uint8_t decode_phich;
......
openair1/PHY/defs_nr_UE.h
View file @ 44d31f04
......@@ -624,8 +624,8 @@ typedef struct {
#define SUL_IND_0_1 2
#define SLOT_FORMAT_IND 3
#define PRE_EMPTION_IND 4
#define TPC_CMD_NUMBER 5
#define BLOCK_NUMBER 6
#define BLOCK_NUMBER 5
#define CLOSE_LOOP_IND 6
#define BANDWIDTH_PART_IND 7
#define SHORT_MESSAGE_IND 8
#define SHORT_MESSAGES 9
......@@ -660,7 +660,7 @@ typedef struct {
#define ANTENNA_PORTS 38
#define TCI 39
#define SRS_REQUEST 40
#define TPC_CMD_NUMBER_FORMAT2_3 41
#define TPC_CMD 41
#define CSI_REQUEST 42
#define CBGTI 43
#define CBGFI 44
......@@ -732,7 +732,7 @@ typedef struct {
} NR_UE_CORESET_CCE_REG_MAPPING_t;
typedef enum {allContiguousRBs=0,sameAsREGbundle=1} NR_UE_CORESET_precoder_granularity_t;
typedef enum {tciPresentInDCI_enabled = 1} tciPresentInDCI_t;
typedef struct {
/*
* define CORESET structure according to 38.331
......@@ -771,7 +771,7 @@ typedef struct {
NR_UE_CORESET_CCE_REG_MAPPING_t cce_reg_mappingType;
NR_UE_CORESET_precoder_granularity_t precoderGranularity;
int tciStatesPDCCH;
int tciPresentInDCI;
tciPresentInDCI_t tciPresentInDCI;
uint16_t pdcchDMRSScramblingID;
uint16_t rb_offset;
} NR_UE_PDCCH_CORESET;
......@@ -1214,6 +1214,14 @@ typedef struct {
PUCCH_Config_t pucch_config_dedicated_nr[NUMBER_OF_CONNECTED_eNB_MAX];
PUSCH_Config_t pusch_config;
SRS_NR srs;
crossCarrierSchedulingConfig_t crossCarrierSchedulingConfig;
supplementaryUplink_t supplementaryUplink;
dmrs_UplinkConfig_t dmrs_UplinkConfig;
dmrs_DownlinkConfig_t dmrs_DownlinkConfig;
csi_MeasConfig_t csi_MeasConfig;
PUSCH_ServingCellConfig_t PUSCH_ServingCellConfig;
#endif
......
openair1/PHY/impl_defs_nr.h
View file @ 44d31f04
......@@ -372,12 +372,104 @@ typedef struct {
/* FFS TODO_NR partial structure that should be complete */
typedef enum {
semiStatic = 0,
dynamic = 1
} pdsch_HARQ_ACK_Codebook_t;
////////////////////////////////////////////////////////////////////////////////################################
#define MAX_NR_RATE_MATCH_PATTERNS 4
#define MAX_NR_ZP_CSI_RS_RESOURCES 32
typedef enum{
dl_resourceAllocationType0 = 1,
dl_resourceAllocationType1 = 2,
dl_dynamicSwitch = 3
} dl_resourceAllocation_t;
typedef enum{
dl_rgb_config1 = 1,
dl_rgb_config2 = 2
} dl_rgb_Size_t;
typedef enum {
st_n4 = 1,
st_wideband = 2
} static_bundleSize_t;
typedef enum {
dy_1_n4 = 1,
dy_1_wideband = 2,
dy_1_n2_wideband = 3,
dy_1_n4_wideband = 4
} bundleSizeSet1_t;
typedef enum {
dy_2_n4 = 1,
dy_2_wideband = 2,
} bundleSizeSet2_t;
typedef struct{
bundleSizeSet1_t bundleSizeSet1;
bundleSizeSet2_t bundleSizeSet2;
} dynamic_bundleSize_t;
typedef struct {
static_bundleSize_t staticBundling;
dynamic_bundleSize_t dynamicBundlig;
} prb_bundleType_t;
typedef enum {
nb_code_n1 = 1,
nb_code_n2 = 2
} maxNrofCodeWordsScheduledByDCI_t;
typedef struct{
// to be defined FIXME!!!
}rateMatchPattern_t;
typedef struct{
// to be defined FIXME!!!
}zp_CSI_RS_Resource_t;
typedef struct {
/*
* resourceAllocation
*/
dl_resourceAllocation_t dl_resourceAllocation;
/*
* corresponds to I, where I the number of entries in the higher layer parameter pdsch-AllocationList
*/
uint8_t n_pdsh_alloc_list;
/*
* rateMatchPatternToAddModList
*/
rateMatchPattern_t rateMatchPatternToAddModList[MAX_NR_RATE_MATCH_PATTERNS];
/*
* rateMatchPatternToReleaseList
*/
uint8_t rateMatchPatternToReleaseList[MAX_NR_RATE_MATCH_PATTERNS];
/*
* n_rateMatchPatterns indicates the number of rateMatchPatterns defined currently
*/
uint8_t n_rateMatchPatterns;
/*
* zp-CSI-RS-ResourceToAddModList
*/
zp_CSI_RS_Resource_t zp_CSI_RS_Resource[MAX_NR_ZP_CSI_RS_RESOURCES];
/*
* zp-CSI-RS-ResourceToReleaseList
*/
uint8_t zp_CSI_RS_ResourceId[MAX_NR_ZP_CSI_RS_RESOURCES];
/*
* n_zp-CSI-RS-Resource
*/
uint8_t n_zp_CSI_RS_ResourceId;
/*
* rgb_Size
*/
dl_rgb_Size_t dl_rgbSize;
/*
* prb-BundlingType
*/
prb_bundleType_t prbBundleType;
/*
* pdsch-HARQ-ACK-Codebook: this is part of the IE PhysicalCellGroupConfig which is used to configure cell-group specific L1 parameters (TS 38.331)
*/
pdsch_HARQ_ACK_Codebook_t pdsch_HARQ_ACK_Codebook;
////////////////////////////////////////////////////////////////////////////////################################
/*
Maximum number of code words that a single DCI may schedule. This changes the number of MCS/RV/NDI bits in the DCI message from 1 to 2.
*/
......@@ -415,8 +507,168 @@ typedef struct {
mappingType_t mappingType;
uint8_t startSymbolAndLength;
} PUSCH_TimeDomainResourceAllocation_t;
////////////////////////////////////////////////////////////////////////////////################################
typedef struct { // The IE PTRS-UplinkConfig is used to configure uplink Phase-Tracking-Reference-Signals (PTRS)
} ptrs_UplinkConfig_t;
typedef enum{
maxCodeBlockGroupsPerTransportBlock_n2 = 2,
maxCodeBlockGroupsPerTransportBlock_n4 = 4,
maxCodeBlockGroupsPerTransportBlock_n6 = 6,
maxCodeBlockGroupsPerTransportBlock_n8 = 8
} maxCodeBlockGroupsPerTransportBlock_t;
typedef struct{ // The IE PUSCH-ServingCellConfig is used to configure UE specific PUSCH parameters that are common across the UE's BWPs of one serving cell
maxCodeBlockGroupsPerTransportBlock_t maxCodeBlockGroupsPerTransportBlock;
} PUSCH_ServingCellConfig_t;
typedef struct{ // CSI-MeasConfig IE is used to configure CSI-RS (reference signals)
uint8_t reportTriggerSize;
} csi_MeasConfig_t;
typedef enum {
pdsch_dmrs_type1 = 1,
pdsch_dmrs_type2 = 2
} pdsch_dmrs_type_t;
typedef enum {
pusch_dmrs_type1 = 1,
pusch_dmrs_type2 = 2
} pusch_dmrs_type_t;
typedef enum {
pdsch_dmrs_pos0 = 0,
pdsch_dmrs_pos1 = 1,
pdsch_dmrs_pos3 = 3,
} pdsch_dmrs_AdditionalPosition_t;
typedef enum {
pusch_dmrs_pos0 = 0,
pusch_dmrs_pos1 = 1,
pusch_dmrs_pos3 = 3,
} pusch_dmrs_AdditionalPosition_t;
typedef enum {
pdsch_len1 = 1,
pdsch_len2 = 2
} pdsch_maxLength_t;
typedef enum {
pusch_len1 = 1,
pusch_len2 = 2
} pusch_maxLength_t;
typedef struct { // The IE DMRS-DownlinkConfig is used to configure downlink demodulation reference signals for PDSCH
pdsch_dmrs_type_t pdsch_dmrs_type;
pdsch_dmrs_AdditionalPosition_t pdsch_dmrs_AdditionalPosition;
pdsch_maxLength_t pdsch_maxLength;
uint16_t scramblingID0;
uint16_t scramblingID1;
} dmrs_DownlinkConfig_t;
typedef struct { // The IE DMRS-UplinkConfig is used to configure uplink demodulation reference signals for PUSCH
pusch_dmrs_type_t pusch_dmrs_type;
pusch_dmrs_AdditionalPosition_t pusch_dmrs_AdditionalPosition;
pusch_maxLength_t pusch_maxLength;
uint16_t scramblingID0;
uint16_t scramblingID1;
} dmrs_UplinkConfig_t;
typedef struct {
/*
* Serving cell ID of a PSCell. The PCell of the Master Cell Group uses ID = 0
*/
uint8_t servCellIndex;
}servCellIndex_t;
typedef struct{
uint8_t cif_presence;
}own_t;
typedef struct{
servCellIndex_t scheduling_cell_id;
uint8_t cif_InSchedulingCell;
}other_t;
typedef struct{
own_t own;
other_t other;
}schedulingCellInfo_t;
typedef struct{
schedulingCellInfo_t schedulingCellInfo;
} crossCarrierSchedulingConfig_t;
typedef struct{
// this variable will be filled with '1' if SUL is supported and '0' if SUL is not supported
uint8_t supplementaryUplink;
}supplementaryUplink_t;
typedef enum {
txConfig_codebook = 1,
txConfig_nonCodebook = 2
} txConfig_t;
typedef enum {
f_hop_mode1 = 1,
f_hop_mode2 = 2
} frequencyHopping_t;
typedef enum{
ul_resourceAllocationType0 = 1,
ul_resourceAllocationType1 = 2,
ul_dynamicSwitch = 3
} ul_resourceAllocation_t;
typedef enum{
ul_rgb_config1 = 1,
ul_rgb_config2 = 2
} ul_rgb_Size_t;
typedef enum {
transformPrecoder_enabled = 1,
transformPrecoder_disabled = 2
} transformPrecoder_t;
typedef enum {
codebookSubset_fullyAndPartialAndNonCoherent = 1,
codebookSubset_partialAndNonCoherent = 2,
codebookSubset_nonCoherent = 3
} codebookSubset_t;
typedef enum{
betaOffset_dynamic = 1,
betaOffset_semiStatic = 2
}betaOffset_type_t;
typedef struct{
} betaOffset_t;
typedef struct {
betaOffset_type_t betaOffset_type;
betaOffset_t betaOffset;
} uci_onPusch_t;
typedef struct {
/*
* txConfig
*/
txConfig_t txConfig;
/*
* frequencyHopping
*/
frequencyHopping_t frequencyHopping;
/*
* frequencyHoppingOffsetLists
*/
uint16_t frequencyHoppingOffsetLists[4];
// n_frequencyHoppingOffsetLists contains the number of offsets listed. We can list up to 4 offsets
uint8_t n_frequencyHoppingOffsetLists;
/*
* resourceAllocation
*/
ul_resourceAllocation_t ul_resourceAllocation;
/*
* rgb_Size
*/
ul_rgb_Size_t ul_rgbSize;
/*
* corresponds to I, where I the number of entries in the higher layer parameter pusch-AllocationList
*/
uint8_t n_push_alloc_list;
/*
* transformPrecoder
*/
transformPrecoder_t transformPrecoder;
/*
* codebookSubset
*/
codebookSubset_t codebookSubset;
/*
* maxRank
*/
uint8_t maxRank;
/*
* uci_onPusch
*/
uci_onPusch_t uci_onPusch;
////////////////////////////////////////////////////////////////////////////////################################
PUSCH_PowerControl_t pusch_PowerControl;
PUSCH_TimeDomainResourceAllocation_t *pusch_TimeDomainResourceAllocation[MAX_NR_OF_UL_ALLOCATIONS];
} PUSCH_Config_t;
......@@ -649,11 +901,6 @@ typedef struct {
typedef uint16_t RNTI_value_t;
typedef enum {
semiStatic = 0,
dynamic = 1
} pdsch_HARQ_ACK_Codebook_t;
typedef struct {
/*
-- Enables spatial bundling of HARQ ACKs. It is configured per cell group (i.e. for all the cells within the cell group) for PUCCH
......@@ -750,6 +997,12 @@ typedef enum {
n12_dl_harq = 12,
n16_dl_harq = 16
} nrofHARQ_ProcessesForPDSCH_t;
typedef enum{
maxCodeBlockGroupsPerTransportBlock_dl_n2 = 2,
maxCodeBlockGroupsPerTransportBlock_dl_n4 = 4,
maxCodeBlockGroupsPerTransportBlock_dl_n6 = 6,
maxCodeBlockGroupsPerTransportBlock_dl_n8 = 8
} maxCodeBlockGroupsPerTransportBlock_dl_t;
typedef struct {
/*
......@@ -772,7 +1025,14 @@ typedef struct {
-- If the field is absent, the UE sends the HARQ feedback on the PUCCH of the SpCell of this cell group.
*/
uint8_t pucch_Cell;
/*
* maxCodeBlockGroupsPerTransportBlock_dl_t
*/
maxCodeBlockGroupsPerTransportBlock_dl_t maxCodeBlockGroupsPerTransportBlock_dl;
/*
* codeBlockGroupFlushIndicator (boolean)
*/
uint8_t codeBlockGroupFlushIndicator;
} PDSCH_ServingCellConfig_t;
/***********************************************************************
......
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
View file @ 44d31f04
......@@ -49,6 +49,8 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
if(scheduled_response != NULL){
NR_UE_PDCCH *pdcch_vars2 = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[0][0];
NR_UE_DLSCH_t *dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[0][0];
NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[0];
if(scheduled_response->dl_config != NULL){
fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config;
......@@ -86,16 +88,47 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
//pdcch_vars2->coreset[i].tciStatesPDCCH;
//pdcch_vars2->coreset[i].tciPresentInDCI;
pdcch_vars2->coreset[i].pdcchDMRSScramblingID = dci_config->coreset.pdcch_dmrs_scrambling_id;
}else{ //FAPI_NR_DL_CONFIG_TYPE_DLSCH
// dlsch config pdu
}
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15;
uint8_t current_harq_pid = dlsch_config_pdu->harq_process_nbr;
dlsch0->current_harq_pid = current_harq_pid;
dlsch0->active = 1;
dlsch0->harq_processes[current_harq_pid]->nb_rb = dlsch_config_pdu->number_rbs;
dlsch0->harq_processes[current_harq_pid]->start_rb = dlsch_config_pdu->start_rb;
dlsch0->harq_processes[current_harq_pid]->nb_symbols = dlsch_config_pdu->number_symbols;
dlsch0->harq_processes[current_harq_pid]->start_symbol = dlsch_config_pdu->start_symbol;
dlsch0->harq_processes[current_harq_pid]->mcs = dlsch_config_pdu->mcs;
dlsch0->harq_processes[current_harq_pid]->DCINdi = dlsch_config_pdu->ndi;
dlsch0->harq_processes[current_harq_pid]->rvidx = dlsch_config_pdu->rv;
dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
dlsch0->harq_processes[current_harq_pid]->harq_ack.pucch_resource_indicator = dlsch_config_pdu->pucch_resource_id;
dlsch0->harq_processes[current_harq_pid]->harq_ack.slot_for_feedback_ack = dlsch_config_pdu->pdsch_to_harq_feedback_time_ind;
//pdlsch0->rnti = rnti;
}
}
}else{
pdcch_vars2->nb_search_space = 0;
}
if(scheduled_response->ul_config != NULL){
fapi_nr_ul_config_request_t *ul_config = scheduled_response->ul_config;
for(i=0; i<ul_config->number_pdus; ++i){
if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_PUSCH){
// pusch config pdu
fapi_nr_ul_config_pusch_pdu_rel15_t *pusch_config_pdu = &ul_config->ul_config_list[i].ulsch_config_pdu.ulsch_pdu_rel15;
uint8_t current_harq_pid = pusch_config_pdu->harq_process_nbr;
ulsch0->harq_processes[current_harq_pid]->nb_rb = pusch_config_pdu->number_rbs;
ulsch0->harq_processes[current_harq_pid]->first_rb = pusch_config_pdu->start_rb;
ulsch0->harq_processes[current_harq_pid]->nb_symbols = pusch_config_pdu->number_symbols;
ulsch0->harq_processes[current_harq_pid]->start_symbol = pusch_config_pdu->start_symbol;
ulsch0->harq_processes[current_harq_pid]->mcs = pusch_config_pdu->mcs;
ulsch0->harq_processes[current_harq_pid]->DCINdi = pusch_config_pdu->ndi;
ulsch0->harq_processes[current_harq_pid]->rvidx = pusch_config_pdu->rv;
ulsch0->f_pusch = pusch_config_pdu->absolute_delta_PUSCH;
}
}
}else{
}
......
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @ 44d31f04
......@@ -538,6 +538,233 @@ NR_UE_L2_STATE_t nr_ue_scheduler(
return CONNECTION_OK;
}
//////////////
/*
* This code contains all the functions needed to process all dci fields.
* These functions are going to be called by function nr_ue_process_dci
*/
int8_t nr_ue_process_dci_freq_dom_resource_assignment(
fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu,
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
uint16_t riv
){
uint16_t l_RB;
uint16_t start_RB;
uint16_t tmp_RIV;
/*
* TS 38.214 subclause 5.1.2.2 Resource allocation in frequency domain (downlink)
* when the scheduling grant is received with DCI format 1_0, then downlink resource allocation type 1 is used
*/
if(dlsch_config_pdu != NULL){
/*
* TS 38.214 subclause 5.1.2.2.1 Downlink resource allocation type 0
*/
/*
* TS 38.214 subclause 5.1.2.2.2 Downlink resource allocation type 1
*/
// For resource allocation type 1, the resource allocation field consists of a resource indication value (RIV):
// RIV = n_RB_DLBWP * (l_RB - 1) + start_RB if (l_RB - 1) <= floor (n_RB_DLBWP/2)
// RIV = n_RB_DLBWP * (n_RB_DLBWP - l_RB + 1) + (n_RB_DLBWP - 1 - start_RB) if (l_RB - 1) > floor (n_RB_DLBWP/2)
// the following two expressions apply only if (l_RB - 1) <= floor (n_RB_DLBWP/2)
l_RB = floor(riv/n_RB_DLBWP) + 1;
start_RB = riv%n_RB_DLBWP;
// if (l_RB - 1) > floor (n_RB_DLBWP/2) we need to recalculate them using the following lines
tmp_RIV = n_RB_DLBWP * (l_RB - 1) + start_RB;
if (tmp_RIV != riv) { // then (l_RB - 1) > floor (n_RB_DLBWP/2) and we need to recalculate l_RB and start_RB
l_RB = n_RB_DLBWP - l_RB + 2;
start_RB = n_RB_DLBWP - start_RB - 1;
}
dlsch_config_pdu->number_rbs = l_RB;
dlsch_config_pdu->start_rb = start_RB;
}
if(ulsch_config_pdu != NULL){
/*
* TS 38.214 subclause 6.1.2.2 Resource allocation in frequency domain (uplink)
*/
/*
* TS 38.214 subclause 6.1.2.2.1 Uplink resource allocation type 0
*/
/*
* TS 38.214 subclause 6.1.2.2.2 Uplink resource allocation type 1
*/
// For resource allocation type 1, the resource allocation field consists of a resource indication value (RIV):
// RIV = n_RB_ULBWP * (l_RB - 1) + start_RB if (l_RB - 1) <= floor (n_RB_ULBWP/2)
// RIV = n_RB_ULBWP * (n_RB_ULBWP - l_RB + 1) + (n_RB_ULBWP - 1 - start_RB) if (l_RB - 1) > floor (n_RB_ULBWP/2)
// the following two expressions apply only if (l_RB - 1) <= floor (n_RB_ULBWP/2)
l_RB = floor(riv/n_RB_ULBWP) + 1;
start_RB = riv%n_RB_ULBWP;
// if (l_RB - 1) > floor (n_RB_ULBWP/2) we need to recalculate them using the following lines
tmp_RIV = n_RB_ULBWP * (l_RB - 1) + start_RB;
if (tmp_RIV != riv) { // then (l_RB - 1) > floor (n_RB_ULBWP/2) and we need to recalculate l_RB and start_RB
l_RB = n_RB_ULBWP - l_RB + 2;
start_RB = n_RB_ULBWP - start_RB - 1;
}
ulsch_config_pdu->number_rbs = l_RB;
ulsch_config_pdu->start_rb = start_RB;
}
return 0;
}
int8_t nr_ue_process_dci_time_dom_resource_assignment(
fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu,
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
uint8_t time_domain_ind,
long dmrs_typeA_pos
){
uint8_t k_offset;
uint8_t sliv_S;
uint8_t sliv_L;
uint8_t table_5_1_2_1_1_2_time_dom_res_alloc_A[16][3]={ // for PDSCH from TS 38.214 subclause 5.1.2.1.1
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?12:11}, // row index 1
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?10:9}, // row index 2
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?9:8}, // row index 3
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?7:6}, // row index 4
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?5:4}, // row index 5
{0,(dmrs_typeA_pos == 2)?9:10,(dmrs_typeA_pos == 2)?4:4}, // row index 6
{0,(dmrs_typeA_pos == 2)?4:6, (dmrs_typeA_pos == 2)?4:4}, // row index 7
{0,5,7}, // row index 8
{0,5,2}, // row index 9
{0,9,2}, // row index 10
{0,12,2}, // row index 11
{0,1,13}, // row index 12
{0,1,6}, // row index 13
{0,2,4}, // row index 14
{0,4,7}, // row index 15
{0,8,4} // row index 16
};
uint8_t table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP[16][3]={ // for PDSCH from TS 38.214 subclause 5.1.2.1.1
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?6:5}, // row index 1
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?10:9}, // row index 2
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?9:8}, // row index 3
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?7:6}, // row index 4
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?5:4}, // row index 5
{0,(dmrs_typeA_pos == 2)?6:8, (dmrs_typeA_pos == 2)?4:2}, // row index 6
{0,(dmrs_typeA_pos == 2)?4:6, (dmrs_typeA_pos == 2)?4:4}, // row index 7
{0,5,6}, // row index 8
{0,5,2}, // row index 9
{0,9,2}, // row index 10
{0,10,2}, // row index 11
{0,1,11}, // row index 12
{0,1,6}, // row index 13
{0,2,4}, // row index 14
{0,4,6}, // row index 15
{0,8,4} // row index 16
};
uint8_t table_5_1_2_1_1_4_time_dom_res_alloc_B[16][3]={ // for PDSCH from TS 38.214 subclause 5.1.2.1.1
{0,2,2}, // row index 1
{0,4,2}, // row index 2
{0,6,2}, // row index 3
{0,8,2}, // row index 4
{0,10,2}, // row index 5
{1,2,2}, // row index 6
{1,4,2}, // row index 7
{0,2,4}, // row index 8
{0,4,4}, // row index 9
{0,6,4}, // row index 10
{0,8,4}, // row index 11
{0,10,4}, // row index 12
{0,2,7}, // row index 13
{0,(dmrs_typeA_pos == 2)?2:3,(dmrs_typeA_pos == 2)?12:11}, // row index 14
{1,2,4}, // row index 15
{0,0,0} // row index 16
};
uint8_t table_5_1_2_1_1_5_time_dom_res_alloc_C[16][3]={ // for PDSCH from TS 38.214 subclause 5.1.2.1.1
{0,2,2}, // row index 1
{0,4,2}, // row index 2
{0,6,2}, // row index 3
{0,8,2}, // row index 4
{0,10,2}, // row index 5
{0,0,0}, // row index 6
{0,0,0}, // row index 7
{0,2,4}, // row index 8
{0,4,4}, // row index 9
{0,6,4}, // row index 10
{0,8,4}, // row index 11
{0,10,4}, // row index 12
{0,2,7}, // row index 13
{0,(dmrs_typeA_pos == 2)?2:3,(dmrs_typeA_pos == 2)?12:11}, // row index 14
{0,0,6}, // row index 15
{0,2,6} // row index 16
};
uint8_t mu_pusch = 1;
// definition table j Table 6.1.2.1.1-4
uint8_t j = (mu_pusch==3)?3:(mu_pusch==2)?2:1;
uint8_t table_6_1_2_1_1_2_time_dom_res_alloc_A[16][3]={ // for PUSCH from TS 38.214 subclause 6.1.2.1.1
{j, 0,14}, // row index 1
{j, 0,12}, // row index 2
{j, 0,10}, // row index 3
{j, 2,10}, // row index 4
{j, 4,10}, // row index 5
{j, 4,8}, // row index 6
{j, 4,6}, // row index 7
{j+1,0,14}, // row index 8
{j+1,0,12}, // row index 9
{j+1,0,10}, // row index 10
{j+2,0,14}, // row index 11
{j+2,0,12}, // row index 12
{j+2,0,10}, // row index 13
{j, 8,6}, // row index 14
{j+3,0,14}, // row index 15
{j+3,0,10} // row index 16
};
uint8_t table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[16][3]={ // for PUSCH from TS 38.214 subclause 6.1.2.1.1
{j, 0,8}, // row index 1
{j, 0,12}, // row index 2
{j, 0,10}, // row index 3
{j, 2,10}, // row index 4
{j, 4,4}, // row index 5
{j, 4,8}, // row index 6
{j, 4,6}, // row index 7
{j+1,0,8}, // row index 8
{j+1,0,12}, // row index 9
{j+1,0,10}, // row index 10
{j+2,0,6}, // row index 11
{j+2,0,12}, // row index 12
{j+2,0,10}, // row index 13
{j, 8,4}, // row index 14
{j+3,0,8}, // row index 15
{j+3,0,10} // row index 16
};
/*
* TS 38.214 subclause 5.1.2.1 Resource allocation in time domain (downlink)
*/
if(dlsch_config_pdu != NULL){
k_offset = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][0];
sliv_S = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][1];
sliv_L = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][2];
// k_offset = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][0];
// sliv_S = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][1];
// sliv_L = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][2];
// k_offset = table_5_1_2_1_1_4_time_dom_res_alloc_B[nr_pdci_info_extracted->time_dom_resource_assignment][0];
// sliv_S = table_5_1_2_1_1_4_time_dom_res_alloc_B[nr_pdci_info_extracted->time_dom_resource_assignment][1];
// sliv_L = table_5_1_2_1_1_4_time_dom_res_alloc_B[nr_pdci_info_extracted->time_dom_resource_assignment][2];
// k_offset = table_5_1_2_1_1_5_time_dom_res_alloc_C[nr_pdci_info_extracted->time_dom_resource_assignment][0];
// sliv_S = table_5_1_2_1_1_5_time_dom_res_alloc_C[nr_pdci_info_extracted->time_dom_resource_assignment][1];
// sliv_L = table_5_1_2_1_1_5_time_dom_res_alloc_C[nr_pdci_info_extracted->time_dom_resource_assignment][2];
dlsch_config_pdu->number_symbols = sliv_L;
dlsch_config_pdu->start_symbol = sliv_S;
} /*
* TS 38.214 subclause 6.1.2.1 Resource allocation in time domain (uplink)
*/
if(ulsch_config_pdu != NULL){
k_offset = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][0];
sliv_S = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][1];
sliv_L = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][2];
// k_offset = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][0];
// sliv_S = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][1];
// sliv_L = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][2];
ulsch_config_pdu->number_symbols = sliv_L;
ulsch_config_pdu->start_symbol = sliv_S;
}
return 0;
}
//////////////
int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_format){
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
......@@ -546,50 +773,63 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fa
const uint16_t n_RB_ULBWP = 106;
const uint16_t n_RB_DLBWP = 106;
uint32_t k_offset;
uint32_t sliv_S;
uint32_t sliv_L;
uint32_t l_RB;
uint32_t start_RB;
uint32_t tmp_RIV;
switch(dci_format){
case format0_0:
/* TIME_DOM_RESOURCE_ASSIGNMENT */
// 0, 1, 2, 3, or 4 bits as defined in:
// Subclause 6.1.2.1 of [6, TS 38.214] for formats format0_0,format0_1
// Subclause 5.1.2.1 of [6, TS 38.214] for formats format1_0,format1_1
// The bitwidth for this field is determined as log2(I) bits,
// where I the number of entries in the higher layer parameter pusch-AllocationList
k_offset = table_6_1_2_1_1_2_time_dom_res_alloc_A[dci->time_dom_resource_assignment][0];
sliv_S = table_6_1_2_1_1_2_time_dom_res_alloc_A[dci->time_dom_resource_assignment][1];
sliv_L = table_6_1_2_1_1_2_time_dom_res_alloc_A[dci->time_dom_resource_assignment][2];
/*
* with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI
* 0 IDENTIFIER_DCI_FORMATS:
* 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
* 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
* 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
* 24 MCS:
* 25 NDI:
* 26 RV:
* 27 HARQ_PROCESS_NUMBER:
* 32 TPC_PUSCH:
* 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space
* 50 SUL_IND_0_0:
*/
ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_PUSCH;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.rnti = rnti;
fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu_0_0 = &ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15;
/* IDENTIFIER_DCI_FORMATS */
/* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */
// At the moment we are supporting only format 1_0 (and not format 1_1), so we only support resource allocation type 1 (and not type 0).
// For resource allocation type 1, the resource allocation field consists of a resource indication value (RIV):
// RIV = n_RB_ULBWP * (l_RB - 1) + start_RB if (l_RB - 1) <= floor (n_RB_ULBWP/2)
// RIV = n_RB_ULBWP * (n_RB_ULBWP - l_RB + 1) + (n_RB_ULBWP - 1 - start_RB) if (l_RB - 1) > floor (n_RB_ULBWP/2)
// the following two expressions apply only if (l_RB - 1) <= floor (n_RB_ULBWP/2)
l_RB = floor(dci->freq_dom_resource_assignment_DL/n_RB_ULBWP) + 1;
start_RB = dci->freq_dom_resource_assignment_DL%n_RB_ULBWP;
// if (l_RB - 1) > floor (n_RB_ULBWP/2) we need to recalculate them using the following lines
tmp_RIV = n_RB_ULBWP * (l_RB - 1) + start_RB;
if (tmp_RIV != dci->freq_dom_resource_assignment_DL) { // then (l_RB - 1) > floor (n_RB_ULBWP/2) and we need to recalculate l_RB and start_RB
l_RB = n_RB_ULBWP - l_RB + 2;
start_RB = n_RB_ULBWP - start_RB - 1;
nr_ue_process_dci_freq_dom_resource_assignment(&ulsch_config_pdu_0_0,NULL,n_RB_ULBWP,0,dci->freq_dom_resource_assignment_UL);
/* TIME_DOM_RESOURCE_ASSIGNMENT */
nr_ue_process_dci_time_dom_resource_assignment(&ulsch_config_pdu_0_0,NULL,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position);
/* FREQ_HOPPING_FLAG */
if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.resource_allocation != 0) &&
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.frequency_hopping !=0))
ulsch_config_pdu_0_0->pusch_freq_hopping = (dci->freq_hopping_flag == 0)? pusch_freq_hopping_disabled:pusch_freq_hopping_enabled;
/* MCS */
ulsch_config_pdu_0_0->mcs = dci->mcs;
/* NDI */
ulsch_config_pdu_0_0->ndi = dci->ndi;
/* RV */
ulsch_config_pdu_0_0->rv = dci->rv;
/* HARQ_PROCESS_NUMBER */
ulsch_config_pdu_0_0->harq_process_nbr = dci->harq_process_number;
/* TPC_PUSCH */
// according to TS 38.213 Table Table 7.1.1-1
if (dci->tpc_pusch == 0) {
ulsch_config_pdu_0_0->accumulated_delta_PUSCH = -1;
ulsch_config_pdu_0_0->absolute_delta_PUSCH = -4;
}
if (dci->tpc_pusch == 1) {
ulsch_config_pdu_0_0->accumulated_delta_PUSCH = 0;
ulsch_config_pdu_0_0->absolute_delta_PUSCH = -1;
}
if (dci->tpc_pusch == 2) {
ulsch_config_pdu_0_0->accumulated_delta_PUSCH = 1;
ulsch_config_pdu_0_0->absolute_delta_PUSCH = 1;
}
if (dci->tpc_pusch == 3) {
ulsch_config_pdu_0_0->accumulated_delta_PUSCH = 3;
ulsch_config_pdu_0_0->absolute_delta_PUSCH = 4;
}
/* SUL_IND_0_0 */ // To be implemented, FIXME!!!
// UL_CONFIG_REQ
ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_PUSCH;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.rnti = rnti;
fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15;
ulsch_config_pdu->number_rbs = l_RB;
ulsch_config_pdu->start_rb = start_RB;
ulsch_config_pdu->number_symbols = sliv_L;
ulsch_config_pdu->start_symbol = sliv_S;
ulsch_config_pdu->mcs = dci->mcs;
//ulsch0->harq_processes[dci->harq_process_number]->first_rb = start_RB;
//ulsch0->harq_processes[dci->harq_process_number]->nb_rb = l_RB;
//ulsch0->harq_processes[dci->harq_process_number]->mcs = dci->mcs;
......@@ -597,48 +837,170 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fa
break;
case format0_1:
break;
case format1_0:
/*
* with CRC scrambled by C-RNTI or CS-RNTI or SP-CSI-RNTI or new-RNTI
* 0 IDENTIFIER_DCI_FORMATS:
* 1 CARRIER_IND
* 2 SUL_IND_0_1
* 7 BANDWIDTH_PART_IND
* 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
* 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
* 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
* 24 MCS:
* 25 NDI:
* 26 RV:
* 27 HARQ_PROCESS_NUMBER:
* 29 FIRST_DAI
* 30 SECOND_DAI
* 32 TPC_PUSCH:
* 36 SRS_RESOURCE_IND:
* 37 PRECOD_NBR_LAYERS:
* 38 ANTENNA_PORTS:
* 40 SRS_REQUEST:
* 42 CSI_REQUEST:
* 43 CBGTI
* 45 PTRS_DMRS
* 46 BETA_OFFSET_IND
* 47 DMRS_SEQ_INI
* 48 UL_SCH_IND
* 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space
*/
ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_PUSCH;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.rnti = rnti;
fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu_0_1 = &ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15;
/* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */
nr_ue_process_dci_freq_dom_resource_assignment(&ulsch_config_pdu_0_1,NULL,n_RB_ULBWP,0,dci->freq_dom_resource_assignment_UL);
/* TIME_DOM_RESOURCE_ASSIGNMENT */
// Subclause 5.1.2.1 of [6, TS 38.214]
// the Time domain resource assignment field of the DCI provides a row index of a higher layer configured table pdsch-symbolAllocation
// FIXME! To clarify which parameters to update after reception of row index
k_offset = table_5_1_2_1_1_2_time_dom_res_alloc_A[dci->time_dom_resource_assignment][0];
sliv_S = table_5_1_2_1_1_2_time_dom_res_alloc_A[dci->time_dom_resource_assignment][1];
sliv_L = table_5_1_2_1_1_2_time_dom_res_alloc_A[dci->time_dom_resource_assignment][2];
/* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */
// only uplink resource allocation type 1
// At the moment we are supporting only format 0_0 (and not format 0_1), so we only support resource allocation type 1 (and not type 0).
// For resource allocation type 1, the resource allocation field consists of a resource indication value (RIV):
// RIV = n_RB_DLBWP * (l_RB - 1) + start_RB if (l_RB - 1) <= floor (n_RB_DLBWP/2)
// RIV = n_RB_DLBWP * (n_RB_DLBWP - l_RB + 1) + (n_RB_DLBWP - 1 - start_RB) if (l_RB - 1) > floor (n_RB_DLBWP/2)
// the following two expressions apply only if (l_RB - 1) <= floor (n_RB_DLBWP/2)
l_RB = floor(dci->freq_dom_resource_assignment_DL/n_RB_DLBWP) + 1;
start_RB = dci->freq_dom_resource_assignment_DL%n_RB_DLBWP;
// if (l_RB - 1) > floor (n_RB_DLBWP/2) we need to recalculate them using the following lines
tmp_RIV = n_RB_DLBWP * (l_RB - 1) + start_RB;
if (tmp_RIV != dci->freq_dom_resource_assignment_DL) { // then (l_RB - 1) > floor (n_RB_DLBWP/2) and we need to recalculate l_RB and start_RB
l_RB = n_RB_DLBWP - l_RB + 2;
start_RB = n_RB_DLBWP - start_RB - 1;
nr_ue_process_dci_time_dom_resource_assignment(&ulsch_config_pdu_0_1,NULL,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position);
/* FREQ_HOPPING_FLAG */
if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.resource_allocation != 0) &&
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.frequency_hopping !=0))
ulsch_config_pdu_0_1->pusch_freq_hopping = (dci->freq_hopping_flag == 0)? pusch_freq_hopping_disabled:pusch_freq_hopping_enabled;
/* MCS */
ulsch_config_pdu_0_1->mcs = dci->mcs;
/* NDI */
ulsch_config_pdu_0_1->ndi = dci->ndi;
/* RV */
ulsch_config_pdu_0_1->rv = dci->rv;
/* HARQ_PROCESS_NUMBER */
ulsch_config_pdu_0_1->harq_process_nbr = dci->harq_process_number;
/* FIRST_DAI */ //To be implemented, FIXME!!!
/* SECOND_DAI */ //To be implemented, FIXME!!!
/* TPC_PUSCH */
// according to TS 38.213 Table Table 7.1.1-1
if (dci->tpc_pusch == 0) {
ulsch_config_pdu_0_0->accumulated_delta_PUSCH = -1;
ulsch_config_pdu_0_0->absolute_delta_PUSCH = -4;
}
if (dci->tpc_pusch == 1) {
ulsch_config_pdu_0_0->accumulated_delta_PUSCH = 0;
ulsch_config_pdu_0_0->absolute_delta_PUSCH = -1;
}
if (dci->tpc_pusch == 2) {
ulsch_config_pdu_0_0->accumulated_delta_PUSCH = 1;
ulsch_config_pdu_0_0->absolute_delta_PUSCH = 1;
}
if (dci->tpc_pusch == 3) {
ulsch_config_pdu_0_0->accumulated_delta_PUSCH = 3;
ulsch_config_pdu_0_0->absolute_delta_PUSCH = 4;
}
break;
// DL_CONFIG_REQ
case format1_0:
/*
* with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI
* 0 IDENTIFIER_DCI_FORMATS:
* 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
* 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
* 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
* 24 MCS:
* 25 NDI:
* 26 RV:
* 27 HARQ_PROCESS_NUMBER:
* 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
* 33 TPC_PUCCH:
* 34 PUCCH_RESOURCE_IND:
* 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
* 55 RESERVED_NR_DCI
* with CRC scrambled by P-RNTI
* 8 SHORT_MESSAGE_IND
* 9 SHORT_MESSAGES
* 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
* 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
* 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
* 24 MCS:
* 31 TB_SCALING
* 55 RESERVED_NR_DCI
* with CRC scrambled by SI-RNTI
* 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
* 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
* 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
* 24 MCS:
* 26 RV:
* 55 RESERVED_NR_DCI
* with CRC scrambled by RA-RNTI
* 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
* 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
* 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
* 24 MCS:
* 31 TB_SCALING
* 55 RESERVED_NR_DCI
* with CRC scrambled by TC-RNTI
* 0 IDENTIFIER_DCI_FORMATS:
* 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
* 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
* 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
* 24 MCS:
* 25 NDI:
* 26 RV:
* 27 HARQ_PROCESS_NUMBER:
* 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
* 33 TPC_PUCCH:
*/
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti;
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
dlsch_config_pdu->number_rbs = l_RB;
dlsch_config_pdu->start_rb = start_RB;
dlsch_config_pdu->number_symbols = sliv_L;
dlsch_config_pdu->start_symbol = sliv_S;
dlsch_config_pdu->mcs = dci->mcs;
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_0 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
/* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */
nr_ue_process_dci_freq_dom_resource_assignment(NULL,&dlsch_config_pdu_1_0,0,n_RB_DLBWP,dci->freq_dom_resource_assignment_DL);
/* TIME_DOM_RESOURCE_ASSIGNMENT */
nr_ue_process_dci_time_dom_resource_assignment(NULL,&dlsch_config_pdu_1_0,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position);
/* VRB_TO_PRB_MAPPING */
dlsch_config_pdu_1_0->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved;
/* MCS */
dlsch_config_pdu_1_0->mcs = dci->mcs;
/* NDI (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/
dlsch_config_pdu_1_0->ndi = dci->ndi;
/* RV (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/
dlsch_config_pdu_1_0->rv = dci->rv;
/* HARQ_PROCESS_NUMBER (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/
dlsch_config_pdu_1_0->harq_process_nbr = dci->harq_process_number;
/* DAI (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/
dlsch_config_pdu_1_0->dai = dci ->dai;
/* TB_SCALING (only if CRC scrambled by P-RNTI or RA-RNTI) */
// according to TS 38.214 Table 5.1.3.2-3
if (dci->tb_scaling == 0) dlsch_config_pdu_1_0->scaling_factor_S = 1;
if (dci->tb_scaling == 1) dlsch_config_pdu_1_0->scaling_factor_S = 0.5;
if (dci->tb_scaling == 2) dlsch_config_pdu_1_0->scaling_factor_S = 0.25;
if (dci->tb_scaling == 3) dlsch_config_pdu_1_0->scaling_factor_S = 0; // value not defined in table
/* TPC_PUCCH (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/
// according to TS 38.213 Table 7.2.1-1
if (dci->tpc_pucch == 0) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = -1;
if (dci->tpc_pucch == 1) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 0;
if (dci->tpc_pucch == 2) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 1;
if (dci->tpc_pucch == 3) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 3;
/* PUCCH_RESOURCE_IND (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI)*/
if (dci->pucch_resource_ind == 0) dlsch_config_pdu_1_0->pucch_resource_id = 0; //pucch-ResourceId obtained from the 1st value of resourceList FIXME!!!
if (dci->pucch_resource_ind == 1) dlsch_config_pdu_1_0->pucch_resource_id = 0; //pucch-ResourceId obtained from the 2nd value of resourceList FIXME!!
if (dci->pucch_resource_ind == 2) dlsch_config_pdu_1_0->pucch_resource_id = 0; //pucch-ResourceId obtained from the 3rd value of resourceList FIXME!!
if (dci->pucch_resource_ind == 3) dlsch_config_pdu_1_0->pucch_resource_id = 0; //pucch-ResourceId obtained from the 4th value of resourceList FIXME!!
if (dci->pucch_resource_ind == 4) dlsch_config_pdu_1_0->pucch_resource_id = 0; //pucch-ResourceId obtained from the 5th value of resourceList FIXME!!
if (dci->pucch_resource_ind == 5) dlsch_config_pdu_1_0->pucch_resource_id = 0; //pucch-ResourceId obtained from the 6th value of resourceList FIXME!!
if (dci->pucch_resource_ind == 6) dlsch_config_pdu_1_0->pucch_resource_id = 0; //pucch-ResourceId obtained from the 7th value of resourceList FIXME!!
if (dci->pucch_resource_ind == 7) dlsch_config_pdu_1_0->pucch_resource_id = 0; //pucch-ResourceId obtained from the 8th value of resourceList FIXME!!
/* PDSCH_TO_HARQ_FEEDBACK_TIME_IND (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI)*/
dlsch_config_pdu_1_0-> pdsch_to_harq_feedback_time_ind = dci->pdsch_to_harq_feedback_time_ind;
// DL_CONFIG_REQ
//pdlsch0_harq->nb_rb = l_RB;
//pdlsch0->current_harq_pid = dci->harq_process_number;
//pdlsch0->active = 1;
......@@ -650,6 +1012,81 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fa
break;
case format1_1:
/*
* with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI
* 0 IDENTIFIER_DCI_FORMATS:
* 1 CARRIER_IND:
* 7 BANDWIDTH_PART_IND:
* 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
* 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
* 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
* 14 PRB_BUNDLING_SIZE_IND:
* 15 RATE_MATCHING_IND:
* 16 ZP_CSI_RS_TRIGGER:
* 18 TB1_MCS:
* 19 TB1_NDI:
* 20 TB1_RV:
* 21 TB2_MCS:
* 22 TB2_NDI:
* 23 TB2_RV:
* 27 HARQ_PROCESS_NUMBER:
* 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
* 33 TPC_PUCCH:
* 34 PUCCH_RESOURCE_IND:
* 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
* 38 ANTENNA_PORTS:
* 39 TCI:
* 40 SRS_REQUEST:
* 43 CBGTI:
* 44 CBGFI:
* 47 DMRS_SEQ_INI:
*/
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti;
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_1 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
/* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */
nr_ue_process_dci_freq_dom_resource_assignment(NULL,&dlsch_config_pdu_1_1,0,n_RB_DLBWP,dci->freq_dom_resource_assignment_DL);
/* TIME_DOM_RESOURCE_ASSIGNMENT */
nr_ue_process_dci_time_dom_resource_assignment(NULL,&dlsch_config_pdu_1_1,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position);
/* VRB_TO_PRB_MAPPING */
if (mac->phy_config.config_req.dl_bwp_dedicated.pdsch_config_dedicated.resource_allocation != 0)
dlsch_config_pdu_1_1->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved;
/* MCS (for transport block 1)*/
dlsch_config_pdu_1_1->mcs = dci->tb1_mcs;
/* NDI (for transport block 1)*/
dlsch_config_pdu_1_1->ndi = dci->tb1_ndi;
/* RV (for transport block 1)*/
dlsch_config_pdu_1_1->rv = dci->tb1_rv;
/* MCS (for transport block 2)*/
dlsch_config_pdu_1_1->tb2_mcs = dci->tb2_mcs;
/* NDI (for transport block 2)*/
dlsch_config_pdu_1_1->tb2_ndi = dci->tb2_ndi;
/* RV (for transport block 2)*/
dlsch_config_pdu_1_1->tb2_rv = dci->tb2_rv;
/* HARQ_PROCESS_NUMBER */
dlsch_config_pdu_1_1->harq_process_nbr = dci->harq_process_number;
/* DAI */
dlsch_config_pdu_1_0->dai = dci ->dai;
/* TPC_PUCCH */
// according to TS 38.213 Table 7.2.1-1
if (dci->tpc_pucch == 0) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = -1;
if (dci->tpc_pucch == 1) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = 0;
if (dci->tpc_pucch == 2) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = 1;
if (dci->tpc_pucch == 3) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = 3;
/* PUCCH_RESOURCE_IND */
if (dci->pucch_resource_ind == 0) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 1st value of resourceList FIXME!!!
if (dci->pucch_resource_ind == 1) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 2nd value of resourceList FIXME!!
if (dci->pucch_resource_ind == 2) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 3rd value of resourceList FIXME!!
if (dci->pucch_resource_ind == 3) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 4th value of resourceList FIXME!!
if (dci->pucch_resource_ind == 4) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 5th value of resourceList FIXME!!
if (dci->pucch_resource_ind == 5) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 6th value of resourceList FIXME!!
if (dci->pucch_resource_ind == 6) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 7th value of resourceList FIXME!!
if (dci->pucch_resource_ind == 7) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 8th value of resourceList FIXME!!
/* PDSCH_TO_HARQ_FEEDBACK_TIME_IND */
// according to TS 38.213 Table 9.2.3-1
dlsch_config_pdu_1_1-> pdsch_to_harq_feedback_time_ind =
mac->phy_config.config_req.ul_bwp_dedicated.pucch_config_dedicated.dl_data_to_ul_ack[dci->pdsch_to_harq_feedback_time_ind];
break;
case format2_0:
......@@ -685,6 +1122,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fa
/// else normal DL-SCH grant
}
return 0;
}
int8_t nr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe){
......
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