Commit 4bc8c6aa authored by Florian Kaltenberger's avatar Florian Kaltenberger

Merge branch 'nr_pbchsim' into develop-nr-merge2

parents aff8b57c 5b939f68
...@@ -551,6 +551,8 @@ set (CONFIG_SOURCES ...@@ -551,6 +551,8 @@ set (CONFIG_SOURCES
set (CONFIG_LIBCONFIG_SOURCES set (CONFIG_LIBCONFIG_SOURCES
${CONFIG_ROOTDIR}/libconfig/config_libconfig.c ${CONFIG_ROOTDIR}/libconfig/config_libconfig.c
) )
add_library(CONFIG_LIB ${CONFIG_SOURCES})
set(CONFIG_LIBRARIES CONFIG_LIB)
add_library(params_libconfig MODULE ${CONFIG_LIBCONFIG_SOURCES} ) add_library(params_libconfig MODULE ${CONFIG_LIBCONFIG_SOURCES} )
target_link_libraries(params_libconfig config) target_link_libraries(params_libconfig config)
# shared library loader # shared library loader
...@@ -1305,7 +1307,7 @@ set(PHY_SRC_UE ...@@ -1305,7 +1307,7 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_gold.c ${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_gold.c
${OPENAIR1_DIR}/PHY/TOOLS/file_output.c ${OPENAIR1_DIR}/PHY/TOOLS/file_output.c
${OPENAIR1_DIR}/PHY/TOOLS/cadd_vv.c ${OPENAIR1_DIR}/PHY/TOOLS/cadd_vv.c
${OPENAIR1_DIR}/PHY/TOOLS/lte_dfts.c #${OPENAIR1_DIR}/PHY/TOOLS/lte_dfts.c
${OPENAIR1_DIR}/PHY/TOOLS/log2_approx.c ${OPENAIR1_DIR}/PHY/TOOLS/log2_approx.c
${OPENAIR1_DIR}/PHY/TOOLS/cmult_sv.c ${OPENAIR1_DIR}/PHY/TOOLS/cmult_sv.c
${OPENAIR1_DIR}/PHY/TOOLS/cmult_vv.c ${OPENAIR1_DIR}/PHY/TOOLS/cmult_vv.c
...@@ -1341,9 +1343,10 @@ set(PHY_SRC_UE ...@@ -1341,9 +1343,10 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_dmrs_rx.c ${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_dmrs_rx.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_gold_ue.c ${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_gold_ue.c
${OPENAIR1_DIR}/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c ${OPENAIR1_DIR}/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_ue_measurements.c
${OPENAIR1_DIR}/PHY/TOOLS/file_output.c ${OPENAIR1_DIR}/PHY/TOOLS/file_output.c
${OPENAIR1_DIR}/PHY/TOOLS/cadd_vv.c ${OPENAIR1_DIR}/PHY/TOOLS/cadd_vv.c
${OPENAIR1_DIR}/PHY/TOOLS/lte_dfts.c # ${OPENAIR1_DIR}/PHY/TOOLS/lte_dfts.c
${OPENAIR1_DIR}/PHY/TOOLS/log2_approx.c ${OPENAIR1_DIR}/PHY/TOOLS/log2_approx.c
${OPENAIR1_DIR}/PHY/TOOLS/cmult_sv.c ${OPENAIR1_DIR}/PHY/TOOLS/cmult_sv.c
${OPENAIR1_DIR}/PHY/TOOLS/cmult_vv.c ${OPENAIR1_DIR}/PHY/TOOLS/cmult_vv.c
...@@ -2450,7 +2453,7 @@ add_executable(nr-uesoftmodem ...@@ -2450,7 +2453,7 @@ add_executable(nr-uesoftmodem
target_link_libraries (nr-uesoftmodem target_link_libraries (nr-uesoftmodem
-Wl,--start-group -Wl,--start-group
RRC_LIB NR_RRC_LIB SECU_CN SECU_OSA UTIL HASHTABLE SCTP_CLIENT UDP SCHED_RU_LIB SCHED_UE_LIB SCHED_NR_UE_LIB PHY_COMMON PHY_UE PHY_NR_UE PHY_RU LFDS NR_L2_UE #NR_LTE_UE_REUSE_LIB RRC_LIB NR_RRC_LIB SECU_CN SECU_OSA UTIL HASHTABLE SCTP_CLIENT UDP SCHED_RU_LIB SCHED_UE_LIB SCHED_NR_UE_LIB PHY_COMMON PHY_NR_UE PHY_RU LFDS NR_L2_UE #NR_LTE_UE_REUSE_LIB
${MSC_LIB} ${RAL_LIB} ${NAS_UE_LIB} ${ITTI_LIB} ${FLPT_MSG_LIB} ${ASYNC_IF_LIB} LFDS7 ${ATLAS_LIBRARIES} ${MSC_LIB} ${RAL_LIB} ${NAS_UE_LIB} ${ITTI_LIB} ${FLPT_MSG_LIB} ${ASYNC_IF_LIB} LFDS7 ${ATLAS_LIBRARIES}
-Wl,--end-group z dl) -Wl,--end-group z dl)
...@@ -2536,10 +2539,14 @@ target_link_libraries (dlsim_tm4 ...@@ -2536,10 +2539,14 @@ target_link_libraries (dlsim_tm4
) )
add_executable(polartest ${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/polartest.c) add_executable(polartest ${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/polartest.c)
target_link_libraries(polartest m SIMU PHY PHY_NR PHY_COMMON -lm ${ATLAS_LIBRARIES}) target_link_libraries(polartest SIMU PHY PHY_NR PHY_COMMON m ${ATLAS_LIBRARIES})
add_executable(ldpctest ${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/ldpctest.c) add_executable(ldpctest ${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/ldpctest.c)
target_link_libraries(ldpctest m SIMU PHY PHY_NR ${ATLAS_LIBRARIES}) target_link_libraries(ldpctest SIMU PHY PHY_NR m ${ATLAS_LIBRARIES})
add_executable(nr_pbchsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/pbchsim.c )
target_link_libraries(nr_pbchsim -Wl,--start-group UTIL SIMU PHY PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB ${CONFIG_LIBRARIES} -Wl,--end-group m pthread dl ${ATLAS_LIBRARIES})
foreach(myExe dlsim dlsim_tm7 ulsim pbchsim scansim mbmssim pdcchsim pucchsim prachsim syncsim) foreach(myExe dlsim dlsim_tm7 ulsim pbchsim scansim mbmssim pdcchsim pucchsim prachsim syncsim)
......
...@@ -1043,6 +1043,24 @@ ...@@ -1043,6 +1043,24 @@
<nruns>3</nruns> <nruns>3</nruns>
</testCase> </testCase>
<testCase id="015104">
<class>execution</class>
<desc>nr_pbchsim test cases.</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
<pre_exec>$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec> $OPENAIR_DIR/targets/bin/nr_pbchsim.Rel15</main_exec>
<main_exec_args>-s-11 -S-10 -n1000
-s-11 -S-10 -n10 -I</main_exec_args>
<tags>nr_pbchsim.test1</tags>
<search_expr_true>n_errors \(negative CRC\) = 0</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
</testCase>
<testCase id="015110"> <testCase id="015110">
<class>execution</class> <class>execution</class>
<desc>dlsim_tm4 test cases (Test 1: 10 MHz, R2.FDD (MCS 5), EVA5, -1dB), <desc>dlsim_tm4 test cases (Test 1: 10 MHz, R2.FDD (MCS 5), EVA5, -1dB),
......
...@@ -679,7 +679,7 @@ function main() { ...@@ -679,7 +679,7 @@ function main() {
fi fi
if [ "$SIMUS_PHY" = "1" -o "$SIMUS_CORE" = "1" ] ; then if [ "$SIMUS_PHY" = "1" -o "$SIMUS_CORE" = "1" ] ; then
cd $OPENAIR_DIR/cmake_targets/lte-simulators cd $OPENAIR_DIR/cmake_targets/phy_simulators
[ "$CLEAN" = "1" ] && rm -rf build [ "$CLEAN" = "1" ] && rm -rf build
mkdir -p build mkdir -p build
cd build cd build
...@@ -692,14 +692,14 @@ function main() { ...@@ -692,14 +692,14 @@ function main() {
echo_info "Compiling unitary tests simulators" echo_info "Compiling unitary tests simulators"
# TODO: fix: dlsim_tm4 pucchsim prachsim pdcchsim pbchsim mbmssim # TODO: fix: dlsim_tm4 pucchsim prachsim pdcchsim pbchsim mbmssim
#simlist="dlsim_tm4 dlsim ulsim pucchsim prachsim pdcchsim pbchsim mbmssim" #simlist="dlsim_tm4 dlsim ulsim pucchsim prachsim pdcchsim pbchsim mbmssim"
simlist="dlsim ulsim polartest ldpctest" simlist="dlsim ulsim polartest ldpctest nr_pbchsim"
for f in $simlist ; do for f in $simlist ; do
compilations \ compilations \
lte-simulators $f \ phy_simulators $f \
$f $dbin/$f.$REL $f $dbin/$f.$REL
done done
compilations \ compilations \
lte-simulators coding \ phy_simulators coding \
libcoding.so $dbin/libcoding.so libcoding.so $dbin/libcoding.so
fi fi
...@@ -711,7 +711,7 @@ function main() { ...@@ -711,7 +711,7 @@ function main() {
simlist="secu_knas_encrypt_eia1 secu_kenb aes128_ctr_encrypt aes128_ctr_decrypt secu_knas_encrypt_eea2 secu_knas secu_knas_encrypt_eea1 kdf aes128_cmac_encrypt secu_knas_encrypt_eia2" simlist="secu_knas_encrypt_eia1 secu_kenb aes128_ctr_encrypt aes128_ctr_decrypt secu_knas_encrypt_eea2 secu_knas secu_knas_encrypt_eea1 kdf aes128_cmac_encrypt secu_knas_encrypt_eia2"
for f in $simlist ; do for f in $simlist ; do
compilations \ compilations \
lte-simulators test_$f \ phy_simulators test_$f \
test_$f $dbin/test_$f.$REL test_$f $dbin/test_$f.$REL
done done
fi fi
......
...@@ -9,4 +9,5 @@ set(MU_RECIEVER False) ...@@ -9,4 +9,5 @@ set(MU_RECIEVER False)
set(NAS_UE False) set(NAS_UE False)
set(MESSAGE_CHART_GENERATOR False) set(MESSAGE_CHART_GENERATOR False)
set(RRC_ASN1_VERSION "Rel14") set(RRC_ASN1_VERSION "Rel14")
set(T_TRACER False)
include(${CMAKE_CURRENT_SOURCE_DIR}/../CMakeLists.txt) include(${CMAKE_CURRENT_SOURCE_DIR}/../CMakeLists.txt)
...@@ -378,17 +378,17 @@ int32_t write_file_matlab(const char *fname, const char *vname, void *data, int ...@@ -378,17 +378,17 @@ int32_t write_file_matlab(const char *fname, const char *vname, void *data, int
/* define variable only used in LOG macro's */ /* define variable only used in LOG macro's */
# define LOG_VAR(A,B) A B # define LOG_VAR(A,B) A B
# else /* T_TRACER: remove all debugging and tracing messages, except errors */ # else /* T_TRACER: remove all debugging and tracing messages, except errors */
# define LOG_I(c, x...) /* */ # define LOG_I(c, x...) do {logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_INFO, x) ; } while(0)/* */
# define LOG_W(c, x...) /* */ # define LOG_W(c, x...) do {logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_WARNING, x) ; } while(0)/* */
# define LOG_E(c, x...) /* */ # define LOG_E(c, x...) do {logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_ERR, x) ; } while(0)/* */
# define LOG_D(c, x...) /* */ # define LOG_D(c, x...) do {logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_DEBUG, x) ; } while(0)/* */
# define LOG_T(c, x...) /* */ # define LOG_T(c, x...) /* */
# define LOG_DUMPMSG(c, b, s, x...) /* */ # define LOG_DUMPMSG(c, b, s, x...) /* */
# define nfapi_log(FILE, FNC, LN, COMP, LVL, FMT...) # define nfapi_log(FILE, FNC, LN, COMP, LVL, FMT...)
# define LOG_DEBUGFLAG(D) ( 0 ) # define LOG_DEBUGFLAG(D) ( 0 )
# define LOG_DUMPFLAG(D) ( 0 ) # define LOG_DUMPFLAG(D) ( 0 )
# define LOG_M(file, vector, data, len, dec, format) # define LOG_M(file, vector, data, len, dec, format) do { write_file_matlab(file, vector, data, len, dec, format);} while(0)
# define LOG_VAR(A,B) # define LOG_VAR(A,B)
# endif /* T_TRACER */ # endif /* T_TRACER */
/* avoid warnings for variables only used in LOG macro's but set outside debug section */ /* avoid warnings for variables only used in LOG macro's but set outside debug section */
......
...@@ -18,5 +18,5 @@ alias oailte='cd $OPENAIR_TARGETS/RT/USER' ...@@ -18,5 +18,5 @@ alias oailte='cd $OPENAIR_TARGETS/RT/USER'
alias oais='cd $OPENAIR_TARGETS/SIMU/USER' alias oais='cd $OPENAIR_TARGETS/SIMU/USER'
alias oaiex='cd $OPENAIR_TARGETS/SIMU/EXAMPLES' alias oaiex='cd $OPENAIR_TARGETS/SIMU/EXAMPLES'
export IIOD_REMOTE=192.168.1.2 export IIOD_REMOTE=192.168.121.32
...@@ -1069,9 +1069,17 @@ int8_t polar_decoder_int16(int16_t *input, ...@@ -1069,9 +1069,17 @@ int8_t polar_decoder_int16(int16_t *input,
nr_polar_deinterleaver(polarParams->nr_polar_CPrime, polarParams->nr_polar_B, polarParams->interleaving_pattern, polarParams->K); nr_polar_deinterleaver(polarParams->nr_polar_CPrime, polarParams->nr_polar_B, polarParams->interleaving_pattern, polarParams->K);
//Remove the CRC (â) //Remove the CRC (â)
for (int j = 0; j < polarParams->payloadBits; j++) polarParams->nr_polar_A[j]=polarParams->nr_polar_B[j]; //for (int j = 0; j < polarParams->payloadBits; j++) polarParams->nr_polar_A[j]=polarParams->nr_polar_B[j];
nr_byte2bit_uint8_32_t(polarParams->nr_polar_A, polarParams->payloadBits, out); // Check the CRC
for (int j=0;j<polarParams->crcParityBits;j++) {
int crcbit=0;
for (int i=0;i<polarParams->payloadBits;i++)
crcbit = crcbit ^ (polarParams->crc_generator_matrix[i][j] & polarParams->nr_polar_B[i]);
if (crcbit != polarParams->nr_polar_B[polarParams->payloadBits+j]) return(-1);
}
// pack into ceil(payloadBits/32) 32 bit words, lowest index in MSB
// nr_byte2bit_uint8_32_t(polarParams->nr_polar_A, polarParams->payloadBits, out);
nr_byte2bit_uint8_32_t(polarParams->nr_polar_B, polarParams->payloadBits, out);
return(0); return(0);
} }
...@@ -443,7 +443,7 @@ void applyGtoright(t_nrPolar_params *pp,decoder_node_t *node) { ...@@ -443,7 +443,7 @@ void applyGtoright(t_nrPolar_params *pp,decoder_node_t *node) {
} }
else else
#endif #endif
{// equvalent scalar code to above, activated only on non x86/ARM architectures {// equvalent scalar code to above, activated only on non x86/ARM architectures or Nv=1,2
for (int i=0;i<node->Nv/2;i++) { for (int i=0;i<node->Nv/2;i++) {
alpha_r[i] = alpha_v[i+(node->Nv/2)] - (betal[i]*alpha_v[i]); alpha_r[i] = alpha_v[i+(node->Nv/2)] - (betal[i]*alpha_v[i]);
} }
......
...@@ -365,7 +365,9 @@ static inline void nr_polar_deinterleaver(uint8_t *input, ...@@ -365,7 +365,9 @@ static inline void nr_polar_deinterleaver(uint8_t *input,
uint16_t *pattern, uint16_t *pattern,
uint16_t size) uint16_t size)
{ {
for (int i=0; i<size; i++) output[pattern[i]]=input[i]; for (int i=0; i<size; i++) {
output[pattern[i]]=input[i];
}
} }
#endif #endif
...@@ -92,7 +92,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB, ...@@ -92,7 +92,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
int i, UE_id; int i, UE_id;
LOG_I(PHY,"[gNB %d] %s() About to wait for gNB to be configured", gNB->Mod_id, __FUNCTION__); LOG_I(PHY,"[gNB %d] %s() About to wait for gNB to be configured\n", gNB->Mod_id, __FUNCTION__);
gNB->total_dlsch_bitrate = 0; gNB->total_dlsch_bitrate = 0;
gNB->total_transmitted_bits = 0; gNB->total_transmitted_bits = 0;
...@@ -100,6 +100,8 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB, ...@@ -100,6 +100,8 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
gNB->check_for_MUMIMO_transmissions=0; gNB->check_for_MUMIMO_transmissions=0;
while(gNB->configured == 0) usleep(10000); while(gNB->configured == 0) usleep(10000);
init_dfts();
/* /*
LOG_I(PHY,"[gNB %"PRIu8"] Initializing DL_FRAME_PARMS : N_RB_DL %"PRIu8", PHICH Resource %d, PHICH Duration %d nb_antennas_tx:%u nb_antennas_rx:%u PRACH[rootSequenceIndex:%u prach_Config_enabled:%u configIndex:%u highSpeed:%u zeroCorrelationZoneConfig:%u freqOffset:%u]\n", LOG_I(PHY,"[gNB %"PRIu8"] Initializing DL_FRAME_PARMS : N_RB_DL %"PRIu8", PHICH Resource %d, PHICH Duration %d nb_antennas_tx:%u nb_antennas_rx:%u PRACH[rootSequenceIndex:%u prach_Config_enabled:%u configIndex:%u highSpeed:%u zeroCorrelationZoneConfig:%u freqOffset:%u]\n",
gNB->Mod_id, gNB->Mod_id,
...@@ -324,7 +326,7 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB) ...@@ -324,7 +326,7 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
free_and_zero(srs_vars[UE_id].srs_ch_estimates_time); free_and_zero(srs_vars[UE_id].srs_ch_estimates_time);
} //UE_id } //UE_id
free_ul_ref_sigs(); //free_ul_ref_sigs();
for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) free_and_zero(srs_vars[UE_id].srs); for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) free_and_zero(srs_vars[UE_id].srs);
...@@ -367,7 +369,7 @@ void install_schedule_handlers(IF_Module_t *if_inst) ...@@ -367,7 +369,7 @@ void install_schedule_handlers(IF_Module_t *if_inst)
/// this function is a temporary addition for NR configuration /// this function is a temporary addition for NR configuration
/*void nr_phy_config_request(PHY_VARS_gNB *gNB) void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,int N_RB_DL,int N_RB_UL,int mu)
{ {
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms; NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
nfapi_nr_config_request_t *gNB_config = &gNB->gNB_config; nfapi_nr_config_request_t *gNB_config = &gNB->gNB_config;
...@@ -375,14 +377,14 @@ void install_schedule_handlers(IF_Module_t *if_inst) ...@@ -375,14 +377,14 @@ void install_schedule_handlers(IF_Module_t *if_inst)
//overwrite for new NR parameters //overwrite for new NR parameters
gNB_config->nfapi_config.rf_bands.rf_band[0] = 22; gNB_config->nfapi_config.rf_bands.rf_band[0] = 22;
gNB_config->nfapi_config.earfcn.value = 6600; gNB_config->nfapi_config.earfcn.value = 6600;
gNB_config->subframe_config.numerology_index_mu.value = 1; gNB_config->subframe_config.numerology_index_mu.value = mu;
gNB_config->subframe_config.duplex_mode.value = FDD; gNB_config->subframe_config.duplex_mode.value = TDD;
gNB_config->rf_config.tx_antenna_ports.value = 1; gNB_config->rf_config.tx_antenna_ports.value = 1;
gNB_config->rf_config.dl_carrier_bandwidth.value = 106; gNB_config->rf_config.dl_carrier_bandwidth.value = N_RB_DL;
gNB_config->rf_config.ul_carrier_bandwidth.value = 106; gNB_config->rf_config.ul_carrier_bandwidth.value = N_RB_UL;
gNB_config->sch_config.half_frame_index.value = 0; gNB_config->sch_config.half_frame_index.value = 0;
gNB_config->sch_config.ssb_subcarrier_offset.value = 0; gNB_config->sch_config.ssb_subcarrier_offset.value = 0;
gNB_config->sch_config.n_ssb_crb.value = 86; gNB_config->sch_config.n_ssb_crb.value = (N_RB_DL-20)>>1;
gNB_config->sch_config.ssb_subcarrier_offset.value = 0; gNB_config->sch_config.ssb_subcarrier_offset.value = 0;
...@@ -396,7 +398,7 @@ void install_schedule_handlers(IF_Module_t *if_inst) ...@@ -396,7 +398,7 @@ void install_schedule_handlers(IF_Module_t *if_inst)
gNB->configured = 1; gNB->configured = 1;
LOG_I(PHY,"gNB configured\n"); LOG_I(PHY,"gNB configured\n");
}*/ }
void nr_phy_config_request(NR_PHY_Config_t *phy_config) void nr_phy_config_request(NR_PHY_Config_t *phy_config)
......
...@@ -655,15 +655,16 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, ...@@ -655,15 +655,16 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
int i,j,k,l; int i,j,k,l;
int eNB_id; int eNB_id;
int th_id; int th_id;
int n_ssb_crb=(fp->N_RB_DL-20)>>1;
abstraction_flag = 0; abstraction_flag = 0;
fp->nb_antennas_tx = 1; fp->nb_antennas_tx = 1;
fp->nb_antennas_rx=1; fp->nb_antennas_rx=1;
printf("Initializing UE vars (abstraction %"PRIu8") for eNB TXant %"PRIu8", UE RXant %"PRIu8"\n",abstraction_flag,fp->nb_antennas_tx,fp->nb_antennas_rx); printf("Initializing UE vars (abstraction %"PRIu8") for eNB TXant %"PRIu8", UE RXant %"PRIu8"\n",abstraction_flag,fp->nb_antennas_tx,fp->nb_antennas_rx);
//LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_UE][MOD %02u][]\n", ue->Mod_id+NB_eNB_INST); //LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_UE][MOD %02u][]\n", ue->Mod_id+NB_eNB_INST);
nr_init_frame_parms_ue(&ue->frame_parms); nr_init_frame_parms_ue(&ue->frame_parms,NR_MU_1,NORMAL,n_ssb_crb,0);
phy_init_nr_top(ue); phy_init_nr_top(ue);
// many memory allocation sizes are hard coded // many memory allocation sizes are hard coded
...@@ -699,7 +700,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, ...@@ -699,7 +700,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
for (i=0; i<fp->nb_antennas_tx; i++) { for (i=0; i<fp->nb_antennas_tx; i++) {
common_vars->txdata[i] = (int32_t*)malloc16_clear( fp->samples_per_subframe*10*sizeof(int32_t) ); common_vars->txdata[i] = (int32_t*)malloc16_clear( fp->samples_per_subframe*10*sizeof(int32_t) );
common_vars->txdataF[i] = (int32_t *)malloc16_clear( fp->ofdm_symbol_size*fp->symbols_per_tti*10*sizeof(int32_t) ); common_vars->txdataF[i] = (int32_t *)malloc16_clear( fp->ofdm_symbol_size*fp->symbols_per_slot*10*sizeof(int32_t) );
} }
// init RX buffers // init RX buffers
...@@ -728,7 +729,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, ...@@ -728,7 +729,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
for (j=0; j<4; j++) { for (j=0; j<4; j++) {
int idx = (j<<1) + i; int idx = (j<<1) + i;
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) { for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
common_vars->common_vars_rx_data_per_thread[th_id].dl_ch_estimates[eNB_id][idx] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->symbols_per_tti*(fp->ofdm_symbol_size+LTE_CE_FILTER_LENGTH) ); common_vars->common_vars_rx_data_per_thread[th_id].dl_ch_estimates[eNB_id][idx] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->symbols_per_slot*(fp->ofdm_symbol_size+LTE_CE_FILTER_LENGTH) );
common_vars->common_vars_rx_data_per_thread[th_id].dl_ch_estimates_time[eNB_id][idx] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size*2 ); common_vars->common_vars_rx_data_per_thread[th_id].dl_ch_estimates_time[eNB_id][idx] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size*2 );
} }
} }
...@@ -850,7 +851,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, ...@@ -850,7 +851,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
pbch_vars[eNB_id]->rxdataF_ext = (int32_t**)malloc16( fp->nb_antennas_rx*sizeof(int32_t*) ); pbch_vars[eNB_id]->rxdataF_ext = (int32_t**)malloc16( fp->nb_antennas_rx*sizeof(int32_t*) );
pbch_vars[eNB_id]->rxdataF_comp = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); pbch_vars[eNB_id]->rxdataF_comp = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pbch_vars[eNB_id]->dl_ch_estimates_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); pbch_vars[eNB_id]->dl_ch_estimates_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pbch_vars[eNB_id]->llr = (int8_t*)malloc16_clear( 1920 );// pbch_vars[eNB_id]->llr = (int16_t*)malloc16_clear( 1920 );//
prach_vars[eNB_id]->prachF = (int16_t*)malloc16_clear( sizeof(int)*(7*2*sizeof(int)*(fp->ofdm_symbol_size*12)) ); prach_vars[eNB_id]->prachF = (int16_t*)malloc16_clear( sizeof(int)*(7*2*sizeof(int)*(fp->ofdm_symbol_size*12)) );
prach_vars[eNB_id]->prach = (int16_t*)malloc16_clear( sizeof(int)*(7*2*sizeof(int)*(fp->ofdm_symbol_size*12)) ); prach_vars[eNB_id]->prach = (int16_t*)malloc16_clear( sizeof(int)*(7*2*sizeof(int)*(fp->ofdm_symbol_size*12)) );
...@@ -949,35 +950,17 @@ void phy_init_nr_top(PHY_VARS_NR_UE *ue) ...@@ -949,35 +950,17 @@ void phy_init_nr_top(PHY_VARS_NR_UE *ue)
init_dfts(); init_dfts();
ccodedot11_init();
ccodedot11_init_inv();
ccodelte_init();
ccodelte_init_inv();
//treillis_table_init();
phy_generate_viterbi_tables();
phy_generate_viterbi_tables_lte();
//init_td8();
//init_td16();
#ifdef __AVX2__
//init_td16avx2();
#endif
init_context_synchro_nr(frame_parms); init_context_synchro_nr(frame_parms);
generate_ul_reference_signal_sequences(SHRT_MAX); generate_ul_reference_signal_sequences(SHRT_MAX);
// Polar encoder init for PBCH // Polar encoder init for PBCH
//nr_polar_init(&frame_parms->pbch_polar_params, 1);
/*t_nrPolar_paramsPtr nrPolar_params = NULL, currentPtr = NULL; ue->nrPolar_params = NULL;
nr_polar_init(&ue->nrPolar_params, nr_polar_init(&ue->nrPolar_params,
NR_POLAR_PBCH_MESSAGE_TYPE, NR_POLAR_PBCH_MESSAGE_TYPE,
NR_POLAR_PBCH_PAYLOAD_BITS, NR_POLAR_PBCH_PAYLOAD_BITS,
NR_POLAR_PBCH_AGGREGATION_LEVEL);*/ NR_POLAR_PBCH_AGGREGATION_LEVEL);
//lte_sync_time_init(frame_parms); //lte_sync_time_init(frame_parms);
//generate_ul_ref_sigs(); //generate_ul_ref_sigs();
...@@ -993,3 +976,64 @@ void phy_init_nr_top(PHY_VARS_NR_UE *ue) ...@@ -993,3 +976,64 @@ void phy_init_nr_top(PHY_VARS_NR_UE *ue)
//set_taus_seed(1328); //set_taus_seed(1328);
} }
void set_default_frame_parms_single(nfapi_nr_config_request_t *config, NR_DL_FRAME_PARMS *frame_parms) {
//int CC_id;
//for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
/* Set some default values that may be overwritten while reading options */
frame_parms = (NR_DL_FRAME_PARMS*) malloc(sizeof(NR_DL_FRAME_PARMS));
config = (nfapi_nr_config_request_t*) malloc(sizeof(nfapi_nr_config_request_t));
config->subframe_config.numerology_index_mu.value =1;
config->subframe_config.duplex_mode.value = 1; //FDD
config->subframe_config.dl_cyclic_prefix_type.value = 0; //NORMAL
config->rf_config.dl_carrier_bandwidth.value = 106;
config->rf_config.ul_carrier_bandwidth.value = 106;
config->rf_config.tx_antenna_ports.value = 1;
config->rf_config.rx_antenna_ports.value = 1;
config->sch_config.physical_cell_id.value = 0;
frame_parms->frame_type = FDD;
frame_parms->tdd_config = 3;
//frame_parms[CC_id]->tdd_config_S = 0;
frame_parms->N_RB_DL = 100;
frame_parms->N_RB_UL = 100;
frame_parms->Ncp = NORMAL;
//frame_parms[CC_id]->Ncp_UL = NORMAL;
frame_parms->Nid_cell = 0;
//frame_parms[CC_id]->num_MBSFN_config = 0;
frame_parms->nb_antenna_ports_eNB = 1;
frame_parms->nb_antennas_tx = 1;
frame_parms->nb_antennas_rx = 1;
//frame_parms[CC_id]->nushift = 0;
///frame_parms[CC_id]->phich_config_common.phich_resource = oneSixth;
//frame_parms[CC_id]->phich_config_common.phich_duration = normal;
// UL RS Config
/*frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift = 1;//n_DMRS1 set to 0
frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = 1;
frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = 0;
frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = 0;
frame_parms[CC_id]->pusch_config_common.n_SB = 1;
frame_parms[CC_id]->pusch_config_common.hoppingMode = 0;
frame_parms[CC_id]->pusch_config_common.pusch_HoppingOffset = 0;
frame_parms[CC_id]->pusch_config_common.enable64QAM = 0;
frame_parms[CC_id]->prach_config_common.rootSequenceIndex=22;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig=1;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.prach_ConfigIndex=0;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.highSpeedFlag=0;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.prach_FreqOffset=0;*/
// NR: Init to legacy LTE 20Mhz params
frame_parms->numerology_index = 0;
frame_parms->ttis_per_subframe = 1;
frame_parms->slots_per_tti = 2;
//}
}
This diff is collapsed.
...@@ -377,11 +377,12 @@ void phy_config_request(PHY_Config_t *phy_config); ...@@ -377,11 +377,12 @@ void phy_config_request(PHY_Config_t *phy_config);
int init_frame_parms(LTE_DL_FRAME_PARMS *frame_parms,uint8_t osf); int init_frame_parms(LTE_DL_FRAME_PARMS *frame_parms,uint8_t osf);
void dump_frame_parms(LTE_DL_FRAME_PARMS *frame_parms); void dump_frame_parms(LTE_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms(nfapi_nr_config_request_t* config, NR_DL_FRAME_PARMS *frame_parms); int nr_init_frame_parms(nfapi_nr_config_request_t* config, NR_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *frame_parms); int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *frame_parms,int mu,int Ncp,int n_ssb_crb,int ssb_subcarrier_offset);
int init_nr_ue_signal(PHY_VARS_NR_UE *ue,int nb_connected_eNB,uint8_t abstraction_flag); int init_nr_ue_signal(PHY_VARS_NR_UE *ue,int nb_connected_eNB,uint8_t abstraction_flag);
void nr_dump_frame_parms(NR_DL_FRAME_PARMS *frame_parms); void nr_dump_frame_parms(NR_DL_FRAME_PARMS *frame_parms);
int phy_init_nr_gNB(PHY_VARS_gNB *gNB, unsigned char is_secondary_gNB, unsigned char abstraction_flag); int phy_init_nr_gNB(PHY_VARS_gNB *gNB, unsigned char is_secondary_gNB, unsigned char abstraction_flag);
void nr_phy_config_request(NR_PHY_Config_t *gNB); void nr_phy_config_request(NR_PHY_Config_t *gNB);
void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,int N_RB_DL,int N_RB_UL,int mu);
void phy_free_nr_gNB(PHY_VARS_gNB *gNB); void phy_free_nr_gNB(PHY_VARS_gNB *gNB);
int l1_north_init_gNB(void); int l1_north_init_gNB(void);
......
...@@ -285,6 +285,7 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode) ...@@ -285,6 +285,7 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
init_frame_parms(frame_parms,1); init_frame_parms(frame_parms,1);
/* /*
LOG_M("rxdata0.m","rxd0",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1); LOG_M("rxdata0.m","rxd0",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
exit(-1); exit(-1);
*/ */
sync_pos = lte_sync_time(ue->common_vars.rxdata, sync_pos = lte_sync_time(ue->common_vars.rxdata,
......
...@@ -22,6 +22,7 @@ ...@@ -22,6 +22,7 @@
#ifndef __MODULATION_COMMON__H__ #ifndef __MODULATION_COMMON__H__
#define __MODULATION_COMMON__H__ #define __MODULATION_COMMON__H__
#include "PHY/defs_common.h" #include "PHY/defs_common.h"
#include "PHY/defs_nr_common.h"
/** @addtogroup _PHY_MODULATION_ /** @addtogroup _PHY_MODULATION_
* @{ * @{
*/ */
...@@ -48,6 +49,7 @@ void PHY_ofdm_mod(int *input, ...@@ -48,6 +49,7 @@ void PHY_ofdm_mod(int *input,
void normal_prefix_mod(int32_t *txdataF,int32_t *txdata,uint8_t nsymb,LTE_DL_FRAME_PARMS *frame_parms); void normal_prefix_mod(int32_t *txdataF,int32_t *txdata,uint8_t nsymb,LTE_DL_FRAME_PARMS *frame_parms);
void nr_normal_prefix_mod(int32_t *txdataF,int32_t *txdata,uint8_t nsymb,NR_DL_FRAME_PARMS *frame_parms);
void do_OFDM_mod(int32_t **txdataF, int32_t **txdata, uint32_t frame,uint16_t next_slot, LTE_DL_FRAME_PARMS *frame_parms); void do_OFDM_mod(int32_t **txdataF, int32_t **txdata, uint32_t frame,uint16_t next_slot, LTE_DL_FRAME_PARMS *frame_parms);
......
...@@ -122,10 +122,10 @@ void PHY_ofdm_mod(int *input, /// pointer to complex input ...@@ -122,10 +122,10 @@ void PHY_ofdm_mod(int *input, /// pointer to complex input
case 3072: case 3072:
idft = idft3072; idft = idft3072;
break;
case 4096: case 4096:
idft = idft4096; idft = idft4096;
break;
default: default:
idft = idft512; idft = idft512;
break; break;
......
...@@ -61,7 +61,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, ...@@ -61,7 +61,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
int uespec_pilot[9][1200];*/ int uespec_pilot[9][1200];*/
void (*dft)(int16_t *,int16_t *, int); void (*dft)(int16_t *,int16_t *, int);
int tmp_dft_in[2048] __attribute__ ((aligned (32))); // This is for misalignment issues for 6 and 15 PRBs int tmp_dft_in[8192] __attribute__ ((aligned (32))); // This is for misalignment issues for 6 and 15 PRBs
switch (frame_parms->ofdm_symbol_size) { switch (frame_parms->ofdm_symbol_size) {
case 128: case 128:
...@@ -88,6 +88,14 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, ...@@ -88,6 +88,14 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
dft = dft2048; dft = dft2048;
break; break;
case 4096:
dft = dft4096;
break;
case 8192:
dft = dft8192;
break;
default: default:
dft = dft512; dft = dft512;
break; break;
...@@ -143,7 +151,6 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, ...@@ -143,7 +151,6 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
stop_meas(&ue->rx_dft_stats); stop_meas(&ue->rx_dft_stats);
#endif #endif
} }
} else { } else {
rx_offset += (frame_parms->ofdm_symbol_size+nb_prefix_samples)*l;// + rx_offset += (frame_parms->ofdm_symbol_size+nb_prefix_samples)*l;// +
...@@ -191,18 +198,15 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, ...@@ -191,18 +198,15 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
switch(channel){ switch(channel){
case NR_PBCH_EST: case NR_PBCH_EST:
//if ((l>4) && (l<8)) {
for (aa=0; aa<frame_parms->nb_antenna_ports_eNB; aa++) {
//#ifdef DEBUG_FEP #ifdef DEBUG_FEP
printf("Channel estimation eNB %d, aatx %d, slot %d, symbol %d\n",eNB_id,aa,Ns,l); printf("Channel estimation eNB %d, slot %d, symbol %d\n",eNB_id,Ns,l);
//#endif #endif
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
start_meas(&ue->dlsch_channel_estimation_stats); start_meas(&ue->dlsch_channel_estimation_stats);
#endif #endif
nr_pbch_channel_estimation(ue,eNB_id,0, nr_pbch_channel_estimation(ue,eNB_id,0,
Ns, Ns,
aa,
l, l,
symbol); symbol);
//} //}
...@@ -232,11 +236,10 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, ...@@ -232,11 +236,10 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
#endif #endif
} }
}
break; break;
case NR_PDCCH_EST: case NR_PDCCH_EST:
for (aa=0; aa<frame_parms->nb_antenna_ports_eNB; aa++) {
#ifdef DEBUG_FEP #ifdef DEBUG_FEP
printf("PDCCH Channel estimation eNB %d, aatx %d, slot %d, symbol %d start_sc %d\n",eNB_id,aa,Ns,l,coreset_start_subcarrier); printf("PDCCH Channel estimation eNB %d, aatx %d, slot %d, symbol %d start_sc %d\n",eNB_id,aa,Ns,l,coreset_start_subcarrier);
...@@ -246,7 +249,6 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, ...@@ -246,7 +249,6 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
#endif #endif
nr_pdcch_channel_estimation(ue,eNB_id,0, nr_pdcch_channel_estimation(ue,eNB_id,0,
Ns, Ns,
aa,
l, l,
symbol, symbol,
coreset_start_subcarrier, coreset_start_subcarrier,
...@@ -254,12 +256,10 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, ...@@ -254,12 +256,10 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
stop_meas(&ue->dlsch_channel_estimation_stats); stop_meas(&ue->dlsch_channel_estimation_stats);
#endif #endif
}
break; break;
case NR_PDSCH_EST: case NR_PDSCH_EST:
for (aa=0; aa<frame_parms->nb_antenna_ports_eNB; aa++) {
#ifdef DEBUG_FEP #ifdef DEBUG_FEP
printf("Channel estimation eNB %d, aatx %d, slot %d, symbol %d\n",eNB_id,aa,Ns,l); printf("Channel estimation eNB %d, aatx %d, slot %d, symbol %d\n",eNB_id,aa,Ns,l);
#endif #endif
...@@ -268,7 +268,6 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, ...@@ -268,7 +268,6 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
#endif #endif
nr_pdsch_channel_estimation(ue,eNB_id,0, nr_pdsch_channel_estimation(ue,eNB_id,0,
Ns, Ns,
aa,
l, l,
symbol, symbol,
bwp_start_subcarrier, bwp_start_subcarrier,
...@@ -276,7 +275,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, ...@@ -276,7 +275,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
stop_meas(&ue->dlsch_channel_estimation_stats); stop_meas(&ue->dlsch_channel_estimation_stats);
#endif #endif
}
break; break;
case NR_SSS_EST: case NR_SSS_EST:
......
...@@ -41,7 +41,7 @@ ...@@ -41,7 +41,7 @@
#include "refsig_defs_ue.h" #include "refsig_defs_ue.h"
#include "PHY/defs_nr_UE.h" #include "PHY/defs_nr_UE.h"
#include "nr_mod_table.h" //#include "nr_mod_table.h"
#include "common/utils/LOG/log.h" #include "common/utils/LOG/log.h"
/*Table 7.4.1.1.2-1/2 from 38.211 */ /*Table 7.4.1.1.2-1/2 from 38.211 */
...@@ -216,17 +216,29 @@ int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue, ...@@ -216,17 +216,29 @@ int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
return(0); return(0);
} }
int nr_pbch_dmrs_rx(unsigned int *nr_gold_pbch, int nr_pbch_dmrs_rx(int symbol,unsigned int *nr_gold_pbch,int32_t *output )
int32_t *output )
{ {
int m; int m,m0,m1;
uint8_t idx=0; uint8_t idx=0;
AssertFatal(symbol>=0 && symbol <3,"illegal symbol %d\n",symbol);
if (symbol == 0) {
m0=0;
m1=60;
}
else if (symbol == 1) {
m0=60;
m1=84;
}
else {
m0=84;
m1=144;
}
// printf("Generating pilots symbol %d, m0 %d, m1 %d\n",symbol,m0,m1);
/// QPSK modulation /// QPSK modulation
for (m=0; m<NR_PBCH_DMRS_LENGTH>>1; m++) { for (m=m0; m<m1; m++) {
idx = ((((nr_gold_pbch[(m<<1)>>5])>>((m<<1)&0x1f))&1)<<1) ^ (((nr_gold_pbch[((m<<1)+1)>>5])>>(((m<<1)+1)&0x1f))&1); idx = ((((nr_gold_pbch[(m<<1)>>5])>>((m<<1)&0x1f))&1)<<1) ^ (((nr_gold_pbch[((m<<1)+1)>>5])>>(((m<<1)+1)&0x1f))&1);
((int16_t*)output)[m<<1] = nr_rx_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1]; ((int16_t*)output)[(m-m0)<<1] = nr_rx_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
((int16_t*)output)[(m<<1)+1] = nr_rx_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1]; ((int16_t*)output)[((m-m0)<<1)+1] = nr_rx_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
#ifdef DEBUG_PBCH #ifdef DEBUG_PBCH
if (m<16) if (m<16)
......
...@@ -63,7 +63,7 @@ ...@@ -63,7 +63,7 @@
/* PSS configuration */ /* PSS configuration */
#define SYNCHRO_FFT_SIZE_MAX (2048) /* maximum size of fft for synchronisation */ #define SYNCHRO_FFT_SIZE_MAX (8192) /* maximum size of fft for synchronisation */
#define NO_RATE_CHANGE (1) #define NO_RATE_CHANGE (1)
...@@ -102,13 +102,18 @@ EXTERN int16_t *primary_synchro_nr[NUMBER_PSS_SEQUENCE] ...@@ -102,13 +102,18 @@ EXTERN int16_t *primary_synchro_nr[NUMBER_PSS_SEQUENCE]
= { NULL, NULL, NULL} = { NULL, NULL, NULL}
#endif #endif
; ;
EXTERN int16_t *primary_synchro_nr2[NUMBER_PSS_SEQUENCE]
#ifdef INIT_VARIABLES_PSS_NR_H
= { NULL, NULL, NULL}
#endif
;
EXTERN int16_t *primary_synchro_time_nr[NUMBER_PSS_SEQUENCE] EXTERN int16_t *primary_synchro_time_nr[NUMBER_PSS_SEQUENCE]
#ifdef INIT_VARIABLES_PSS_NR_H #ifdef INIT_VARIABLES_PSS_NR_H
= { NULL, NULL, NULL} = { NULL, NULL, NULL}
#endif #endif
; ;
EXTERN int *pss_corr_ue[NUMBER_PSS_SEQUENCE] EXTERN int64_t *pss_corr_ue[NUMBER_PSS_SEQUENCE]
#ifdef INIT_VARIABLES_PSS_NR_H #ifdef INIT_VARIABLES_PSS_NR_H
= { NULL, NULL, NULL} = { NULL, NULL, NULL}
#endif #endif
......
...@@ -29,7 +29,7 @@ ...@@ -29,7 +29,7 @@
/*!\brief This function generates the NR Gold sequence (38-211, Sec 5.2.1) for the PBCH DMRS. /*!\brief This function generates the NR Gold sequence (38-211, Sec 5.2.1) for the PBCH DMRS.
@param PHY_VARS_NR_UE* ue structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables @param PHY_VARS_NR_UE* ue structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables
*/ */
int nr_pbch_dmrs_rx(unsigned int *nr_gold_pbch, int32_t *output ); int nr_pbch_dmrs_rx(int dmrss,unsigned int *nr_gold_pbch, int32_t *output );
/*!\brief This function generates the NR Gold sequence (38-211, Sec 5.2.1) for the PDCCH DMRS. /*!\brief This function generates the NR Gold sequence (38-211, Sec 5.2.1) for the PDCCH DMRS.
@param PHY_VARS_NR_UE* ue structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables @param PHY_VARS_NR_UE* ue structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables
......
...@@ -51,7 +51,7 @@ ...@@ -51,7 +51,7 @@
#define NUMBER_SSS_SEQUENCE (336) #define NUMBER_SSS_SEQUENCE (336)
#define INVALID_SSS_SEQUENCE (NUMBER_SSS_SEQUENCE) #define INVALID_SSS_SEQUENCE (NUMBER_SSS_SEQUENCE)
#define LENGTH_SSS_NR (127) #define LENGTH_SSS_NR (127)
#define SCALING_METRIC_SSS_NR (19) #define SCALING_METRIC_SSS_NR (15)//(19)
#define N_ID_2_NUMBER (NUMBER_PSS_SEQUENCE) #define N_ID_2_NUMBER (NUMBER_PSS_SEQUENCE)
#define N_ID_1_NUMBER (NUMBER_SSS_SEQUENCE) #define N_ID_1_NUMBER (NUMBER_SSS_SEQUENCE)
......
...@@ -133,7 +133,7 @@ uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format, ...@@ -133,7 +133,7 @@ uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
} }
void nr_pdcch_scrambling(uint32_t *in, void nr_pdcch_scrambling(uint32_t *in,
uint8_t size, uint16_t size,
uint32_t Nid, uint32_t Nid,
uint32_t n_RNTI, uint32_t n_RNTI,
uint32_t* out) { uint32_t* out) {
...@@ -148,8 +148,12 @@ void nr_pdcch_scrambling(uint32_t *in, ...@@ -148,8 +148,12 @@ void nr_pdcch_scrambling(uint32_t *in,
if ((i&0x1f)==0) { if ((i&0x1f)==0) {
s = lte_gold_generic(&x1, &x2, reset); s = lte_gold_generic(&x1, &x2, reset);
reset = 0; reset = 0;
if (i){
in++;
out++;
} }
*out ^= (((*in)>>i)&1) ^ ((s>>i)&1); }
(*out) ^= ((((*in)>>(i&0x1f))&1) ^ ((s>>(i&0x1f))&1))<<(i&0x1f);
} }
} }
...@@ -217,9 +221,13 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars, ...@@ -217,9 +221,13 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
nr_polar_init(nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L); nr_polar_init(nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
t_nrPolar_paramsPtr currentPtr = nr_polar_params(*nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L); t_nrPolar_paramsPtr currentPtr = nr_polar_params(*nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
#endif #endif
polar_encoder_dci(dci_alloc.dci_pdu, encoder_output, currentPtr, pdcch_params.rnti);
polar_encoder_dci(dci_alloc.dci_pdu, encoder_output, currentPtr, pdcch_params.rnti);
#ifdef DEBUG_CHANNEL_CODING #ifdef DEBUG_CHANNEL_CODING
printf("polar rnti %d\n",pdcch_params.rnti);
for (int i=0;i<54;i++) printf("Encoded Payload: [%d]->0x%08x \n", i,encoder_output[i]);
printf("DCI PDU: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n", printf("DCI PDU: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
dci_alloc.dci_pdu[0], dci_alloc.dci_pdu[1], dci_alloc.dci_pdu[2], dci_alloc.dci_pdu[3]); dci_alloc.dci_pdu[0], dci_alloc.dci_pdu[1], dci_alloc.dci_pdu[2], dci_alloc.dci_pdu[3]);
printf("Encoded Payload: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n", printf("Encoded Payload: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
...@@ -227,8 +235,14 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars, ...@@ -227,8 +235,14 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
#endif #endif
/// Scrambling /// Scrambling
uint32_t scrambled_output[NR_MAX_DCI_SIZE_DWORD]; uint32_t scrambled_output[NR_MAX_DCI_SIZE_DWORD]={0};
nr_pdcch_scrambling(encoder_output, encoded_length, Nid, n_RNTI, scrambled_output); nr_pdcch_scrambling(encoder_output, encoded_length, Nid, n_RNTI, scrambled_output);
#ifdef DEBUG_CHANNEL_CODING
printf("scrambled output: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\t [4]->0x%08x\t [5]->0x%08x\t \
[6]->0x%08x \t [7]->0x%08x \t [8]->0x%08x \t [9]->0x%08x\t [10]->0x%08x\t [11]->0x%08x\n",
scrambled_output[0], scrambled_output[1], scrambled_output[2], scrambled_output[3], scrambled_output[4],scrambled_output[5],
scrambled_output[6], scrambled_output[7], scrambled_output[8], scrambled_output[9], scrambled_output[10],scrambled_output[11] );
#endif
// QPSK modulation // QPSK modulation
int16_t mod_dci[NR_MAX_DCI_SIZE>>1]; int16_t mod_dci[NR_MAX_DCI_SIZE>>1];
...@@ -237,8 +251,8 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars, ...@@ -237,8 +251,8 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
mod_dci[i<<1] = nr_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1]; mod_dci[i<<1] = nr_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
mod_dci[(i<<1)+1] = nr_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1]; mod_dci[(i<<1)+1] = nr_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
#ifdef DEBUG_DCI #ifdef DEBUG_DCI
printf("i %d idx %d b0-b1 %d-%d mod_dci %d %d\n", i, idx, (((encoder_output[(i<<1)>>5])>>((i<<1)&0x1f))&1), printf("i %d idx %d b0-b1 %d-%d mod_dci %d %d\n", i, idx, (((scrambled_output[(i<<1)>>5])>>((i<<1)&0x1f))&1),
(((encoder_output[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1), mod_dci[(i<<1)], mod_dci[(i<<1)+1]); (((scrambled_output[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1), mod_dci[(i<<1)], mod_dci[(i<<1)+1]);
#endif #endif
} }
...@@ -307,6 +321,7 @@ printf("\n"); ...@@ -307,6 +321,7 @@ printf("\n");
else { // DCI payload else { // DCI payload
((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dci[dci_idx<<1]) >> 15; ((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dci[dci_idx<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dci[(dci_idx<<1) + 1]) >> 15; ((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dci[(dci_idx<<1) + 1]) >> 15;
//printf("dci output %d %d\n",(a * mod_dci[dci_idx<<1]) >> 15, (a * mod_dci[(dci_idx<<1) + 1]) >> 15);
dci_idx++; dci_idx++;
} }
k++; k++;
......
...@@ -41,7 +41,7 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars, ...@@ -41,7 +41,7 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
nfapi_nr_config_request_t config); nfapi_nr_config_request_t config);
void nr_pdcch_scrambling(uint32_t *in, void nr_pdcch_scrambling(uint32_t *in,
uint8_t size, uint16_t size,
uint32_t Nid, uint32_t Nid,
uint32_t n_RNTI, uint32_t n_RNTI,
uint32_t* out); uint32_t* out);
......
...@@ -39,7 +39,8 @@ ...@@ -39,7 +39,8 @@
//#define DEBUG_PBCH_ENCODING //#define DEBUG_PBCH_ENCODING
//#define DEBUG_PBCH_DMRS //#define DEBUG_PBCH_DMRS
extern short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT]; //extern short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT];
#include "PHY/NR_REFSIG/nr_mod_table.h"
int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs, int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
int32_t **txdataF, int32_t **txdataF,
...@@ -54,7 +55,7 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs, ...@@ -54,7 +55,7 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
uint8_t idx=0; uint8_t idx=0;
uint8_t nushift = config->sch_config.physical_cell_id.value &3; uint8_t nushift = config->sch_config.physical_cell_id.value &3;
LOG_I(PHY, "PBCH DMRS mapping started at symbol %d shift %d\n", ssb_start_symbol+1, nushift); LOG_D(PHY, "PBCH DMRS mapping started at symbol %d shift %d\n", ssb_start_symbol+1, nushift);
/// QPSK modulation /// QPSK modulation
for (int m=0; m<NR_PBCH_DMRS_LENGTH; m++) { for (int m=0; m<NR_PBCH_DMRS_LENGTH; m++) {
...@@ -84,6 +85,11 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs, ...@@ -84,6 +85,11 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
#endif #endif
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_dmrs[m<<1]) >> 15; ((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_dmrs[m<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[(m<<1) + 1]) >> 15; ((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[(m<<1) + 1]) >> 15;
#ifdef DEBUG_PBCH_DMRS
printf("(%d,%d)\n",
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1],
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
#endif
k+=4; k+=4;
if (k >= frame_parms->ofdm_symbol_size) if (k >= frame_parms->ofdm_symbol_size)
...@@ -100,6 +106,11 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs, ...@@ -100,6 +106,11 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
#endif #endif
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_dmrs[m<<1]) >> 15; ((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_dmrs[m<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[(m<<1) + 1]) >> 15; ((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[(m<<1) + 1]) >> 15;
#ifdef DEBUG_PBCH_DMRS
printf("(%d,%d)\n",
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1],
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
#endif
k+=(m==71)?148:4; // Jump from 44+nu to 192+nu k+=(m==71)?148:4; // Jump from 44+nu to 192+nu
if (k >= frame_parms->ofdm_symbol_size) if (k >= frame_parms->ofdm_symbol_size)
...@@ -116,6 +127,11 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs, ...@@ -116,6 +127,11 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
#endif #endif
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_dmrs[m<<1]) >> 15; ((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_dmrs[m<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[(m<<1) + 1]) >> 15; ((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[(m<<1) + 1]) >> 15;
#ifdef DEBUG_PBCH_DMRS
printf("(%d,%d)\n",
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1],
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
#endif
k+=4; k+=4;
if (k >= frame_parms->ofdm_symbol_size) if (k >= frame_parms->ofdm_symbol_size)
...@@ -217,7 +233,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch, ...@@ -217,7 +233,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
memset((void*) xbyte, 0, 1); memset((void*) xbyte, 0, 1);
//uint8_t pbch_a_b[32]; //uint8_t pbch_a_b[32];
LOG_I(PHY, "PBCH generation started\n"); // LOG_D(PHY, "PBCH generation started\n");
memset((void*)pbch, 0, sizeof(NR_gNB_PBCH)); memset((void*)pbch, 0, sizeof(NR_gNB_PBCH));
///Payload generation ///Payload generation
......
...@@ -52,7 +52,8 @@ int nr_generate_pss( int16_t *d_pss, ...@@ -52,7 +52,8 @@ int nr_generate_pss( int16_t *d_pss,
} }
#ifdef NR_PSS_DEBUG #ifdef NR_PSS_DEBUG
write_output("d_pss.m", "d_pss", (void*)d_pss, NR_PSS_LENGTH, 1, 1); write_output("d_pss.m", "d_pss", (void*)d_pss, NR_PSS_LENGTH, 1, 0);
printf("PSS: ofdm_symbol_size %d, first_carrier_offset %d\n",frame_parms->ofdm_symbol_size,frame_parms->first_carrier_offset);
#endif #endif
/// Resource mapping /// Resource mapping
...@@ -63,9 +64,12 @@ int nr_generate_pss( int16_t *d_pss, ...@@ -63,9 +64,12 @@ int nr_generate_pss( int16_t *d_pss,
// PSS occupies a predefined position (subcarriers 56-182, symbol 0) within the SSB block starting from // PSS occupies a predefined position (subcarriers 56-182, symbol 0) within the SSB block starting from
k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier + 56; //and k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier + 56; //and
if (k>= frame_parms->ofdm_symbol_size) k-=frame_parms->ofdm_symbol_size;
l = ssb_start_symbol; l = ssb_start_symbol;
for (m = 0; m < NR_PSS_LENGTH; m++) { for (m = 0; m < NR_PSS_LENGTH; m++) {
// printf("pss: writing position k %d / %d\n",k,frame_parms->ofdm_symbol_size);
((int16_t*)txdataF[aa])[2*(l*frame_parms->ofdm_symbol_size + k)] = (a * d_pss[m]) >> 15; ((int16_t*)txdataF[aa])[2*(l*frame_parms->ofdm_symbol_size + k)] = (a * d_pss[m]) >> 15;
k++; k++;
...@@ -75,7 +79,9 @@ int nr_generate_pss( int16_t *d_pss, ...@@ -75,7 +79,9 @@ int nr_generate_pss( int16_t *d_pss,
} }
#ifdef NR_PSS_DEBUG #ifdef NR_PSS_DEBUG
write_output("pss_0.m", "pss_0", (void*)txdataF[0][2*l*frame_parms->ofdm_symbol_size], frame_parms->ofdm_symbol_size, 1, 1); LOG_M("pss_0.m", "pss_0",
(void*)&txdataF[0][ssb_start_symbol*frame_parms->ofdm_symbol_size],
frame_parms->ofdm_symbol_size, 1, 1);
#endif #endif
return 0; return 0;
......
...@@ -83,7 +83,7 @@ int nr_generate_sss( int16_t *d_sss, ...@@ -83,7 +83,7 @@ int nr_generate_sss( int16_t *d_sss,
} }
} }
#ifdef NR_SSS_DEBUG #ifdef NR_SSS_DEBUG
write_output("sss_0.m", "sss_0", (void*)txdataF[0][2*l*frame_parms->ofdm_symbol_size], frame_parms->ofdm_symbol_size, 1, 1); // write_output("sss_0.m", "sss_0", (void*)txdataF[0][l*frame_parms->ofdm_symbol_size], frame_parms->ofdm_symbol_size, 1, 1);
#endif #endif
return 0; return 0;
......
...@@ -46,7 +46,6 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -46,7 +46,6 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t eNB_id, uint8_t eNB_id,
uint8_t eNB_offset, uint8_t eNB_offset,
unsigned char Ns, unsigned char Ns,
unsigned char p,
unsigned char l, unsigned char l,
unsigned char symbol, unsigned char symbol,
unsigned short coreset_start_subcarrier, unsigned short coreset_start_subcarrier,
...@@ -56,7 +55,6 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -56,7 +55,6 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t eNB_id, uint8_t eNB_id,
uint8_t eNB_offset, uint8_t eNB_offset,
unsigned char Ns, unsigned char Ns,
unsigned char p,
unsigned char l, unsigned char l,
unsigned char symbol); unsigned char symbol);
...@@ -64,7 +62,6 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -64,7 +62,6 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t eNB_id, uint8_t eNB_id,
uint8_t eNB_offset, uint8_t eNB_offset,
unsigned char Ns, unsigned char Ns,
unsigned char p,
unsigned char l, unsigned char l,
unsigned char symbol, unsigned char symbol,
unsigned short bwp_start_subcarrier, unsigned short bwp_start_subcarrier,
......
This diff is collapsed.
This diff is collapsed.
...@@ -1362,6 +1362,7 @@ void generate_RIV_tables(void); ...@@ -1362,6 +1362,7 @@ void generate_RIV_tables(void);
N_RB_DL, PHICH_CONFIG and Nid_cell) and the UE can begin decoding PDCCH and DLSCH SI to retrieve the rest. Once these N_RB_DL, PHICH_CONFIG and Nid_cell) and the UE can begin decoding PDCCH and DLSCH SI to retrieve the rest. Once these
parameters are know, the routine calls some basic initialization routines (cell-specific reference signals, etc.) parameters are know, the routine calls some basic initialization routines (cell-specific reference signals, etc.)
@param phy_vars_ue Pointer to UE variables @param phy_vars_ue Pointer to UE variables
@param mode current running mode
*/ */
int nr_initial_sync(PHY_VARS_NR_UE *phy_vars_ue, runmode_t mode); int nr_initial_sync(PHY_VARS_NR_UE *phy_vars_ue, runmode_t mode);
......
This diff is collapsed.
This diff is collapsed.
...@@ -158,6 +158,128 @@ int32_t dot_product(int16_t *x, ...@@ -158,6 +158,128 @@ int32_t dot_product(int16_t *x,
#endif #endif
} }
int64_t dot_product64(int16_t *x,
int16_t *y,
uint32_t N, //must be a multiple of 8
uint8_t output_shift)
{
uint32_t n;
#if defined(__x86_64__) || defined(__i386__)
__m128i *x128,*y128,mmtmp1,mmtmp2,mmtmp3,mmcumul,mmcumul_re,mmcumul_im;
__m128i minus_i = _mm_set_epi16(-1,1,-1,1,-1,1,-1,1);
int32_t result;
x128 = (__m128i*) x;
y128 = (__m128i*) y;
mmcumul_re = _mm_setzero_si128();
mmcumul_im = _mm_setzero_si128();
for (n=0; n<(N>>2); n++) {
// printf("n=%d, x128=%p, y128=%p\n",n,x128,y128);
// print_shorts("x",&x128[0]);
// print_shorts("y",&y128[0]);
// this computes Re(z) = Re(x)*Re(y) + Im(x)*Im(y)
mmtmp1 = _mm_madd_epi16(x128[0],y128[0]);
// print_ints("retmp",&mmtmp1);
// mmtmp1 contains real part of 4 consecutive outputs (32-bit)
// shift and accumulate results
mmtmp1 = _mm_srai_epi32(mmtmp1,output_shift);
mmcumul_re = _mm_add_epi32(mmcumul_re,mmtmp1);
//print_ints("re",&mmcumul_re);
// this computes Im(z) = Re(x)*Im(y) - Re(y)*Im(x)
mmtmp2 = _mm_shufflelo_epi16(y128[0],_MM_SHUFFLE(2,3,0,1));
//print_shorts("y",&mmtmp2);
mmtmp2 = _mm_shufflehi_epi16(mmtmp2,_MM_SHUFFLE(2,3,0,1));
//print_shorts("y",&mmtmp2);
mmtmp2 = _mm_sign_epi16(mmtmp2,minus_i);
// print_shorts("y",&mmtmp2);
mmtmp3 = _mm_madd_epi16(x128[0],mmtmp2);
//print_ints("imtmp",&mmtmp3);
// mmtmp3 contains imag part of 4 consecutive outputs (32-bit)
// shift and accumulate results
mmtmp3 = _mm_srai_epi32(mmtmp3,output_shift);
mmcumul_im = _mm_add_epi32(mmcumul_im,mmtmp3);
//print_ints("im",&mmcumul_im);
x128++;
y128++;
}
// this gives Re Re Im Im
mmcumul = _mm_hadd_epi32(mmcumul_re,mmcumul_im);
//print_ints("cumul1",&mmcumul);
// this gives Re Im Re Im
mmcumul = _mm_hadd_epi32(mmcumul,mmcumul);
//print_ints("cumul2",&mmcumul);
//mmcumul = _mm_srai_epi32(mmcumul,output_shift);
// extract the lower half
result = _mm_extract_epi64(mmcumul,0);
//printf("result: (%d,%d)\n",((int32_t*)&result)[0],((int32_t*)&result)[1]);
_mm_empty();
_m_empty();
return(result);
#elif defined(__arm__)
int16x4_t *x_128=(int16x4_t*)x;
int16x4_t *y_128=(int16x4_t*)y;
int32x4_t tmp_re,tmp_im;
int32x4_t tmp_re1,tmp_im1;
int32x4_t re_cumul,im_cumul;
int32x2_t re_cumul2,im_cumul2;
int32x4_t shift = vdupq_n_s32(-output_shift);
int32x2x2_t result2;
int16_t conjug[4]__attribute__((aligned(16))) = {-1,1,-1,1} ;
re_cumul = vdupq_n_s32(0);
im_cumul = vdupq_n_s32(0);
for (n=0; n<(N>>2); n++) {
tmp_re = vmull_s16(*x_128++, *y_128++);
//tmp_re = [Re(x[0])Re(y[0]) Im(x[0])Im(y[0]) Re(x[1])Re(y[1]) Im(x[1])Im(y[1])]
tmp_re1 = vmull_s16(*x_128++, *y_128++);
//tmp_re1 = [Re(x1[1])Re(x2[1]) Im(x1[1])Im(x2[1]) Re(x1[1])Re(x2[2]) Im(x1[1])Im(x2[2])]
tmp_re = vcombine_s32(vpadd_s32(vget_low_s32(tmp_re),vget_high_s32(tmp_re)),
vpadd_s32(vget_low_s32(tmp_re1),vget_high_s32(tmp_re1)));
//tmp_re = [Re(ch[0])Re(rx[0])+Im(ch[0])Im(ch[0]) Re(ch[1])Re(rx[1])+Im(ch[1])Im(ch[1]) Re(ch[2])Re(rx[2])+Im(ch[2]) Im(ch[2]) Re(ch[3])Re(rx[3])+Im(ch[3])Im(ch[3])]
tmp_im = vmull_s16(vrev32_s16(vmul_s16(*x_128++,*(int16x4_t*)conjug)),*y_128++);
//tmp_im = [-Im(ch[0])Re(rx[0]) Re(ch[0])Im(rx[0]) -Im(ch[1])Re(rx[1]) Re(ch[1])Im(rx[1])]
tmp_im1 = vmull_s16(vrev32_s16(vmul_s16(*x_128++,*(int16x4_t*)conjug)),*y_128++);
//tmp_im1 = [-Im(ch[2])Re(rx[2]) Re(ch[2])Im(rx[2]) -Im(ch[3])Re(rx[3]) Re(ch[3])Im(rx[3])]
tmp_im = vcombine_s32(vpadd_s32(vget_low_s32(tmp_im),vget_high_s32(tmp_im)),
vpadd_s32(vget_low_s32(tmp_im1),vget_high_s32(tmp_im1)));
//tmp_im = [-Im(ch[0])Re(rx[0])+Re(ch[0])Im(rx[0]) -Im(ch[1])Re(rx[1])+Re(ch[1])Im(rx[1]) -Im(ch[2])Re(rx[2])+Re(ch[2])Im(rx[2]) -Im(ch[3])Re(rx[3])+Re(ch[3])Im(rx[3])]
re_cumul = vqaddq_s32(re_cumul,vqshlq_s32(tmp_re,shift));
im_cumul = vqaddq_s32(im_cumul,vqshlq_s32(tmp_im,shift));
}
re_cumul2 = vpadd_s32(vget_low_s32(re_cumul),vget_high_s32(re_cumul));
im_cumul2 = vpadd_s32(vget_low_s32(im_cumul),vget_high_s32(im_cumul));
re_cumul2 = vpadd_s32(re_cumul2,re_cumul2);
im_cumul2 = vpadd_s32(im_cumul2,im_cumul2);
result2 = vzip_s32(re_cumul2,im_cumul2);
return(vget_lane_s32(result2.val[0],0));
#endif
}
#ifdef MAIN #ifdef MAIN
void print_bytes(char *s,__m128i *x) void print_bytes(char *s,__m128i *x)
......
...@@ -624,6 +624,14 @@ int8_t dB_fixed(uint32_t x) ...@@ -624,6 +624,14 @@ int8_t dB_fixed(uint32_t x)
return dB_power; return dB_power;
} }
uint8_t dB_fixed64(uint64_t x)
{
if (x<(((uint64_t)1)<<32)) return(dB_fixed((uint32_t)x));
else return(4*dB_table[255] + dB_fixed(x>>32));
}
int8_t dB_fixed2(uint32_t x, uint32_t y) int8_t dB_fixed2(uint32_t x, uint32_t y)
{ {
......
...@@ -4466,6 +4466,7 @@ void dft2048(int16_t *x,int16_t *y,int scale) ...@@ -4466,6 +4466,7 @@ void dft2048(int16_t *x,int16_t *y,int scale)
_mm_empty(); _mm_empty();
_m_empty(); _m_empty();
} }
void idft2048(int16_t *x,int16_t *y,int scale) void idft2048(int16_t *x,int16_t *y,int scale)
...@@ -4569,6 +4570,7 @@ void dft2048(int16_t *x,int16_t *y,int scale) ...@@ -4569,6 +4570,7 @@ void dft2048(int16_t *x,int16_t *y,int scale)
int i; int i;
simd256_q15_t ONE_OVER_SQRT2_Q15_128 = set1_int16_simd256(ONE_OVER_SQRT2_Q15); simd256_q15_t ONE_OVER_SQRT2_Q15_128 = set1_int16_simd256(ONE_OVER_SQRT2_Q15);
xtmpp = xtmp; xtmpp = xtmp;
for (i=0; i<4; i++) { for (i=0; i<4; i++) {
......
...@@ -350,6 +350,11 @@ int32_t dot_product(int16_t *x, ...@@ -350,6 +350,11 @@ int32_t dot_product(int16_t *x,
uint32_t N, //must be a multiple of 8 uint32_t N, //must be a multiple of 8
uint8_t output_shift); uint8_t output_shift);
int64_t dot_product64(int16_t *x,
int16_t *y,
uint32_t N, //must be a multiple of 8
uint8_t output_shift);
void dft12(int16_t *x,int16_t *y); void dft12(int16_t *x,int16_t *y);
void dft24(int16_t *x,int16_t *y,uint8_t scale_flag); void dft24(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft36(int16_t *x,int16_t *y,uint8_t scale_flag); void dft36(int16_t *x,int16_t *y,uint8_t scale_flag);
......
...@@ -920,14 +920,15 @@ typedef struct { ...@@ -920,14 +920,15 @@ typedef struct {
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx /// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..287] (hard coded) /// - second index: ? [0..287] (hard coded)
int32_t **dl_ch_estimates_ext; int32_t **dl_ch_estimates_ext;
int log2_maxh;
uint8_t pbch_a[NR_POLAR_PBCH_PAYLOAD_BITS>>3]; uint8_t pbch_a[NR_POLAR_PBCH_PAYLOAD_BITS>>3];
uint32_t pbch_a_interleaved; uint32_t pbch_a_interleaved;
uint32_t pbch_a_prime; uint32_t pbch_a_prime;
uint8_t pbch_e[NR_POLAR_PBCH_E]; uint8_t pbch_e[NR_POLAR_PBCH_E];
double demod_pbch_e[NR_POLAR_PBCH_E]; int16_t demod_pbch_e[NR_POLAR_PBCH_E];
/// \brief Pointer to PBCH llrs. /// \brief Pointer to PBCH llrs.
/// - first index: ? [0..1919] (hard coded) /// - first index: ? [0..1919] (hard coded)
int8_t *llr; int16_t *llr;
/// \brief Pointer to PBCH decoded output. /// \brief Pointer to PBCH decoded output.
/// - first index: ? [0..63] (hard coded) /// - first index: ? [0..63] (hard coded)
uint8_t *decoded_output; uint8_t *decoded_output;
...@@ -1061,7 +1062,7 @@ typedef struct { ...@@ -1061,7 +1062,7 @@ typedef struct {
uint32_t dmrs_pbch_bitmap_nr[DMRS_PBCH_I_SSB][DMRS_PBCH_N_HF][DMRS_BITMAP_SIZE]; uint32_t dmrs_pbch_bitmap_nr[DMRS_PBCH_I_SSB][DMRS_PBCH_N_HF][DMRS_BITMAP_SIZE];
#endif #endif
t_nrPolar_paramsPtr nrPolar_params; t_nrPolar_params *nrPolar_params;
/// PBCH DMRS sequence /// PBCH DMRS sequence
uint32_t nr_gold_pbch[2][64][NR_PBCH_DMRS_LENGTH_DWORD]; uint32_t nr_gold_pbch[2][64][NR_PBCH_DMRS_LENGTH_DWORD];
...@@ -1129,6 +1130,8 @@ typedef struct { ...@@ -1129,6 +1130,8 @@ typedef struct {
// uint8_t prach_timer; // uint8_t prach_timer;
uint8_t decode_SIB; uint8_t decode_SIB;
uint8_t decode_MIB; uint8_t decode_MIB;
/// temporary offset during cell search prior to MIB decoding
int ssb_offset;
int rx_offset; /// Timing offset int rx_offset; /// Timing offset
int rx_offset_diff; /// Timing adjustment for ofdm symbol0 on HW USRP int rx_offset_diff; /// Timing adjustment for ofdm symbol0 on HW USRP
int time_sync_cell; int time_sync_cell;
......
...@@ -160,10 +160,14 @@ typedef struct { ...@@ -160,10 +160,14 @@ typedef struct {
typedef struct NR_DL_FRAME_PARMS { typedef struct NR_DL_FRAME_PARMS {
/// frequency range /// frequency range
nr_frequency_range_e freq_range; nr_frequency_range_e freq_range;
/// Placeholder to replace overlapping fields below
nfapi_nr_rf_config_t rf_config;
/// Placeholder to replace SSB overlapping fields below
nfapi_nr_sch_config_t sch_config;
/// Number of resource blocks (RB) in DL /// Number of resource blocks (RB) in DL
uint8_t N_RB_DL; int N_RB_DL;
/// Number of resource blocks (RB) in UL /// Number of resource blocks (RB) in UL
uint8_t N_RB_UL; int N_RB_UL;
/// total Number of Resource Block Groups: this is ceil(N_PRB/P) /// total Number of Resource Block Groups: this is ceil(N_PRB/P)
uint8_t N_RBG; uint8_t N_RBG;
/// Total Number of Resource Block Groups SubSets: this is P /// Total Number of Resource Block Groups SubSets: this is P
......
...@@ -32,7 +32,7 @@ extern char fmageren_name2[512]; ...@@ -32,7 +32,7 @@ extern char fmageren_name2[512];
extern unsigned int RX_DMA_BUFFER[4][NB_ANTENNAS_RX]; extern unsigned int RX_DMA_BUFFER[4][NB_ANTENNAS_RX];
extern unsigned int TX_DMA_BUFFER[4][NB_ANTENNAS_TX]; extern unsigned int TX_DMA_BUFFER[4][NB_ANTENNAS_TX];
#include "PHY/LTE_TRANSPORT/transport_extern.h" //#include "PHY/LTE_TRANSPORT/transport_extern.h"
extern int number_of_cards; extern int number_of_cards;
......
...@@ -111,9 +111,9 @@ int nr_get_ssb_start_symbol(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *f ...@@ -111,9 +111,9 @@ int nr_get_ssb_start_symbol(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *f
void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *fp) void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *fp)
{ {
int start_rb = cfg->sch_config.n_ssb_crb.value / pow(2,cfg->subframe_config.numerology_index_mu.value); int start_rb = cfg->sch_config.n_ssb_crb.value / (1<<cfg->subframe_config.numerology_index_mu.value);
fp->ssb_start_subcarrier = 12 * start_rb + cfg->sch_config.ssb_subcarrier_offset.value; fp->ssb_start_subcarrier = 12 * start_rb + cfg->sch_config.ssb_subcarrier_offset.value;
LOG_D(PHY, "SSB first subcarrier %d\n", fp->ssb_start_subcarrier); LOG_D(PHY, "SSB first subcarrier %d (%d,%d)\n", fp->ssb_start_subcarrier,start_rb,cfg->sch_config.ssb_subcarrier_offset.value);
} }
void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int subframe) { void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int subframe) {
...@@ -135,12 +135,13 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int subframe) { ...@@ -135,12 +135,13 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int subframe) {
if (subframe == ss_subframe) if (subframe == ss_subframe)
{ {
// Current implementation is based on SSB in first half frame, first candidate // Current implementation is based on SSB in first half frame, first candidate
LOG_I(PHY,"SS TX: frame %d, subframe %d, start_symbol %d\n",frame,subframe, ssb_start_symbol); LOG_D(PHY,"SS TX: frame %d, subframe %d, start_symbol %d\n",frame,subframe, ssb_start_symbol);
nr_generate_pss(gNB->d_pss, txdataF, AMP, ssb_start_symbol, cfg, fp); nr_generate_pss(gNB->d_pss, txdataF, AMP, ssb_start_symbol, cfg, fp);
nr_generate_sss(gNB->d_sss, txdataF, AMP_OVER_2, ssb_start_symbol, cfg, fp); nr_generate_sss(gNB->d_sss, txdataF, AMP_OVER_2, ssb_start_symbol, cfg, fp);
if (!(frame&7)){ if (!(frame&7)){
LOG_D(PHY,"%d.%d : pbch_configured %d\n",frame,subframe,gNB->pbch_configured);
if (gNB->pbch_configured != 1)return; if (gNB->pbch_configured != 1)return;
gNB->pbch_configured = 0; gNB->pbch_configured = 0;
} }
...@@ -182,7 +183,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, ...@@ -182,7 +183,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
num_dci = gNB->pdcch_vars.num_dci; num_dci = gNB->pdcch_vars.num_dci;
if (num_dci) { if (num_dci) {
LOG_I(PHY, "[gNB %d] Frame %d subframe %d \ LOG_D(PHY, "[gNB %d] Frame %d subframe %d \
Calling nr_generate_dci_top (number of DCI %d)\n", gNB->Mod_id, frame, subframe, num_dci); Calling nr_generate_dci_top (number of DCI %d)\n", gNB->Mod_id, frame, subframe, num_dci);
uint8_t slot_idx = gNB->pdcch_vars.dci_alloc[0].pdcch_params.first_slot; uint8_t slot_idx = gNB->pdcch_vars.dci_alloc[0].pdcch_params.first_slot;
......
...@@ -37,6 +37,7 @@ ...@@ -37,6 +37,7 @@
lte_subframe_t nr_subframe_select (nfapi_nr_config_request_t *cfg, unsigned char subframe); lte_subframe_t nr_subframe_select (nfapi_nr_config_request_t *cfg, unsigned char subframe);
void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *fp); void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *fp);
void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, gNB_rxtx_proc_t *proc, int do_meas); void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, gNB_rxtx_proc_t *proc, int do_meas);
void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int subframe);
void nr_init_feptx_thread(RU_t *ru,pthread_attr_t *attr_feptx); void nr_init_feptx_thread(RU_t *ru,pthread_attr_t *attr_feptx);
void nr_feptx_ofdm(RU_t *ru); void nr_feptx_ofdm(RU_t *ru);
void nr_feptx_ofdm_2thread(RU_t *ru); void nr_feptx_ofdm_2thread(RU_t *ru);
......
This diff is collapsed.
...@@ -39,9 +39,10 @@ typedef int nfapi_nr_pfcch_commonSearchSpaces_t; ...@@ -39,9 +39,10 @@ typedef int nfapi_nr_pfcch_commonSearchSpaces_t;
#include "../nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h" #include "../nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h"
#include "PHY/defs_nr_UE.h" #include "PHY/defs_nr_UE.h"
#include "PHY/INIT/init_extern.h"
#include "PHY/phy_extern_nr_ue.h" #include "PHY/phy_extern_nr_ue.h"
#include "PHY/NR_TRANSPORT/nr_transport.h" #include "PHY/INIT/init_extern.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
#include "PHY/NR_REFSIG/ss_pbch_nr.h" #include "PHY/NR_REFSIG/ss_pbch_nr.h"
#include "PHY/NR_REFSIG/pss_nr.h" #include "PHY/NR_REFSIG/pss_nr.h"
...@@ -222,7 +223,7 @@ void set_sequence_sss(PHY_VARS_NR_UE *PHY_vars_UE, int offset, int slot_offset) ...@@ -222,7 +223,7 @@ void set_sequence_sss(PHY_VARS_NR_UE *PHY_vars_UE, int offset, int slot_offset)
} }
#else #else
insert_sss_nr(&tmp, frame_parms); insert_sss_nr(tmp, frame_parms);
#endif #endif
} }
...@@ -393,7 +394,7 @@ int main(int argc, char *argv[]) ...@@ -393,7 +394,7 @@ int main(int argc, char *argv[])
int size_test_position; int size_test_position;
/* this is a pointer to the function in charge of the test */ /* this is a pointer to the function in charge of the test */
int (*p_test_synchro_pss_sss)(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, int sequence_number, test_t *test) = test_synchro_pss_sss; int (*p_test_synchro_pss_sss)(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, int sequence_number) = test_synchro_pss_sss_nr;
#if 0 #if 0
int Nid_cell[] = { (3*0+0), (3*71+0), (3*21+2), (3*21+2), (3*55+1), (3*111+2) }; int Nid_cell[] = { (3*0+0), (3*71+0), (3*21+2), (3*21+2), (3*55+1), (3*111+2) };
...@@ -413,21 +414,19 @@ int main(int argc, char *argv[]) ...@@ -413,21 +414,19 @@ int main(int argc, char *argv[])
size_test_position = sizeof(test_position)/sizeof(int); size_test_position = sizeof(test_position)/sizeof(int);
printf("***********************************\n"); printf("***********************************\n");
printf(" %s Test NR synchronisation \n", test.test_current); printf(" %s Test NR synchroisation \n", test.test_current);
printf("***********************************\n"); printf("***********************************\n");
for (unsigned int index = 0; index < (sizeof(Nid_cell)/sizeof(int)); index++) { for (unsigned int index = 0; index < (sizeof(Nid_cell)/sizeof(int)); index++) {
PHY_vars_eNB->frame_parms.Nid_cell = Nid_cell[index]; Nid2 = GET_NID2(Nid_cell[index]);
Nid1 = GET_NID1(Nid_cell[index]);
Nid2 = GET_NID2(PHY_vars_eNB->frame_parms.Nid_cell);
Nid1 = GET_NID1(PHY_vars_eNB->frame_parms.Nid_cell);
for (int position = 0; position < size_test_position; position++) { for (int position = 0; position < size_test_position; position++) {
PHY_vars_UE->frame_parms.Nid_cell = (3 * N_ID_1_NUMBER) + N_ID_2_NUMBER; /* set to unvalid value */ PHY_vars_UE->frame_parms.Nid_cell = (3 * N_ID_1_NUMBER) + N_ID_2_NUMBER; /* set to unvalid value */
decoded_pbch = (*p_test_synchro_pss_sss)(PHY_vars_UE, test_position[position], Nid2, &test); /* return phase index which gives phase error from an array */ decoded_pbch = (*p_test_synchro_pss_sss)(PHY_vars_UE, test_position[position], Nid2); /* return phase index which gives phase error from an array */
test.number_of_tests++; test.number_of_tests++;
printf("\n%s ", test.test_current); printf("\n%s ", test.test_current);
......
...@@ -398,7 +398,7 @@ void multipath_tv_channel(channel_desc_t *desc, ...@@ -398,7 +398,7 @@ void multipath_tv_channel(channel_desc_t *desc,
double N_RB2sampling_rate(uint16_t N_RB); double N_RB2sampling_rate(uint16_t N_RB);
double N_RB2channel_bandwidth(uint16_t N_RB); double N_RB2channel_bandwidth(uint16_t N_RB);
#include "targets/RT/USER/rfsim.h" //#include "targets/RT/USER/rfsim.h"
void do_DL_sig(sim_t *sim, void do_DL_sig(sim_t *sim,
uint16_t subframe, uint16_t subframe,
......
...@@ -75,7 +75,7 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP, ...@@ -75,7 +75,7 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
pdu_rel15->vrb_to_prb_mapping = 0; pdu_rel15->vrb_to_prb_mapping = 0;
pdu_rel15->mcs = 12; pdu_rel15->mcs = 12;
pdu_rel15->tb_scaling = 1; pdu_rel15->tb_scaling = 1;
LOG_I(MAC, "[gNB scheduler phytest] DCI type 1 payload: freq_alloc %d, time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d\n", LOG_D(MAC, "[gNB scheduler phytest] DCI type 1 payload: freq_alloc %d, time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d\n",
pdu_rel15->frequency_domain_assignment, pdu_rel15->frequency_domain_assignment,
pdu_rel15->time_domain_assignment, pdu_rel15->time_domain_assignment,
pdu_rel15->vrb_to_prb_mapping, pdu_rel15->vrb_to_prb_mapping,
...@@ -86,7 +86,7 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP, ...@@ -86,7 +86,7 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
params_rel15->rnti_type = NFAPI_NR_RNTI_RA; params_rel15->rnti_type = NFAPI_NR_RNTI_RA;
params_rel15->dci_format = NFAPI_NR_DL_DCI_FORMAT_1_0; params_rel15->dci_format = NFAPI_NR_DL_DCI_FORMAT_1_0;
//params_rel15->aggregation_level = 1; //params_rel15->aggregation_level = 1;
LOG_I(MAC, "DCI type 1 params: rmsi_pdcch_config %d, rnti %d, rnti_type %d, dci_format %d\n \ LOG_D(MAC, "DCI type 1 params: rmsi_pdcch_config %d, rnti %d, rnti_type %d, dci_format %d\n \
coreset params: mux_pattern %d, n_rb %d, n_symb %d, rb_offset %d \n \ coreset params: mux_pattern %d, n_rb %d, n_symb %d, rb_offset %d \n \
ss params : nb_ss_sets_per_slot %d, first symb %d, nb_slots %d, sfn_mod2 %d, first slot %d\n", ss params : nb_ss_sets_per_slot %d, first symb %d, nb_slots %d, sfn_mod2 %d, first slot %d\n",
0, 0,
......
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