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promise
OpenXG-RAN
Commits
4d14cc63
Commit
4d14cc63
authored
Oct 19, 2020
by
hardy
Browse files
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Merge remote-tracking branch 'origin/cce_indexing_fix' into integration_2020_wk42
parents
d94fc128
c9c1df0b
Changes
13
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Showing
13 changed files
with
122 additions
and
68 deletions
+122
-68
openair1/PHY/NR_TRANSPORT/nr_dci.c
openair1/PHY/NR_TRANSPORT/nr_dci.c
+26
-21
openair1/PHY/NR_TRANSPORT/nr_dci.h
openair1/PHY/NR_TRANSPORT/nr_dci.h
+1
-1
openair1/SCHED_NR/phy_procedures_nr_gNB.c
openair1/SCHED_NR/phy_procedures_nr_gNB.c
+1
-1
openair1/SIMULATION/NR_PHY/dlsim.c
openair1/SIMULATION/NR_PHY/dlsim.c
+3
-1
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
+5
-3
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+4
-2
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+7
-7
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+10
-5
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+23
-14
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+31
-9
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+3
-2
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+6
-0
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf
.../GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf
+2
-2
No files found.
openair1/PHY/NR_TRANSPORT/nr_dci.c
View file @
4d14cc63
...
@@ -64,11 +64,8 @@ void nr_pdcch_scrambling(uint32_t *in,
...
@@ -64,11 +64,8 @@ void nr_pdcch_scrambling(uint32_t *in,
}
}
}
}
void
nr_generate_dci
(
PHY_VARS_gNB
*
gNB
,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu_rel15
,
uint8_t
nr_generate_dci_top
(
PHY_VARS_gNB
*
gNB
,
nfapi_nr_dl_tti_pdcch_pdu
*
pdcch_pdu
,
nfapi_nr_dl_tti_pdcch_pdu
*
ul_dci_pdu
,
uint32_t
**
gold_pdcch_dmrs
,
uint32_t
**
gold_pdcch_dmrs
,
int32_t
*
txdataF
,
int32_t
*
txdataF
,
int16_t
amp
,
int16_t
amp
,
...
@@ -78,23 +75,12 @@ uint8_t nr_generate_dci_top(PHY_VARS_gNB *gNB,
...
@@ -78,23 +75,12 @@ uint8_t nr_generate_dci_top(PHY_VARS_gNB *gNB,
uint16_t
cset_start_sc
;
uint16_t
cset_start_sc
;
uint8_t
cset_start_symb
,
cset_nsymb
;
uint8_t
cset_start_symb
,
cset_nsymb
;
int
k
,
l
,
k_prime
,
dci_idx
,
dmrs_idx
;
int
k
,
l
,
k_prime
,
dci_idx
,
dmrs_idx
;
/*First iteration: single DCI*/
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu_rel15
=
NULL
;
// find coreset descriptor
// find coreset descriptor
int
rb_offset
;
int
rb_offset
;
int
n_rb
;
int
n_rb
;
AssertFatal
(
pdcch_pdu
!=
NULL
||
ul_dci_pdu
!=
NULL
,
"At least one pointer has to be !NULL
\n
"
);
AssertFatal
(
pdcch_pdu
==
NULL
||
ul_dci_pdu
==
NULL
,
"Can't handle both DL and UL DCI in same slot
\n
"
);
if
(
pdcch_pdu
)
pdcch_pdu_rel15
=
&
pdcch_pdu
->
pdcch_pdu_rel15
;
else
if
(
ul_dci_pdu
)
pdcch_pdu_rel15
=
&
ul_dci_pdu
->
pdcch_pdu_rel15
;
nr_fill_cce_list
(
gNB
,
0
,
pdcch_pdu_rel15
);
nr_fill_cce_list
(
gNB
,
0
,
pdcch_pdu_rel15
);
get_coreset_rballoc
(
pdcch_pdu_rel15
->
FreqDomainResource
,
&
n_rb
,
&
rb_offset
);
get_coreset_rballoc
(
pdcch_pdu_rel15
->
FreqDomainResource
,
&
n_rb
,
&
rb_offset
);
...
@@ -241,6 +227,25 @@ uint8_t nr_generate_dci_top(PHY_VARS_gNB *gNB,
...
@@ -241,6 +227,25 @@ uint8_t nr_generate_dci_top(PHY_VARS_gNB *gNB,
}
// reg_idx
}
// reg_idx
}
// for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++)
}
// for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++)
return
0
;
}
void
nr_generate_dci_top
(
PHY_VARS_gNB
*
gNB
,
nfapi_nr_dl_tti_pdcch_pdu
*
pdcch_pdu
,
nfapi_nr_dl_tti_pdcch_pdu
*
ul_dci_pdu
,
uint32_t
**
gold_pdcch_dmrs
,
int32_t
*
txdataF
,
int16_t
amp
,
NR_DL_FRAME_PARMS
frame_parms
)
{
AssertFatal
(
pdcch_pdu
!=
NULL
||
ul_dci_pdu
!=
NULL
,
"At least one pointer has to be !NULL
\n
"
);
if
(
pdcch_pdu
&&
ul_dci_pdu
)
{
nr_generate_dci
(
gNB
,
&
pdcch_pdu
->
pdcch_pdu_rel15
,
gold_pdcch_dmrs
,
txdataF
,
amp
,
frame_parms
);
nr_generate_dci
(
gNB
,
&
ul_dci_pdu
->
pdcch_pdu_rel15
,
gold_pdcch_dmrs
,
txdataF
,
amp
,
frame_parms
);
}
else
if
(
pdcch_pdu
)
nr_generate_dci
(
gNB
,
&
pdcch_pdu
->
pdcch_pdu_rel15
,
gold_pdcch_dmrs
,
txdataF
,
amp
,
frame_parms
);
else
nr_generate_dci
(
gNB
,
&
ul_dci_pdu
->
pdcch_pdu_rel15
,
gold_pdcch_dmrs
,
txdataF
,
amp
,
frame_parms
);
}
}
openair1/PHY/NR_TRANSPORT/nr_dci.h
View file @
4d14cc63
...
@@ -29,7 +29,7 @@ uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
...
@@ -29,7 +29,7 @@ uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
nfapi_nr_rnti_type_e
rnti_type
,
nfapi_nr_rnti_type_e
rnti_type
,
uint16_t
N_RB
);
uint16_t
N_RB
);
uint8_t
nr_generate_dci_top
(
PHY_VARS_gNB
*
gNB
,
void
nr_generate_dci_top
(
PHY_VARS_gNB
*
gNB
,
nfapi_nr_dl_tti_pdcch_pdu
*
pdcch_pdu
,
nfapi_nr_dl_tti_pdcch_pdu
*
pdcch_pdu
,
nfapi_nr_dl_tti_pdcch_pdu
*
ul_pdcch_pdu
,
nfapi_nr_dl_tti_pdcch_pdu
*
ul_pdcch_pdu
,
uint32_t
**
gold_pdcch_dmrs
,
uint32_t
**
gold_pdcch_dmrs
,
...
...
openair1/SCHED_NR/phy_procedures_nr_gNB.c
View file @
4d14cc63
...
@@ -536,7 +536,7 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
...
@@ -536,7 +536,7 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
(
pucch
->
frame
==
frame_rx
)
&&
(
pucch
->
frame
==
frame_rx
)
&&
(
pucch
->
slot
==
slot_rx
)
)
{
(
pucch
->
slot
==
slot_rx
)
)
{
nfapi_nr_pucch_pdu_t
*
pucch_pdu
=
&
pucch
[
i
].
pucch_pdu
;
nfapi_nr_pucch_pdu_t
*
pucch_pdu
=
&
pucch
->
pucch_pdu
;
uint16_t
num_ucis
;
uint16_t
num_ucis
;
switch
(
pucch_pdu
->
format_type
)
{
switch
(
pucch_pdu
->
format_type
)
{
...
...
openair1/SIMULATION/NR_PHY/dlsim.c
View file @
4d14cc63
...
@@ -778,6 +778,8 @@ int main(int argc, char **argv)
...
@@ -778,6 +778,8 @@ int main(int argc, char **argv)
UE_info
->
UE_sched_ctrl
[
0
].
harq_processes
[
harq_pid
].
round
=
round
;
UE_info
->
UE_sched_ctrl
[
0
].
harq_processes
[
harq_pid
].
round
=
round
;
UE_info
->
UE_sched_ctrl
[
0
].
current_harq_pid
=
harq_pid
;
UE_info
->
UE_sched_ctrl
[
0
].
current_harq_pid
=
harq_pid
;
gNB
->
dlsch
[
0
][
0
]
->
harq_processes
[
harq_pid
]
->
round
=
round
;
gNB
->
dlsch
[
0
][
0
]
->
harq_processes
[
harq_pid
]
->
round
=
round
;
for
(
int
i
=
0
;
i
<
MAX_NUM_CORESET
;
i
++
)
gNB_mac
->
UE_info
.
num_pdcch_cand
[
0
][
i
]
=
0
;
if
(
css_flag
==
0
)
nr_schedule_uss_dlsch_phytest
(
0
,
frame
,
slot
,
&
pucch_sched
,
&
dlsch_config
);
if
(
css_flag
==
0
)
nr_schedule_uss_dlsch_phytest
(
0
,
frame
,
slot
,
&
pucch_sched
,
&
dlsch_config
);
else
nr_schedule_css_dlsch_phytest
(
0
,
frame
,
slot
);
else
nr_schedule_css_dlsch_phytest
(
0
,
frame
,
slot
);
...
@@ -1038,7 +1040,7 @@ int main(int argc, char **argv)
...
@@ -1038,7 +1040,7 @@ int main(int argc, char **argv)
}
}
//if ((float)n_errors/(float)n_trials <= target_error_rate) {
//if ((float)n_errors/(float)n_trials <= target_error_rate) {
if
(
effRate
>
=
(
eff_tp_check
*
TBS
))
{
if
(
effRate
>
(
eff_tp_check
*
TBS
))
{
printf
(
"PDSCH test OK
\n
"
);
printf
(
"PDSCH test OK
\n
"
);
break
;
break
;
}
}
...
...
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
View file @
4d14cc63
...
@@ -54,13 +54,15 @@ void fill_dci_search_candidates(NR_SearchSpace_t *ss,fapi_nr_dl_config_dci_dl_pd
...
@@ -54,13 +54,15 @@ void fill_dci_search_candidates(NR_SearchSpace_t *ss,fapi_nr_dl_config_dci_dl_pd
LOG_D
(
MAC
,
"Filling search candidates for DCI
\n
"
);
LOG_D
(
MAC
,
"Filling search candidates for DCI
\n
"
);
rel15
->
number_of_candidates
=
3
;
rel15
->
number_of_candidates
=
4
;
rel15
->
CCE
[
0
]
=
0
;
rel15
->
CCE
[
0
]
=
0
;
rel15
->
L
[
0
]
=
4
;
rel15
->
L
[
0
]
=
4
;
rel15
->
CCE
[
1
]
=
4
;
rel15
->
CCE
[
1
]
=
4
;
rel15
->
L
[
1
]
=
4
;
rel15
->
L
[
1
]
=
4
;
rel15
->
CCE
[
2
]
=
8
;
rel15
->
CCE
[
2
]
=
8
;
rel15
->
L
[
2
]
=
4
;
rel15
->
L
[
2
]
=
4
;
rel15
->
CCE
[
3
]
=
12
;
rel15
->
L
[
3
]
=
4
;
}
}
...
@@ -69,7 +71,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
...
@@ -69,7 +71,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
uint16_t
monitoringSymbolsWithinSlot
=
0
;
uint16_t
monitoringSymbolsWithinSlot
=
0
;
uint8_t
bwp_id
=
1
,
coreset_id
=
1
;
uint8_t
bwp_id
=
1
,
coreset_id
=
1
;
int
sps
=
0
;
int
sps
=
0
;
def_dci_pdu_rel15
=
calloc
(
1
,
sizeof
(
dci_pdu_rel15_t
));
def_dci_pdu_rel15
=
calloc
(
1
,
2
*
sizeof
(
dci_pdu_rel15_t
));
AssertFatal
(
mac
->
scc
!=
NULL
,
"scc is null
\n
"
);
AssertFatal
(
mac
->
scc
!=
NULL
,
"scc is null
\n
"
);
NR_ServingCellConfigCommon_t
*
scc
=
mac
->
scc
;
NR_ServingCellConfigCommon_t
*
scc
=
mac
->
scc
;
NR_BWP_DownlinkCommon_t
*
bwp_Common
=
mac
->
DLbwp
[
bwp_id
-
1
]
->
bwp_Common
;
NR_BWP_DownlinkCommon_t
*
bwp_Common
=
mac
->
DLbwp
[
bwp_id
-
1
]
->
bwp_Common
;
...
@@ -121,7 +123,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
...
@@ -121,7 +123,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
rel15
->
BWPStart
=
NRRIV2PRBOFFSET
(
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
);
rel15
->
BWPStart
=
NRRIV2PRBOFFSET
(
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
);
rel15
->
SubcarrierSpacing
=
bwp_Common
->
genericParameters
.
subcarrierSpacing
;
rel15
->
SubcarrierSpacing
=
bwp_Common
->
genericParameters
.
subcarrierSpacing
;
for
(
int
i
=
0
;
i
<
rel15
->
num_dci_options
;
i
++
)
{
for
(
int
i
=
0
;
i
<
rel15
->
num_dci_options
;
i
++
)
{
rel15
->
dci_length_options
[
i
]
=
nr_dci_size
(
scc
,
mac
->
scg
,
def_dci_pdu_rel15
,
rel15
->
dci_format_options
[
i
],
NR_RNTI_C
,
rel15
->
BWPSize
,
bwp_id
);
rel15
->
dci_length_options
[
i
]
=
nr_dci_size
(
scc
,
mac
->
scg
,
def_dci_pdu_rel15
+
i
,
rel15
->
dci_format_options
[
i
],
NR_RNTI_C
,
rel15
->
BWPSize
,
bwp_id
);
}
}
break
;
break
;
case
NR_RNTI_RA
:
case
NR_RNTI_RA
:
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
View file @
4d14cc63
...
@@ -435,11 +435,13 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
...
@@ -435,11 +435,13 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
nr_rrc_trigger
(
&
ctxt
,
0
/*CC_id*/
,
frame
,
slot
>>
*
scc
->
ssbSubcarrierSpacing
);
nr_rrc_trigger
(
&
ctxt
,
0
/*CC_id*/
,
frame
,
slot
>>
*
scc
->
ssbSubcarrierSpacing
);
}
}
const
uint64_t
dlsch_in_slot_bitmap
=
(
1
<<
1
);
const
uint64_t
dlsch_in_slot_bitmap
=
(
1
<<
1
)
|
(
1
<<
2
)
;
const
uint64_t
ulsch_in_slot_bitmap
=
(
1
<<
8
);
const
uint64_t
ulsch_in_slot_bitmap
=
(
1
<<
8
);
memset
(
RC
.
nrmac
[
module_idP
]
->
cce_list
[
bwp_id
][
0
],
0
,
MAX_NUM_CCE
*
sizeof
(
int
));
// coreset0
memset
(
RC
.
nrmac
[
module_idP
]
->
cce_list
[
bwp_id
][
0
],
0
,
MAX_NUM_CCE
*
sizeof
(
int
));
// coreset0
memset
(
RC
.
nrmac
[
module_idP
]
->
cce_list
[
bwp_id
][
1
],
0
,
MAX_NUM_CCE
*
sizeof
(
int
));
// coresetid 1
memset
(
RC
.
nrmac
[
module_idP
]
->
cce_list
[
bwp_id
][
1
],
0
,
MAX_NUM_CCE
*
sizeof
(
int
));
// coresetid 1
for
(
int
i
=
0
;
i
<
MAX_NUM_CORESET
;
i
++
)
RC
.
nrmac
[
module_idP
]
->
UE_info
.
num_pdcch_cand
[
UE_id
][
i
]
=
0
;
for
(
int
CC_id
=
0
;
CC_id
<
MAX_NUM_CCs
;
CC_id
++
)
{
for
(
int
CC_id
=
0
;
CC_id
<
MAX_NUM_CCs
;
CC_id
++
)
{
//mbsfn_status[CC_id] = 0;
//mbsfn_status[CC_id] = 0;
...
@@ -469,6 +471,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
...
@@ -469,6 +471,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
// This schedule RA procedure if not in phy_test mode
// This schedule RA procedure if not in phy_test mode
// Otherwise already consider 5G already connected
// Otherwise already consider 5G already connected
RC
.
nrmac
[
module_idP
]
->
current_slot
=
slot
;
if
(
get_softmodem_params
()
->
phy_test
==
0
)
{
if
(
get_softmodem_params
()
->
phy_test
==
0
)
{
nr_schedule_RA
(
module_idP
,
frame
,
slot
);
nr_schedule_RA
(
module_idP
,
frame
,
slot
);
nr_schedule_reception_msg3
(
module_idP
,
0
,
frame
,
slot
);
nr_schedule_reception_msg3
(
module_idP
,
0
,
frame
,
slot
);
...
@@ -497,7 +500,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
...
@@ -497,7 +500,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
if
(
UE_info
->
active
[
UE_id
]
if
(
UE_info
->
active
[
UE_id
]
&&
(
is_xlsch_in_slot
(
dlsch_in_slot_bitmap
,
slot
%
num_slots_per_tdd
))
&&
(
is_xlsch_in_slot
(
dlsch_in_slot_bitmap
,
slot
%
num_slots_per_tdd
))
&&
(
!
get_softmodem_params
()
->
phy_test
||
slot
==
1
)
&&
slot
<
10
)
{
&&
slot
<
10
)
{
ue_sched_ctl
->
current_harq_pid
=
slot
%
num_slots_per_tdd
;
ue_sched_ctl
->
current_harq_pid
=
slot
%
num_slots_per_tdd
;
//int pucch_sched;
//int pucch_sched;
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
View file @
4d14cc63
...
@@ -675,13 +675,13 @@ void nr_generate_Msg2(module_id_t module_idP,
...
@@ -675,13 +675,13 @@ void nr_generate_Msg2(module_id_t module_idP,
uint8_t
nr_of_candidates
,
aggregation_level
;
uint8_t
nr_of_candidates
,
aggregation_level
;
find_aggregation_candidates
(
&
aggregation_level
,
&
nr_of_candidates
,
ss
);
find_aggregation_candidates
(
&
aggregation_level
,
&
nr_of_candidates
,
ss
);
NR_ControlResourceSet_t
*
coreset
=
get_coreset
(
bwp
,
ss
,
0
/* common */
);
NR_ControlResourceSet_t
*
coreset
=
get_coreset
(
bwp
,
ss
,
0
/* common */
);
int
CCEIndex
=
allocate_nr_CCEs
(
int
CCEIndex
=
allocate_nr_CCEs
(
nr_mac
,
nr_mac
,
bwp
,
bwp
,
coreset
,
coreset
,
aggregation_level
,
aggregation_level
,
0
,
/* n_RNTI 0: common search space */
0
,
// Y
0
);
// m
0
,
// m
nr_of_candidates
);
if
(
CCEIndex
<
0
)
{
if
(
CCEIndex
<
0
)
{
LOG_E
(
MAC
,
"%s(): cannot find free CCE for RA RNTI %04x!
\n
"
,
__func__
,
ra
->
rnti
);
LOG_E
(
MAC
,
"%s(): cannot find free CCE for RA RNTI %04x!
\n
"
,
__func__
,
ra
->
rnti
);
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
View file @
4d14cc63
...
@@ -488,16 +488,21 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id,
...
@@ -488,16 +488,21 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id,
sched_ctrl
->
search_space
);
sched_ctrl
->
search_space
);
sched_ctrl
->
coreset
=
get_coreset
(
sched_ctrl
->
coreset
=
get_coreset
(
sched_ctrl
->
active_bwp
,
sched_ctrl
->
search_space
,
1
/* dedicated */
);
sched_ctrl
->
active_bwp
,
sched_ctrl
->
search_space
,
1
/* dedicated */
);
int
cid
=
sched_ctrl
->
coreset
->
controlResourceSetId
;
const
uint16_t
Y
=
UE_info
->
Y
[
UE_id
][
cid
][
slot
];
const
int
m
=
UE_info
->
num_pdcch_cand
[
UE_id
][
cid
];
sched_ctrl
->
cce_index
=
allocate_nr_CCEs
(
RC
.
nrmac
[
module_id
],
sched_ctrl
->
cce_index
=
allocate_nr_CCEs
(
RC
.
nrmac
[
module_id
],
sched_ctrl
->
active_bwp
,
sched_ctrl
->
active_bwp
,
sched_ctrl
->
coreset
,
sched_ctrl
->
coreset
,
sched_ctrl
->
aggregation_level
,
sched_ctrl
->
aggregation_level
,
UE_info
->
rnti
[
UE_id
],
Y
,
0
);
// m
m
,
nr_of_candidates
);
if
(
sched_ctrl
->
cce_index
<
0
)
{
if
(
sched_ctrl
->
cce_index
<
0
)
{
LOG_E
(
MAC
,
"%s(): could not find CCE for UE %d
\n
"
,
__func__
,
UE_id
);
LOG_E
(
MAC
,
"%s(): could not find CCE for UE %d
\n
"
,
__func__
,
UE_id
);
return
;
return
;
}
}
UE_info
->
num_pdcch_cand
[
UE_id
][
cid
]
++
;
/* Find PUCCH occasion */
/* Find PUCCH occasion */
nr_update_pucch_scheduling
(
nr_update_pucch_scheduling
(
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @
4d14cc63
...
@@ -417,18 +417,23 @@ int configure_fapi_dl_pdu_phytest(int Mod_idP,
...
@@ -417,18 +417,23 @@ int configure_fapi_dl_pdu_phytest(int Mod_idP,
uint8_t
nr_of_candidates
,
aggregation_level
;
uint8_t
nr_of_candidates
,
aggregation_level
;
find_aggregation_candidates
(
&
aggregation_level
,
&
nr_of_candidates
,
ss
);
find_aggregation_candidates
(
&
aggregation_level
,
&
nr_of_candidates
,
ss
);
NR_ControlResourceSet_t
*
coreset
=
get_coreset
(
bwp
,
ss
,
1
/* dedicated */
);
NR_ControlResourceSet_t
*
coreset
=
get_coreset
(
bwp
,
ss
,
1
/* dedicated */
);
int
CCEIndex
=
allocate_nr_CCEs
(
const
int
cid
=
coreset
->
controlResourceSetId
;
nr_mac
,
const
uint16_t
Y
=
UE_info
->
Y
[
UE_id
][
cid
][
nr_mac
->
current_slot
];
const
int
m
=
UE_info
->
num_pdcch_cand
[
UE_id
][
cid
];
int
CCEIndex
=
allocate_nr_CCEs
(
nr_mac
,
bwp
,
bwp
,
coreset
,
coreset
,
aggregation_level
,
aggregation_level
,
UE_info
->
rnti
[
UE_id
],
Y
,
0
);
// m
m
,
nr_of_candidates
);
if
(
CCEIndex
<
0
)
{
if
(
CCEIndex
<
0
)
{
LOG_E
(
MAC
,
"%s(): CCE list not empty, couldn't schedule PDSCH
\n
"
,
__func__
);
LOG_E
(
MAC
,
"%s(): CCE list not empty, couldn't schedule PDSCH
\n
"
,
__func__
);
free
(
dci_pdu_rel15
);
free
(
dci_pdu_rel15
);
return
0
;
return
0
;
}
}
UE_info
->
num_pdcch_cand
[
UE_id
][
cid
]
++
;
nr_configure_pdcch
(
nr_mac
,
nr_configure_pdcch
(
nr_mac
,
pdcch_pdu_rel15
,
pdcch_pdu_rel15
,
UE_info
->
rnti
[
UE_id
],
UE_info
->
rnti
[
UE_id
],
...
@@ -1127,19 +1132,23 @@ void schedule_fapi_ul_pdu(int Mod_idP,
...
@@ -1127,19 +1132,23 @@ void schedule_fapi_ul_pdu(int Mod_idP,
uint8_t
nr_of_candidates
,
aggregation_level
;
uint8_t
nr_of_candidates
,
aggregation_level
;
find_aggregation_candidates
(
&
aggregation_level
,
&
nr_of_candidates
,
ss
);
find_aggregation_candidates
(
&
aggregation_level
,
&
nr_of_candidates
,
ss
);
NR_ControlResourceSet_t
*
coreset
=
get_coreset
(
bwp
,
ss
,
1
/* dedicated */
);
NR_ControlResourceSet_t
*
coreset
=
get_coreset
(
bwp
,
ss
,
1
/* dedicated */
);
int
CCEIndex
=
allocate_nr_CCEs
(
const
int
cid
=
coreset
->
controlResourceSetId
;
nr_mac
,
const
uint16_t
Y
=
UE_info
->
Y
[
UE_id
][
cid
][
nr_mac
->
current_slot
];
const
int
m
=
UE_info
->
num_pdcch_cand
[
UE_id
][
cid
];
int
CCEIndex
=
allocate_nr_CCEs
(
nr_mac
,
bwp
,
bwp
,
coreset
,
coreset
,
aggregation_level
,
aggregation_level
,
UE_info
->
rnti
[
UE_id
],
Y
,
0
);
// m
m
,
nr_of_candidates
);
if
(
CCEIndex
<
0
)
{
if
(
CCEIndex
<
0
)
{
LOG_E
(
MAC
,
"%s(): CCE list not empty, couldn't schedule PUSCH
\n
"
,
__func__
);
LOG_E
(
MAC
,
"%s(): CCE list not empty, couldn't schedule PUSCH
\n
"
,
__func__
);
pusch_sched
->
active
=
false
;
pusch_sched
->
active
=
false
;
return
;
return
;
}
}
else
{
else
{
UE_info
->
num_pdcch_cand
[
UE_id
][
cid
]
++
;
nr_configure_pdcch
(
nr_mac
,
nr_configure_pdcch
(
nr_mac
,
pdcch_pdu_rel15
,
pdcch_pdu_rel15
,
UE_info
->
rnti
[
UE_id
],
UE_info
->
rnti
[
UE_id
],
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @
4d14cc63
...
@@ -172,8 +172,9 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
...
@@ -172,8 +172,9 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
NR_BWP_Downlink_t
*
bwp
,
NR_BWP_Downlink_t
*
bwp
,
NR_ControlResourceSet_t
*
coreset
,
NR_ControlResourceSet_t
*
coreset
,
int
aggregation
,
int
aggregation
,
uint16_t
n_RNTI
,
uint16_t
Y
,
int
m
)
{
int
m
,
int
nr_of_candidates
)
{
// uncomment these when we allocate for common search space
// uncomment these when we allocate for common search space
// NR_COMMON_channels_t *cc = nr_mac->common_channels;
// NR_COMMON_channels_t *cc = nr_mac->common_channels;
// NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
// NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
...
@@ -189,15 +190,19 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
...
@@ -189,15 +190,19 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
n_rb
*=
6
;
n_rb
*=
6
;
uint16_t
N_reg
=
n_rb
*
coreset
->
duration
;
uint16_t
N_reg
=
n_rb
*
coreset
->
duration
;
uint16_t
n_CI
=
0
;
uint16_t
n_CI
=
0
;
const
uint32_t
A
[
3
]
=
{
39827
,
39829
,
39839
};
/* if n_RNTI is zero, this results in zero, too! */
uint16_t
Y
=
(
A
[
0
]
*
n_RNTI
)
%
65537
;
// Candidate 0, antenna port 0
uint16_t
N_cce
=
N_reg
/
NR_NB_REG_PER_CCE
;
const
uint16_t
N_cce
=
N_reg
/
NR_NB_REG_PER_CCE
;
const
uint16_t
M_s_max
=
nr_of_candidates
;
uint16_t
M_s_max
=
(
aggregation
==
4
)
?
4
:
(
aggregation
==
8
)
?
2
:
1
;
AssertFatal
(
m
<
nr_of_candidates
,
int
first_cce
=
aggregation
*
((
Y
+
(
m
*
N_cce
)
/
(
aggregation
*
M_s_max
)
+
n_CI
)
%
CEILIDIV
(
N_cce
,
aggregation
));
"PDCCH candidate index %d in CORESET %d exceeds the maximum "
"number of PDCCH candidates (%d)
\n
"
,
m
,
coreset_id
,
nr_of_candidates
);
int
first_cce
=
aggregation
*
((
Y
+
CEILIDIV
((
m
*
N_cce
),(
aggregation
*
M_s_max
))
+
n_CI
)
%
CEILIDIV
(
N_cce
,
aggregation
));
for
(
int
i
=
0
;
i
<
aggregation
;
i
++
)
for
(
int
i
=
0
;
i
<
aggregation
;
i
++
)
if
(
cce_list
[
first_cce
+
i
]
!=
0
)
return
(
-
1
);
if
(
cce_list
[
first_cce
+
i
]
!=
0
)
return
(
-
1
);
...
@@ -1526,6 +1531,7 @@ void fill_dci_pdu_rel15(NR_ServingCellConfigCommon_t *scc,
...
@@ -1526,6 +1531,7 @@ void fill_dci_pdu_rel15(NR_ServingCellConfigCommon_t *scc,
pos
+=
1
;
pos
+=
1
;
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
dmrs_sequence_initialization
.
val
&
0x1
)
<<
(
dci_size
-
pos
);
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
dmrs_sequence_initialization
.
val
&
0x1
)
<<
(
dci_size
-
pos
);
}
}
LOG_D
(
MAC
,
"DCI index %d has %d bits and the payload is %lx
\n
"
,
d
,
dci_size
,
*
dci_pdu
);
}
}
}
}
...
@@ -1619,6 +1625,21 @@ int find_nr_UE_id(module_id_t mod_idP, rnti_t rntiP)
...
@@ -1619,6 +1625,21 @@ int find_nr_UE_id(module_id_t mod_idP, rnti_t rntiP)
return
-
1
;
return
-
1
;
}
}
void
set_Y
(
int
Y
[
3
][
160
],
rnti_t
rnti
)
{
const
int
A
[
3
]
=
{
39827
,
39829
,
39839
};
const
int
D
=
65537
;
Y
[
0
][
0
]
=
(
A
[
0
]
*
rnti
)
%
D
;
Y
[
1
][
0
]
=
(
A
[
1
]
*
rnti
)
%
D
;
Y
[
2
][
0
]
=
(
A
[
2
]
*
rnti
)
%
D
;
for
(
int
s
=
1
;
s
<
160
;
s
++
)
{
Y
[
0
][
s
]
=
(
A
[
0
]
*
Y
[
0
][
s
-
1
])
%
D
;
Y
[
1
][
s
]
=
(
A
[
1
]
*
Y
[
1
][
s
-
1
])
%
D
;
Y
[
2
][
s
]
=
(
A
[
2
]
*
Y
[
2
][
s
-
1
])
%
D
;
}
}
int
add_new_nr_ue
(
module_id_t
mod_idP
,
rnti_t
rntiP
){
int
add_new_nr_ue
(
module_id_t
mod_idP
,
rnti_t
rntiP
){
NR_UE_info_t
*
UE_info
=
&
RC
.
nrmac
[
mod_idP
]
->
UE_info
;
NR_UE_info_t
*
UE_info
=
&
RC
.
nrmac
[
mod_idP
]
->
UE_info
;
...
@@ -1642,6 +1663,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
...
@@ -1642,6 +1663,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
UE_info
->
active
[
UE_id
]
=
true
;
UE_info
->
active
[
UE_id
]
=
true
;
UE_info
->
rnti
[
UE_id
]
=
rntiP
;
UE_info
->
rnti
[
UE_id
]
=
rntiP
;
add_nr_ue_list
(
&
UE_info
->
list
,
UE_id
);
add_nr_ue_list
(
&
UE_info
->
list
,
UE_id
);
set_Y
(
UE_info
->
Y
[
UE_id
],
rntiP
);
memset
((
void
*
)
&
UE_info
->
UE_sched_ctrl
[
UE_id
],
memset
((
void
*
)
&
UE_info
->
UE_sched_ctrl
[
UE_id
],
0
,
0
,
sizeof
(
NR_UE_sched_ctrl_t
));
sizeof
(
NR_UE_sched_ctrl_t
));
...
...
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
View file @
4d14cc63
...
@@ -314,8 +314,9 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
...
@@ -314,8 +314,9 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
NR_BWP_Downlink_t
*
bwp
,
NR_BWP_Downlink_t
*
bwp
,
NR_ControlResourceSet_t
*
coreset
,
NR_ControlResourceSet_t
*
coreset
,
int
aggregation
,
int
aggregation
,
uint16_t
n_RNTI
,
uint16_t
Y
,
int
m
);
int
m
,
int
nr_of_candidates
);
int
get_dlscs
(
nfapi_nr_config_request_t
*
cfg
);
int
get_dlscs
(
nfapi_nr_config_request_t
*
cfg
);
...
...
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
View file @
4d14cc63
...
@@ -382,6 +382,10 @@ typedef struct {
...
@@ -382,6 +382,10 @@ typedef struct {
bool
active
[
MAX_MOBILES_PER_GNB
];
bool
active
[
MAX_MOBILES_PER_GNB
];
rnti_t
rnti
[
MAX_MOBILES_PER_GNB
];
rnti_t
rnti
[
MAX_MOBILES_PER_GNB
];
NR_CellGroupConfig_t
*
secondaryCellGroup
[
MAX_MOBILES_PER_GNB
];
NR_CellGroupConfig_t
*
secondaryCellGroup
[
MAX_MOBILES_PER_GNB
];
/// CCE indexing
int
Y
[
MAX_MOBILES_PER_GNB
][
3
][
160
];
int
m
[
MAX_MOBILES_PER_GNB
];
int
num_pdcch_cand
[
MAX_MOBILES_PER_GNB
][
MAX_NUM_CORESET
];
}
NR_UE_info_t
;
}
NR_UE_info_t
;
/*! \brief top level eNB MAC structure */
/*! \brief top level eNB MAC structure */
...
@@ -444,6 +448,8 @@ typedef struct gNB_MAC_INST_s {
...
@@ -444,6 +448,8 @@ typedef struct gNB_MAC_INST_s {
time_stats_t
schedule_pch
;
time_stats_t
schedule_pch
;
/// CCE lists
/// CCE lists
int
cce_list
[
MAX_NUM_BWP
][
MAX_NUM_CORESET
][
MAX_NUM_CCE
];
int
cce_list
[
MAX_NUM_BWP
][
MAX_NUM_CORESET
][
MAX_NUM_CCE
];
/// current slot
int
current_slot
;
}
gNB_MAC_INST
;
}
gNB_MAC_INST
;
#endif
/*__LAYER2_NR_MAC_GNB_H__ */
#endif
/*__LAYER2_NR_MAC_GNB_H__ */
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf
View file @
4d14cc63
...
@@ -131,12 +131,12 @@ gNBs =
...
@@ -131,12 +131,12 @@ gNBs =
restrictedSetConfig
=
0
,
restrictedSetConfig
=
0
,
# pusch-ConfigCommon (up to 16 elements)
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0
=
2
;
initialULBWPk2_0
=
6
;
initialULBWPmappingType_0
=
1
initialULBWPmappingType_0
=
1
# this is SS=0 L=11
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0
=
55
;
initialULBWPstartSymbolAndLength_0
=
55
;
initialULBWPk2_1
=
2
;
initialULBWPk2_1
=
6
;
initialULBWPmappingType_1
=
1
;
initialULBWPmappingType_1
=
1
;
# this is SS=0 L=12
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1
=
69
;
initialULBWPstartSymbolAndLength_1
=
69
;
...
...
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