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promise
OpenXG-RAN
Commits
4d2a8cc8
Commit
4d2a8cc8
authored
Sep 02, 2020
by
Francesco Mani
Browse files
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Plain Diff
completed scheduling of csi meas report reception (to be tested)
parent
47a3ee09
Changes
4
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Showing
4 changed files
with
18 additions
and
16 deletions
+18
-16
openair1/PHY/NR_TRANSPORT/pucch_rx.c
openair1/PHY/NR_TRANSPORT/pucch_rx.c
+3
-4
openair1/SCHED_NR/phy_procedures_nr_gNB.c
openair1/SCHED_NR/phy_procedures_nr_gNB.c
+2
-6
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+6
-5
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+7
-1
No files found.
openair1/PHY/NR_TRANSPORT/pucch_rx.c
View file @
4d2a8cc8
...
@@ -67,7 +67,7 @@ int nr_find_pucch(uint16_t rnti,
...
@@ -67,7 +67,7 @@ int nr_find_pucch(uint16_t rnti,
AssertFatal
(
gNB
!=
NULL
,
"gNB is null
\n
"
);
AssertFatal
(
gNB
!=
NULL
,
"gNB is null
\n
"
);
int
index
=
-
1
;
int
index
=
-
1
;
for
(
int
i
=
0
;
i
<
NUMBER_OF_NR_
ULS
CH_MAX
;
i
++
)
{
for
(
int
i
=
0
;
i
<
NUMBER_OF_NR_
PUC
CH_MAX
;
i
++
)
{
AssertFatal
(
gNB
->
pucch
[
i
]
!=
NULL
,
"gNB->pucch[%d] is null
\n
"
,
i
);
AssertFatal
(
gNB
->
pucch
[
i
]
!=
NULL
,
"gNB->pucch[%d] is null
\n
"
,
i
);
if
((
gNB
->
pucch
[
i
]
->
active
>
0
)
&&
if
((
gNB
->
pucch
[
i
]
->
active
>
0
)
&&
(
gNB
->
pucch
[
i
]
->
pucch_pdu
.
rnti
==
rnti
)
&&
(
gNB
->
pucch
[
i
]
->
pucch_pdu
.
rnti
==
rnti
)
&&
...
@@ -96,7 +96,6 @@ void nr_fill_pucch(PHY_VARS_gNB *gNB,
...
@@ -96,7 +96,6 @@ void nr_fill_pucch(PHY_VARS_gNB *gNB,
pucch
->
slot
=
slot
;
pucch
->
slot
=
slot
;
pucch
->
active
=
1
;
pucch
->
active
=
1
;
memcpy
((
void
*
)
&
pucch
->
pucch_pdu
,
(
void
*
)
pucch_pdu
,
sizeof
(
nfapi_nr_pucch_pdu_t
));
memcpy
((
void
*
)
&
pucch
->
pucch_pdu
,
(
void
*
)
pucch_pdu
,
sizeof
(
nfapi_nr_pucch_pdu_t
));
}
}
...
@@ -414,7 +413,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
...
@@ -414,7 +413,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
uci_pdu
->
harq
->
harq_confidence_level
=
(
no_conf
)
?
1
:
0
;
uci_pdu
->
harq
->
harq_confidence_level
=
(
no_conf
)
?
1
:
0
;
uci_pdu
->
harq
->
harq_list
=
(
nfapi_nr_harq_t
*
)
malloc
(
1
);
uci_pdu
->
harq
->
harq_list
=
(
nfapi_nr_harq_t
*
)
malloc
(
1
);
uci_pdu
->
harq
->
harq_list
[
0
].
harq_value
=
index
&
0x01
;
uci_pdu
->
harq
->
harq_list
[
0
].
harq_value
=
index
&
0x01
;
LOG_
I
(
PHY
,
"HARQ value %d with confidence level (0 is good, 1 is bad) %d
\n
"
,
LOG_
D
(
PHY
,
"HARQ value %d with confidence level (0 is good, 1 is bad) %d
\n
"
,
uci_pdu
->
harq
->
harq_list
[
0
].
harq_value
,
uci_pdu
->
harq
->
harq_confidence_level
);
uci_pdu
->
harq
->
harq_list
[
0
].
harq_value
,
uci_pdu
->
harq
->
harq_confidence_level
);
if
(
pucch_pdu
->
sr_flag
==
1
)
{
if
(
pucch_pdu
->
sr_flag
==
1
)
{
uci_pdu
->
sr
=
calloc
(
1
,
sizeof
(
*
uci_pdu
->
sr
));
uci_pdu
->
sr
=
calloc
(
1
,
sizeof
(
*
uci_pdu
->
sr
));
...
@@ -429,7 +428,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
...
@@ -429,7 +428,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
uci_pdu
->
harq
->
harq_list
=
(
nfapi_nr_harq_t
*
)
malloc
(
2
);
uci_pdu
->
harq
->
harq_list
=
(
nfapi_nr_harq_t
*
)
malloc
(
2
);
uci_pdu
->
harq
->
harq_list
[
1
].
harq_value
=
index
&
0x01
;
uci_pdu
->
harq
->
harq_list
[
1
].
harq_value
=
index
&
0x01
;
uci_pdu
->
harq
->
harq_list
[
0
].
harq_value
=
(
index
>>
1
)
&
0x01
;
uci_pdu
->
harq
->
harq_list
[
0
].
harq_value
=
(
index
>>
1
)
&
0x01
;
LOG_
I
(
PHY
,
"HARQ values %d and %d with confidence level (0 is good, 1 is bad) %d
\n
"
,
LOG_
D
(
PHY
,
"HARQ values %d and %d with confidence level (0 is good, 1 is bad) %d
\n
"
,
uci_pdu
->
harq
->
harq_list
[
1
].
harq_value
,
uci_pdu
->
harq
->
harq_list
[
0
].
harq_value
,
uci_pdu
->
harq
->
harq_confidence_level
);
uci_pdu
->
harq
->
harq_list
[
1
].
harq_value
,
uci_pdu
->
harq
->
harq_list
[
0
].
harq_value
,
uci_pdu
->
harq
->
harq_confidence_level
);
if
(
pucch_pdu
->
sr_flag
==
1
)
{
if
(
pucch_pdu
->
sr_flag
==
1
)
{
uci_pdu
->
sr
=
calloc
(
1
,
sizeof
(
*
uci_pdu
->
sr
));
uci_pdu
->
sr
=
calloc
(
1
,
sizeof
(
*
uci_pdu
->
sr
));
...
...
openair1/SCHED_NR/phy_procedures_nr_gNB.c
View file @
4d2a8cc8
...
@@ -137,8 +137,6 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
...
@@ -137,8 +137,6 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
uint8_t
ssb_frame_periodicity
=
1
;
// every how many frames SSB are generated
uint8_t
ssb_frame_periodicity
=
1
;
// every how many frames SSB are generated
int
txdataF_offset
=
(
slot
%
2
)
*
fp
->
samples_per_slot_wCP
;
int
txdataF_offset
=
(
slot
%
2
)
*
fp
->
samples_per_slot_wCP
;
if
(
cfg
->
ssb_table
.
ssb_period
.
value
>
1
)
if
(
cfg
->
ssb_table
.
ssb_period
.
value
>
1
)
ssb_frame_periodicity
=
1
<<
(
cfg
->
ssb_table
.
ssb_period
.
value
-
1
)
;
ssb_frame_periodicity
=
1
<<
(
cfg
->
ssb_table
.
ssb_period
.
value
-
1
)
;
...
@@ -488,12 +486,10 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
...
@@ -488,12 +486,10 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
(
pucch
->
frame
==
frame_rx
)
&&
(
pucch
->
frame
==
frame_rx
)
&&
(
pucch
->
slot
==
slot_rx
)
)
{
(
pucch
->
slot
==
slot_rx
)
)
{
nfapi_nr_pucch_pdu_t
*
pucch_pdu
=
&
pucch
[
i
].
pucch_pdu
;
nfapi_nr_pucch_pdu_t
*
pucch_pdu
=
&
pucch
->
pucch_pdu
;
uint16_t
num_ucis
;
uint16_t
num_ucis
;
switch
(
pucch_pdu
->
format_type
)
{
switch
(
pucch_pdu
->
format_type
)
{
case
0
:
case
0
:
num_ucis
=
gNB
->
UL_INFO
.
uci_ind
.
num_ucis
;
num_ucis
=
gNB
->
UL_INFO
.
uci_ind
.
num_ucis
;
gNB
->
UL_INFO
.
uci_ind
.
uci_list
=
&
gNB
->
uci_pdu_list
[
0
];
gNB
->
UL_INFO
.
uci_ind
.
uci_list
=
&
gNB
->
uci_pdu_list
[
0
];
gNB
->
UL_INFO
.
uci_ind
.
sfn
=
frame_rx
;
gNB
->
UL_INFO
.
uci_ind
.
sfn
=
frame_rx
;
...
@@ -511,7 +507,6 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
...
@@ -511,7 +507,6 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
pucch
->
active
=
0
;
pucch
->
active
=
0
;
break
;
break
;
case
2
:
case
2
:
num_ucis
=
gNB
->
UL_INFO
.
uci_ind
.
num_ucis
;
num_ucis
=
gNB
->
UL_INFO
.
uci_ind
.
num_ucis
;
gNB
->
UL_INFO
.
uci_ind
.
uci_list
=
&
gNB
->
uci_pdu_list
[
0
];
gNB
->
UL_INFO
.
uci_ind
.
uci_list
=
&
gNB
->
uci_pdu_list
[
0
];
gNB
->
UL_INFO
.
uci_ind
.
sfn
=
frame_rx
;
gNB
->
UL_INFO
.
uci_ind
.
sfn
=
frame_rx
;
...
@@ -527,6 +522,7 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
...
@@ -527,6 +522,7 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
gNB
->
UL_INFO
.
uci_ind
.
num_ucis
+=
1
;
gNB
->
UL_INFO
.
uci_ind
.
num_ucis
+=
1
;
pucch
->
active
=
0
;
pucch
->
active
=
0
;
break
;
default:
default:
AssertFatal
(
1
==
0
,
"Only PUCCH formats 0 and 2 are currently supported
\n
"
);
AssertFatal
(
1
==
0
,
"Only PUCCH formats 0 and 2 are currently supported
\n
"
);
}
}
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
View file @
4d2a8cc8
...
@@ -334,7 +334,10 @@ void nr_schedule_pucch(int Mod_idP,
...
@@ -334,7 +334,10 @@ void nr_schedule_pucch(int Mod_idP,
for
(
int
k
=
0
;
k
<
nr_ulmix_slots
;
k
++
)
{
for
(
int
k
=
0
;
k
<
nr_ulmix_slots
;
k
++
)
{
curr_pucch
=
&
UE_list
->
UE_sched_ctrl
[
UE_id
].
sched_pucch
[
k
];
curr_pucch
=
&
UE_list
->
UE_sched_ctrl
[
UE_id
].
sched_pucch
[
k
];
if
((
curr_pucch
->
dai_c
>
0
)
&&
(
frameP
==
curr_pucch
->
frame
)
&&
(
slotP
==
curr_pucch
->
ul_slot
))
{
O_ack
=
curr_pucch
->
dai_c
;
O_uci
=
O_ack
+
curr_pucch
->
csi_bits
;
// for now we are just sending acknacks in pucch
if
((
O_uci
>
0
||
SR_flag
==
1
)
&&
(
frameP
==
curr_pucch
->
frame
)
&&
(
slotP
==
curr_pucch
->
ul_slot
))
{
UL_tti_req
->
SFN
=
curr_pucch
->
frame
;
UL_tti_req
->
SFN
=
curr_pucch
->
frame
;
UL_tti_req
->
Slot
=
curr_pucch
->
ul_slot
;
UL_tti_req
->
Slot
=
curr_pucch
->
ul_slot
;
UL_tti_req
->
pdus_list
[
UL_tti_req
->
n_pdus
].
pdu_type
=
NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE
;
UL_tti_req
->
pdus_list
[
UL_tti_req
->
n_pdus
].
pdu_type
=
NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE
;
...
@@ -342,10 +345,8 @@ void nr_schedule_pucch(int Mod_idP,
...
@@ -342,10 +345,8 @@ void nr_schedule_pucch(int Mod_idP,
nfapi_nr_pucch_pdu_t
*
pucch_pdu
=
&
UL_tti_req
->
pdus_list
[
UL_tti_req
->
n_pdus
].
pucch_pdu
;
nfapi_nr_pucch_pdu_t
*
pucch_pdu
=
&
UL_tti_req
->
pdus_list
[
UL_tti_req
->
n_pdus
].
pucch_pdu
;
memset
(
pucch_pdu
,
0
,
sizeof
(
nfapi_nr_pucch_pdu_t
));
memset
(
pucch_pdu
,
0
,
sizeof
(
nfapi_nr_pucch_pdu_t
));
UL_tti_req
->
n_pdus
+=
1
;
UL_tti_req
->
n_pdus
+=
1
;
O_ack
=
curr_pucch
->
dai_c
;
O_uci
=
O_ack
;
// for now we are just sending acknacks in pucch
LOG_
D
(
MAC
,
"Scheduling pucch reception for frame %d slot %d
\n
"
,
frameP
,
slotP
);
LOG_
I
(
MAC
,
"Scheduling pucch reception for frame %d slot %d
\n
"
,
frameP
,
slotP
);
nr_configure_pucch
(
pucch_pdu
,
nr_configure_pucch
(
pucch_pdu
,
scc
,
scc
,
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @
4d2a8cc8
...
@@ -623,7 +623,7 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
...
@@ -623,7 +623,7 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
else
else
AssertFatal
(
1
==
0
,
"Couldn't fine pucch resource indicator %d in PUCCH resource set %d for %d UCI bits"
,
pucch_resource
,
i
,
O_uci
);
AssertFatal
(
1
==
0
,
"Couldn't fine pucch resource indicator %d in PUCCH resource set %d for %d UCI bits"
,
pucch_resource
,
i
,
O_uci
);
}
}
else
{
if
(
pucchresset
->
pucch_ResourceSetId
==
1
&&
O_uci
>
2
)
{
N3
=
pucchresset
->
maxPayloadMinus1
!=
NULL
?
*
pucchresset
->
maxPayloadMinus1
:
1706
;
N3
=
pucchresset
->
maxPayloadMinus1
!=
NULL
?
*
pucchresset
->
maxPayloadMinus1
:
1706
;
if
(
N2
<
O_uci
&&
N3
>
O_uci
)
{
if
(
N2
<
O_uci
&&
N3
>
O_uci
)
{
if
(
pucch_resource
<
n_list
)
if
(
pucch_resource
<
n_list
)
...
@@ -676,6 +676,7 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
...
@@ -676,6 +676,7 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
pucch_pdu
->
prb_size
=
pucchres
->
format
.
choice
.
format2
->
nrofPRBs
;
pucch_pdu
->
prb_size
=
pucchres
->
format
.
choice
.
format2
->
nrofPRBs
;
pucch_pdu
->
data_scrambling_id
=
pusch_id
!=
NULL
?
*
pusch_id
:
*
scc
->
physCellId
;
pucch_pdu
->
data_scrambling_id
=
pusch_id
!=
NULL
?
*
pusch_id
:
*
scc
->
physCellId
;
pucch_pdu
->
dmrs_scrambling_id
=
id0
!=
NULL
?
*
id0
:
*
scc
->
physCellId
;
pucch_pdu
->
dmrs_scrambling_id
=
id0
!=
NULL
?
*
id0
:
*
scc
->
physCellId
;
pucch_pdu
->
bit_len_csi_part1
=
O_uci
-
O_ack
;
break
;
break
;
case
NR_PUCCH_Resource__format_PR_format3
:
case
NR_PUCCH_Resource__format_PR_format3
:
pucch_pdu
->
format_type
=
3
;
pucch_pdu
->
format_type
=
3
;
...
@@ -692,6 +693,7 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
...
@@ -692,6 +693,7 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
pucch_pdu
->
pi_2bpsk
=
pucchfmt
->
pi2BPSK
!=
NULL
?
1
:
0
;
pucch_pdu
->
pi_2bpsk
=
pucchfmt
->
pi2BPSK
!=
NULL
?
1
:
0
;
pucch_pdu
->
add_dmrs_flag
=
pucchfmt
->
additionalDMRS
!=
NULL
?
1
:
0
;
pucch_pdu
->
add_dmrs_flag
=
pucchfmt
->
additionalDMRS
!=
NULL
?
1
:
0
;
}
}
pucch_pdu
->
bit_len_csi_part1
=
O_uci
-
O_ack
;
break
;
break
;
case
NR_PUCCH_Resource__format_PR_format4
:
case
NR_PUCCH_Resource__format_PR_format4
:
pucch_pdu
->
format_type
=
4
;
pucch_pdu
->
format_type
=
4
;
...
@@ -709,6 +711,7 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
...
@@ -709,6 +711,7 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
pucch_pdu
->
pi_2bpsk
=
pucchfmt
->
pi2BPSK
!=
NULL
?
1
:
0
;
pucch_pdu
->
pi_2bpsk
=
pucchfmt
->
pi2BPSK
!=
NULL
?
1
:
0
;
pucch_pdu
->
add_dmrs_flag
=
pucchfmt
->
additionalDMRS
!=
NULL
?
1
:
0
;
pucch_pdu
->
add_dmrs_flag
=
pucchfmt
->
additionalDMRS
!=
NULL
?
1
:
0
;
}
}
pucch_pdu
->
bit_len_csi_part1
=
O_uci
-
O_ack
;
break
;
break
;
default
:
default
:
AssertFatal
(
1
==
0
,
"Undefined PUCCH format
\n
"
);
AssertFatal
(
1
==
0
,
"Undefined PUCCH format
\n
"
);
...
@@ -1626,6 +1629,7 @@ void nr_csi_meas_reporting(int Mod_idP,
...
@@ -1626,6 +1629,7 @@ void nr_csi_meas_reporting(int Mod_idP,
}
}
// schedule csi measurement reception according to 5.2.1.4 in 38.214
// schedule csi measurement reception according to 5.2.1.4 in 38.214
if
(
((
n_slots_frame
*
frame
+
slot
-
offset
)
%
period
)
==
0
)
{
if
(
((
n_slots_frame
*
frame
+
slot
-
offset
)
%
period
)
==
0
)
{
curr_pucch
=
&
UE_list
->
UE_sched_ctrl
[
UE_id
].
sched_pucch
[
slot
-
slots_per_tdd
+
ul_slots
];
curr_pucch
=
&
UE_list
->
UE_sched_ctrl
[
UE_id
].
sched_pucch
[
slot
-
slots_per_tdd
+
ul_slots
];
NR_PUCCH_CSI_Resource_t
*
pucchcsires
=
csirep
->
reportConfigType
.
choice
.
periodic
->
pucch_CSI_ResourceList
.
list
.
array
[
0
];
NR_PUCCH_CSI_Resource_t
*
pucchcsires
=
csirep
->
reportConfigType
.
choice
.
periodic
->
pucch_CSI_ResourceList
.
list
.
array
[
0
];
...
@@ -1672,6 +1676,8 @@ void nr_csi_meas_reporting(int Mod_idP,
...
@@ -1672,6 +1676,8 @@ void nr_csi_meas_reporting(int Mod_idP,
}
}
}
}
curr_pucch
->
csi_bits
=
25
;
// TODO function to compute CSI meas report bit size
curr_pucch
->
csi_bits
=
25
;
// TODO function to compute CSI meas report bit size
curr_pucch
->
frame
=
frame
;
curr_pucch
->
ul_slot
=
slot
;
}
}
}
}
...
...
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