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Commit 550ef12a authored by knopp's avatar knopp
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FK/RK, added power control for PUCCH 

git-svn-id: http://svn.eurecom.fr/openair4G/trunk@7613 818b1a75-f10b-46b9-bf7c-635c3b92a50f
parent 9bb953f9
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Showing with 95 additions and 22 deletions
openair2/LAYER2/MAC/defs.h
View file @ 550ef12a
......@@ -692,8 +692,10 @@ typedef struct {
int32_t ue_tx_power;
/// stores the frame where the last TPC was transmitted
uint32_t tpc_tx_frame;
uint32_t tpc_tx_subframe;
uint32_t pusch_tpc_tx_frame;
uint32_t pusch_tpc_tx_subframe;
uint32_t pucch_tpc_tx_frame;
uint32_t pucch_tpc_tx_subframe;
#ifdef LOCALIZATION
eNB_UE_estimated_distances distance;
......
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
View file @ 550ef12a
......@@ -445,8 +445,6 @@ schedule_ue_spec(
void *DLSCH_dci = NULL;
LTE_eNB_UE_stats *eNB_UE_stats = NULL;
uint16_t sdu_length_total = 0;
unsigned char DAI;
int i = 0;
uint8_t dl_pow_off[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
unsigned char rballoc_sub_UE[MAX_NUM_CCs][NUMBER_OF_UE_MAX][N_RBG_MAX];
uint16_t pre_nb_available_rbs[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
......@@ -457,6 +455,10 @@ schedule_ue_spec(
UE_list_t *UE_list = &eNB->UE_list;
LTE_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs];
int continue_flag=0;
int32_t normalized_rx_power, target_rx_power;
int32_t tpc=1;
static int32_t tpc_accumulated=0;
if (UE_list->head==-1) {
return;
......@@ -828,9 +830,6 @@ schedule_ue_spec(
}
ta_len = ((eNB_UE_stats->timing_advance_update/update_TA)!=0) ? 2 : 0;
/*#else
ta_len = 0;
#endif*/
header_len_dcch = 2; // 2 bytes DCCH SDU subheader
......@@ -1164,6 +1163,41 @@ schedule_ue_spec(
update_ul_dci(module_idP,CC_id,rnti,UE_list->UE_template[CC_id][UE_id].DAI);
}
// do PUCCH power control
// this is the normalized RX power
eNB_UE_stats = mac_xface->get_eNB_UE_stats(module_idP,CC_id,rnti);
if (eNB_UE_stats->Po_PUCCH_update == 1) {
eNB_UE_stats->Po_PUCCH_update = 0;
normalized_rx_power = eNB_UE_stats->Po_PUCCH_dBm;
target_rx_power = mac_xface->get_target_pucch_rx_power(module_idP,CC_id) + 10;
// this assumes accumulated tpc
// make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out
if (((((UE_list->UE_template[CC_id][UE_id].pucch_tpc_tx_frame*10+UE_list->UE_template[CC_id][UE_id].pucch_tpc_tx_subframe)%10240)+10)<(frameP*10+subframeP))
|| (((UE_list->UE_template[CC_id][UE_id].pucch_tpc_tx_frame*10+UE_list->UE_template[CC_id][UE_id].pucch_tpc_tx_subframe)%10240)>(frameP*10+subframeP))) {
UE_list->UE_template[CC_id][UE_id].pucch_tpc_tx_frame=frameP;
UE_list->UE_template[CC_id][UE_id].pucch_tpc_tx_subframe=subframeP;
if (normalized_rx_power>(target_rx_power+1)) {
tpc = 0; //-1
tpc_accumulated--;
} else if (normalized_rx_power<(target_rx_power-1)) {
tpc = 2; //+1
tpc_accumulated++;
} else {
tpc = 1; //0
}
LOG_I(MAC,"[eNB %d] DLSCH scheduler: frame %d, subframe %d, harq_pid %d, tpc %d, accumulated %d, normalized/target rx power %d/%d\n",
module_idP,frameP, subframeP,harq_pid,tpc,
tpc_accumulated,normalized_rx_power,target_rx_power);
} // time to do TPC update
else {
tpc = 1; //0
}
} // Po_PUCCH has been updated
else {
tpc = 1; //0
}
switch (mac_xface->get_transmission_mode(module_idP,CC_id,rnti)) {
case 1:
case 2:
......@@ -1175,6 +1209,7 @@ schedule_ue_spec(
((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->ndi = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->rv = 0;
((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->TPC = tpc;
((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
break;
......@@ -1183,6 +1218,7 @@ schedule_ue_spec(
((DCI1_5MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI1_5MHz_TDD_t*)DLSCH_dci)->ndi = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI1_5MHz_TDD_t*)DLSCH_dci)->rv = 0;
((DCI1_5MHz_TDD_t*)DLSCH_dci)->TPC = tpc;
((DCI1_5MHz_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
LOG_D(MAC,"Format1 DCI: harq_pid %d, ndi %d\n",harq_pid,((DCI1_5MHz_TDD_t*)DLSCH_dci)->ndi);
break;
......@@ -1192,6 +1228,7 @@ schedule_ue_spec(
((DCI1_10MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI1_10MHz_TDD_t*)DLSCH_dci)->ndi = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI1_10MHz_TDD_t*)DLSCH_dci)->rv = 0;
((DCI1_10MHz_TDD_t*)DLSCH_dci)->TPC = tpc;
((DCI1_10MHz_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
break;
......@@ -1200,6 +1237,7 @@ schedule_ue_spec(
((DCI1_20MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI1_20MHz_TDD_t*)DLSCH_dci)->ndi = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI1_20MHz_TDD_t*)DLSCH_dci)->rv = 0;
((DCI1_20MHz_TDD_t*)DLSCH_dci)->TPC = tpc;
((DCI1_20MHz_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
break;
......@@ -1208,6 +1246,7 @@ schedule_ue_spec(
((DCI1_5MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI1_5MHz_TDD_t*)DLSCH_dci)->ndi = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI1_5MHz_TDD_t*)DLSCH_dci)->rv = 0;
((DCI1_5MHz_TDD_t*)DLSCH_dci)->TPC = tpc;
((DCI1_5MHz_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
break;
}
......@@ -1218,6 +1257,7 @@ schedule_ue_spec(
((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->ndi = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->rv = 0;
((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->TPC = tpc;
break;
case 25:
......@@ -1225,6 +1265,7 @@ schedule_ue_spec(
((DCI1_5MHz_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI1_5MHz_FDD_t*)DLSCH_dci)->ndi = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI1_5MHz_FDD_t*)DLSCH_dci)->rv = 0;
((DCI1_5MHz_FDD_t*)DLSCH_dci)->TPC = tpc;
break;
case 50:
......@@ -1232,6 +1273,7 @@ schedule_ue_spec(
((DCI1_10MHz_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI1_10MHz_FDD_t*)DLSCH_dci)->ndi = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI1_10MHz_FDD_t*)DLSCH_dci)->rv = 0;
((DCI1_10MHz_FDD_t*)DLSCH_dci)->TPC = tpc;
break;
case 100:
......@@ -1239,6 +1281,7 @@ schedule_ue_spec(
((DCI1_20MHz_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI1_20MHz_FDD_t*)DLSCH_dci)->ndi = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI1_20MHz_FDD_t*)DLSCH_dci)->rv = 0;
((DCI1_20MHz_FDD_t*)DLSCH_dci)->TPC = tpc;
break;
default:
......@@ -1246,6 +1289,7 @@ schedule_ue_spec(
((DCI1_5MHz_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI1_5MHz_FDD_t*)DLSCH_dci)->ndi = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI1_5MHz_FDD_t*)DLSCH_dci)->rv = 0;
((DCI1_5MHz_FDD_t*)DLSCH_dci)->TPC = tpc;
break;
}
}
......@@ -1266,6 +1310,7 @@ schedule_ue_spec(
((DCI2A_1_5MHz_2A_TDD_t*)DLSCH_dci)->rv2 = 1;
((DCI2A_1_5MHz_2A_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
((DCI2A_1_5MHz_2A_TDD_t*)DLSCH_dci)->TPC = tpc;
break;
case 25:
......@@ -1274,6 +1319,7 @@ schedule_ue_spec(
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->ndi1 = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->rv1 = 0;
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->TPC = tpc;
// deactivate TB2
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->mcs2 = 0;
......@@ -1288,6 +1334,7 @@ schedule_ue_spec(
((DCI2A_10MHz_2A_TDD_t*)DLSCH_dci)->ndi1 = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI2A_10MHz_2A_TDD_t*)DLSCH_dci)->rv1 = 0;
((DCI2A_10MHz_2A_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
((DCI2A_10MHz_2A_TDD_t*)DLSCH_dci)->TPC = tpc;
// deactivate TB2
((DCI2A_10MHz_2A_TDD_t*)DLSCH_dci)->mcs2 = 0;
......@@ -1300,6 +1347,7 @@ schedule_ue_spec(
((DCI2A_20MHz_2A_TDD_t*)DLSCH_dci)->ndi1 = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI2A_20MHz_2A_TDD_t*)DLSCH_dci)->rv1 = 0;
((DCI2A_20MHz_2A_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
((DCI2A_20MHz_2A_TDD_t*)DLSCH_dci)->TPC = tpc;
// deactivate TB2
((DCI2A_20MHz_2A_TDD_t*)DLSCH_dci)->mcs2 = 0;
......@@ -1312,6 +1360,7 @@ schedule_ue_spec(
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->ndi1 = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->rv1 = 0;
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->TPC = tpc;
// deactivate TB2
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->mcs2 = 0;
......@@ -1325,6 +1374,7 @@ schedule_ue_spec(
((DCI2A_1_5MHz_2A_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI2A_1_5MHz_2A_FDD_t*)DLSCH_dci)->ndi1 = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI2A_1_5MHz_2A_FDD_t*)DLSCH_dci)->rv1 = 0;
((DCI2A_1_5MHz_2A_FDD_t*)DLSCH_dci)->TPC = tpc;
// deactivate TB2
((DCI2A_1_5MHz_2A_FDD_t*)DLSCH_dci)->mcs2 = 0;
......@@ -1336,6 +1386,7 @@ schedule_ue_spec(
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->ndi1 = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->rv1 = 0;
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->TPC = tpc;
// deactivate TB2
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->mcs2 = 0;
......@@ -1347,6 +1398,7 @@ schedule_ue_spec(
((DCI2A_10MHz_2A_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI2A_10MHz_2A_FDD_t*)DLSCH_dci)->ndi1 = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI2A_10MHz_2A_FDD_t*)DLSCH_dci)->rv1 = 0;
((DCI2A_10MHz_2A_FDD_t*)DLSCH_dci)->TPC = tpc;
// deactivate TB2
((DCI2A_10MHz_2A_FDD_t*)DLSCH_dci)->mcs2 = 0;
((DCI2A_10MHz_2A_FDD_t*)DLSCH_dci)->rv2 = 1;
......@@ -1357,6 +1409,8 @@ schedule_ue_spec(
((DCI2A_20MHz_2A_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI2A_20MHz_2A_FDD_t*)DLSCH_dci)->ndi1 = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI2A_20MHz_2A_FDD_t*)DLSCH_dci)->rv1 = 0;
((DCI2A_20MHz_2A_FDD_t*)DLSCH_dci)->TPC = tpc;
// deactivate TB2
((DCI2A_20MHz_2A_FDD_t*)DLSCH_dci)->mcs2 = 0;
((DCI2A_20MHz_2A_FDD_t*)DLSCH_dci)->rv2 = 1;
......@@ -1367,6 +1421,7 @@ schedule_ue_spec(
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->ndi1 = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->rv1 = 0;
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->TPC = tpc;
// deactivate TB2
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->mcs2 = 0;
......@@ -1384,6 +1439,7 @@ schedule_ue_spec(
((DCI2_5MHz_2A_TDD_t*)DLSCH_dci)->ndi1 = 1;
((DCI2_5MHz_2A_TDD_t*)DLSCH_dci)->rv1 = round&3;
((DCI2_5MHz_2A_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
((DCI2_5MHz_2A_TDD_t*)DLSCH_dci)->TPC = tpc;
//}
/* else {
......@@ -1403,6 +1459,7 @@ schedule_ue_spec(
((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->ndi = 1;
((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->rv = round&3;
((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->TPC = tpc;
if(dl_pow_off[CC_id][UE_id] == 2) {
dl_pow_off[CC_id][UE_id] = 1;
......@@ -1420,6 +1477,8 @@ schedule_ue_spec(
((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->dl_power_off = 1;
((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->tpmi = 5;
((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->TPC = tpc;
break;
}
......@@ -1481,7 +1540,6 @@ fill_DLSCH_dci(
UE_list_t *UE_list = &eNB->UE_list;
RA_TEMPLATE *RA_template;
start_meas(&eNB->fill_DLSCH_dci);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_FILL_DLSCH_DCI,VCD_FUNCTION_IN);
......
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
View file @ 550ef12a
......@@ -611,10 +611,17 @@ void schedule_ulsch(module_id_t module_idP, frame_t frameP,unsigned char coopera
if ((eNB->common_channels[CC_id].RA_template[i].RA_active == TRUE) &&
(eNB->common_channels[CC_id].RA_template[i].generate_rar == 0) &&
(eNB->common_channels[CC_id].RA_template[i].Msg3_subframe == sched_subframe)) {
//leave out first RB for PUCCH
first_rb[CC_id]++;
break;
}
}
/*
if (mac_xface->is_prach_subframe(&(mac_xface->lte_frame_parms),frameP,subframeP)) {
first_rb[CC_id] = (mac_xface->get_prach_prb_offset(&(mac_xface->lte_frame_parms),
*/
}
schedule_ulsch_rnti(module_idP, cooperation_flag, frameP, subframeP, sched_subframe, nCCE, nCCE_available, first_rb);
......@@ -650,7 +657,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
DCI_PDU *DCI_pdu;
uint8_t status = 0;
uint8_t rb_table_index = -1;
uint16_t TBS = 0,i;
uint16_t TBS = 0;
int32_t buffer_occupancy=0;
uint32_t cqi_req,cshift,ndi,mcs,rballoc,tpc;
int32_t normalized_rx_power, target_rx_power=-90;
......@@ -744,13 +751,13 @@ void schedule_ulsch_rnti(module_id_t module_idP,
// this is the normalized RX power and this should be constant (regardless of mcs
normalized_rx_power = eNB_UE_stats->UL_rssi[0];
target_rx_power = mac_xface->get_target_ul_rx_power(module_idP,CC_id);
target_rx_power = mac_xface->get_target_pusch_rx_power(module_idP,CC_id);
// this assumes accumulated tpc
// make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out
if (((UE_template->tpc_tx_frame*10+UE_template->tpc_tx_subframe)%10240)<(frameP*10+subframeP+10)) {
UE_template->tpc_tx_frame=frameP;
UE_template->tpc_tx_subframe=subframeP;
if (((UE_template->pusch_tpc_tx_frame*10+UE_template->pusch_tpc_tx_subframe)%10240)<(frameP*10+subframeP+10)) {
UE_template->pusch_tpc_tx_frame=frameP;
UE_template->pusch_tpc_tx_subframe=subframeP;
if (normalized_rx_power>(target_rx_power+1)) {
tpc = 0; //-1
tpc_accumulated--;
......@@ -760,8 +767,8 @@ void schedule_ulsch_rnti(module_id_t module_idP,
} else {
tpc = 1; //0
}
LOG_D(MAC,"[eNB %d] ULSCH scheduler: subframe %d, harq_pid %d, tpc %d, accumulated %d, normalized/target rx power %d/%d\n",
module_idP,subframeP,harq_pid,tpc,
LOG_I(MAC,"[eNB %d] ULSCH scheduler: frame %d, subframe %d, harq_pid %d, tpc %d, accumulated %d, normalized/target rx power %d/%d\n",
module_idP,frameP,subframeP,harq_pid,tpc,
tpc_accumulated,normalized_rx_power,target_rx_power);
} else {
tpc = 1; //0
......
openair2/LAYER2/MAC/main.c
View file @ 550ef12a
......@@ -534,7 +534,11 @@ int l2_init(LTE_DL_FRAME_PARMS *frame_parms,int eMBMS_active, char *uecap_xer,ui
mac_xface->get_mu_mimo_mode = get_mu_mimo_mode;
mac_xface->get_hundred_times_delta_TF = get_hundred_times_delta_IF_mac;
mac_xface->get_target_ul_rx_power = get_target_ul_rx_power;
mac_xface->get_target_pusch_rx_power = get_target_pusch_rx_power;
mac_xface->get_target_pucch_rx_power = get_target_pucch_rx_power;
mac_xface->get_prach_prb_offset = get_prach_prb_offset;
mac_xface->is_prach_subframe = is_prach_subframe;
#ifdef Rel10
mac_xface->get_mch_sdu = get_mch_sdu;
......
openair2/PHY_INTERFACE/defs.h
View file @ 550ef12a
......@@ -313,7 +313,8 @@ typedef struct {
/// get the delta TF for Uplink Power Control Calculation
int16_t (*get_hundred_times_delta_TF) (module_id_t module_idP, uint8_t CC_id, rnti_t rnti, uint8_t harq_pid);
/// get target uplink received power
int16_t (*get_target_ul_rx_power) (module_id_t module_idP, uint8_t CC_id);
int16_t (*get_target_pusch_rx_power) (module_id_t module_idP, uint8_t CC_id);
int16_t (*get_target_pucch_rx_power) (module_id_t module_idP, uint8_t CC_id);
unsigned char is_cluster_head;
unsigned char is_primary_cluster_head;
......@@ -323,10 +324,13 @@ typedef struct {
/// PHY Frame Configuration
LTE_DL_FRAME_PARMS *lte_frame_parms;
//ICIC algos
uint8_t (*get_SB_size)(uint8_t n_rb_dl);
uint8_t (*get_prach_prb_offset)(LTE_DL_FRAME_PARMS *frame_parms, uint8_t tdd_mapindex, uint16_t Nf);
int (*is_prach_subframe)(LTE_DL_FRAME_PARMS *frame_parms,frame_t frame, uint8_t subframe);
//end ALU's algo
/// ICIC algos
uint8_t (*get_SB_size)(uint8_t n_rb_dl);
///end ALU's algo
} MAC_xface;
......
openair2/RRC/LITE/rrc_UE.c
View file @ 550ef12a
......@@ -2441,7 +2441,6 @@ int decode_BCCH_DLSCH_Message(
#endif
) {
rrc_ue_generate_RRCConnectionRequest(ctxt_pP, 0);
LOG_I( RRC, "not sending connection request\n" );
rrc_set_sub_state( ctxt_pP->module_id, RRC_SUB_STATE_IDLE_CONNECTING );
}
......@@ -3072,7 +3071,6 @@ static int decode_SI( const protocol_ctxt_t* const ctxt_pP, const uint8_t eNB_in
#if !(defined(ENABLE_ITTI) && defined(ENABLE_USE_MME))
rrc_ue_generate_RRCConnectionRequest( ctxt_pP, eNB_index );
LOG_I( RRC, "not sending connection request\n" );
#endif
if (UE_rrc_inst[ctxt_pP->module_id].Info[eNB_index].State == RRC_IDLE) {
......
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