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OpenXG-RAN
Commits
76c71f69
Commit
76c71f69
authored
Dec 14, 2020
by
Robert Schmidt
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Group PDCCH PDU per CC/BWP/CORESET in RA, and reuse in DLSCH
parent
351d45b5
Changes
4
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4 changed files
with
26 additions
and
18 deletions
+26
-18
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+2
-0
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+16
-10
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+4
-8
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+4
-0
No files found.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
View file @
76c71f69
...
...
@@ -89,6 +89,7 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
const
int
num_slots
=
nr_slots_per_frame
[
*
scc
->
ssbSubcarrierSpacing
];
nfapi_nr_dl_tti_request_t
*
DL_req
=
&
gNB
->
DL_req
[
0
];
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
***
pdcch
=
(
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
***
)
gNB
->
pdcch_pdu_idx
[
CC_idP
];
nfapi_nr_ul_tti_request_t
*
future_ul_tti_req
=
&
gNB
->
UL_tti_req_ahead
[
CC_idP
][(
slotP
+
num_slots
-
1
)
%
num_slots
];
nfapi_nr_ul_dci_request_t
*
UL_dci_req
=
&
gNB
->
UL_dci_req
[
0
];
...
...
@@ -103,6 +104,7 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
DL_req
[
CC_idP
].
dl_tti_request_body
.
nPDUs
=
0
;
DL_req
[
CC_idP
].
dl_tti_request_body
.
nGroup
=
0
;
//DL_req[CC_idP].dl_tti_request_body.transmission_power_pcfich = 6000;
memset
(
pdcch
,
0
,
sizeof
(
**
pdcch
)
*
MAX_NUM_BWP
*
MAX_NUM_CORESET
);
UL_dci_req
[
CC_idP
].
SFN
=
frameP
;
UL_dci_req
[
CC_idP
].
Slot
=
slotP
;
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
View file @
76c71f69
...
...
@@ -818,16 +818,22 @@ void nr_generate_Msg2(module_id_t module_idP,
nfapi_nr_pdu_t
*
tx_req
=
&
nr_mac
->
TX_req
[
CC_id
].
pdu_list
[
nr_mac
->
TX_req
[
CC_id
].
Number_of_PDUs
];
/* NOTE: below we assume that there are not multiple concurrent RAs. If
* this was the case, we would need to allocate all DCIs within the same
* PDCCH, i.e., the same RA coreset */
/* look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not
* exist, create it. This is especially important if we have multiple RAs,
* and the DLSCH has to reuse them, so we need to mark them */
const
int
bwpid
=
bwp
->
bwp_Id
;
const
int
coresetid
=
coreset
->
controlResourceSetId
;
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu_rel15
=
nr_mac
->
pdcch_pdu_idx
[
CC_id
][
bwpid
][
coresetid
];
if
(
!
pdcch_pdu_rel15
)
{
nfapi_nr_dl_tti_request_pdu_t
*
dl_tti_pdcch_pdu
=
&
dl_req
->
dl_tti_pdu_list
[
dl_req
->
nPDUs
];
memset
((
void
*
)
dl_tti_pdcch_pdu
,
0
,
sizeof
(
nfapi_nr_dl_tti_request_pdu_t
));
memset
(
dl_tti_pdcch_pdu
,
0
,
sizeof
(
nfapi_nr_dl_tti_request_pdu_t
));
dl_tti_pdcch_pdu
->
PDUType
=
NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE
;
dl_tti_pdcch_pdu
->
PDUSize
=
(
uint8_t
)(
2
+
sizeof
(
nfapi_nr_dl_tti_pdcch_pdu
));
dl_tti_pdcch_pdu
->
PDUSize
=
(
uint8_t
)(
2
+
sizeof
(
nfapi_nr_dl_tti_pdcch_pdu
));
dl_req
->
nPDUs
+=
1
;
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu_rel15
=
&
dl_tti_pdcch_pdu
->
pdcch_pdu
.
pdcch_pdu_rel15
;
pdcch_pdu_rel15
=
&
dl_tti_pdcch_pdu
->
pdcch_pdu
.
pdcch_pdu_rel15
;
nr_configure_pdcch
(
pdcch_pdu_rel15
,
ss
,
coreset
,
scc
,
bwp
);
nr_mac
->
pdcch_pdu_idx
[
CC_id
][
bwpid
][
coresetid
]
=
pdcch_pdu_rel15
;
}
nfapi_nr_dl_tti_request_pdu_t
*
dl_tti_pdsch_pdu
=
&
dl_req
->
dl_tti_pdu_list
[
dl_req
->
nPDUs
];
memset
((
void
*
)
dl_tti_pdsch_pdu
,
0
,
sizeof
(
nfapi_nr_dl_tti_request_pdu_t
));
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
View file @
76c71f69
...
...
@@ -552,10 +552,6 @@ void nr_schedule_ue_spec(module_id_t module_id,
NR_UE_info_t
*
UE_info
=
&
gNB_mac
->
UE_info
;
nfapi_nr_dl_tti_request_body_t
*
dl_req
=
&
gNB_mac
->
DL_req
[
CC_id
].
dl_tti_request_body
;
/* a PDCCH PDU groups DCIs per BWP and CORESET. Save a pointer to each
* allocated PDCCH so we can easily allocate UE's DCIs independent of any
* CORESET order */
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu_bwp_coreset
[
MAX_NUM_BWP
][
MAX_NUM_CORESET
]
=
{
0
};
NR_UE_list_t
*
UE_list
=
&
UE_info
->
list
;
for
(
int
UE_id
=
UE_list
->
head
;
UE_id
>=
0
;
UE_id
=
UE_list
->
next
[
UE_id
])
{
...
...
@@ -636,11 +632,11 @@ void nr_schedule_ue_spec(module_id_t module_id,
AssertFatal
(
bwp
->
bwp_Dedicated
->
pdcch_Config
->
choice
.
setup
->
searchSpacesToAddModList
->
list
.
count
>
0
,
"searchSPacesToAddModList is empty
\n
"
);
/* look up the PDCCH PDU for this
BWP and CORESET. If it does not exist,
* create it */
/* look up the PDCCH PDU for this
CC, BWP, and CORESET. If it does not
*
exist,
create it */
const
int
bwpid
=
sched_ctrl
->
active_bwp
->
bwp_Id
;
const
int
coresetid
=
sched_ctrl
->
coreset
->
controlResourceSetId
;
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu
=
pdcch_pdu_bwp_coreset
[
bwpid
][
coresetid
];
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu
=
gNB_mac
->
pdcch_pdu_idx
[
CC_id
]
[
bwpid
][
coresetid
];
if
(
!
pdcch_pdu
)
{
nfapi_nr_dl_tti_request_pdu_t
*
dl_tti_pdcch_pdu
=
&
dl_req
->
dl_tti_pdu_list
[
dl_req
->
nPDUs
];
memset
(
dl_tti_pdcch_pdu
,
0
,
sizeof
(
nfapi_nr_dl_tti_request_pdu_t
));
...
...
@@ -649,7 +645,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
dl_req
->
nPDUs
+=
1
;
pdcch_pdu
=
&
dl_tti_pdcch_pdu
->
pdcch_pdu
.
pdcch_pdu_rel15
;
nr_configure_pdcch
(
pdcch_pdu
,
sched_ctrl
->
search_space
,
sched_ctrl
->
coreset
,
scc
,
bwp
);
pdcch_pdu_bwp_coreset
[
bwpid
][
coresetid
]
=
pdcch_pdu
;
gNB_mac
->
pdcch_pdu_idx
[
CC_id
]
[
bwpid
][
coresetid
]
=
pdcch_pdu
;
}
nfapi_nr_dl_tti_request_pdu_t
*
dl_tti_pdsch_pdu
=
&
dl_req
->
dl_tti_pdu_list
[
dl_req
->
nPDUs
];
...
...
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
View file @
76c71f69
...
...
@@ -511,6 +511,10 @@ typedef struct gNB_MAC_INST_s {
nfapi_nr_config_request_scf_t
config
[
NFAPI_CC_MAX
];
/// NFAPI DL Config Request Structure
nfapi_nr_dl_tti_request_t
DL_req
[
NFAPI_CC_MAX
];
/// a PDCCH PDU groups DCIs per BWP and CORESET. The following structure
/// keeps pointers to PDCCH PDUs within DL_req so that we can easily track
/// PDCCH PDUs per CC/BWP/CORESET
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu_idx
[
NFAPI_CC_MAX
][
MAX_NUM_BWP
][
MAX_NUM_CORESET
];
/// NFAPI UL TTI Request Structure, simple pointer into structure
/// UL_tti_req_ahead for current frame/slot
nfapi_nr_ul_tti_request_t
*
UL_tti_req
[
NFAPI_CC_MAX
];
...
...
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