Commit b98bb25f authored by Elena_Lukashova's avatar Elena_Lukashova

Merge branch 'feature-60-tm4-fork' into feature-59-tm4

1. TM4 works on dlsim_tm4.c with full HARQ support for both PIA and SIC.
parents 60eddd2c e88561e9
......@@ -1827,7 +1827,19 @@ target_link_libraries (oaisim_nos1 ${T_LIB})
# Unitary tests for each piece of L1: example, mbmssim is MBMS L1 simulator
#####################################
foreach(myExe dlsim dlsim_tm4 ulsim pbchsim scansim mbmssim pdcchsim pucchsim prachsim syncsim)
#special case for dlim TM4, which uses its own version of phy_scope code
add_executable(dlsim_tm4
${OPENAIR_BIN_DIR}/messages_xml.h
${OPENAIR1_DIR}/SIMULATION/LTE_PHY/dlsim_tm4.c
${OPENAIR1_DIR}/PHY/TOOLS/lte_phy_scope_tm4.c
${T_SOURCE}
)
target_link_libraries (dlsim_tm4
-Wl,--start-group SIMU UTIL SCHED_LIB PHY LFDS ${ITTI_LIB} -Wl,--end-group
pthread m rt ${CONFIG_LIBRARIES} ${ATLAS_LIBRARIES} ${XFORMS_LIBRARIES} ${T_LIB}
)
foreach(myExe dlsim ulsim pbchsim scansim mbmssim pdcchsim pucchsim prachsim syncsim)
add_executable(${myExe}
${OPENAIR_BIN_DIR}/messages_xml.h
${OPENAIR1_DIR}/SIMULATION/LTE_PHY/${myExe}.c
......
......@@ -952,8 +952,8 @@ void phy_init_lte_ue__PDSCH( LTE_UE_PDSCH* const pdsch, const LTE_DL_FRAME_PARMS
pdsch->dl_ch_estimates_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pdsch->dl_ch_mag0 = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pdsch->dl_ch_magb0 = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pdsch->dl_ch_mag1 = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pdsch->dl_ch_magb1 = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
//pdsch->dl_ch_mag1 = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
//pdsch->dl_ch_magb1 = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
// the allocated memory size is fixed:
AssertFatal( fp->nb_antennas_rx <= 2, "nb_antennas_rx > 2" );
......@@ -969,8 +969,8 @@ void phy_init_lte_ue__PDSCH( LTE_UE_PDSCH* const pdsch, const LTE_DL_FRAME_PARMS
pdsch->dl_ch_estimates_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
pdsch->dl_ch_mag0[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
pdsch->dl_ch_magb0[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
pdsch->dl_ch_mag1[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
pdsch->dl_ch_magb1[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
//pdsch->dl_ch_mag1[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
//pdsch->dl_ch_magb1[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
}
}
}
......@@ -1079,30 +1079,37 @@ int phy_init_lte_ue(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->llr[1] = (int16_t*)malloc16_clear( (8*((3*8*6144)+12))*sizeof(int16_t) );
pdsch_vars[eNB_id]->llr128_2ndstream = (int16_t**)malloc16_clear( sizeof(int16_t*) );
pdsch_vars[eNB_id]->rho = (int32_t**)malloc16_clear( fp->nb_antennas_rx*sizeof(int32_t*) );
for (int i=0; i<fp->nb_antennas_rx; i++)
pdsch_vars[eNB_id]->rho[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*(fp->N_RB_DL*12*7*2) );
pdsch_vars[eNB_id]->dl_ch_rho2_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
for (i=0; i<fp->nb_antennas_rx; i++)
for (j=0; j<4; j++) {
const int idx = (j<<1)+i;
const size_t num = 7*2*fp->N_RB_DL*12+4;
pdsch_vars[eNB_id]->dl_ch_rho2_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
}
const size_t num = 7*2*fp->N_RB_DL*12+4;
for (k=0;k<8;k++) { //harq_pid
for (l=0;l<8;l++) { //round
pdsch_vars[eNB_id]->rxdataF_comp1[k][l] = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pdsch_vars[eNB_id]->dl_ch_rho_ext[k][l] = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
// pdsch_vars[eNB_id]->clean_x1[k][l] = (int16_t*)malloc16_clear( sizeof(int32_t) * num);
pdsch_vars[eNB_id]->dl_ch_mag1[k][l] = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pdsch_vars[eNB_id]->dl_ch_magb1[k][l] = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
for (int i=0; i<fp->nb_antennas_rx; i++)
for (int j=0; j<4; j++) { //frame_parms->nb_antennas_tx; j++)
const int idx = (j<<1)+i;
pdsch_vars[eNB_id]->dl_ch_rho_ext[k][l][idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
pdsch_vars[eNB_id]->rxdataF_comp1[k][l][idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
pdsch_vars[eNB_id]->dl_ch_mag1[k][l][idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
pdsch_vars[eNB_id]->dl_ch_magb1[k][l][idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
}
}
}
......
......@@ -45,6 +45,7 @@
#endif
#include "assertions.h"
//#define DEBUG_HARQ
//#define DEBUG_DCI
uint32_t localRIV2alloc_LUT6[32];
......@@ -878,7 +879,7 @@ int generate_eNB_dlsch_params_from_dci(int frame,
uint32_t rballoc = UINT32_MAX;
uint32_t RIV_max = 0;
uint8_t NPRB,tbswap,tpmi=0;
LTE_eNB_DLSCH_t *dlsch0=NULL,*dlsch1;
LTE_eNB_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
uint8_t frame_type=frame_parms->frame_type;
uint8_t vrb_type=0;
uint8_t mcs=0,mcs1=0,mcs2=0;
......@@ -886,6 +887,7 @@ int generate_eNB_dlsch_params_from_dci(int frame,
uint8_t rv=0,rv1=0,rv2=0;
uint8_t rah=0;
uint8_t TPC=0;
uint8_t TB0_active=0,TB1_active=0;
LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
// printf("Generate eNB DCI, format %d, rnti %x (pdu %p)\n",dci_format,rnti,dci_pdu);
......@@ -926,6 +928,7 @@ int generate_eNB_dlsch_params_from_dci(int frame,
}
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
dlsch0_harq->codeword=0;
if (vrb_type==LOCALIZED) {
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT6[rballoc];
......@@ -1216,6 +1219,7 @@ int generate_eNB_dlsch_params_from_dci(int frame,
}
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
dlsch0_harq->codeword=0;
// printf("DCI: Setting subframe_tx for subframe %d\n",subframe);
dlsch[0]->subframe_tx[subframe] = 1;
......@@ -1497,66 +1501,137 @@ int generate_eNB_dlsch_params_from_dci(int frame,
// Flip the TB to codeword mapping as described in 5.3.3.1.5 of 36-212 V11.3.0
// note that we must set tbswap=0 in eNB scheduler if one TB is deactivated
if (tbswap == 0) {
dlsch0 = dlsch[0];
dlsch1 = dlsch[1];
} else {
dlsch0 = dlsch[1];
dlsch1 = dlsch[0];
}
TB0_active = 1;
TB1_active = 1;
if ((rv1 == 1) && (mcs1 == 0)) {
TB0_active=0;
}
if ((rv2 == 1) && (mcs2 == 0)) {
TB1_active=0;
}
#ifdef DEBUG_HARQ
printf("RV0 = %d, RV1 = %d. MCS0 = %d, MCS1=%d\n", rv1, rv2, mcs1, mcs2);
#endif
if (TB0_active && TB1_active && tbswap==0) {
dlsch0=dlsch[0];
dlsch1=dlsch[1];
dlsch0->active = 1;
dlsch1->active = 1;
dlsch0_harq = dlsch0->harq_processes[harq_pid];
dlsch1_harq = dlsch1->harq_processes[harq_pid];
dlsch0_harq->mcs = mcs1;
dlsch1_harq->mcs = mcs2;
dlsch0_harq->rvidx = rv1;
dlsch1_harq->rvidx = rv2;
dlsch0_harq->status = ACTIVE;
dlsch1_harq->status = ACTIVE;
dlsch0_harq->codeword=0;
dlsch1_harq->codeword=1;
#ifdef DEBUG_HARQ
printf("\n ENB: BOTH ACTIVE\n");
#endif
}
else if (TB0_active && TB1_active && tbswap==1) {
dlsch0=dlsch[0];
dlsch1=dlsch[1];
dlsch0->active = 1;
dlsch1->active = 1;
dlsch0_harq = dlsch0->harq_processes[harq_pid];
dlsch1_harq = dlsch1->harq_processes[harq_pid];
dlsch0_harq->mcs = mcs1;
dlsch1_harq->mcs = mcs2;
dlsch0_harq->rvidx = rv1;
dlsch1_harq->rvidx = rv2;
dlsch0_harq->status = ACTIVE;
dlsch1_harq->status = ACTIVE;
dlsch0_harq->codeword=1;
dlsch1_harq->codeword=0;
}
else if (TB0_active && (TB1_active==0)) {
dlsch0=dlsch[0];
dlsch0->active = 1;
dlsch0_harq = dlsch0->harq_processes[harq_pid];
dlsch0_harq->mcs = mcs1;
dlsch0_harq->rvidx = rv1;
dlsch0_harq->status = ACTIVE;
dlsch0_harq->codeword = 0;
dlsch1=NULL;
dlsch1_harq = NULL;
#ifdef DEBUG_HARQ
printf("\n ENB: TB1 is deactivated, retransmit TB0 transmit in TM6\n");
#endif
}
else if ((TB0_active==0) && TB1_active) {
dlsch1=dlsch[1];
dlsch1->active = 1;
dlsch1_harq = dlsch1->harq_processes[harq_pid];
dlsch1_harq->mcs = mcs2;
dlsch1_harq->rvidx = rv2;
dlsch1_harq->status = ACTIVE;
dlsch1_harq->codeword = 0;
dlsch0=NULL;
dlsch0_harq = NULL;
#ifdef DEBUG_HARQ
printf("\n ENB: TB0 is deactivated, retransmit TB1 transmit in TM6\n");
#endif
}
if (dlsch0 != NULL){
dlsch0->subframe_tx[subframe] = 1;
dlsch0->current_harq_pid = harq_pid;
dlsch1->current_harq_pid = harq_pid;
dlsch0->harq_ids[subframe] = harq_pid;
}
if (dlsch1_harq != NULL){
dlsch1->current_harq_pid = harq_pid;
dlsch1->harq_ids[subframe] = harq_pid;
// printf("Setting DLSCH harq id %d to subframe %d\n",harq_pid,subframe);
}
if (dlsch0 != NULL ){
conv_rballoc(rah,
rballoc,
frame_parms->N_RB_DL,
dlsch0_harq->rb_alloc);
dlsch1_harq->rb_alloc[0] = dlsch0_harq->rb_alloc[0];
dlsch0_harq->nb_rb = conv_nprb(rah, rballoc, frame_parms->N_RB_DL);
if (dlsch1 != NULL){
dlsch1_harq->rb_alloc[0] = dlsch0_harq->rb_alloc[0];
dlsch1_harq->nb_rb = dlsch0_harq->nb_rb;
}
} else if ((dlsch0 == NULL ) && (dlsch1 != NULL )){
conv_rballoc(rah,
rballoc,
frame_parms->N_RB_DL,
dlsch1_harq->rb_alloc);
if (dlsch0_harq->nb_rb == 0)
return(-1);
dlsch1_harq->nb_rb = conv_nprb(rah, rballoc, frame_parms->N_RB_DL);
}
/*if (dlsch0_harq->nb_rb == 0)
return(-1);*/
dlsch0_harq->mcs = mcs1;
dlsch1_harq->mcs = mcs2;
dlsch0_harq->rvidx = rv1;
dlsch1_harq->rvidx = rv2;
// assume both TBs are active
if (dlsch0_harq != NULL)
dlsch0_harq->Nl = 1;
if (dlsch1_harq != NULL)
dlsch1_harq->Nl = 1;
dlsch0->active = 1;
dlsch1->active = 1;
// check if either TB is disabled (see 36-213 V11.3 Section )
if ((dlsch0_harq->rvidx == 1) && (dlsch0_harq->mcs == 0)) {
dlsch0->active = 0;
}
if ((dlsch1_harq->rvidx == 1) && (dlsch1_harq->mcs == 0)) {
dlsch1->active = 0;
}
if (frame_parms->nb_antennas_tx == 2) {
if (dlsch1->active == 1) { // both TBs are active
if ((dlsch0 != NULL) && (dlsch1 != NULL)) { //two CW active
dlsch0_harq->dl_power_off = 1;
dlsch1_harq->dl_power_off = 1;
dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][dlsch0_harq->nb_rb-1];
dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][dlsch1_harq->nb_rb-1];
switch (tpmi) {
case 0:
dlsch0_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODING1;
......@@ -1580,8 +1655,7 @@ int generate_eNB_dlsch_params_from_dci(int frame,
default:
break;
}
}
else { // only one is active
} else if ((dlsch0 != NULL) && (dlsch1 == NULL)) { // only CW 0 active
dlsch0_harq->dl_power_off = 1;
dlsch0_harq->TBS= TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
switch (tpmi) {
......@@ -1613,19 +1687,53 @@ int generate_eNB_dlsch_params_from_dci(int frame,
dlsch0_harq->pmi_alloc = DL_pmi_single;
break;
}
} else if ((dlsch0 == NULL) && (dlsch1 != NULL)) {
dlsch1_harq->dl_power_off = 1;
dlsch1_harq->TBS= TBStable[get_I_TBS(dlsch1_harq->mcs)][dlsch1_harq->nb_rb-1];
switch (tpmi) {
case 0 :
dlsch1_harq->mimo_mode = ALAMOUTI;
break;
case 1:
dlsch1_harq->mimo_mode = UNIFORM_PRECODING11;
dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,0,0);
break;
case 2:
dlsch1_harq->mimo_mode = UNIFORM_PRECODING1m1;
dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,1,0);
break;
case 3:
dlsch1_harq->mimo_mode = UNIFORM_PRECODING1j;
dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,2,0);
break;
case 4:
dlsch1_harq->mimo_mode = UNIFORM_PRECODING1mj;
dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,3,0);
break;
case 5:
dlsch1_harq->mimo_mode = PUSCH_PRECODING0;
dlsch1_harq->pmi_alloc = DL_pmi_single;
break;
case 6:
dlsch1_harq->mimo_mode = PUSCH_PRECODING1;
dlsch1_harq->pmi_alloc = DL_pmi_single;
break;
}
}
} else if (frame_parms->nb_antennas_tx == 4) {
// fill in later
}
// reset HARQ process if this is the first transmission
if (dlsch0_harq->round == 0)
/* if (dlsch0_harq->round == 0)
dlsch0_harq->status = ACTIVE;
if (dlsch1_harq->round == 0)
dlsch1_harq->status = ACTIVE;
dlsch1_harq->status = ACTIVE;*/
if (dlsch0_harq != NULL)
dlsch0->rnti = rnti;
if (dlsch1 != NULL)
dlsch1->rnti = rnti;
break;
......@@ -1836,6 +1944,7 @@ int generate_eNB_dlsch_params_from_dci(int frame,
// Flip the TB to codeword mapping as described in 5.3.3.1.5 of 36-212 V11.3.0
// note that we must set tbswap=0 in eNB scheduler if one TB is deactivated
// This must be set as in TM4, does not work properly now.
if (tbswap == 0) {
dlsch0 = dlsch[0];
dlsch1 = dlsch[1];
......@@ -2121,6 +2230,10 @@ int generate_eNB_dlsch_params_from_dci(int frame,
dlsch0_harq = dlsch0->harq_processes[harq_pid];
dlsch1_harq = dlsch1->harq_processes[harq_pid];
// Needs to be checked
dlsch0_harq->codeword=0;
dlsch1_harq->codeword=1;
conv_rballoc(rah,
rballoc,
frame_parms->N_RB_DL,
......@@ -2282,6 +2395,10 @@ int generate_eNB_dlsch_params_from_dci(int frame,
dlsch0_harq = dlsch0->harq_processes[harq_pid];
dlsch1_harq = dlsch1->harq_processes[harq_pid];
// Needs to be checked
dlsch0_harq->codeword=0;
dlsch1_harq->codeword=1;
conv_rballoc(rah,
rballoc,
frame_parms->N_RB_DL,
......@@ -2454,6 +2571,10 @@ int generate_eNB_dlsch_params_from_dci(int frame,
dlsch0_harq = dlsch0->harq_processes[harq_pid];
dlsch1_harq = dlsch1->harq_processes[harq_pid];
// Needs to be checked
dlsch0_harq->codeword=0;
dlsch1_harq->codeword=1;
conv_rballoc(rah,
rballoc,
frame_parms->N_RB_DL,
......@@ -2535,6 +2656,8 @@ int generate_eNB_dlsch_params_from_dci(int frame,
//dlsch1->harq_ids[subframe] = harq_pid;
// printf("Setting DLSCH harq id %d to subframe %d\n",harq_pid,subframe);
dlsch0_harq = dlsch0->harq_processes[harq_pid];
// Needs to be checked
dlsch0_harq->codeword=0;
conv_rballoc(((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rah,
((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rballoc,frame_parms->N_RB_DL,
......@@ -2670,11 +2793,32 @@ int generate_eNB_dlsch_params_from_dci(int frame,
printf("dlsch0 eNB: mimo_mode %d\n",dlsch0_harq->mimo_mode);
}
if (dlsch1) {
printf("dlsch1 eNB: dlsch1 %p\n",dlsch1);
printf("dlsch1 eNB: rnti %x\n",dlsch1->rnti);
printf("dlsch1 eNB: NBRB %d\n",dlsch1_harq->nb_rb);
printf("dlsch1 eNB: rballoc %x\n",dlsch1_harq->rb_alloc[0]);
printf("dlsch1 eNB: harq_pid %d\n",harq_pid);
printf("dlsch1 eNB: round %d\n",dlsch1_harq->round);
printf("dlsch1 eNB: rvidx %d\n",dlsch1_harq->rvidx);
printf("dlsch1 eNB: TBS %d (NPRB %d)\n",dlsch1_harq->TBS,NPRB);
printf("dlsch1 eNB: mcs %d\n",dlsch1_harq->mcs);
printf("dlsch1 eNB: tpmi %d\n",tpmi);
printf("dlsch1 eNB: mimo_mode %d\n",dlsch1_harq->mimo_mode);
}
#endif
// compute DL power control parameters
if (dlsch0 != NULL){
computeRhoA_eNB(pdsch_config_dedicated, dlsch[0],dlsch0_harq->dl_power_off, frame_parms->nb_antennas_tx_eNB);
computeRhoB_eNB(pdsch_config_dedicated,&(frame_parms->pdsch_config_common),frame_parms->nb_antennas_tx_eNB,dlsch[0],dlsch0_harq->dl_power_off);
}
if (dlsch1 != NULL){
computeRhoA_eNB(pdsch_config_dedicated, dlsch[1],dlsch1_harq->dl_power_off, frame_parms->nb_antennas_tx_eNB);
computeRhoB_eNB(pdsch_config_dedicated,&(frame_parms->pdsch_config_common),frame_parms->nb_antennas_tx_eNB,dlsch[1],dlsch1_harq->dl_power_off);
}
return(0);
}
......@@ -3812,13 +3956,14 @@ int generate_ue_dlsch_params_from_dci(int frame,
uint8_t vrb_type=0;
uint8_t mcs=0,mcs1=0,mcs2=0;
uint8_t rv=0,rv1=0,rv2=0;
uint8_t TB0_active=0,TB1_active=0;
uint8_t ndi=0,ndi1=0,ndi2=0;
uint8_t rah=0;
uint8_t TPC=0;
uint8_t NPRB=0,tbswap=0,tpmi=0;
uint8_t Ngap;
LTE_UE_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
LTE_DL_UE_HARQ_t *dlsch0_harq,*dlsch1_harq;
LTE_DL_UE_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
#ifdef DEBUG_DCI
LOG_D(PHY,"dci_tools.c: Filling ue dlsch params -> rnti %x, dci_format %d\n",rnti,dci_format);
......@@ -3868,6 +4013,8 @@ int generate_ue_dlsch_params_from_dci(int frame,
}
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
NPRB = RIV2nb_rb_LUT6[rballoc];
dlsch0_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3];
dlsch[0]->g_pucch += delta_PUCCH_lut[TPC&3];
......@@ -4123,6 +4270,9 @@ int generate_ue_dlsch_params_from_dci(int frame,
dlsch0_harq->mimo_mode = frame_parms->mode1_flag == 1 ?SISO : ALAMOUTI;
dlsch0_harq->dl_power_off = 1; //no power offset
// Needs to be checked
dlsch0_harq->codeword=0;
LOG_D(PHY,"UE (%x/%d): Subframe %d Format1A DCI: ndi %d, old_ndi %d (first tx %d) harq_status %d, round %d\n",
dlsch[0]->rnti,
harq_pid,
......@@ -4276,6 +4426,9 @@ int generate_ue_dlsch_params_from_dci(int frame,
dlsch0_harq->mimo_mode = frame_parms->mode1_flag == 1 ?SISO : ALAMOUTI;
dlsch0_harq->dl_power_off = 1; //no power offset
// Needs to be checked
dlsch0_harq->codeword=0;
LOG_D(PHY,"UE (%x/%d): Subframe %d Format1C DCI: harq_status %d, round %d\n",
dlsch[0]->rnti,
harq_pid,
......@@ -4425,6 +4578,9 @@ int generate_ue_dlsch_params_from_dci(int frame,
dlsch0_harq->dl_power_off = 1; //no power offset
// Needs to be checked
dlsch0_harq->codeword=0;
LOG_D(PHY,"UE (%x/%d): Subframe %d Format1 DCI: ndi %d, old_ndi %d (first tx %d) harq_status %d\n",dlsch[0]->rnti,harq_pid,subframe,ndi,dlsch0_harq->DCINdi,
dlsch0_harq->first_tx,dlsch0_harq->status);
......@@ -4728,26 +4884,99 @@ int generate_ue_dlsch_params_from_dci(int frame,
return(-1);
}
if (frame_type == TDD)
tbswap = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tb_swap;
else
tbswap = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tb_swap;
// check if either TB is disabled (see 36-213 V8.6 p. 26)
TB0_active = 1;
TB1_active = 1;
if (tbswap == 0) {
dlsch0 = dlsch[0];
dlsch1 = dlsch[1];
} else {
dlsch0 = dlsch[1];
dlsch1 = dlsch[0];
if ((rv1 == 1) && (mcs1 == 0)) {
TB0_active=0;
}
if ((rv2 == 1) && (mcs2 == 0)) {
TB1_active=0;
}
#ifdef DEBUG_HARQ
printf("[DCI UE]: TB0 status %d , TB1 status %d\n", TB0_active, TB1_active);
#endif
//printf("RV TB0 = %d\n", rv1);
if (TB0_active && TB1_active && tbswap==0) { //dlsch0, dlsch0_harq are at the TB level
dlsch0=dlsch[0];
dlsch1=dlsch[1];
dlsch0->active = 1;
dlsch1->active = 1;
dlsch0_harq = dlsch0->harq_processes[harq_pid];
dlsch1_harq = dlsch1->harq_processes[harq_pid];
dlsch0_harq->mcs = mcs1;
dlsch1_harq->mcs = mcs2;
dlsch0_harq->rvidx = rv1;
dlsch1_harq->rvidx = rv2;
dlsch0_harq->status = ACTIVE;
dlsch1_harq->status = ACTIVE;
dlsch0_harq->codeword=0;
dlsch1_harq->codeword=1;
#ifdef DEBUG_HARQ
printf("[DCI UE]: BOTH ACTIVE\n");
#endif
}
else if (TB0_active && TB1_active && tbswap==1) {
dlsch0=dlsch[0];
dlsch1=dlsch[1];
dlsch0->active = 1;
dlsch1->active = 1;
dlsch0_harq = dlsch0->harq_processes[harq_pid];
dlsch1_harq = dlsch1->harq_processes[harq_pid];
dlsch0_harq->mcs = mcs1;
dlsch1_harq->mcs = mcs2;
dlsch0_harq->rvidx = rv1;
dlsch1_harq->rvidx = rv2;
dlsch0_harq->status = ACTIVE;
dlsch1_harq->status = ACTIVE;
dlsch0_harq->codeword=1;
dlsch1_harq->codeword=0;
}
else if (TB0_active && (TB1_active==0)) {
dlsch0=dlsch[0];
dlsch0->active = 1;
dlsch0_harq = dlsch0->harq_processes[harq_pid];
dlsch0_harq->mcs = mcs1;
dlsch0_harq->rvidx = rv1;
dlsch0_harq->status = ACTIVE;
dlsch0_harq->codeword = 0;
dlsch1=NULL;
dlsch1_harq = NULL;
#ifdef DEBUG_HARQ
printf("[DCI UE]: TB1 is deactivated, retransmit TB0 transmit in TM6\n");
#endif
}
else if ((TB0_active==0) && TB1_active) {
dlsch1=dlsch[1];
dlsch1->active = 1;
dlsch1_harq = dlsch1->harq_processes[harq_pid];
dlsch1_harq->mcs = mcs2;
dlsch1_harq->rvidx = rv2;
dlsch1_harq->status = ACTIVE;
dlsch1_harq->codeword = 0;
dlsch0=NULL;
dlsch0_harq = NULL;
#ifdef DEBUG_HARQ
printf("[DCI UE]: TB0 is deactivated, retransmit TB1 transmit in TM6\n");
#endif
}
if (dlsch0 != NULL){
dlsch0->current_harq_pid = harq_pid;
dlsch1->current_harq_pid = harq_pid;
dlsch0->harq_ack[subframe].harq_id = harq_pid;
}
if (dlsch1 != NULL){
dlsch1->current_harq_pid = harq_pid;
dlsch1->harq_ack[subframe].harq_id = harq_pid;
}
if (dlsch0_harq != NULL){
conv_rballoc(rah,
rballoc,
frame_parms->N_RB_DL,
......@@ -4758,6 +4987,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
dlsch0_harq->rb_alloc_odd[2]= dlsch0_harq->rb_alloc_even[2];
dlsch0_harq->rb_alloc_odd[3]= dlsch0_harq->rb_alloc_even[3];
if (dlsch1_harq != NULL){
dlsch1_harq->rb_alloc_even[0]= dlsch0_harq->rb_alloc_even[0];
dlsch1_harq->rb_alloc_even[1]= dlsch0_harq->rb_alloc_even[1];
dlsch1_harq->rb_alloc_even[2]= dlsch0_harq->rb_alloc_even[2];
......@@ -4767,53 +4997,52 @@ int generate_ue_dlsch_params_from_dci(int frame,
dlsch1_harq->rb_alloc_odd[2] = dlsch0_harq->rb_alloc_odd[2];
dlsch1_harq->rb_alloc_odd[3] = dlsch0_harq->rb_alloc_odd[3];
dlsch0_harq->nb_rb = conv_nprb(rah,
rballoc,
frame_parms->N_RB_DL);
dlsch1_harq->nb_rb = dlsch0_harq->nb_rb;
dlsch0_harq->mcs = mcs1;
dlsch1_harq->mcs = mcs2;
dlsch0_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3];
dlsch1_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3];
dlsch[0]->g_pucch += delta_PUCCH_lut[TPC&3];
dlsch[1]->g_pucch += delta_PUCCH_lut[TPC&3];
/*
if (dlsch0_harq->mcs>20) {
printf("dci_tools.c: mcs > 20 disabled for now (asked %d)\n",dlsch0_harq->mcs);
return(-1);
}
*/
dlsch0_harq->nb_rb = conv_nprb(rah,
rballoc,
frame_parms->N_RB_DL);
dlsch0_harq->rvidx = rv1;
dlsch1_harq->rvidx = rv2;
} else if ((dlsch0_harq == NULL) && (dlsch1_harq != NULL)){
// assume both TBs are active
dlsch0_harq->Nl = 1;
dlsch1_harq->Nl = 1;
dlsch0->active = 1;
dlsch1->active = 1;
conv_rballoc(rah,
rballoc,
frame_parms->N_RB_DL,
dlsch1_harq->rb_alloc_even);
dlsch1_harq->rb_alloc_odd[0]= dlsch1_harq->rb_alloc_even[0];
dlsch1_harq->rb_alloc_odd[1]= dlsch1_harq->rb_alloc_even[1];
dlsch1_harq->rb_alloc_odd[2]= dlsch1_harq->rb_alloc_even[2];
dlsch1_harq->rb_alloc_odd[3]= dlsch1_harq->rb_alloc_even[3];
dlsch1_harq->nb_rb = conv_nprb(rah,
rballoc,
frame_parms->N_RB_DL);
}
// check if either TB is disabled (see 36-213 V8.6 p. 26)
if ((dlsch0_harq->rvidx == 1) && (dlsch0_harq->mcs == 0)) {
dlsch0_harq->status = DISABLED;
if (dlsch0_harq != NULL) {
dlsch0_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3];
dlsch0->g_pucch += delta_PUCCH_lut[TPC&3];
}
if ((dlsch1_harq->rvidx == 1) && (dlsch1_harq->mcs == 0)) {
dlsch1_harq->status = DISABLED;
if (dlsch1_harq != NULL) {
dlsch1_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3];
dlsch1->g_pucch += delta_PUCCH_lut[TPC&3];
}
// assume one layer per codeword (2 antenna port case)
if (dlsch0_harq != NULL)
dlsch0_harq->Nl = 1;
if (dlsch1_harq != NULL)
dlsch1_harq->Nl = 1;
#ifdef DEBUG_HARQ
printf ("[DCI UE] tpmi = %d\n", tpmi);
#endif
// dlsch0->layer_index = tbswap;
// dlsch1->layer_index = 1-tbswap;
if (dlsch1->active==1) { //two codewords
if ((dlsch0 != NULL) && (dlsch1 != NULL)){ //two CW active
dlsch0_harq->dl_power_off = 1;
dlsch1_harq->dl_power_off = 1;
switch (tpmi) {
......@@ -4826,20 +5055,24 @@ int generate_ue_dlsch_params_from_dci(int frame,
case 1:
dlsch0_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODINGj;
dlsch1_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODINGj;
dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,1,1);
dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,1, 1);
dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,1, 1);
break;
case 2: // PUSCH precoding
dlsch0_harq->mimo_mode = DUALSTREAM_PUSCH_PRECODING;
dlsch0_harq->pmi_alloc = dlsch0->pmi_alloc;
dlsch1_harq->mimo_mode = DUALSTREAM_PUSCH_PRECODING;
if (tbswap==0){
dlsch0_harq->pmi_alloc = dlsch0->pmi_alloc;
dlsch1_harq->pmi_alloc = dlsch0->pmi_alloc^0x1555;
} else {
dlsch1_harq->pmi_alloc = dlsch0->pmi_alloc;
dlsch0_harq->pmi_alloc = dlsch0->pmi_alloc^0x1555;
}
break;
default:
break;
}
}
else {
} else if ((dlsch0 != NULL) && (dlsch1 == NULL)) { // only CW 0 active
dlsch0_harq->dl_power_off = 1;
switch (tpmi) {
case 0 :
......@@ -4864,33 +5097,86 @@ int generate_ue_dlsch_params_from_dci(int frame,
case 5:
dlsch0_harq->mimo_mode = PUSCH_PRECODING0;
// pmi stored from ulsch allocation routine
dlsch0_harq->pmi_alloc = dlsch0->pmi_alloc;
// we need to extract the first column of precoding matrix (which was computed assuming rank==2)
dlsch0_harq->pmi_alloc = dlsch0->pmi_alloc;;//pmi_convert(frame_parms,dlsch0->pmi_alloc,0);
//LOG_I(PHY,"XXX using PMI %x\n",pmi2hex_2Ar1(dlsch0_harq->pmi_alloc));
#ifdef DEBUG_HARQ
printf ("[DCI UE] I am calling from the UE side pmi_alloc_new = %d\n", dlsch0->pmi_alloc);
#endif
break;
case 6:
dlsch0_harq->mimo_mode = PUSCH_PRECODING1;
LOG_E(PHY,"Unsupported TPMI\n");
// we need to extract the second column of precoding matrix (which was computed assuming rank==2)
dlsch0_harq->pmi_alloc = dlsch0->pmi_alloc;;//pmi_convert(frame_parms,dlsch0->pmi_alloc,1);
#ifdef DEBUG_HARQ
printf ("[DCI UE] I am calling from the UE side pmi_alloc_new = %d\n", dlsch0->pmi_alloc);
#endif
break;
#ifdef DEBUG_HARQ
printf("[DCI UE] harq0 MIMO mode = %d\n", dlsch0_harq->mimo_mode);
#endif
}
} else {
dlsch1_harq->dl_power_off = 1;
switch (tpmi) {
case 0 :
dlsch1_harq->mimo_mode = ALAMOUTI;
break;
case 1:
dlsch1_harq->mimo_mode = UNIFORM_PRECODING11;
dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,0, 0);
break;
case 2:
dlsch1_harq->mimo_mode = UNIFORM_PRECODING1m1;
dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,1, 0);
break;
case 3:
dlsch1_harq->mimo_mode = UNIFORM_PRECODING1j;
dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,2, 0);
break;
case 4:
dlsch1_harq->mimo_mode = UNIFORM_PRECODING1mj;
dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,3, 0);
break;
case 5:
dlsch1_harq->mimo_mode = PUSCH_PRECODING0;
// pmi stored from ulsch allocation routine
dlsch1_harq->pmi_alloc = dlsch1->pmi_alloc;
#ifdef DEBUG_HARQ
printf ("[DCI UE] I am calling from the UE side pmi_alloc_new = %d\n", dlsch1->pmi_alloc);
#endif
//LOG_I(PHY,"XXX using PMI %x\n",pmi2hex_2Ar1(dlsch0_harq->pmi_alloc));
break;
case 6:
dlsch1_harq->mimo_mode = PUSCH_PRECODING1;
dlsch1_harq->pmi_alloc = dlsch1->pmi_alloc;
#ifdef DEBUG_HARQ
printf ("[DCI UE] I am calling from the UE side pmi_alloc_new = %d\n", dlsch1->pmi_alloc);
#endif
return(-1);
break;
}
#ifdef DEBUG_HARQ
printf("[DCI UE] harq1 MIMO mode = %d\n", dlsch1_harq->mimo_mode);
#endif
}
if (frame_parms->mode1_flag == 1)
//printf(" UE DCI harq0 MIMO mode = %d\n", dlsch0_harq->mimo_mode);
if ((frame_parms->mode1_flag == 1) && (dlsch0_harq != NULL))
dlsch0_harq->mimo_mode = SISO;
if (dlsch0->active == 1) {
if ((ndi1!=dlsch0_harq->DCINdi) ||
(dlsch0_harq->first_tx==1)) {
if (dlsch0 != NULL) {
if ((ndi1!=dlsch0_harq->DCINdi) || (dlsch0_harq->first_tx==1)) {
dlsch0_harq->round = 0;
dlsch0_harq->status = ACTIVE;
dlsch0_harq->DCINdi = ndi1;
if (dlsch0_harq->first_tx==1) {
if ( dlsch0_harq->first_tx==1) {
LOG_D(PHY,"Format 2 DCI First TX0: Clearing flag\n");
dlsch0_harq->first_tx = 0;
}
}
else if (dlsch0_harq->status == SCH_IDLE) { // we got an Ndi = 0 for a previously decoded process,
} else if (dlsch0_harq->status == SCH_IDLE) { // we got an Ndi = 0 for a previously decoded process,
// this happens if either another harq process in the same
// is NAK or an ACK was not received
......@@ -4902,9 +5188,8 @@ int generate_ue_dlsch_params_from_dci(int frame,
}
}
if (dlsch1->active == 1) {
if ((ndi2!=dlsch1_harq->DCINdi) ||
(dlsch1_harq->first_tx==1)) {
if ((dlsch1 != NULL) && (dlsch1->active == 1 )) {
if ((ndi2!=dlsch1_harq->DCINdi) || (dlsch1_harq->first_tx==1)) {
dlsch1_harq->round = 0;
dlsch1_harq->status = ACTIVE;
dlsch1_harq->DCINdi = ndi2;
......@@ -4913,7 +5198,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
dlsch1_harq->first_tx = 0;
}
}
else if (dlsch1_harq->status == SCH_IDLE) { // we got an Ndi = 0 for a previously decoded process,
else if ((dlsch1 != NULL) && (dlsch1_harq->status == SCH_IDLE)) { // we got an Ndi = 0 for a previously decoded process,
// this happens if either another harq process in the same
// is NAK or an ACK was not received
......@@ -4924,8 +5209,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
}
}
dlsch0_harq->mcs = mcs1;
if (dlsch0 != NULL){
if (dlsch0_harq->nb_rb>1) {
dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
if (mcs1 <= 28)
......@@ -4934,23 +5218,19 @@ int generate_ue_dlsch_params_from_dci(int frame,
dlsch0_harq->Qm = (mcs1-28)<<1;
else
LOG_E(PHY,"invalid mcs1 %d\n",mcs1);
} else
dlsch0_harq->TBS =0;
dlsch0->rnti = rnti;
}
/*
if (dlsch0_harq->mcs > 18)
printf("mcs %d, TBS %d\n",dlsch0_harq->mcs,dlsch0_harq->TBS);
*/
if (dlsch1 != NULL) {
if (dlsch1_harq->DCINdi != ndi2) {
dlsch1_harq->round=0;
dlsch1_harq->status = ACTIVE;
}
dlsch1_harq->DCINdi = ndi2;
dlsch1_harq->mcs = mcs2;
if (dlsch1_harq->nb_rb>1) {
dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][dlsch1_harq->nb_rb-1];
......@@ -4963,9 +5243,16 @@ int generate_ue_dlsch_params_from_dci(int frame,
} else
dlsch1_harq->TBS = 0;
dlsch0->rnti = rnti;
dlsch1->rnti = rnti;
}
#ifdef DEBUG_HARQ
if (dlsch0 != NULL && dlsch1 != NULL)
printf("[DCI UE] dlsch0_harq status = %d, dlsch1_harq status = %d\n", dlsch0_harq->status, dlsch1_harq->status);
else if (dlsch0 == NULL && dlsch1 != NULL)
printf("[DCI UE] dlsch0_harq NULL dlsch1_harq status = %d\n", dlsch1_harq->status);
else if (dlsch0 != NULL && dlsch1 == NULL)
printf("[DCI UE] dlsch1_harq NULL dlsch0_harq status = %d\n", dlsch0_harq->status);
#endif
break;
......@@ -5208,6 +5495,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
// Flip the TB to codeword mapping as described in 5.3.3.1.5 of 36-212 V11.3.0
// note that we must set tbswap=0 in eNB scheduler if one TB is deactivated
//Needs to be done in the same manner as TM$.
if (tbswap == 0) {
dlsch0 = dlsch[0];
dlsch1 = dlsch[1];
......@@ -5218,6 +5506,9 @@ int generate_ue_dlsch_params_from_dci(int frame,
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
dlsch1_harq = dlsch[1]->harq_processes[harq_pid];
// Needs to be checked
dlsch0_harq->codeword=0;
dlsch1_harq->codeword=1;
dlsch0->current_harq_pid = harq_pid;
dlsch1->current_harq_pid = harq_pid;
dlsch0->harq_ack[subframe].harq_id = harq_pid;
......@@ -5476,6 +5767,8 @@ int generate_ue_dlsch_params_from_dci(int frame,
dlsch0 = dlsch[0];
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
// Needs to be checked
dlsch0_harq->codeword=0;
conv_rballoc(((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rah,
((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rballoc,frame_parms->N_RB_DL,
dlsch0_harq->rb_alloc_even);
......@@ -5633,11 +5926,19 @@ int generate_ue_dlsch_params_from_dci(int frame,
}
#endif
dlsch[0]->active=1;
//dlsch[0]->active=1;
// compute DL power control parameters
if (dlsch0_harq != NULL){
computeRhoA_UE(pdsch_config_dedicated, dlsch[0],dlsch0_harq->dl_power_off, frame_parms->nb_antennas_tx_eNB);
computeRhoB_UE(pdsch_config_dedicated,&(frame_parms->pdsch_config_common),frame_parms->nb_antennas_tx_eNB,dlsch[0],dlsch0_harq->dl_power_off);
}
if (dlsch1_harq != NULL) {
computeRhoA_UE(pdsch_config_dedicated, dlsch[1],dlsch1_harq->dl_power_off, frame_parms->nb_antennas_tx_eNB);
computeRhoB_UE(pdsch_config_dedicated,&(frame_parms->pdsch_config_common),frame_parms->nb_antennas_tx_eNB,dlsch[1],dlsch1_harq->dl_power_off);
}
return(0);
}
......@@ -5790,6 +6091,52 @@ uint32_t pdcch_alloc2ul_frame(LTE_DL_FRAME_PARMS *frame_parms,uint32_t frame, ui
}
int32_t pmi_convert_rank1_from_rank2(uint16_t pmi_alloc, int tpmi, int nb_rb)
{
int nb_subbands = 0;
int32_t pmi_alloc_new = 0, pmi_new = 0, pmi_old = 0;
int i;
switch (nb_rb) {
case 6:
nb_subbands = 6;
break;
default:
case 25:
nb_subbands = 7;
break;
case 50:
nb_subbands = 9;
break;
case 100:
nb_subbands = 13;
break;
}
for (i = 0; i < nb_subbands; i++) {
pmi_old = (pmi_alloc >> i)&1;
if (pmi_old == 0)
if (tpmi == 5)
pmi_new = 0;
else
pmi_new = 1;
else
if (tpmi == 5)
pmi_new = 2;
else
pmi_new = 3;
pmi_alloc_new|=pmi_new<<(2*i);
}
#ifdef DEBUG_HARQ
printf(" [DCI UE] pmi_alloc_old %d, pmi_alloc_new %d pmi_old %d , pmi_new %d\n", pmi_alloc, pmi_alloc_new,pmi_old, pmi_new );
#endif
return(pmi_alloc_new);
}
uint16_t quantize_subband_pmi(PHY_MEASUREMENTS *meas,uint8_t eNB_id,int nb_rb)
{
......@@ -5866,12 +6213,14 @@ uint16_t quantize_subband_pmi(PHY_MEASUREMENTS *meas,uint8_t eNB_id,int nb_rb)
pmivect |= ((pmiq-1)<<(i)); //shift 1 since only one bit
}
else {
LOG_E(PHY,"PMI feedback for rank %d not possible!\n",rank);
LOG_E(PHY,"PMI feedback for rank>1 not supported!\n");
pmivect = 0;
}
}
// printf( "pmivect %d \n", pmivect);
#ifdef DEBUG_HARQ
printf( "quantize_subband_pmi pmivect %d \n", pmivect);
#endif
return(pmivect);
}
......@@ -7231,8 +7580,6 @@ int generate_eNB_ulsch_params_from_dci(PHY_VARS_eNB *eNB,
proc->frame_tx,
subframe),
pdcch_alloc2ul_subframe(frame_parms,subframe));
switch (frame_parms->N_RB_DL) {
case 6:
if (frame_parms->frame_type == TDD) {
......
......@@ -172,6 +172,8 @@ typedef struct {
uint8_t Nlayers;
/// First layer for this PSCH transmission
uint8_t first_layer;
/// codeword this transport block is mapped to
uint8_t codeword;
} LTE_DL_eNB_HARQ_t;
typedef struct {
......@@ -575,6 +577,8 @@ typedef struct {
uint32_t trials[8];
/// error statistics per round
uint32_t errors[8];
/// codeword this transport block is mapped to
uint8_t codeword;
} LTE_DL_UE_HARQ_t;
typedef struct {
......
......@@ -698,6 +698,7 @@ int dlsch_encoding(unsigned char *a,
nb_rb,
m); // r
stop_meas(rm_stats);
//printf("dlsch->harq_processes[harq_pid]->rvidx = %d\n", dlsch->harq_processes[harq_pid]->rvidx);
#ifdef DEBUG_DLSCH_CODING
if (r==dlsch->harq_processes[harq_pid]->C-1)
......
......@@ -384,7 +384,7 @@ uint32_t dlsch_decoding(PHY_VARS_UE *phy_vars_ue,
harq_process->round);
#endif
//printf("dlsch->harq_processes[harq_pid]->rvidx = %d\n", dlsch->harq_processes[harq_pid]->rvidx);
if (lte_rate_matching_turbo_rx(harq_process->RTC[r],
G,
harq_process->w[r],
......
......@@ -37,8 +37,7 @@
* \note
* \warning
*/
#include "PHY/defs.h"
//#include "PHY/defs.h"
#include "PHY/extern.h"
#include "defs.h"
#include "extern.h"
......@@ -51,6 +50,8 @@
#define NOCYGWIN_STATIC
#endif
//#define DEBUG_HARQ
//#undef LOG_D
//#define LOG_D LOG_I
......@@ -120,6 +121,8 @@ int rx_pdsch(PHY_VARS_UE *ue,
int32_t **rxdataF_comp_ptr;
int32_t **dl_ch_mag_ptr;
int32_t codeword_TB0;
int32_t codeword_TB1;
......@@ -139,8 +142,30 @@ int rx_pdsch(PHY_VARS_UE *ue,
case PDSCH:
pdsch_vars = &ue->pdsch_vars[eNB_id];
dlsch_ue = ue->dlsch[eNB_id];
if ((dlsch_ue[0]->harq_processes[harq_pid]->status == ACTIVE) &&
(dlsch_ue[1]->harq_processes[harq_pid]->status == ACTIVE)){
codeword_TB0 = dlsch_ue[0]->harq_processes[harq_pid]->codeword;
codeword_TB1 = dlsch_ue[1]->harq_processes[harq_pid]->codeword;
dlsch0_harq = dlsch_ue[codeword_TB0]->harq_processes[harq_pid];
dlsch1_harq = dlsch_ue[codeword_TB1]->harq_processes[harq_pid];
#ifdef DEBUG_HARQ
printf("I am assuming both CW active\n");
#endif
}
else if ((dlsch_ue[0]->harq_processes[harq_pid]->status == ACTIVE) &&
(dlsch_ue[1]->harq_processes[harq_pid]->status != ACTIVE) ) {
codeword_TB0 = dlsch_ue[0]->harq_processes[harq_pid]->codeword;
dlsch0_harq = dlsch_ue[0]->harq_processes[harq_pid];
dlsch1_harq = dlsch_ue[1]->harq_processes[harq_pid];
dlsch1_harq = NULL;
codeword_TB1 = -1;
}
else if ((dlsch_ue[0]->harq_processes[harq_pid]->status != ACTIVE) &&
(dlsch_ue[1]->harq_processes[harq_pid]->status == ACTIVE) ){
codeword_TB1 = dlsch_ue[1]->harq_processes[harq_pid]->codeword;
dlsch0_harq = dlsch_ue[1]->harq_processes[harq_pid];
dlsch1_harq = NULL;
codeword_TB0 = -1;
}
break;
default:
......@@ -148,6 +173,10 @@ int rx_pdsch(PHY_VARS_UE *ue,
return(-1);
break;
}
#ifdef DEBUG_HARQ
printf("[DEMOD] MIMO mode = %d\n", dlsch0_harq->mimo_mode);
printf("[DEMOD] cw for TB0 = %d, cw for TB1 = %d\n", codeword_TB0, codeword_TB1);
#endif
DevAssert(dlsch0_harq);
round = dlsch0_harq->round;
......@@ -274,7 +303,6 @@ int rx_pdsch(PHY_VARS_UE *ue,
subframe,
ue->high_speed_flag,
frame_parms);
else
nb_rb = dlsch_extract_rbs_single(common_vars->rxdataF,
common_vars->dl_ch_estimates[eNB_id],
......@@ -306,7 +334,6 @@ int rx_pdsch(PHY_VARS_UE *ue,
aarx = frame_parms->nb_antennas_rx;
if (dlsch0_harq->mimo_mode<LARGE_CDD) {// SISO or ALAMOUTI
dlsch_scale_channel(pdsch_vars[eNB_id]->dl_ch_estimates_ext,
frame_parms,
dlsch_ue,
......@@ -334,7 +361,6 @@ int rx_pdsch(PHY_VARS_UE *ue,
// printf("TM4 I-A log2_maxh0 = %d\n", pdsch_vars[eNB_id]->log2_maxh);
}
dlsch_channel_compensation(pdsch_vars[eNB_id]->rxdataF_ext,
pdsch_vars[eNB_id]->dl_ch_estimates_ext,
pdsch_vars[eNB_id]->dl_ch_mag0,
......@@ -348,10 +374,10 @@ int rx_pdsch(PHY_VARS_UE *ue,
nb_rb,
pdsch_vars[eNB_id]->log2_maxh,
measurements); // log2_maxh+I0_shift
/*if (symbol == 5) {
write_output("rxF_comp_d.m","rxF_c_d",&pdsch_vars[eNB_id]->rxdataF_comp0[0][symbol*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
} */
if ((rx_type==rx_IC_single_stream) &&
(eNB_id_i<ue->n_connected_eNB)) {
......@@ -372,7 +398,6 @@ int rx_pdsch(PHY_VARS_UE *ue,
if (symbol == 5) {
write_output("rxF_comp_d.m","rxF_c_d",&pdsch_vars[eNB_id]->rxdataF_comp0[0][symbol*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
write_output("rxF_comp_i.m","rxF_c_i",&pdsch_vars[eNB_id_i]->rxdataF_comp0[0][symbol*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
}
#endif
......@@ -393,8 +418,6 @@ int rx_pdsch(PHY_VARS_UE *ue,
// LOG_I(PHY,"Running PDSCH RX for TM3\n");
if (frame_parms->nb_antennas_tx_eNB == 2) {
// scaling interfering channel (following for TM56)
dlsch_scale_channel(pdsch_vars[eNB_id]->dl_ch_estimates_ext,
frame_parms,
......@@ -418,7 +441,6 @@ int rx_pdsch(PHY_VARS_UE *ue,
// write_output("dlsch0_r0_aver_chan_1.m","dl_aver_ch1_r0_0",&avg_1[0],1,1,2);
if (rx_type>rx_standard) {
// Shifts are needed to avoid tails in SNR/BLER curves.
// LUT will be introduced with mcs-dependent shift
......@@ -464,7 +486,6 @@ int rx_pdsch(PHY_VARS_UE *ue,
write_output("rxF_comp_d10.m","rxF_c_d10",&pdsch_vars[eNB_id]->rxdataF_comp1[harq_pid][round][0][symbol*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);//should be almost 0
write_output("rxF_comp_d11.m","rxF_c_d11",&pdsch_vars[eNB_id]->rxdataF_comp1[harq_pid][round][1][symbol*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);//should be QAM
} */
// compute correlation between signal and interference channels (rho12 and rho21)
......@@ -497,8 +518,6 @@ int rx_pdsch(PHY_VARS_UE *ue,
write_output("rho2_0.m","rho2_0",&pdsch_vars[eNB_id]->dl_ch_rho2_ext[0][symbol*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);//should be almost 0
write_output("rho0_1.m.m","rho0_1",&pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round][1][symbol*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);//should be almost 0
write_output("rho2_1.m","rho2_1",&pdsch_vars[eNB_id]->dl_ch_rho2_ext[1][symbol*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);//should be QAM
} */
}
......@@ -512,7 +531,6 @@ int rx_pdsch(PHY_VARS_UE *ue,
if ((rx_type==rx_IC_single_stream) && (eNB_id_i==ue->n_connected_eNB) && (dlsch0_harq->dl_power_off==0)) { // TM5 two-user
// Scale the channel estimates for interfering stream
dlsch_scale_channel(pdsch_vars[eNB_id]->dl_ch_estimates_ext,
frame_parms,
dlsch_ue,
......@@ -583,7 +601,6 @@ int rx_pdsch(PHY_VARS_UE *ue,
}
dlsch_channel_compensation_TM56(pdsch_vars[eNB_id_i]->rxdataF_ext,
pdsch_vars[eNB_id_i]->dl_ch_estimates_ext,
pdsch_vars[eNB_id_i]->dl_ch_mag0,
......@@ -607,6 +624,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
write_output("rxF_comp_i.m","rxF_c_i",&pdsch_vars[eNB_id_i]->rxdataF_comp0[0][symbol*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
}
#endif
dlsch_dual_stream_correlation(frame_parms,
symbol,
nb_rb,
......@@ -614,7 +632,6 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id_i]->dl_ch_estimates_ext,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->log2_maxh);
}
else if (dlsch0_harq->dl_power_off==1) {
......@@ -641,12 +658,9 @@ int rx_pdsch(PHY_VARS_UE *ue,
avgs = cmax(avgs,avg[(aatx<<1)+aarx]);
// avgs = cmax(avgs,avg[(aarx<<1)+aatx]);
pdsch_vars[eNB_id]->log2_maxh = (log2_approx(avgs)/2) + interf_unaw_shift_tm1_mcs[dlsch0_harq->mcs];
pdsch_vars[eNB_id]->log2_maxh = (log2_approx(avgs)/2) + 1;
pdsch_vars[eNB_id]->log2_maxh++;
}
dlsch_channel_compensation_TM56(pdsch_vars[eNB_id]->rxdataF_ext,
pdsch_vars[eNB_id]->dl_ch_estimates_ext,
pdsch_vars[eNB_id]->dl_ch_mag0,
......@@ -671,7 +685,6 @@ int rx_pdsch(PHY_VARS_UE *ue,
((dlsch0_harq->mimo_mode >=DUALSTREAM_UNIFORM_PRECODING1) &&
(dlsch0_harq->mimo_mode <=DUALSTREAM_PUSCH_PRECODING))){ // TM3 or TM4
if (frame_parms->nb_antennas_tx_eNB == 2) {
dlsch_detection_mrc_TM34(frame_parms,
pdsch_vars[eNB_id],
harq_pid,
......@@ -734,7 +747,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
((dlsch0_harq->mimo_mode >=DUALSTREAM_UNIFORM_PRECODING1) &&
(dlsch0_harq->mimo_mode <=DUALSTREAM_PUSCH_PRECODING))) {
rxdataF_comp_ptr = pdsch_vars[eNB_id]->rxdataF_comp1[harq_pid][round];
dl_ch_mag_ptr = pdsch_vars[eNB_id]->dl_ch_mag1;
dl_ch_mag_ptr = pdsch_vars[eNB_id]->dl_ch_mag1[harq_pid][round];
}
else {
rxdataF_comp_ptr = pdsch_vars[eNB_id_i]->rxdataF_comp0;
......@@ -744,7 +757,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
switch (dlsch0_harq->Qm) {
case 2 :
if (rx_type==rx_standard) {
if ((rx_type==rx_standard) || (codeword_TB0 == -1) || (codeword_TB1 == -1)) {
dlsch_qpsk_llr(frame_parms,
pdsch_vars[eNB_id]->rxdataF_comp0,
pdsch_vars[eNB_id]->llr[0],
......@@ -820,7 +833,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
}
break;
case 4 :
if (rx_type==rx_standard) {
if ((rx_type==rx_standard ) || (codeword_TB0 == -1) || (codeword_TB1 == -1)) {
dlsch_16qam_llr(frame_parms,
pdsch_vars[eNB_id]->rxdataF_comp0,
pdsch_vars[eNB_id]->llr[0],
......@@ -903,7 +916,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
}
break;
case 6 :
if (rx_type==rx_standard) {
if ((rx_type==rx_standard) || (codeword_TB0 == -1) || (codeword_TB1 == -1)) {
dlsch_64qam_llr(frame_parms,
pdsch_vars[eNB_id]->rxdataF_comp0,
pdsch_vars[eNB_id]->llr[0],
......@@ -1011,7 +1024,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
dlsch_16qam_llr(frame_parms,
rxdataF_comp_ptr,
pdsch_vars[eNB_id]->llr[1],
pdsch_vars[eNB_id]->dl_ch_mag1,
pdsch_vars[eNB_id]->dl_ch_mag1[harq_pid][round],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,subframe,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
......@@ -1024,8 +1037,8 @@ int rx_pdsch(PHY_VARS_UE *ue,
dlsch_64qam_llr(frame_parms,
rxdataF_comp_ptr,
pdsch_vars[eNB_id]->llr[1],
pdsch_vars[eNB_id]->dl_ch_mag1,
pdsch_vars[eNB_id]->dl_ch_magb1,
pdsch_vars[eNB_id]->dl_ch_mag1[harq_pid][round],
pdsch_vars[eNB_id]->dl_ch_magb1[harq_pid][round],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,subframe,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
......@@ -1861,6 +1874,7 @@ void dlsch_channel_compensation_TM56(int **rxdataF_ext,
precoded_signal_strength += ((signal_energy_nodc(&dl_ch_estimates_ext[aarx][symbol*frame_parms->N_RB_DL*Nre],
(nb_rb*Nre))) - (measurements->n0_power[aarx]));
// rx_antennas
}
......@@ -1900,9 +1914,9 @@ void dlsch_channel_compensation_TM34(LTE_DL_FRAME_PARMS *frame_parms,
int **rxdataF_ext = pdsch_vars->rxdataF_ext;
int **dl_ch_estimates_ext = pdsch_vars->dl_ch_estimates_ext;
int **dl_ch_mag0 = pdsch_vars->dl_ch_mag0;
int **dl_ch_mag1 = pdsch_vars->dl_ch_mag1;
int **dl_ch_mag1 = pdsch_vars->dl_ch_mag1[harq_pid][round];
int **dl_ch_magb0 = pdsch_vars->dl_ch_magb0;
int **dl_ch_magb1 = pdsch_vars->dl_ch_magb1;
int **dl_ch_magb1 = pdsch_vars->dl_ch_magb1[harq_pid][round];
int **rxdataF_comp0 = pdsch_vars->rxdataF_comp0;
int **rxdataF_comp1 = pdsch_vars->rxdataF_comp1[harq_pid][round];
unsigned char *pmi_ext = pdsch_vars->pmi_ext;
......@@ -2290,9 +2304,9 @@ void dlsch_channel_compensation_TM34(LTE_DL_FRAME_PARMS *frame_parms,
int **rxdataF_ext = pdsch_vars->rxdataF_ext;
int **dl_ch_estimates_ext = pdsch_vars->dl_ch_estimates_ext;
int **dl_ch_mag0 = pdsch_vars->dl_ch_mag0;
int **dl_ch_mag1 = pdsch_vars->dl_ch_mag1;
int **dl_ch_mag1 = pdsch_vars->dl_ch_mag1[harq_pid][round];
int **dl_ch_magb0 = pdsch_vars->dl_ch_magb0;
int **dl_ch_magb1 = pdsch_vars->dl_ch_magb1;
int **dl_ch_magb1 = pdsch_vars->dl_ch_magb1[harq_pid][round];
int **rxdataF_comp0 = pdsch_vars->rxdataF_comp0;
int **rxdataF_comp1 = pdsch_vars->rxdataF_comp1[harq_pid][round];
......@@ -2564,7 +2578,6 @@ void dlsch_channel_compensation_TM34(LTE_DL_FRAME_PARMS *frame_parms,
precoded_signal_strength0 += ((signal_energy_nodc(&dl_ch_estimates_ext[aarx][symbol*frame_parms->N_RB_DL*Nre],
(nb_rb*Nre))*rx_power_correction) - (measurements->n0_power[aarx]));
precoded_signal_strength1 += ((signal_energy_nodc(&dl_ch_estimates_ext[aarx+2][symbol*frame_parms->N_RB_DL*Nre],
(nb_rb*Nre))*rx_power_correction) - (measurements->n0_power[aarx]));
......@@ -2963,15 +2976,14 @@ void dlsch_detection_mrc_TM34(LTE_DL_FRAME_PARMS *frame_parms,
int i;
__m128i *rxdataF_comp128_0,*rxdataF_comp128_1,*rxdataF_comp128_i0,*rxdataF_comp128_i1,*dl_ch_mag128_0,*dl_ch_mag128_1,*dl_ch_mag128_0b,*dl_ch_mag128_1b,*rho128_0,*rho128_1,*rho128_i0,*rho128_i1,*dl_ch_mag128_i0,*dl_ch_mag128_i1,*dl_ch_mag128_i0b,*dl_ch_mag128_i1b;
int **rxdataF_comp0 =pdsch_vars->rxdataF_comp0;
int **rxdataF_comp1 =pdsch_vars->rxdataF_comp1[harq_pid][round];
int **dl_ch_rho_ext =pdsch_vars->dl_ch_rho_ext[harq_pid][round]; //for second stream
int **dl_ch_rho2_ext =pdsch_vars->dl_ch_rho2_ext;
int **rxdataF_comp0 = pdsch_vars->rxdataF_comp0;
int **rxdataF_comp1 = pdsch_vars->rxdataF_comp1[harq_pid][round];
int **dl_ch_rho_ext = pdsch_vars->dl_ch_rho_ext[harq_pid][round]; //for second stream
int **dl_ch_rho2_ext = pdsch_vars->dl_ch_rho2_ext;
int **dl_ch_mag0 = pdsch_vars->dl_ch_mag0;
int **dl_ch_mag1 = pdsch_vars->dl_ch_mag1;
int **dl_ch_mag1 = pdsch_vars->dl_ch_mag1[harq_pid][round];
int **dl_ch_magb0 = pdsch_vars->dl_ch_magb0;
int **dl_ch_magb1 = pdsch_vars->dl_ch_magb1;
int **dl_ch_magb1 = pdsch_vars->dl_ch_magb1[harq_pid][round];
if (frame_parms->nb_antennas_rx>1) {
......@@ -3107,7 +3119,7 @@ void dlsch_channel_level(int **dl_ch_estimates_ext,
short rb;
unsigned char aatx,aarx,nre=12,symbol_mod;
__m128i *dl_ch128,avg128D;
__m128i *dl_ch128, avg128D;
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
......@@ -4740,8 +4752,8 @@ void dump_dlsch2(PHY_VARS_UE *ue,uint8_t eNB_id,uint16_t coded_bits_per_codeword
sprintf(fname,"dlsch%d_r%d_rho2.m",eNB_id,round);
sprintf(vname,"dl_rho2_r%d_%d",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[eNB_id]->dl_ch_rho2_ext[0],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[eNB_id]->dl_ch_rho2_ext[0],12*N_RB_DL*nsymb,1,1);
// sprintf(fname,"dlsch%d_r%d_aver_chan_1.m",eNB_id,round);
// sprintf(vname,"dl_aver_ch1_r%d_%d",eNB_id,round);
......
......@@ -540,13 +540,13 @@ int allocate_REs_in_RB(LTE_DL_FRAME_PARMS *frame_parms,
{
uint8_t *x0 = dlsch0_harq->e;
MIMO_mode_t mimo_mode = dlsch0_harq->mimo_mode;
uint8_t *x0 = NULL; //dlsch0_harq->e;
MIMO_mode_t mimo_mode;//= dlsch0_harq->mimo_mode;
int first_layer0 = dlsch0_harq->first_layer;
int Nlayers0 = dlsch0_harq->Nlayers;
uint8_t mod_order0 = get_Qm(dlsch0_harq->mcs);
uint8_t mod_order1=2;
int first_layer0; //= dlsch0_harq->first_layer;
int Nlayers0; // = dlsch0_harq->Nlayers;
uint8_t mod_order0; // = get_Qm(dlsch0_harq->mcs);
uint8_t mod_order1; //=2;
uint8_t precoder_index0,precoder_index1;
uint8_t *x1=NULL;
......@@ -584,18 +584,48 @@ int allocate_REs_in_RB(LTE_DL_FRAME_PARMS *frame_parms,
gain_lin_QPSK = (int16_t)((amp*ONE_OVER_SQRT2_Q15)>>15);
// if (mimo_mode == LARGE_CDD) gain_lin_QPSK>>=1;
if (dlsch1_harq) {
if ((dlsch0_harq != NULL) && (dlsch1_harq != NULL)) { //this is for TM3, TM4
x0 = dlsch0_harq->e;
mimo_mode = dlsch0_harq->mimo_mode;
first_layer0 = dlsch0_harq->first_layer;
Nlayers0 = dlsch0_harq->Nlayers;
mod_order0 = get_Qm(dlsch0_harq->mcs);
x1 = dlsch1_harq->e;
// Fill these in later for TM8-10
// Nlayers1 = dlsch1_harq->Nlayers;
// first_layer1 = dlsch1_harq->first_layer;
mod_order1 = get_Qm(dlsch1_harq->mcs);
} else if ((dlsch0_harq != NULL) && (dlsch1_harq == NULL)){ //This is for SIS0 TM1, TM6, etc
x0 = dlsch0_harq->e;
mimo_mode = dlsch0_harq->mimo_mode;
first_layer0 = dlsch0_harq->first_layer;
Nlayers0 = dlsch0_harq->Nlayers;
mod_order0 = get_Qm(dlsch0_harq->mcs);
} else if ((dlsch0_harq == NULL) && (dlsch1_harq != NULL)){ // This is for TM4 retransmission
x0 = dlsch1_harq->e;
mimo_mode = dlsch1_harq->mimo_mode;
first_layer0 = dlsch1_harq->first_layer;
Nlayers0 = dlsch1_harq->Nlayers;
mod_order0 = get_Qm(dlsch1_harq->mcs);
}
#ifdef DEBUG_DLSCH_MODULATION
if (dlsch0_harq != NULL){
#ifdef DEBUG_DLSCH_MODULATION
printf("allocate_re (mod %d): symbol_offset %d re_offset %d (%d,%d), jj %d -> %d,%d\n",mod_order0,symbol_offset,re_offset,skip_dc,skip_half,*jj, x0[*jj], x0[1+*jj]);
#endif
#endif
} else{
#ifdef DEBUG_DLSCH_MODULATION
printf("allocate_re (mod %d): symbol_offset %d re_offset %d (%d,%d), jj %d -> %d,%d\n",mod_order0,symbol_offset,re_offset,skip_dc,skip_half,*jj, x0[*jj], x0[1+*jj]);
#endif
}
first_re=0;
last_re=12;
......@@ -1460,7 +1490,6 @@ int allocate_REs_in_RB(LTE_DL_FRAME_PARMS *frame_parms,
return(0);
}
int allocate_REs_in_RB_MCH(int32_t **txdataF,
uint32_t *jj,
uint16_t re_offset,
......@@ -1804,21 +1833,22 @@ int dlsch_modulation(int32_t **txdataF,
{
uint8_t nsymb;
uint8_t harq_pid = dlsch0->current_harq_pid;
LTE_DL_eNB_HARQ_t *dlsch0_harq = dlsch0->harq_processes[harq_pid];
uint8_t harq_pid; //= dlsch0->current_harq_pid;
LTE_DL_eNB_HARQ_t *dlsch0_harq;
LTE_DL_eNB_HARQ_t *dlsch1_harq; //= dlsch1->harq_processes[harq_pid];
uint32_t i,i2,jj,jj2,re_allocated,symbol_offset;
uint16_t l,rb,re_offset;
uint32_t rb_alloc_ind;
uint32_t *rb_alloc = dlsch0_harq->rb_alloc;
uint32_t *rb_alloc; //=dlsch0_harq->rb_alloc;
uint8_t pilots=0;
uint8_t skip_dc=0,skip_half=0;
uint8_t mod_order0 = get_Qm(dlsch0_harq->mcs);
uint8_t skip_dc,skip_half;
uint8_t mod_order0 = 0;
uint8_t mod_order1 = 0;
int16_t amp_rho_a, amp_rho_b;
int16_t qam16_table_a0[4],qam64_table_a0[8],qam16_table_b0[4],qam64_table_b0[8];
int16_t qam16_table_a1[4],qam64_table_a1[8],qam16_table_b1[4],qam64_table_b1[8];
int16_t *qam_table_s0=NULL,*qam_table_s1=NULL;
int (*allocate_REs)(LTE_DL_FRAME_PARMS *,
int **,
uint32_t*,
......@@ -1837,28 +1867,77 @@ int dlsch_modulation(int32_t **txdataF,
uint8_t,
int *,
int *);
int P1_SHIFT[13],P2_SHIFT[13];
int offset,nushiftmod3;
int16_t *qam_table_s0,*qam_table_s1;
uint8_t get_pmi_temp;
#ifdef DEBUG_DLSCH_MODULATION
uint8_t Nl0 = dlsch0_harq->Nl;
uint8_t Nl0; //= dlsch0_harq->Nl;
uint8_t Nl1;
#endif
if (dlsch1) {
if ((dlsch0 != NULL) && (dlsch1 != NULL)){
harq_pid = dlsch0->current_harq_pid;
dlsch0_harq = dlsch0->harq_processes[harq_pid];
mod_order0 = get_Qm(dlsch0_harq->mcs);
rb_alloc = dlsch0_harq->rb_alloc;
#ifdef DEBUG_DLSCH_MODULATION
Nl0 = dlsch0_harq->Nl;
#endif
dlsch1_harq = dlsch1->harq_processes[harq_pid];
mod_order1 = get_Qm(dlsch1_harq->mcs);
#ifdef DEBUG_DLSCH_MODULATION
Nl1 = dlsch1_harq->Nl;
#endif
}else if ((dlsch0 != NULL) && (dlsch1 == NULL)){
harq_pid = dlsch0->current_harq_pid;
dlsch0_harq = dlsch0->harq_processes[harq_pid];
mod_order0 = get_Qm(dlsch0_harq->mcs);
rb_alloc = dlsch0_harq->rb_alloc;
#ifdef DEBUG_DLSCH_MODULATION
Nl0 = dlsch0_harq->Nl;
#endif
dlsch1_harq = NULL;
mod_order1 = 0;
#ifdef DEBUG_DLSCH_MODULATION
Nl1 = 0;
#endif
}else if ((dlsch0 == NULL) && (dlsch1 != NULL)){
harq_pid = dlsch1->current_harq_pid;
dlsch1_harq = dlsch1->harq_processes[harq_pid];
mod_order0 = get_Qm(dlsch1_harq->mcs);
rb_alloc = dlsch1_harq->rb_alloc;
#ifdef DEBUG_DLSCH_MODULATION
Nl0 = dlsch1_harq->Nl;
#endif
dlsch0_harq = NULL;
mod_order1 = 0;
#ifdef DEBUG_DLSCH_MODULATION
Nl1 = NULL;
#endif
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_MODULATION, VCD_FUNCTION_IN);
nsymb = (frame_parms->Ncp==0) ? 14:12;
if (dlsch0 != NULL){
amp_rho_a = (int16_t)(((int32_t)amp*dlsch0->sqrt_rho_a)>>13); //amp=512 in full scale; dlsch0->sqrt_rho_a=8192in Q2.13, 1 in full scale
amp_rho_b = (int16_t)(((int32_t)amp*dlsch0->sqrt_rho_b)>>13);
} else{
amp_rho_a = (int16_t)(((int32_t)amp*dlsch1->sqrt_rho_a)>>13);
amp_rho_b = (int16_t)(((int32_t)amp*dlsch1->sqrt_rho_b)>>13);
}
if (mod_order0 == 4)
for (i=0; i<4; i++) {
......@@ -1892,6 +1971,7 @@ int dlsch_modulation(int32_t **txdataF,
// printf("num_pdcch_symbols %d, nsymb %d\n",num_pdcch_symbols,nsymb);
for (l=num_pdcch_symbols; l<nsymb; l++) {
if (dlsch0 != NULL ) {
#ifdef DEBUG_DLSCH_MODULATION
printf("Generating DLSCH (harq_pid %d,mimo %d, pmi_alloc0 %lx, mod0 %d, mod1 %d, rb_alloc[0] %d) in %d\n",
harq_pid,
......@@ -1902,6 +1982,7 @@ int dlsch_modulation(int32_t **txdataF,
rb_alloc[0],
len);
#endif
}
if (frame_parms->Ncp==0) { // normal prefix
if ((l==4)||(l==11))
......@@ -2034,10 +2115,13 @@ int dlsch_modulation(int32_t **txdataF,
skip_dc = check_skip_dc(rb,frame_parms);
if (dlsch0) {
if (dlsch0_harq->Nlayers>1) {
printf("Nlayers %d: re_offset %d, symbol %d offset %d\n",dlsch0_harq->Nlayers,re_offset,l,symbol_offset);
msg("Nlayers %d: re_offset %d, symbol %d offset %d\n",dlsch0_harq->Nlayers,re_offset,l,symbol_offset);
return(-1);
}
}
if (dlsch1) {
if (dlsch1_harq->Nlayers>1) {
......@@ -2051,17 +2135,29 @@ int dlsch_modulation(int32_t **txdataF,
if (rb_alloc_ind > 0) {
// printf("Allocated rb %d/symbol %d, skip_half %d, subframe_offset %d, symbol_offset %d, re_offset %d, jj %d\n",rb,l,skip_half,subframe_offset,symbol_offset,re_offset,jj);
allocate_REs(frame_parms,
if (dlsch0 != NULL) {
get_pmi_temp = get_pmi(frame_parms->N_RB_DL,
dlsch0->harq_processes[harq_pid]->mimo_mode,
dlsch0->harq_processes[harq_pid]->pmi_alloc,
rb);
} else
get_pmi_temp = get_pmi(frame_parms->N_RB_DL,
dlsch1->harq_processes[harq_pid]->mimo_mode,
dlsch1->harq_processes[harq_pid]->pmi_alloc,
rb);
allocate_REs_in_RB(frame_parms,
txdataF,
&jj,
&jj2,
re_offset,
symbol_offset,
dlsch0->harq_processes[harq_pid],
(dlsch1==NULL) ? NULL : dlsch1->harq_processes[harq_pid],
(dlsch0 == NULL) ? NULL : dlsch0->harq_processes[harq_pid],
(dlsch1 == NULL) ? NULL : dlsch1->harq_processes[harq_pid],
pilots,
((pilots) ? amp_rho_b : amp_rho_a),
get_pmi(frame_parms->N_RB_DL,dlsch0->harq_processes[harq_pid]->mimo_mode,dlsch0->harq_processes[harq_pid]->pmi_alloc,rb),
get_pmi_temp,
qam_table_s0,
qam_table_s1,
&re_allocated,
......@@ -2087,7 +2183,11 @@ int dlsch_modulation(int32_t **txdataF,
}
#ifdef DEBUG_DLSCH_MODULATION
if (dlsch0 != NULL){
msg("generate_dlsch : jj = %d,re_allocated = %d (G %d)\n",jj,re_allocated,get_G(frame_parms,dlsch0_harq->nb_rb,dlsch0_harq->rb_alloc,mod_order0,Nl0,2,0,subframe_offset));
}else{
msg("generate_dlsch : jj = %d,re_allocated = %d (G %d)\n",jj,re_allocated,get_G(frame_parms,dlsch1_harq->nb_rb,dlsch1_harq->rb_alloc,mod_order1,Nl1,2,0,subframe_offset));
}
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_MODULATION, VCD_FUNCTION_OUT);
......
......@@ -46,7 +46,7 @@ double get_pa_dB(PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated)
}
double computeRhoA_eNB(PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
LTE_eNB_DLSCH_t *dlsch_eNB,int dl_power_off, uint8_t n_antenna_port){
LTE_eNB_DLSCH_t *dlsch_eNB, int dl_power_off, uint8_t n_antenna_port){
double rho_a_dB;
double sqrt_rho_a_lin;
......
......@@ -1731,6 +1731,8 @@ void reset_cba_uci(void *o);
*/
uint16_t quantize_subband_pmi(PHY_MEASUREMENTS *meas,uint8_t eNB_id,int nb_subbands);
int32_t pmi_convert_rank1_from_rank2(uint16_t pmi_alloc, int tpmi, int nb_rb);
//uint16_t quantize_subband_pmi2(PHY_MEASUREMENTS *meas,uint8_t eNB_id,uint8_t a_id,int nb_subbands);
uint64_t pmi2hex_2Ar1(uint32_t pmi);
......@@ -1843,7 +1845,6 @@ int32_t rx_pucch_emul(PHY_VARS_eNB *phy_vars_eNB,
uint8_t *payload);
/*!
\brief Check for PRACH TXop in subframe
@param frame_parms Pointer to LTE_DL_FRAME_PARMS
......@@ -1941,7 +1942,8 @@ double computeRhoA_eNB(PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
double computeRhoB_eNB(PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
PDSCH_CONFIG_COMMON *pdsch_config_common,
uint8_t n_antenna_port,
LTE_eNB_DLSCH_t *dlsch_eNB,int dl_power_off);
LTE_eNB_DLSCH_t *dlsch_eNB,
int dl_power_off);
double computeRhoA_UE(PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
LTE_UE_DLSCH_t *dlsch_ue,
......
......@@ -870,6 +870,17 @@ typedef struct {
/// RF and Interface devices per CC
openair0_device rfdevice;
time_stats_t dlsch_encoding_SIC_stats;
time_stats_t dlsch_scrambling_SIC_stats;
time_stats_t dlsch_modulation_SIC_stats;
time_stats_t dlsch_llr_stripping_unit_SIC_stats;
time_stats_t dlsch_unscrambling_SIC_stats;
#if ENABLE_RAL
hash_table_t *ral_thresholds_timed;
SLIST_HEAD(ral_thresholds_gen_poll_s, ral_threshold_phy_t) ral_thresholds_gen_polled[RAL_LINK_PARAM_GEN_MAX];
SLIST_HEAD(ral_thresholds_lte_poll_s, ral_threshold_phy_t) ral_thresholds_lte_polled[RAL_LINK_PARAM_LTE_MAX];
#endif
} PHY_VARS_UE;
......
......@@ -819,7 +819,7 @@ typedef struct {
/// \brief Magnitude of Downlink Channel second layer (16QAM level/First 64QAM level).
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_DL[
int32_t **dl_ch_mag1;
int32_t **dl_ch_mag1[8][8];
/// \brief Magnitude of Downlink Channel, first layer (2nd 64QAM level).
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_DL[
......@@ -827,7 +827,7 @@ typedef struct {
/// \brief Magnitude of Downlink Channel second layer (2nd 64QAM level).
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_DL[
int32_t **dl_ch_magb1;
int32_t **dl_ch_magb1[8][8];
/// \brief Cross-correlation of two eNB signals.
/// - first index: rx antenna [0..nb_antennas_rx[
/// - second index: symbol [0..]
......
This source diff could not be displayed because it is too large. You can view the blob instead.
......@@ -183,6 +183,9 @@ typedef enum {
Rayleigh8_orth_eff_ch_TM4_prec_real,
Rayleigh8_orth_eff_ch_TM4_prec_imag,
TS_SHIFT,
EPA_low,
EPA_medium,
EPA_high,
} SCM_t;
/**
......
......@@ -224,6 +224,25 @@ struct complex R_sqrt_22_orth_eff_ch_TM4_prec_imag_tap[16] = {{0.70711,0.0}, {0.
{0.0, 0.0}, {0.0,0.70711}, {0.0, 0.0}, {-0.70711,0.0}};
struct complex *R_sqrt_22_orth_eff_ch_TM4_prec_imag[1] = {R_sqrt_22_orth_eff_ch_TM4_prec_imag_tap};
//Correlation matrix for EPA channel
struct complex R_sqrt_22_EPA_low_tap[16] = {{1.0,0.0}, {0.0,0.0}, {0.0,0.0}, {0.0,0.0},
{0.0,0.0}, {1.0,0.0}, {0.0,0.0}, {0.0,0.0},
{0.0,0.0}, {0.0,0.0}, {1.0,0.0}, {0.0,0.0},
{0.0,0.0}, {0.0,0.0}, {0.0,0.0}, {1.0,0.0}};
struct complex *R_sqrt_22_EPA_low[1] = {R_sqrt_22_EPA_low_tap};
struct complex R_sqrt_22_EPA_high_tap[16] = {{0.7179,0.0}, {0.4500,0.0}, {0.4500,0.0}, {0.2821,0.0},
{0.4500,0.0}, {0.7179,0.0}, {0.2821,0.0}, {0.4500,0.0},
{0.4500,0.0}, {0.2821,0.0}, {0.7179,0.0}, {0.4500,0.0},
{0.2821,0.0}, {0.4500,0.0}, {0.4500,0.0}, {0.7179,0.0}};
struct complex *R_sqrt_22_EPA_high[1] = {R_sqrt_22_EPA_high_tap};
struct complex R_sqrt_22_EPA_medium_tap[16] = {{0.8375,0.0}, {0.5249,0.0}, {0.1286,0.0}, {0.0806,0.0},
{0.5249,0.0}, {0.8375,0.0}, {0.0806,0.0}, {0.1286,0.0},
{0.1286,0.0}, {0.0806,0.0}, {0.8375,0.0}, {0.5249,0.0},
{0.0806,0.0}, {0.1286,0.0}, {0.5249,0.0}, {0.8375,0.0}};
struct complex *R_sqrt_22_EPA_medium[1] = {R_sqrt_22_EPA_medium_tap};
//Rayleigh1_orth_eff_ch_TM4
......@@ -408,6 +427,140 @@ channel_desc_t *new_channel_desc_scm(uint8_t nb_tx,
}
}
break;
case EPA_low:
chan_desc->nb_taps = 7;
chan_desc->Td = .410;
chan_desc->channel_length = (int) (2*chan_desc->sampling_rate*chan_desc->Td + 1 + 2/(M_PI*M_PI)*log(4*M_PI*chan_desc->sampling_rate*chan_desc->Td));
sum_amps = 0;
chan_desc->amps = (double*) malloc(chan_desc->nb_taps*sizeof(double));
for (i = 0; i<chan_desc->nb_taps; i++) {
chan_desc->amps[i] = pow(10,.1*epa_amps_dB[i]);
sum_amps += chan_desc->amps[i];
}
for (i = 0; i<chan_desc->nb_taps; i++)
chan_desc->amps[i] /= sum_amps;
chan_desc->delays = epa_delays;
chan_desc->ricean_factor = 1;
chan_desc->aoa = 0;
chan_desc->random_aoa = 0;
chan_desc->ch = (struct complex**) malloc(nb_tx*nb_rx*sizeof(struct complex*));
chan_desc->chF = (struct complex**) malloc(nb_tx*nb_rx*sizeof(struct complex*));
chan_desc->a = (struct complex**) malloc(chan_desc->nb_taps*sizeof(struct complex*));
for (i = 0; i<nb_tx*nb_rx; i++)
chan_desc->ch[i] = (struct complex*) malloc(chan_desc->channel_length * sizeof(struct complex));
for (i = 0; i<nb_tx*nb_rx; i++)
chan_desc->chF[i] = (struct complex*) malloc(1200 * sizeof(struct complex));
for (i = 0; i<chan_desc->nb_taps; i++)
chan_desc->a[i] = (struct complex*) malloc(nb_tx*nb_rx * sizeof(struct complex));
if (nb_tx==2 && nb_rx==2) {
chan_desc->R_sqrt = (struct complex**) malloc(chan_desc->nb_taps*sizeof(struct complex**));
for (i = 0; i<chan_desc->nb_taps; i++)
chan_desc->R_sqrt[i] = R_sqrt_22_EPA_low[0];
}
else {
printf("Correlation matrices are implemented for 2 x 2 only");
}
/*else {
chan_desc->R_sqrt = (struct complex**) malloc(6*sizeof(struct complex**));
for (i = 0; i<6; i++) {
chan_desc->R_sqrt[i] = (struct complex*) malloc(nb_tx*nb_rx*nb_tx*nb_rx * sizeof(struct complex));
for (j = 0; j<nb_tx*nb_rx*nb_tx*nb_rx; j+=(nb_tx*nb_rx+1)) {
chan_desc->R_sqrt[i][j].x = 1.0;
chan_desc->R_sqrt[i][j].y = 0.0;
}
LOG_W(OCM,"correlation matrix only implemented for nb_tx==2 and nb_rx==2, using identity\n");
}
}*/
break;
case EPA_high:
chan_desc->nb_taps = 7;
chan_desc->Td = .410;
chan_desc->channel_length = (int) (2*chan_desc->sampling_rate*chan_desc->Td + 1 + 2/(M_PI*M_PI)*log(4*M_PI*chan_desc->sampling_rate*chan_desc->Td));
sum_amps = 0;
chan_desc->amps = (double*) malloc(chan_desc->nb_taps*sizeof(double));
for (i = 0; i<chan_desc->nb_taps; i++) {
chan_desc->amps[i] = pow(10,.1*epa_amps_dB[i]);
sum_amps += chan_desc->amps[i];
}
for (i = 0; i<chan_desc->nb_taps; i++)
chan_desc->amps[i] /= sum_amps;
chan_desc->delays = epa_delays;
chan_desc->ricean_factor = 1;
chan_desc->aoa = 0;
chan_desc->random_aoa = 0;
chan_desc->ch = (struct complex**) malloc(nb_tx*nb_rx*sizeof(struct complex*));
chan_desc->chF = (struct complex**) malloc(nb_tx*nb_rx*sizeof(struct complex*));
chan_desc->a = (struct complex**) malloc(chan_desc->nb_taps*sizeof(struct complex*));
for (i = 0; i<nb_tx*nb_rx; i++)
chan_desc->ch[i] = (struct complex*) malloc(chan_desc->channel_length * sizeof(struct complex));
for (i = 0; i<nb_tx*nb_rx; i++)
chan_desc->chF[i] = (struct complex*) malloc(1200 * sizeof(struct complex));
for (i = 0; i<chan_desc->nb_taps; i++)
chan_desc->a[i] = (struct complex*) malloc(nb_tx*nb_rx * sizeof(struct complex));
if (nb_tx==2 && nb_rx==2) {
chan_desc->R_sqrt = (struct complex**) malloc(chan_desc->nb_taps*sizeof(struct complex**));
for (i = 0; i<chan_desc->nb_taps; i++)
chan_desc->R_sqrt[i] = R_sqrt_22_EPA_high[0];
}
else {
printf("Correlation matrices are implemented for 2 x 2 only");
}
/*else {
chan_desc->R_sqrt = (struct complex**) malloc(6*sizeof(struct complex**));
for (i = 0; i<6; i++) {
chan_desc->R_sqrt[i] = (struct complex*) malloc(nb_tx*nb_rx*nb_tx*nb_rx * sizeof(struct complex));
for (j = 0; j<nb_tx*nb_rx*nb_tx*nb_rx; j+=(nb_tx*nb_rx+1)) {
chan_desc->R_sqrt[i][j].x = 1.0;
chan_desc->R_sqrt[i][j].y = 0.0;
}
LOG_W(OCM,"correlation matrix only implemented for nb_tx==2 and nb_rx==2, using identity\n");
}
}*/
break;
case EPA_medium:
chan_desc->nb_taps = 7;
chan_desc->Td = .410;
chan_desc->channel_length = (int) (2*chan_desc->sampling_rate*chan_desc->Td + 1 + 2/(M_PI*M_PI)*log(4*M_PI*chan_desc->sampling_rate*chan_desc->Td));
sum_amps = 0;
chan_desc->amps = (double*) malloc(chan_desc->nb_taps*sizeof(double));
for (i = 0; i<chan_desc->nb_taps; i++) {
chan_desc->amps[i] = pow(10,.1*epa_amps_dB[i]);
sum_amps += chan_desc->amps[i];
}
for (i = 0; i<chan_desc->nb_taps; i++)
chan_desc->amps[i] /= sum_amps;
chan_desc->delays = epa_delays;
chan_desc->ricean_factor = 1;
chan_desc->aoa = 0;
chan_desc->random_aoa = 0;
chan_desc->ch = (struct complex**) malloc(nb_tx*nb_rx*sizeof(struct complex*));
chan_desc->chF = (struct complex**) malloc(nb_tx*nb_rx*sizeof(struct complex*));
chan_desc->a = (struct complex**) malloc(chan_desc->nb_taps*sizeof(struct complex*));
for (i = 0; i<nb_tx*nb_rx; i++)
chan_desc->ch[i] = (struct complex*) malloc(chan_desc->channel_length * sizeof(struct complex));
for (i = 0; i<nb_tx*nb_rx; i++)
chan_desc->chF[i] = (struct complex*) malloc(1200 * sizeof(struct complex));
for (i = 0; i<chan_desc->nb_taps; i++)
chan_desc->a[i] = (struct complex*) malloc(nb_tx*nb_rx * sizeof(struct complex));
if (nb_tx==2 && nb_rx==2) {
chan_desc->R_sqrt = (struct complex**) malloc(chan_desc->nb_taps*sizeof(struct complex**));
for (i = 0; i<chan_desc->nb_taps; i++)
chan_desc->R_sqrt[i] = R_sqrt_22_EPA_medium[0];
} else {
printf("Correlation matrices are implemented for 2 x 2 only");
}
/*else {
chan_desc->R_sqrt = (struct complex**) malloc(6*sizeof(struct complex**));
for (i = 0; i<6; i++) {
chan_desc->R_sqrt[i] = (struct complex*) malloc(nb_tx*nb_rx*nb_tx*nb_rx * sizeof(struct complex));
for (j = 0; j<nb_tx*nb_rx*nb_tx*nb_rx; j+=(nb_tx*nb_rx+1)) {
chan_desc->R_sqrt[i][j].x = 1.0;
chan_desc->R_sqrt[i][j].y = 0.0;
}
LOG_W(OCM,"correlation matrix only implemented for nb_tx==2 and nb_rx==2, using identity\n");
}
}*/
break;
case EVA:
chan_desc->nb_taps = 9;
chan_desc->Td = 2.51;
......
......@@ -46,7 +46,7 @@ static unsigned int seed, iy, ir[98];
#define a 1664525lu
#define mod 4294967296.0 /* is 2**32 */
#if 1
void randominit(unsigned seed_init)
{
int i;
......@@ -70,9 +70,10 @@ void randominit(unsigned seed_init)
iy=1;
}
#endif
/*void randominit(unsigned seed_init)
#if 0
void randominit(unsigned seed_init)
{
int i;
// this need to be integrated with the existing rng, like taus: navid
......@@ -90,14 +91,14 @@ void randominit(unsigned seed_init)
if (seed % 2 == 0) seed += 1; /* seed and mod are relative prime */
// for (i=1; i<=97; i++) {
// seed = a*seed; /* mod 2**32 */
// ir[i]= seed; /* initialize the shuffle table */
// }
// iy=1;
//}
for (i=1; i<=97; i++) {
seed = a*seed; /* mod 2**32 */
ir[i]= seed; /* initialize the shuffle table */
}
iy=1;
}
#endif
/*!\brief Uniform linear congruential random number generator on \f$[0,1)\f$. Returns a double-precision floating-point number.*/
double uniformrandom(void)
......
......@@ -58,7 +58,7 @@ unsigned int taus(void)
s2 = (((s2 & 0xFFFFFFF0) << 17)^ b);
return s0 ^ s1 ^ s2;
}
#if 1
void set_taus_seed(unsigned int seed_init)
{
......@@ -88,8 +88,10 @@ void set_taus_seed(unsigned int seed_init)
#endif
}
}
#endif
/* void set_taus_seed(unsigned int seed_init)
#if 0
void set_taus_seed(unsigned int seed_init)
{
#ifdef USER_MODE
......@@ -113,18 +115,17 @@ void set_taus_seed(unsigned int seed_init)
s2 = (unsigned int)0xfe1a133e;
#else
// Use reentrant version of rand48 to ensure that no conflicts with other generators occur */
// srand48_r((long int)seed_init, &buffer);
// mrand48_r(&buffer, (long int *)&result);
// s0 = result;
// mrand48_r(&buffer, (long int *)&result);
// s1 = result;
// mrand48_r(&buffer, (long int *)&result);
// s2 = result;
//#endif
// }
//}
srand48_r((long int)seed_init, &buffer);
mrand48_r(&buffer, (long int *)&result);
s0 = result;
mrand48_r(&buffer, (long int *)&result);
s1 = result;
mrand48_r(&buffer, (long int *)&result);
s2 = result;
#endif
}
}
#endif
#ifdef MAIN
......
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