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promise
OpenXG-RAN
Commits
cc47fbed
Commit
cc47fbed
authored
Oct 19, 2017
by
Raymond Knopp
Browse files
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Browse Files
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Plain Diff
Merge branch 'RU-RAU-split' of
https://gitlab.eurecom.fr/oai/openairinterface5g
into RU-RAU-split
parents
b09a281b
311f439a
Changes
5
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Inline
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Showing
5 changed files
with
160 additions
and
35 deletions
+160
-35
cmake_targets/build_oai
cmake_targets/build_oai
+3
-5
common/utils/T/tracer/enb.c
common/utils/T/tracer/enb.c
+9
-4
openair1/PHY/LTE_TRANSPORT/dci_tools.c
openair1/PHY/LTE_TRANSPORT/dci_tools.c
+142
-24
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
+1
-0
openair2/LAYER2/MAC/pre_processor.c
openair2/LAYER2/MAC/pre_processor.c
+5
-2
No files found.
cmake_targets/build_oai
View file @
cc47fbed
...
...
@@ -856,11 +856,9 @@ function main() {
ln
-sf
$dbin
/liboai_exmimodevif.so.
$REL
$dbin
/liboai_device.so
echo_info
"liboai_device.so is linked to EXMIMO device library"
elif
[
"
$HW
"
==
"OAI_USRP"
]
;
then
if
[
-d
"/usr/include/uhd"
]
;
then
compilations
\
$build_dir
oai_usrpdevif
\
liboai_usrpdevif.so
$dbin
/liboai_usrpdevif.so.
$REL
fi
compilations
\
$build_dir
oai_usrpdevif
\
liboai_usrpdevif.so
$dbin
/liboai_usrpdevif.so.
$REL
ln
-sf
liboai_usrpdevif.so liboai_device.so
ln
-sf
$dbin
/liboai_usrpdevif.so.
$REL
$dbin
/liboai_device.so
...
...
common/utils/T/tracer/enb.c
View file @
cc47fbed
...
...
@@ -31,7 +31,10 @@ void reset_ue_ids(void)
int
i
;
printf
(
"resetting known UEs
\n
"
);
for
(
i
=
0
;
i
<
65536
;
i
++
)
ue_id
[
i
]
=
-
1
;
next_ue_id
=
0
;
ue_id
[
65535
]
=
0
;
ue_id
[
65534
]
=
1
;
/* HACK: to be removed */
ue_id
[
2
]
=
2
;
/* this supposes RA RNTI = 2, very openair specific */
next_ue_id
=
3
;
}
int
ue_id_from_rnti
(
void
*
_priv
,
int
rnti
)
...
...
@@ -228,13 +231,15 @@ static void click(void *private, gui *g,
enb_data
*
ed
=
private
;
enb_gui
*
e
=
ed
->
e
;
int
ue
=
ed
->
ue
;
int
do_reset
=
0
;
if
(
button
!=
1
)
return
;
if
(
w
==
e
->
prev_ue_button
)
{
ue
--
;
if
(
ue
<
0
)
ue
=
0
;
}
if
(
w
==
e
->
next_ue_button
)
ue
++
;
if
(
w
==
e
->
current_ue_button
)
reset_ue_ids
()
;
if
(
w
==
e
->
current_ue_button
)
do_reset
=
1
;
if
(
pthread_mutex_lock
(
&
ed
->
lock
))
abort
();
if
(
do_reset
)
reset_ue_ids
();
if
(
ue
!=
ed
->
ue
)
{
set_current_ue
(
g
,
ed
,
ue
);
ed
->
ue
=
ue
;
...
...
@@ -619,7 +624,7 @@ static void enb_main_gui(enb_gui *e, gui *g, event_handler *h, void *database,
container_set_child_growable
(
g
,
top_container
,
text
,
1
);
e
->
legacy
=
new_view_textlist
(
10000
,
10
,
g
,
text
);
set_current_ue
(
g
,
ed
,
0
);
set_current_ue
(
g
,
ed
,
ed
->
ue
);
register_notifier
(
g
,
"click"
,
e
->
current_ue_button
,
click
,
ed
);
register_notifier
(
g
,
"click"
,
e
->
prev_ue_button
,
click
,
ed
);
register_notifier
(
g
,
"click"
,
e
->
next_ue_button
,
click
,
ed
);
...
...
@@ -735,7 +740,7 @@ int main(int n, char **v)
g
=
gui_init
();
new_thread
(
gui_thread
,
g
);
enb_data
.
ue
=
0
;
enb_data
.
ue
=
3
;
enb_data
.
e
=
&
eg
;
enb_data
.
database
=
database
;
...
...
openair1/PHY/LTE_TRANSPORT/dci_tools.c
View file @
cc47fbed
...
...
@@ -861,13 +861,152 @@ uint8_t get_transmission_mode(module_id_t Mod_id, uint8_t CC_id, rnti_t rnti)
}
*/
void
fill_dci_and_dlsch
(
PHY_VARS_eNB
*
eNB
,
eNB_rxtx_proc_t
*
proc
,
DCI_ALLOC_t
*
dci_alloc
,
nfapi_dl_config_dci_dl_pdu
*
pdu
)
{
void
fill_pdcch_order
(
PHY_VARS_eNB
*
eNB
,
eNB_rxtx_proc_t
*
proc
,
DCI_ALLOC_t
*
dci_alloc
,
nfapi_dl_config_dci_dl_pdu
*
pdu
)
{
LTE_DL_FRAME_PARMS
*
fp
=
&
eNB
->
frame_parms
;
uint8_t
*
dci_pdu
=
&
dci_alloc
->
dci_pdu
[
0
];
nfapi_dl_config_dci_dl_pdu_rel8_t
*
rel8
=
&
pdu
->
dci_dl_pdu_rel8
;
LTE_DL_FRAME_PARMS
*
fp
=
&
eNB
->
frame_parms
;
dci_alloc
->
firstCCE
=
rel8
->
cce_idx
;
dci_alloc
->
L
=
rel8
->
aggregation_level
;
dci_alloc
->
rnti
=
rel8
->
rnti
;
dci_alloc
->
harq_pid
=
rel8
->
harq_process
;
dci_alloc
->
ra_flag
=
0
;
dci_alloc
->
format
=
format1A
;
LOG_D
(
PHY
,
"NFAPI: DCI format %d, nCCE %d, L %d, rnti %x,harq_pid %d
\n
"
,
rel8
->
dci_format
,
rel8
->
cce_idx
,
rel8
->
aggregation_level
,
rel8
->
rnti
,
rel8
->
harq_process
);
switch
(
fp
->
N_RB_DL
)
{
case
6
:
if
(
fp
->
frame_type
==
TDD
)
{
dci_alloc
->
dci_length
=
sizeof_DCI1A_1_5MHz_TDD_1_6_t
;
((
DCI1A_1_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
type
=
1
;
((
DCI1A_1_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
vrb_type
=
rel8
->
virtual_resource_block_assignment_flag
;
((
DCI1A_1_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
mcs
=
rel8
->
mcs_1
;
((
DCI1A_1_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
ndi
=
rel8
->
new_data_indicator_1
;
((
DCI1A_1_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
rballoc
=
rel8
->
resource_block_coding
;
((
DCI1A_1_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
rv
=
rel8
->
redundancy_version_1
;
((
DCI1A_1_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
TPC
=
rel8
->
tpc
;
((
DCI1A_1_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
harq_pid
=
rel8
->
harq_process
;
((
DCI1A_1_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
dai
=
rel8
->
downlink_assignment_index
;
}
else
{
dci_alloc
->
dci_length
=
sizeof_DCI1A_1_5MHz_FDD_t
;
((
DCI1A_1_5MHz_FDD_t
*
)
dci_pdu
)
->
type
=
1
;
((
DCI1A_1_5MHz_FDD_t
*
)
dci_pdu
)
->
vrb_type
=
rel8
->
virtual_resource_block_assignment_flag
;
((
DCI1A_1_5MHz_FDD_t
*
)
dci_pdu
)
->
mcs
=
rel8
->
mcs_1
;
((
DCI1A_1_5MHz_FDD_t
*
)
dci_pdu
)
->
ndi
=
rel8
->
new_data_indicator_1
;
((
DCI1A_1_5MHz_FDD_t
*
)
dci_pdu
)
->
rballoc
=
rel8
->
resource_block_coding
;
((
DCI1A_1_5MHz_FDD_t
*
)
dci_pdu
)
->
rv
=
rel8
->
redundancy_version_1
;
((
DCI1A_1_5MHz_FDD_t
*
)
dci_pdu
)
->
TPC
=
rel8
->
tpc
;
((
DCI1A_1_5MHz_FDD_t
*
)
dci_pdu
)
->
harq_pid
=
rel8
->
harq_process
;
// printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
}
break
;
case
25
:
if
(
fp
->
frame_type
==
TDD
)
{
dci_alloc
->
dci_length
=
sizeof_DCI1A_5MHz_TDD_1_6_t
;
((
DCI1A_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
type
=
1
;
((
DCI1A_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
vrb_type
=
rel8
->
virtual_resource_block_assignment_flag
;
((
DCI1A_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
mcs
=
rel8
->
mcs_1
;
((
DCI1A_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
ndi
=
rel8
->
new_data_indicator_1
;
((
DCI1A_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
rballoc
=
rel8
->
resource_block_coding
;
((
DCI1A_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
rv
=
rel8
->
redundancy_version_1
;
((
DCI1A_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
TPC
=
rel8
->
tpc
;
((
DCI1A_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
harq_pid
=
rel8
->
harq_process
;
((
DCI1A_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
dai
=
rel8
->
downlink_assignment_index
;
// printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
}
else
{
dci_alloc
->
dci_length
=
sizeof_DCI1A_5MHz_FDD_t
;
((
DCI1A_5MHz_FDD_t
*
)
dci_pdu
)
->
type
=
1
;
((
DCI1A_5MHz_FDD_t
*
)
dci_pdu
)
->
vrb_type
=
rel8
->
virtual_resource_block_assignment_flag
;
((
DCI1A_5MHz_FDD_t
*
)
dci_pdu
)
->
mcs
=
rel8
->
mcs_1
;
((
DCI1A_5MHz_FDD_t
*
)
dci_pdu
)
->
ndi
=
rel8
->
new_data_indicator_1
;
((
DCI1A_5MHz_FDD_t
*
)
dci_pdu
)
->
rballoc
=
rel8
->
resource_block_coding
;
((
DCI1A_5MHz_FDD_t
*
)
dci_pdu
)
->
rv
=
rel8
->
redundancy_version_1
;
((
DCI1A_5MHz_FDD_t
*
)
dci_pdu
)
->
TPC
=
rel8
->
tpc
;
((
DCI1A_5MHz_FDD_t
*
)
dci_pdu
)
->
harq_pid
=
rel8
->
harq_process
;
// printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
}
break
;
case
50
:
if
(
fp
->
frame_type
==
TDD
)
{
dci_alloc
->
dci_length
=
sizeof_DCI1A_10MHz_TDD_1_6_t
;
((
DCI1A_10MHz_TDD_1_6_t
*
)
dci_pdu
)
->
type
=
1
;
((
DCI1A_10MHz_TDD_1_6_t
*
)
dci_pdu
)
->
vrb_type
=
rel8
->
virtual_resource_block_assignment_flag
;
((
DCI1A_10MHz_TDD_1_6_t
*
)
dci_pdu
)
->
mcs
=
rel8
->
mcs_1
;
((
DCI1A_10MHz_TDD_1_6_t
*
)
dci_pdu
)
->
ndi
=
rel8
->
new_data_indicator_1
;
((
DCI1A_10MHz_TDD_1_6_t
*
)
dci_pdu
)
->
rballoc
=
rel8
->
resource_block_coding
;
((
DCI1A_10MHz_TDD_1_6_t
*
)
dci_pdu
)
->
rv
=
rel8
->
redundancy_version_1
;
((
DCI1A_10MHz_TDD_1_6_t
*
)
dci_pdu
)
->
TPC
=
rel8
->
tpc
;
((
DCI1A_10MHz_TDD_1_6_t
*
)
dci_pdu
)
->
harq_pid
=
rel8
->
harq_process
;
((
DCI1A_10MHz_TDD_1_6_t
*
)
dci_pdu
)
->
dai
=
rel8
->
downlink_assignment_index
;
// printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
}
else
{
dci_alloc
->
dci_length
=
sizeof_DCI1A_10MHz_FDD_t
;
((
DCI1A_10MHz_FDD_t
*
)
dci_pdu
)
->
type
=
1
;
((
DCI1A_10MHz_FDD_t
*
)
dci_pdu
)
->
vrb_type
=
rel8
->
virtual_resource_block_assignment_flag
;
((
DCI1A_10MHz_FDD_t
*
)
dci_pdu
)
->
mcs
=
rel8
->
mcs_1
;
((
DCI1A_10MHz_FDD_t
*
)
dci_pdu
)
->
ndi
=
rel8
->
new_data_indicator_1
;
((
DCI1A_10MHz_FDD_t
*
)
dci_pdu
)
->
rballoc
=
rel8
->
resource_block_coding
;
((
DCI1A_10MHz_FDD_t
*
)
dci_pdu
)
->
rv
=
rel8
->
redundancy_version_1
;
((
DCI1A_10MHz_FDD_t
*
)
dci_pdu
)
->
TPC
=
rel8
->
tpc
;
((
DCI1A_10MHz_FDD_t
*
)
dci_pdu
)
->
harq_pid
=
rel8
->
harq_process
;
// printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
}
break
;
case
100
:
if
(
fp
->
frame_type
==
TDD
)
{
dci_alloc
->
dci_length
=
sizeof_DCI1A_20MHz_TDD_1_6_t
;
((
DCI1A_20MHz_TDD_1_6_t
*
)
dci_pdu
)
->
type
=
1
;
((
DCI1A_20MHz_TDD_1_6_t
*
)
dci_pdu
)
->
vrb_type
=
rel8
->
virtual_resource_block_assignment_flag
;
((
DCI1A_20MHz_TDD_1_6_t
*
)
dci_pdu
)
->
mcs
=
rel8
->
mcs_1
;
((
DCI1A_20MHz_TDD_1_6_t
*
)
dci_pdu
)
->
ndi
=
rel8
->
new_data_indicator_1
;
((
DCI1A_20MHz_TDD_1_6_t
*
)
dci_pdu
)
->
rballoc
=
rel8
->
resource_block_coding
;
((
DCI1A_20MHz_TDD_1_6_t
*
)
dci_pdu
)
->
rv
=
rel8
->
redundancy_version_1
;
((
DCI1A_20MHz_TDD_1_6_t
*
)
dci_pdu
)
->
TPC
=
rel8
->
tpc
;
((
DCI1A_20MHz_TDD_1_6_t
*
)
dci_pdu
)
->
harq_pid
=
rel8
->
harq_process
;
((
DCI1A_20MHz_TDD_1_6_t
*
)
dci_pdu
)
->
dai
=
rel8
->
downlink_assignment_index
;
// printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
}
else
{
dci_alloc
->
dci_length
=
sizeof_DCI1A_20MHz_FDD_t
;
((
DCI1A_20MHz_FDD_t
*
)
dci_pdu
)
->
type
=
1
;
((
DCI1A_20MHz_FDD_t
*
)
dci_pdu
)
->
vrb_type
=
rel8
->
virtual_resource_block_assignment_flag
;
((
DCI1A_20MHz_FDD_t
*
)
dci_pdu
)
->
mcs
=
rel8
->
mcs_1
;
((
DCI1A_20MHz_FDD_t
*
)
dci_pdu
)
->
ndi
=
rel8
->
new_data_indicator_1
;
((
DCI1A_20MHz_FDD_t
*
)
dci_pdu
)
->
rballoc
=
rel8
->
resource_block_coding
;
((
DCI1A_20MHz_FDD_t
*
)
dci_pdu
)
->
rv
=
rel8
->
redundancy_version_1
;
((
DCI1A_20MHz_FDD_t
*
)
dci_pdu
)
->
TPC
=
rel8
->
tpc
;
((
DCI1A_20MHz_FDD_t
*
)
dci_pdu
)
->
harq_pid
=
rel8
->
harq_process
;
// printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
}
break
;
}
LOG_I
(
PHY
,
"%d.%d: DCI 1A: rnti %x, PDCCH order to do PRACH
\n
"
,
proc
->
frame_tx
,
proc
->
subframe_tx
,
rel8
->
rnti
);
}
void
fill_dci_and_dlsch
(
PHY_VARS_eNB
*
eNB
,
eNB_rxtx_proc_t
*
proc
,
DCI_ALLOC_t
*
dci_alloc
,
nfapi_dl_config_dci_dl_pdu
*
pdu
)
{
LTE_DL_FRAME_PARMS
*
fp
=
&
eNB
->
frame_parms
;
uint8_t
*
dci_pdu
=
&
dci_alloc
->
dci_pdu
[
0
];
nfapi_dl_config_dci_dl_pdu_rel8_t
*
rel8
=
&
pdu
->
dci_dl_pdu_rel8
;
/* check if this is a DCI 1A PDCCH order for RAPROC */
if
(
rel8
->
dci_format
==
NFAPI_DL_DCI_FORMAT_1A
&&
rel8
->
rnti_type
==
1
)
{
int
full_rb
;
switch
(
fp
->
N_RB_DL
)
{
case
6
:
full_rb
=
63
;
break
;
case
25
:
full_rb
=
511
;
break
;
case
50
:
full_rb
=
2047
;
break
;
case
100
:
full_rb
=
8191
;
break
;
default:
abort
();
}
if
(
rel8
->
resource_block_coding
==
full_rb
)
return
fill_pdcch_order
(
eNB
,
proc
,
dci_alloc
,
pdu
);
}
LTE_eNB_DLSCH_t
*
dlsch0
=
NULL
,
*
dlsch1
=
NULL
;
LTE_DL_eNB_HARQ_t
*
dlsch0_harq
=
NULL
,
*
dlsch1_harq
=
NULL
;
int
beamforming_mode
=
0
;
...
...
@@ -958,11 +1097,6 @@ LOG_D(PHY,"NFAPI: harq_pid %d harq_mask %x, round %d ndi (%d,%d) rnti type %d\n"
((
DCI1A_1_5MHz_FDD_t
*
)
dci_pdu
)
->
harq_pid
=
rel8
->
harq_process
;
// printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
}
// check if PDCCH order
if
(
rel8
->
resource_block_coding
==
63
)
{
dlsch0
->
active
=
0
;
return
;
}
AssertFatal
(
rel8
->
virtual_resource_block_assignment_flag
==
LOCALIZED
,
"Distributed RB allocation not done yet
\n
"
);
dlsch0_harq
->
rb_alloc
[
0
]
=
localRIV2alloc_LUT6
[
rel8
->
resource_block_coding
];
dlsch0_harq
->
vrb_type
=
rel8
->
virtual_resource_block_assignment_flag
;
...
...
@@ -993,12 +1127,6 @@ LOG_D(PHY,"NFAPI: harq_pid %d harq_mask %x, round %d ndi (%d,%d) rnti type %d\n"
((
DCI1A_5MHz_FDD_t
*
)
dci_pdu
)
->
harq_pid
=
rel8
->
harq_process
;
// printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
}
// check if PDCCH order
if
(
rel8
->
resource_block_coding
==
511
)
{
dlsch0
->
active
=
0
;
return
;
}
AssertFatal
(
rel8
->
virtual_resource_block_assignment_flag
==
LOCALIZED
,
"Distributed RB allocation not done yet
\n
"
);
dlsch0_harq
->
rb_alloc
[
0
]
=
localRIV2alloc_LUT25
[
rel8
->
resource_block_coding
];
dlsch0_harq
->
vrb_type
=
rel8
->
virtual_resource_block_assignment_flag
;
...
...
@@ -1029,11 +1157,6 @@ LOG_D(PHY,"NFAPI: harq_pid %d harq_mask %x, round %d ndi (%d,%d) rnti type %d\n"
((
DCI1A_10MHz_FDD_t
*
)
dci_pdu
)
->
harq_pid
=
rel8
->
harq_process
;
// printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
}
// check if PDCCH order
if
(
rel8
->
resource_block_coding
==
2047
)
{
dlsch0
->
active
=
0
;
return
;
}
AssertFatal
(
rel8
->
virtual_resource_block_assignment_flag
==
LOCALIZED
,
"Distributed RB allocation not done yet
\n
"
);
dlsch0_harq
->
rb_alloc
[
0
]
=
localRIV2alloc_LUT50_0
[
rel8
->
resource_block_coding
];
dlsch0_harq
->
rb_alloc
[
1
]
=
localRIV2alloc_LUT50_1
[
rel8
->
resource_block_coding
];
...
...
@@ -1065,11 +1188,6 @@ LOG_D(PHY,"NFAPI: harq_pid %d harq_mask %x, round %d ndi (%d,%d) rnti type %d\n"
((
DCI1A_20MHz_FDD_t
*
)
dci_pdu
)
->
harq_pid
=
rel8
->
harq_process
;
// printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
}
// check if PDCCH order
if
(
rel8
->
resource_block_coding
==
8191
)
{
dlsch0
->
active
=
0
;
return
;
}
AssertFatal
(
rel8
->
virtual_resource_block_assignment_flag
==
LOCALIZED
,
"Distributed RB allocation not done yet
\n
"
);
dlsch0_harq
->
rb_alloc
[
0
]
=
localRIV2alloc_LUT100_0
[
rel8
->
resource_block_coding
];
dlsch0_harq
->
rb_alloc
[
1
]
=
localRIV2alloc_LUT100_1
[
rel8
->
resource_block_coding
];
...
...
@@ -2287,7 +2405,7 @@ void fill_dci0(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,
T_INT
(
mcs
),
T_INT
(
-
1
/* TODO: remove round? */
),
T_INT
(
pdu
->
dci_pdu_rel8
.
resource_block_start
),
T_INT
(
pdu
->
dci_pdu_rel8
.
number_of_resource_block
),
T_INT
(
-
1
/* TODO: get TBS */
),
T_INT
(
get_TBS_UL
(
mcs
,
pdu
->
dci_pdu_rel8
.
number_of_resource_block
)
*
8
),
T_INT
(
pdu
->
dci_pdu_rel8
.
aggregation_level
),
T_INT
(
pdu
->
dci_pdu_rel8
.
cce_index
));
#endif
...
...
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
View file @
cc47fbed
...
...
@@ -1707,6 +1707,7 @@ int add_new_ue(module_id_t mod_idP, int cc_idP, rnti_t rntiP,int harq_pidP
for
(
i
=
0
;
i
<
NUMBER_OF_UE_MAX
;
i
++
)
{
if
(
UE_list
->
active
[
i
]
==
TRUE
)
continue
;
UE_id
=
i
;
memset
(
&
UE_list
->
UE_template
[
cc_idP
][
UE_id
],
0
,
sizeof
(
UE_TEMPLATE
));
UE_list
->
UE_template
[
cc_idP
][
UE_id
].
rnti
=
rntiP
;
UE_list
->
UE_template
[
cc_idP
][
UE_id
].
configured
=
FALSE
;
UE_list
->
numactiveCCs
[
UE_id
]
=
1
;
...
...
openair2/LAYER2/MAC/pre_processor.c
View file @
cc47fbed
...
...
@@ -1370,11 +1370,14 @@ void assign_max_mcs_min_rb(module_id_t module_idP,int frameP, sub_frame_t subfra
/* if UE has pending scheduling request then pre-allocate 3 RBs */
//if (UE_template->ul_active == 1 && UE_template->ul_SR == 1) {
if
(
UE_is_to_be_scheduled
(
module_idP
,
CC_id
,
i
))
{
/* use QPSK mcs */
UE_template
->
pre_assigned_mcs_ul
=
10
;
UE_template
->
pre_allocated_rb_table_index_ul
=
2
;
UE_template
->
pre_allocated_nb_rb_ul
=
3
;
}
else
{
UE_template
->
pre_allocated_rb_table_index_ul
=-
1
;
UE_template
->
pre_allocated_nb_rb_ul
=
0
;
UE_template
->
pre_assigned_mcs_ul
=
0
;
UE_template
->
pre_allocated_rb_table_index_ul
=
-
1
;
UE_template
->
pre_allocated_nb_rb_ul
=
0
;
}
}
}
...
...
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