Commit f1e30d57 authored by Florian Kaltenberger's avatar Florian Kaltenberger

Merge branch 'ocp_nrsimulator' into 'develop-nr'

Critical bugs from compilation, Ocp nrsimulator

See merge request oai/openairinterface5g!512
parents f7583ef4 165c39da
......@@ -21,7 +21,7 @@
# Author: laurent THOMAS, Lionel GAUTHIER
cmake_minimum_required (VERSION 2.8)
cmake_minimum_required (VERSION 3.0)
#############################################
# Base directories, compatible with legacy OAI building
......@@ -169,11 +169,12 @@ endif()
set(CMAKE_C_FLAGS
"${CMAKE_C_FLAGS} ${C_FLAGS_PROCESSOR} -std=gnu99 -Wall -Wstrict-prototypes -fno-strict-aliasing -rdynamic -funroll-loops -Wno-packed-bitfield-compat -fPIC ")
# add autotools definitions that were maybe used!
set(MKVER "'MAKE_VERSION(a,b,c)=((a)*256+(b)*16+c)'")
set(CMAKE_C_FLAGS
"${CMAKE_C_FLAGS} -DSTDC_HEADERS=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_MEMORY_H=1 -DHAVE_STRINGS_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_UNISTD_H=1 -DHAVE_FCNTL_H=1 -DHAVE_ARPA_INET_H=1 -DHAVE_SYS_TIME_H=1 -DHAVE_SYS_SOCKET_H=1 -DHAVE_STRERROR=1 -DHAVE_SOCKET=1 -DHAVE_MEMSET=1 -DHAVE_GETTIMEOFDAY=1 -DHAVE_STDLIB_H=1 -DHAVE_MALLOC=1 -DHAVE_LIBSCTP -D'MAKE_VERSION(a,b,c)=((a)*256+(b)*16+c)'"
"${CMAKE_C_FLAGS} -DSTDC_HEADERS=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_MEMORY_H=1 -DHAVE_STRINGS_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_UNISTD_H=1 -DHAVE_FCNTL_H=1 -DHAVE_ARPA_INET_H=1 -DHAVE_SYS_TIME_H=1 -DHAVE_SYS_SOCKET_H=1 -DHAVE_STRERROR=1 -DHAVE_SOCKET=1 -DHAVE_MEMSET=1 -DHAVE_GETTIMEOFDAY=1 -DHAVE_STDLIB_H=1 -DHAVE_MALLOC=1 -DHAVE_LIBSCTP -D${MKVER}"
)
set(CMAKE_CXX_FLAGS
"${CMAKE_CXX_FLAGS} ${C_FLAGS_PROCESSOR} -std=c++11 -D'MAKE_VERSION(a,b,c)=((a)*256+(b)*16+c)'"
"${CMAKE_CXX_FLAGS} ${C_FLAGS_PROCESSOR} -std=c++11 -D${MKVER}"
)
add_definitions("-DASN_DISABLE_OER_SUPPORT")
......@@ -252,6 +253,7 @@ add_boolean_option(UE_TIMING_TRACE False "Activate UE timing trace")
add_boolean_option(DISABLE_LOG_X False "Deactivate all LOG_* macros")
add_boolean_option(USRP_REC_PLAY False "Enable USRP record playback mode")
add_boolean_option(UE_NAS_USE_TUN False "Enable UE NAS TUN device instead of ue_ip.ko")
add_boolean_option(NOS1 False "Allows to run without a EPC")
add_boolean_option(BASIC_SIMULATOR False "Has to be True when building the basic simulator, False otherwise")
add_boolean_option(DEBUG_CONSOLE False "makes debugging easier, disables stdout/stderr buffering")
......@@ -260,17 +262,17 @@ add_boolean_option(ENABLE_ITTI True "ITTI is internal messaging, should remain e
set (OCP_ITTI ${OPENAIR_DIR}/common/utils/ocp_itti)
if (${ENABLE_ITTI})
add_library(ITTI
# add .h files if depend on (this one is generated)
${OCP_ITTI}/intertask_interface.cpp
${OPENAIR_DIR}/common/utils/backtrace.c
${OPENAIR_DIR}/common/utils/memory_pools.c
)
add_dependencies(ITTI rrc_flag)
set(ITTI_LIB ITTI)
set(GTPU_need_ITTI ${OPENAIR3_DIR}/GTPV1-U/gtpv1u_eNB.c)
endif (${ENABLE_ITTI})
#############################
# ASN.1 grammar C code generation & dependancies
# ASN.1 grammar C code generation & dependencies
################################
# A difficulty: asn1c generates C code of a un-predictable list of files
# so, generate the c from asn1c once at cmake run time
......@@ -278,8 +280,6 @@ endif (${ENABLE_ITTI})
# (so creating new asn.1 objects instead of modifying the object attributes)
# New C code source file, cmake must be re-run (instead of re-running make only)
#############
# set(asn1c_call "${OPENAIR_CMAKE}/tools/generate_asn1")
# set(fix_asn1c_call "${OPENAIR_CMAKE}/tools/fix_asn1")
set(asn1_generated_dir ${OPENAIR_BIN_DIR})
set(protoc_call "${OPENAIR_CMAKE}/tools/generate_protobuf")
......@@ -290,7 +290,6 @@ set(protobuf_generated_dir ${OPENAIR_BIN_DIR})
add_list2_option(RRC_ASN1_VERSION "Rel15" "ASN.1 version of RRC interface" "Rel8" "Rel10" "Rel14" "CBA")
Message("RRC_ASN1_VERSION is ${RRC_ASN1_VERSION}")
if (${RRC_ASN1_VERSION} STREQUAL "Rel8")
make_version(RRC_VERSION 8 6 0)
......@@ -320,34 +319,25 @@ elseif (${RRC_ASN1_VERSION} STREQUAL "Rel15")
endif (${RRC_ASN1_VERSION} STREQUAL "Rel8")
add_definitions(-DRRC_VERSION=${RRC_VERSION})
set (RRC_FULL_DIR ${asn1_generated_dir}/RRC_${RRC_ASN1_VERSION})
message("calling asn1c -pdu=all -fcompound-names -gen-PER -no-gen-OER -no-gen-example -D ${RRC_FULL_DIR} ${RRC_GRAMMAR}")
execute_process(COMMAND mkdir -p ${RRC_FULL_DIR}
COMMAND env asn1c -pdu=all -fcompound-names -gen-PER -no-gen-OER -no-gen-example -D ${RRC_FULL_DIR} ${RRC_GRAMMAR}
RESULT_VARIABLE ret
OUTPUT_QUIET
ERROR_QUIET)
# Warning: if you modify ASN.1 source file to generate new C files, cmake should be re-run instead of make
execute_process(COMMAND ${OPENAIR_CMAKE}/tools/make_asn1c_includes.sh "${RRC_FULL_DIR}" "${RRC_GRAMMAR}"
RESULT_VARIABLE ret)
if (NOT ${ret} STREQUAL 0)
message(FATAL_ERROR "${ret}: error")
endif (NOT ${ret} STREQUAL 0)
file(GLOB rrc_source ${RRC_FULL_DIR}/*.c)
file(GLOB rrc_h ${RRC_FULL_DIR}/*.h)
set(rrc_h ${rrc_h} ${RRC_FULL_DIR}/asn_constant.h)
set_source_files_properties(${rrc_source} PROPERTIES COMPILE_FLAGS -w) # suppress warnings from generated code
add_library(RRC_LIB ${rrc_h} ${rrc_source}
${OPENAIR2_DIR}/RRC/LTE/MESSAGES/asn1_msg.c
${OPENAIR2_DIR}/RRC/LTE/MESSAGES/asn1_msg_NB_IoT.c)
include_directories ("${RRC_FULL_DIR}")
# add the command to generate the source code
# Warning: if you modify ASN.1 source file to generate new C files, cmake should be re-run instead of make
add_custom_command (
OUTPUT ${RRC_FULL_DIR}/asn_constant.h
COMMAND mkdir -p ${RRC_FULL_DIR}
COMMAND env asn1c -pdu=all -fcompound-names -gen-PER -no-gen-OER -no-gen-example -D ${RRC_FULL_DIR} ${RRC_GRAMMAR}
add_custom_target (
rrc_flag ALL
${OPENAIR_CMAKE}/tools/make_asn1c_includes.sh "${RRC_FULL_DIR}" "${RRC_GRAMMAR}"
DEPENDS ${RRC_GRAMMAR}
)
add_library(RRC_LIB ${rrc_source}
${OPENAIR2_DIR}/RRC/LTE/MESSAGES/asn1_msg.c
${OPENAIR2_DIR}/RRC/LTE/MESSAGES/asn1_msg_NB_IoT.c)
add_dependencies(RRC_LIB rrc_flag)
include_directories ("${RRC_FULL_DIR}")
#NR RRC
######
......@@ -361,34 +351,26 @@ endif (${NR_RRC_ASN1_VERSION} STREQUAL "NR_Rel15")
add_definitions(-DNR_RRC_VERSION=${NR_RRC_VERSION})
set (NR_RRC_FULL_DIR ${asn1_generated_dir}/${NR_RRC_ASN1_VERSION})
message("calling ASN1C_PREFIX=NR_ asn1c -pdu=all -fcompound-names -findirect-choice -gen-PER -no-gen-OER -no-gen-example -D ${NR_RRC_FULL_DIR} ${NR_RRC_GRAMMAR}")
execute_process(COMMAND mkdir -p ${NR_RRC_FULL_DIR}
COMMAND env "ASN1C_PREFIX=NR_" asn1c -fcompound-names -findirect-choice -gen-PER -no-gen-OER -no-gen-example -D ${NR_RRC_FULL_DIR} ${NR_RRC_GRAMMAR}
RESULT_VARIABLE ret
OUTPUT_QUIET
ERROR_QUIET)
#if (NOT ${ret} STREQUAL 0)
# message(FATAL_ERROR "${ret}: error")
#endif (NOT ${ret} STREQUAL 0)
# Warning: if you modify ASN.1 source file to generate new C files, cmake should be re-run instead of make
execute_process(COMMAND ${OPENAIR_CMAKE}/tools/make_asn1c_includes.sh "${NR_RRC_FULL_DIR}" "${NR_RRC_GRAMMAR}" "NR_" "-findirect-choice"
RESULT_VARIABLE ret)
if (NOT ${ret} STREQUAL 0)
message(FATAL_ERROR "${ret}: error")
endif ()
file(GLOB nr_rrc_source ${NR_RRC_FULL_DIR}/*.c)
file(GLOB nr_rrc_h ${NR_RRC_FULL_DIR}/*.h)
set(nr_rrc_h ${nr_rrc_h} ${NR_RRC_FULL_DIR}/NR_asn_constant.h)
#set_source_files_properties(${nr_rrc_source} PROPERTIES COMPILE_FLAGS -w) # suppress warnings from generated code
add_library(NR_RRC_LIB
${nr_rrc_h}
${nr_rrc_source}
${OPENAIR2_DIR}/RRC/NR/MESSAGES/asn1_msg.c)
include_directories ("${NR_RRC_FULL_DIR}")
add_custom_target (
nr_rrc_flag ALL
${OPENAIR_CMAKE}/tools/make_asn1c_includes.sh "${NR_RRC_FULL_DIR}" "${NR_RRC_GRAMMAR}" "NR_" "-findirect-choice"
DEPENDS ${NR_RRC_GRAMMAR}
)
# add the command to generate the source code
# Warning: if you modify ASN.1 source file to generate new C files, cmake should be re-run instead of make
add_library(NR_RRC_LIB ${nr_rrc_h} ${nr_rrc_source}
${OPENAIR2_DIR}/RRC/NR/MESSAGES/asn1_msg.c
)
add_dependencies(NR_RRC_LIB nr_rrc_flag)
include_directories ("${NR_RRC_FULL_DIR}")
add_custom_command (OUTPUT ${NR_RRC_FULL_DIR}/NR_asn_constant.h
COMMAND mkdir -p ${NR_RRC_FULL_DIR}
DEPENDS ${NR_RRC_GRAMMAR}
)
# S1AP
# Same limitation as described in RRC: unknown generated file list
......@@ -425,30 +407,26 @@ endif(${S1AP_RELEASE} STREQUAL "R8")
add_definitions(-DS1AP_VERSION=${S1AP_VERSION})
set(S1AP_ASN_DIR ${S1AP_DIR}/MESSAGES/ASN1/${S1AP_RELEASE})
set(S1AP_C_DIR ${asn1_generated_dir}/S1AP_${S1AP_RELEASE})
message("calling ASN1C_PREFIX=S1AP_ asn1c -pdu=all -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example -D ${S1AP_C_DIR} ${S1AP_ASN_DIR}/${S1AP_ASN_FILES}")
execute_process(COMMAND mkdir -p ${S1AP_C_DIR}
COMMAND env "ASN1C_PREFIX=S1AP_" asn1c -pdu=all -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example -D ${S1AP_C_DIR} ${S1AP_ASN_DIR}/${S1AP_ASN_FILES}
RESULT_VARIABLE ret
OUTPUT_QUIET
ERROR_QUIET)
# Warning: if you modify ASN.1 source file to generate new C files, cmake should be re-run instead of make
execute_process(COMMAND ${OPENAIR_CMAKE}/tools/make_asn1c_includes.sh "${S1AP_C_DIR}" "${S1AP_ASN_DIR}/${S1AP_ASN_FILES}" "S1AP_" -fno-include-deps
RESULT_VARIABLE ret)
if (NOT ${ret} STREQUAL 0)
message(FATAL_ERROR "${ret}: error")
endif (NOT ${ret} STREQUAL 0)
file(GLOB S1AP_source ${S1AP_C_DIR}/*.c)
file(GLOB s1ap_h ${S1AP_C_DIR}/*.h)
set(s1ap_h ${s1ap_h})
add_custom_command (
OUTPUT ${S1AP_C_DIR}/S1AP_asn_constant.h
COMMAND mkdir -p ${S1AP_C_DIR}
COMMAND env "ASN1C_PREFIX=S1AP_" asn1c -pdu=all -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example -D ${S1AP_C_DIR} ${S1AP_ASN_DIR}/${S1AP_ASN_FILES}
DEPENDS ${S1AP_ASN_DIR}/${S1AP_ASN_FILES}
add_custom_target (
s1ap_flag ALL
${OPENAIR_CMAKE}/tools/make_asn1c_includes.sh "${S1AP_C_DIR}" "${S1AP_ASN_DIR}/${S1AP_ASN_FILES}" "S1AP_" -fno-include-deps
DEPENDS "${S1AP_ASN_DIR}/${S1AP_ASN_FILES}"
)
add_library(S1AP_LIB
${S1AP_source}
${S1AP_DIR}/s1ap_common.c
)
add_dependencies(S1AP_LIB rrc_flag s1ap_flag)
include_directories ("${S1AP_C_DIR}")
include_directories ("${S1AP_DIR}")
......@@ -467,6 +445,7 @@ add_library(S1AP_ENB
${S1AP_DIR}/s1ap_eNB_trace.c
${S1AP_DIR}/s1ap_eNB_ue_context.c
)
add_dependencies(S1AP_ENB rrc_flag s1ap_flag)
#X2AP
# Same limitation as described in RRC/S1AP: unknown generated file list
......@@ -494,24 +473,19 @@ endif(${X2AP_RELEASE} STREQUAL "R8")
add_definitions(-DX2AP_VERSION=${X2AP_VERSION})
set(X2AP_ASN_DIR ${X2AP_DIR}/MESSAGES/ASN1/${X2AP_RELEASE})
set(X2AP_C_DIR ${asn1_generated_dir}/X2AP_${X2AP_RELEASE})
message("calling ASN1C_PREFIX=X2AP_ asn1c -pdu=all -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example -D ${X2AP_C_DIR} ${X2AP_ASN_DIR}/${X2AP_ASN_FILES}")
execute_process(COMMAND mkdir -p ${X2AP_C_DIR}
COMMAND env "ASN1C_PREFIX=X2AP_" asn1c -pdu=all -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example -D ${X2AP_C_DIR} ${X2AP_ASN_DIR}/${X2AP_ASN_FILES}
RESULT_VARIABLE ret
OUTPUT_QUIET
ERROR_QUIET)
# Warning: if you modify ASN.1 source file to generate new C files, cmake should be re-run instead of make
execute_process(COMMAND ${OPENAIR_CMAKE}/tools/make_asn1c_includes.sh "${X2AP_C_DIR}" "${X2AP_ASN_DIR}/${X2AP_ASN_FILES}" "X2AP_" -fno-include-deps
RESULT_VARIABLE ret)
if (NOT ${ret} STREQUAL 0)
message(FATAL_ERROR "${ret}: error")
endif (NOT ${ret} STREQUAL 0)
file(GLOB X2AP_source ${X2AP_C_DIR}/*.c)
file(GLOB x2ap_h ${X2AP_C_DIR}/*.h)
set(x2ap_h ${x2ap_h})
file(GLOB X2AP_source ${X2AP_C_DIR}/*.c)
add_custom_command (
OUTPUT ${X2AP_C_DIR}/X2AP_asn_constant.h
COMMAND mkdir -p ${X2AP_C_DIR}
COMMAND env "ASN1C_PREFIX=X2AP_" asn1c -pdu=all -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example -D ${X2AP_C_DIR} ${X2AP_ASN_DIR}/${X2AP_ASN_FILES}
add_custom_target (
x2_flag ALL
COMMAND ${OPENAIR_CMAKE}/tools/make_asn1c_includes.sh "${X2AP_C_DIR}" "${X2AP_ASN_DIR}/${X2AP_ASN_FILES}" "X2AP_" -fno-include-deps
DEPENDS ${X2AP_ASN_DIR}/${X2AP_ASN_FILES}
)
......@@ -519,6 +493,7 @@ add_library(X2AP_LIB
${X2AP_source}
${X2AP_DIR}/x2ap_common.c
)
add_dependencies(X2AP_LIB rrc_flag x2_flag)
include_directories ("${X2AP_C_DIR}")
include_directories ("${X2AP_DIR}")
......@@ -532,6 +507,7 @@ add_library(X2AP_ENB
${X2AP_DIR}/x2ap_eNB_management_procedures.c
${X2AP_DIR}/x2ap_eNB_generate_messages.c
)
add_dependencies(X2AP_ENB rrc_flag x2_flag)
# Hardware dependant options
###################################
......@@ -539,6 +515,10 @@ add_list1_option(NB_ANTENNAS_RX "2" "Number of antennas in reception" "1" "2" "4
add_list1_option(NB_ANTENNAS_TX "4" "Number of antennas in transmission" "1" "2" "4")
add_list2_option(RF_BOARD "EXMIMO" "RF head type" "None" "EXMIMO" "OAI_USRP" "OAI_BLADERF" "CPRIGW" "OAI_LMSSDR")
if (NOT ${RF_BOARD} STREQUAL "None")
add_definitions(-DMANAGED_RF=1)
endif()
add_list2_option(TRANSP_PRO "None" "Transport protocol type" "None" "ETHERNET")
#NOKIA config enhancement
......@@ -639,6 +619,8 @@ set(HWLIB_TCP_BRIDGE_OAI_SOURCE
add_library(tcp_bridge_oai MODULE ${HWLIB_TCP_BRIDGE_OAI_SOURCE} )
set_target_properties(tcp_bridge_oai PROPERTIES COMPILE_FLAGS "-fvisibility=hidden")
add_library(rfsimulator MODULE ${OPENAIR_TARGETS}/ARCH/rfsimulator/simulator.c)
##########################################################
include_directories ("${OPENAIR_TARGETS}/ARCH/COMMON")
......@@ -661,7 +643,6 @@ add_boolean_option(NAS_NETLINK False "useless ??? Must be True to compile nasmes
add_boolean_option(OAI_NW_DRIVER_USE_NETLINK True "????")
add_boolean_option(USE_MME False "this flag is used only one time in lte-softmodem.c")
add_list_string_option(PACKAGE_NAME "NotDefined" "As per attribute name")
add_boolean_option(MESSAGE_CHART_GENERATOR False "For generating sequence diagrams")
add_boolean_option(MESSAGE_CHART_GENERATOR_RLC_MAC False "trace RLC-MAC exchanges in sequence diagrams")
add_boolean_option(MESSAGE_CHART_GENERATOR_PHY False "trace some PHY exchanges in sequence diagrams")
......@@ -669,11 +650,7 @@ add_boolean_option(MESSAGE_CHART_GENERATOR_PHY False "trace some PHY exchang
add_boolean_option(UE_EXPANSION False "enable UE_EXPANSION with max 256 UE")
add_boolean_option(PHY_TX_THREAD False "enable UE_EXPANSION with max 256 UE")
add_boolean_option(PRE_SCD_THREAD False "enable UE_EXPANSION with max 256 UE")
########################
# Include order
##########################
add_boolean_option(ENB_MODE True "Swap the include directories between openair2 and openair3" )
add_boolean_option(UESIM_EXPANSION False "enable UESIM_EXPANSION with max 256 UE")
##########################
# SCHEDULING/REAL-TIME/PERF options
......@@ -776,19 +753,13 @@ include_directories("${OPENAIR_BIN_DIR}")
#include_directories("${include_dirs_all}")
# Legacy exact order
if(ENB_MODE)
include_directories("${OPENAIR2_DIR}/COMMON")
include_directories("${OPENAIR2_DIR}/UTIL")
include_directories("${OPENAIR2_DIR}/UTIL/LOG")
include_directories("${OPENAIR3_DIR}/COMMON")
include_directories("${OPENAIR3_DIR}/UTILS")
else()
include_directories("${OPENAIR3_DIR}/COMMON")
include_directories("${OPENAIR3_DIR}/UTILS")
include_directories("${OPENAIR2_DIR}/COMMON")
include_directories("${OPENAIR2_DIR}/UTIL")
include_directories("${OPENAIR2_DIR}/UTIL/LOG")
endif()
include_directories("${OPENAIR2_DIR}/COMMON")
include_directories("${OPENAIR2_DIR}/UTIL")
include_directories("${OPENAIR2_DIR}/UTIL/LOG")
include_directories("${OPENAIR3_DIR}/COMMON")
include_directories("${OPENAIR3_DIR}/UTILS")
include_directories("${NFAPI_DIR}/nfapi/public_inc")
include_directories("${NFAPI_DIR}/common/public_inc")
include_directories("${NFAPI_DIR}/pnf/public_inc")
......@@ -927,6 +898,7 @@ add_library(FLEXRAN_AGENT
${OPENAIR2_DIR}/ENB_APP/CONTROL_MODULES/MAC/flexran_agent_mac_internal.c
${OPENAIR2_DIR}/ENB_APP/CONTROL_MODULES/MAC/flexran_agent_mac_slice_verification.c
)
add_dependencies(FLEXRAN_AGENT rrc_flag)
set(FLEXRAN_AGENT_LIB FLEXRAN_AGENT)
#include_directories(${OPENAIR2_DIR}/ENB_APP)
......@@ -992,6 +964,7 @@ set(UTIL_SRC
# ${OPENAIR2_DIR}/UTIL/OTG/otg_rx.c
)
add_library(UTIL ${UTIL_SRC})
add_dependencies(UTIL rrc_flag)
#set(OMG_SUMO_SRC
# ${OPENAIR2_DIR}/UTIL/OMG/client_traci_OMG.c
......@@ -1031,7 +1004,7 @@ set(SCHED_SRC
${OPENAIR1_DIR}/SCHED/phy_procedures_lte_common.c
)
add_library(SCHED_LIB ${SCHED_SRC})
add_dependencies(SCHED_LIB rrc_flag)
set(SCHED_NR_SRC
${OPENAIR1_DIR}/SCHED_NR/fapi_nr_l1.c
${OPENAIR1_DIR}/SCHED_NR/phy_procedures_nr_common.c
......@@ -1045,6 +1018,7 @@ set(SCHED_SRC_RU
${OPENAIR1_DIR}/SCHED/prach_procedures.c
)
add_library(SCHED_RU_LIB ${SCHED_SRC_RU})
add_dependencies(SCHED_RU_LIB rrc_flag)
set(SCHED_SRC_UE
${OPENAIR1_DIR}/SCHED_UE/phy_procedures_lte_ue.c
......@@ -1054,7 +1028,7 @@ set(SCHED_SRC_UE
${OPENAIR1_DIR}/SCHED_UE/srs_pc.c
)
add_library(SCHED_UE_LIB ${SCHED_SRC_UE})
add_dependencies(SCHED_UE_LIB rrc_flag)
set(SCHED_SRC_NR_UE
${OPENAIR1_DIR}/SCHED_NR_UE/phy_procedures_nr_ue.c
${OPENAIR1_DIR}/SCHED_NR/phy_procedures_nr_common.c
......@@ -1116,6 +1090,7 @@ set(NFAPI_USER_SRC
${NFAPI_USER_DIR}/nfapi_vnf.c
)
add_library(NFAPI_USER_LIB ${NFAPI_USER_SRC})
add_dependencies(NFAPI_USER_LIB rrc_flag)
include_directories(${NFAPI_USER_DIR})
# Layer 1
......@@ -1154,11 +1129,7 @@ set(PHY_LDPCSRC
)
add_library(coding MODULE ${PHY_TURBOSRC} )
set(PHY_SRC_COMMON
# depend on code generation from asn1c
${RRC_FULL_DIR}/asn_constant.h
# actual source
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/dci_tools_common.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/lte_mcs.c
# ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/slss.c
......@@ -1212,7 +1183,6 @@ set(PHY_SRC_COMMON
)
set(PHY_SRC
# actual source
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/pss.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/sss.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/sss_gen.c
......@@ -1240,7 +1210,6 @@ set(PHY_SRC
)
set(PHY_SRC_RU
# actual source
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/if4_tools.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/if5_tools.c
${OPENAIR1_DIR}/PHY/MODULATION/slot_fep_ul.c
......@@ -1255,7 +1224,6 @@ set(PHY_SRC_RU
)
set(PHY_SRC_UE
# actual source
${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/sss_ue.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/sss_gen.c
${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c
......@@ -1297,9 +1265,6 @@ set(PHY_SRC_UE
)
set(PHY_NR_SRC
# depend on code generation from asn1c
${RRC_FULL_DIR}/asn_constant.h
# actual source
${OPENAIR1_DIR}/PHY/INIT/nr_init.c
${OPENAIR1_DIR}/PHY/INIT/nr_parms.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_pss.c
......@@ -1330,9 +1295,6 @@ set(PHY_SRC_UE
)
set(PHY_NR_UE_SRC
# depend on code generation from asn1c
${RRC_FULL_DIR}/asn_constant.h
# actual source
${OPENAIR1_DIR}/PHY/MODULATION/slot_fep_nr.c
${OPENAIR1_DIR}/PHY/INIT/nr_parms.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/pss_nr.c
......@@ -1390,11 +1352,15 @@ if (${COMPILATION_AVX2} STREQUAL "True")
endif ()
add_library(PHY_COMMON ${PHY_SRC_COMMON})
add_dependencies(PHY_COMMON rrc_flag)
add_library(PHY ${PHY_SRC})
add_dependencies(PHY rrc_flag)
add_library(PHY_UE ${PHY_SRC_UE})
add_dependencies(PHY_UE rrc_flag)
add_library(PHY_NR ${PHY_NR_SRC})
add_library(PHY_NR_UE ${PHY_NR_UE_SRC})
add_library(PHY_RU ${PHY_SRC_RU})
add_dependencies(PHY_RU rrc_flag)
#Library for mex functions
#########################3
......@@ -1608,7 +1574,7 @@ add_library(L2
${MAC_SRC}
${ENB_APP_SRC}
)
add_dependencies(L2 rrc_flag s1ap_flag x2_flag)
add_library(MAC_NR
${MAC_NR_SRC}
)
......@@ -1622,12 +1588,18 @@ add_library(L2_NR
${MAC_NR_SRC}
${GNB_APP_SRC}
)
add_dependencies(S1AP_LIB nr_rrc_flag s1ap_flag)
add_library(L2_UE
${L2_SRC_UE}
${MAC_SRC_UE}
#${MAC_NR_SRC_UE}
)
if (NOT ${NOS1})
target_compile_definitions(L2_UE PUBLIC -DPDCP_USE_NETLINK)
endif()
add_dependencies(L2_UE rrc_flag s1ap_flag x2_flag)
add_library( NR_L2_UE
#${L2_SRC_UE}
......@@ -1696,6 +1668,7 @@ set (GTPV1U_SRC
${GTPV1U_DIR}/gtpv1u_teid_pool.c
)
add_library(GTPV1U ${GTPV1U_SRC})
add_dependencies(GTPV1U rrc_flag)
set(SCTP_SRC
${OPENAIR3_DIR}/SCTP/sctp_common.c
......@@ -1703,8 +1676,10 @@ set(SCTP_SRC
${OPENAIR3_DIR}/SCTP/sctp_eNB_itti_messaging.c
)
add_library(SCTP_CLIENT ${SCTP_SRC})
add_dependencies(SCTP_CLIENT rrc_flag)
add_library(UDP ${OPENAIR3_DIR}/UDP/udp_eNB_task.c)
add_dependencies(UDP rrc_flag)
set(NAS_SRC ${OPENAIR3_DIR}/NAS/)
......@@ -1953,6 +1928,7 @@ if(NAS_UE)
${libnas_ue_esm_OBJS}
${libnas_ue_esm_sap_OBJS}
)
add_dependencies(LIB_NAS_UE rrc_flag)
set(NAS_UE_LIB LIB_NAS_UE)
include_directories(${NAS_SRC}UE)
......@@ -2213,8 +2189,6 @@ add_definitions(-DASN1_MINIMUM_VERSION=924)
###################################################
add_executable(lte-softmodem
${rrc_h}
${s1ap_h}
${OPENAIR_TARGETS}/RT/USER/rt_wrapper.c
${OPENAIR_TARGETS}/RT/USER/lte-enb.c
${OPENAIR_TARGETS}/RT/USER/lte-ru.c
......@@ -2236,6 +2210,7 @@ add_executable(lte-softmodem
${CONFIG_SOURCES}
${SHLIB_LOADER_SOURCES}
)
add_dependencies(lte-softmodem rrc_flag s1ap_flag x2_flag)
target_link_libraries (lte-softmodem
-Wl,--start-group
......@@ -2252,8 +2227,6 @@ target_link_libraries (lte-softmodem ${T_LIB})
# lte-softmodem-nos1 is both eNB and UE implementation
###################################################
add_executable(lte-softmodem-nos1
${rrc_h}
${s1ap_h}
${OPENAIR_TARGETS}/RT/USER/rt_wrapper.c
${OPENAIR_TARGETS}/RT/USER/lte-enb.c
${OPENAIR_TARGETS}/RT/USER/lte-ru.c
......@@ -2290,8 +2263,6 @@ target_link_libraries (lte-softmodem-nos1 ${T_LIB})
#######################################
add_executable(lte-uesoftmodem
${rrc_h}
${s1ap_h}
${OPENAIR_TARGETS}/RT/USER/rt_wrapper.c
${OPENAIR_TARGETS}/RT/USER/lte-ue.c
${OPENAIR_TARGETS}/RT/USER/lte-uesoftmodem.c
......@@ -2313,6 +2284,10 @@ add_executable(lte-uesoftmodem
${SHLIB_LOADER_SOURCES}
)
add_dependencies(lte-uesoftmodem rrc_flag s1ap_flag x2_flag)
if (NOT ${NOS1})
target_compile_definitions(lte-uesoftmodem PRIVATE -DPDCP_USE_NETLINK)
endif()
target_link_libraries (lte-uesoftmodem
-Wl,--start-group
RRC_LIB SECU_CN SECU_OSA UTIL HASHTABLE SCTP_CLIENT UDP SCHED_RU_LIB SCHED_UE_LIB PHY_COMMON PHY_UE PHY_RU LFDS L2_UE SIMU
......@@ -2328,8 +2303,6 @@ target_link_libraries (lte-uesoftmodem ${T_LIB})
# lte-uesoftmodem-nos1 is UE implementation
###################################################
add_executable(lte-uesoftmodem-nos1
${rrc_h}
${s1ap_h}
${OPENAIR_TARGETS}/RT/USER/rt_wrapper.c
${OPENAIR_TARGETS}/RT/USER/lte-ue.c
${OPENAIR_TARGETS}/RT/USER/lte-uesoftmodem.c
......@@ -2352,6 +2325,7 @@ add_executable(lte-uesoftmodem-nos1
${SHLIB_LOADER_SOURCES}
)
add_dependencies(lte-uesoftmodem-nos1 rrc_flag s1ap_flag x2_flag)
target_link_libraries (lte-uesoftmodem-nos1
-Wl,--start-group
RRC_LIB SECU_CN SECU_OSA UTIL HASHTABLE SCHED_RU_LIB SCHED_UE_LIB PHY_COMMON PHY_UE PHY_RU LFDS L2_UE SIMU ${RAL_LIB} ${ITTI_LIB}
......@@ -2555,33 +2529,46 @@ target_link_libraries (dlsim_tm4
pthread m rt ${CONFIG_LIBRARIES} ${ATLAS_LIBRARIES} ${XFORMS_LIBRARIES} ${T_LIB}
)
add_executable(polartest ${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/polartest.c)
add_executable(polartest
${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/polartest.c
${OPENAIR_DIR}/common/utils/backtrace.c)
target_link_libraries(polartest SIMU PHY PHY_NR PHY_COMMON m ${ATLAS_LIBRARIES})
add_executable(ldpctest ${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/ldpctest.c)
add_executable(ldpctest
${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/ldpctest.c
${OPENAIR_DIR}/common/utils/backtrace.c)
target_link_libraries(ldpctest SIMU PHY PHY_NR m ${ATLAS_LIBRARIES})
add_executable(nr_dlschsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/dlschsim.c ${T_SOURCE})
add_executable(nr_dlschsim
${OPENAIR1_DIR}/SIMULATION/NR_PHY/dlschsim.c
${OPENAIR_DIR}/common/utils/backtrace.c
${T_SOURCE})
target_link_libraries(nr_dlschsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
add_executable(nr_pbchsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/pbchsim.c ${T_SOURCE})
add_executable(nr_pbchsim
${OPENAIR1_DIR}/SIMULATION/NR_PHY/pbchsim.c
${OPENAIR_DIR}/common/utils/backtrace.c
${T_SOURCE})
target_link_libraries(nr_pbchsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
add_executable(nr_dlsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/dlsim.c ${T_SOURCE})
add_executable(nr_dlsim
${OPENAIR1_DIR}/SIMULATION/NR_PHY/dlsim.c
${OPENAIR_DIR}/common/utils/backtrace.c
${T_SOURCE})
target_link_libraries(nr_dlsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_NR MAC_UE_NR RRC_LIB NR_RRC_LIB CONFIG_LIB L2_NR -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
foreach(myExe dlsim dlsim_tm7 ulsim pbchsim scansim mbmssim pdcchsim pucchsim prachsim syncsim)
add_executable(${myExe}
${OPENAIR1_DIR}/SIMULATION/LTE_PHY/${myExe}.c
${OPENAIR_DIR}/common/utils/backtrace.c
${XFORMS_SOURCE}
${T_SOURCE}
${CONFIG_SOURCES}
${SHLIB_LOADER_SOURCES}
)
target_link_libraries (${myExe}
-Wl,--start-group SIMU UTIL SCHED_LIB SCHED_RU_LIB SCHED_UE_LIB PHY_COMMON PHY PHY_UE PHY_RU LFDS ${ITTI_LIB} LFDS7 -Wl,--end-group
pthread m rt ${CONFIG_LIBRARIES} ${ATLAS_LIBRARIES} ${XFORMS_LIBRARIES} ${T_LIB} dl
)
......@@ -2767,7 +2754,7 @@ endfunction(make_driver name dir src)
# nashmesh module
################
list(APPEND nasmesh_src device.c common.c ioctl.c classifier.c tool.c mesh.c)
set(module_cc_opt "${module_cc_opt} -DNAS_NETLINK -DPDCP_USE_NETLINK")
set(module_cc_opt "${module_cc_opt} -DNAS_NETLINK -DPDCP_USE_NETLINK -D${MKVER}")
# legacy Makefile was using NAS_NETLINK flag, but other drivers the hereafter flag
# so, this cmake use OAI_NW_DRIVER_USE_NETLINK everywhere
if (OAI_NW_DRIVER_USE_NETLINK)
......
......@@ -43,10 +43,10 @@ conf_nvram_path=$OPENAIR_DIR/openair3/NAS/TOOLS/ue_eurecom_test_sfr.conf
MSC_GEN=0
XFORMS="True"
UE_EXPANSION="False"
UESIM_EXPANSION="False"
PRINT_STATS="False"
VCD_TIMING="False"
DEADLINE_SCHEDULER_FLAG_USER="False"
FORCE_DEADLINE_SCHEDULER_FLAG_USER=""
DEADLINE_SCHEDULER_FLAG_USER=""
CPU_AFFINITY_FLAG_USER="False" #Only valid when lowlatecy flag is set to False
REL="Rel15"
NR_REL="NR_Rel15"
......@@ -78,7 +78,7 @@ trap handle_ctrl_c INT
function print_help() {
echo_info "
This program installs OpenAirInterface Software
You should have ubuntu 14.xx, updated, and the Linux kernel >= 3.14
You should have ubuntu 16.xx or 18.04 updated
Options
-h
This help
......@@ -116,7 +116,7 @@ Options
Rel8 limits the implementation to 3GPP Release 8 version
Rel10 limits the implementation to 3GPP Release 10 version
-w | --hardware
EXMIMO, USRP, BLADERF, ETHERNET, LMSSDR, ADRV9371_ZC706, None (Default)
EXMIMO, USRP, BLADERF, ETHERNET, LMSSDR, ADRV9371_ZC706, SIMU, None (Default)
Adds this RF board support (in external packages installation and in compilation)
-t | --transport protocol
ETHERNET , None
......@@ -175,6 +175,9 @@ Options
--basic-simulator
Generates a basic [1 UE + 1 eNB + no channel] simulator.
See targets/ARCH/tcp_bridge/README.tcp_bridge_oai for documentation.
--rfsimulator
Generate virtual RF driver
to use it, set the environement variable RFSIMULATOR to \"enb\" in the eNB and to the eNB IP address in the UEs
Usage (first build):
NI/ETTUS B201 + COTS UE : ./build_oai -I --eNB -x --install-system-files -w USRP
Usage (Regular):
......@@ -250,7 +253,7 @@ function main() {
-w | --hardware)
HW="$2" #"${i#*=}"
# Use OAI_USRP as the key word USRP is used inside UHD driver
if [ "$HW" != "BLADERF" -a "$HW" != "USRP" -a "$HW" != "LMSSDR" -a "$HW" != "None" -a "$HW" != "EXMIMO" -a "$HW" != "ADRV9371_ZC706" ] ; then
if [ "$HW" != "BLADERF" -a "$HW" != "USRP" -a "$HW" != "LMSSDR" -a "$HW" != "None" -a "$HW" != "EXMIMO" -a "$HW" != "ADRV9371_ZC706" -a "$HW" != "SIMU" ] ; then
echo_fatal "Unknown HW type $HW will exit..."
else
if [ "$HW" == "USRP" ] ; then
......@@ -265,6 +268,9 @@ function main() {
if [ "$HW" == "LMSSDR" ] ; then
HW="OAI_LMSSDR"
fi
if [ "$HW" == "SIMU" ] ; then
HW="OAI_SIMU"
fi
echo_info "Setting hardware to: $HW"
fi
shift 2;;
......@@ -331,13 +337,13 @@ function main() {
BUILD_DOXYGEN=1
echo_info "Will build doxygen support"
shift;;
--disable-deadline)
FORCE_DEADLINE_SCHEDULER_FLAG_USER="False"
echo_info "Disabling the usage of deadline scheduler"
shift 1;;
--enable-deadline)
FORCE_DEADLINE_SCHEDULER_FLAG_USER="True"
echo_info "Enabling the usage of deadline scheduler"
--disable-deadline)
DEADLINE_SCHEDULER_FLAG_USER="False"
echo_info "Disabling the usage of deadline scheduler"
shift 1;;
--enable-deadline)
DEADLINE_SCHEDULER_FLAG_USER="True"
echo_info "Enabling the usage of deadline scheduler"
shift 1;;
--enable-cpu-affinity)
CPU_AFFINITY_FLAG_USER="True"
......@@ -400,7 +406,11 @@ function main() {
BASIC_SIMULATOR=1
echo_info "Compiling the basic simulator"
shift 1;;
-h | --help)
--rfsimulator)
RFSIMULATOR=true
echo_info "Compiling the RF simulator"
shift 1;;
-h | --help)
print_help
exit 1;;
*)
......@@ -441,33 +451,18 @@ function main() {
fi
fi
echo_info "RF HW set to $HW"
#Now we set flags to enable deadline scheduler settings
#By default: USRP: disable,
#By default: BLADERF: enable,
#By default: EXMIMO: enable
if [ "$FORCE_DEADLINE_SCHEDULER_FLAG_USER" = "" ]; then
if [ "$HW" = "EXMIMO" ] ; then
DEADLINE_SCHEDULER_FLAG_USER="True"
elif [ "$HW" = "ETHERNET" ] ; then
DEADLINE_SCHEDULER_FLAG_USER="False"
elif [ "$HW" = "OAI_USRP" ] ; then
DEADLINE_SCHEDULER_FLAG_USER="False"
elif [ "$HW" = "OAI_ADRV9371_ZC706" ] ; then
DEADLINE_SCHEDULER_FLAG_USER="False"
elif [ "$HW" = "OAI_BLADERF" ] ; then
DEADLINE_SCHEDULER_FLAG_USER="False"
elif [ "$HW" = "OAI_LMSSDR" ] ; then
DEADLINE_SCHEDULER_FLAG_USER="False"
elif [ "$HW" = "None" ] ; then
DEADLINE_SCHEDULER_FLAG_USER="False"
else
echo_error "Unknown HW type $HW. Exiting now..."
exit
fi
else
DEADLINE_SCHEDULER_FLAG_USER=$FORCE_DEADLINE_SCHEDULER_FLAG_USER
fi
echo_info "RF HW set to $HW"
# If the user doesn't specify the Linux scheduler to use, we set a value
if [ "$DEADLINE_SCHEDULER_FLAG_USER" = "" ]; then
case "$HW" in
"EXMIMO")
DEADLINE_SCHEDULER_FLAG_USER="True"
;;
*)
DEADLINE_SCHEDULER_FLAG_USER="False"
;;
esac
fi
#Disable CPU Affinity for deadline scheduler
if [ "$DEADLINE_SCHEDULER_FLAG_USER" = "True" ] ; then
......
#!/bin/bash
GENERATED_FULL_DIR=$1
shift
ASN1_SOURCE_DIR=$1
shift
export ASN1C_PREFIX=$1
shift
options=$*
done_flag="$GENERATED_FULL_DIR"/done
if [ "$done_flag" -ot $ASN1_SOURCE_DIR ] ; then
rm -f "$GENERATED_FULL_DIR"/${ASN1C_PREFIX}*.c "$GENERATED_FULL_DIR"/${ASN1C_PREFIX}*.h
mkdir -p "$GENERATED_FULL_DIR"
asn1c -pdu=all -fcompound-names -gen-PER -no-gen-OER -no-gen-example $options -D $GENERATED_FULL_DIR $ASN1_SOURCE_DIR |& egrep -v "^Copied|^Compiled" | sort -u
fi
touch $done_flag
......@@ -23,9 +23,16 @@
#ifndef BACKTRACE_H_
#define BACKTRACE_H_
#ifdef __cplusplus
extern "C" {
#endif
void display_backtrace(void);
void backtrace_handle_signal(siginfo_t *info);
#ifdef __cplusplus
}
#endif
#endif /* BACKTRACE_H_ */
......@@ -919,7 +919,7 @@ void init_nr_ue_transport(PHY_VARS_NR_UE *ue,int abstraction_flag) {
for (i=0; i<NUMBER_OF_CONNECTED_eNB_MAX; i++) {
for (j=0; j<2; j++) {
for (k=0; k<2; k++) {
for (k=0; k<RX_NB_TH_MAX; k++) {
AssertFatal((ue->dlsch[k][i][j] = new_nr_ue_dlsch(1,NUMBER_OF_HARQ_PID_MAX,NSOFT,MAX_LDPC_ITERATIONS,ue->frame_parms.N_RB_DL, abstraction_flag))!=NULL,"Can't get ue dlsch structures\n");
LOG_D(PHY,"dlsch[%d][%d][%d] => %p\n",k,i,j,ue->dlsch[i][j]);
......
......@@ -421,6 +421,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> c_rb=%d\n",c_rb);
#endif
rxF=NULL;
// first we set initial conditions for pointer to rxdataF depending on the situation of the first RB within the CORESET (c_rb = n_BWP_start)
if ((c_rb < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) {
//if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): even case
......
......@@ -516,7 +516,8 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
p_nrLDPC_procBuf[r],
p_procTime);
if (check_crc(llrProcBuf,harq_process->B,harq_process->F,crc_type)) {
// Fixme: correct type is unsigned, but nrLDPC_decoder and all called behind use signed int
if (check_crc((uint8_t*)llrProcBuf,harq_process->B,harq_process->F,crc_type)) {
printf("CRC OK\n");
ret = 2;
}
......
......@@ -1350,7 +1350,7 @@ void nr_dlsch_channel_compensation(int **rxdataF_ext,
unsigned char aatx,aarx,pilots=0;
__m128i *dl_ch128,*dl_ch128_2,*dl_ch_mag128,*dl_ch_mag128b,*rxdataF128,*rxdataF_comp128,*rho128;
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3,QAM_amp128,QAM_amp128b;
QAM_amp128b = _mm_setzero_si128();
if (symbol == 2){
pilots=1;
......
......@@ -266,123 +266,33 @@ void nr_pbch_channel_compensation(int **rxdataF_ext,
int **rxdataF_comp,
NR_DL_FRAME_PARMS *frame_parms,
uint32_t symbol,
uint8_t output_shift)
{
short conjugate[8]__attribute__((aligned(16))) = {-1,1,-1,1,-1,1,-1,1};
//short conjugate2[8]__attribute__((aligned(16))) = {1,-1,1,-1,1,-1,1,-1};
#if defined(__x86_64__) || defined(__i386__)
__m128i mmtmpP0,mmtmpP1,mmtmpP2,mmtmpP3;
#elif defined(__arm__)
int16x8_t mmtmpP0,mmtmpP1,mmtmpP2,mmtmpP3;
#endif
uint16_t nb_re=180;
uint8_t aarx;
#if defined(__x86_64__) || defined(__i386__)
__m128i *dl_ch128,*rxdataF128,*rxdataF_comp128;
#elif defined(__arm__)
#endif
uint8_t output_shift) {
const uint16_t nb_re=symbol == 2 ? 72 : 180;
AssertFatal((symbol > 0 && symbol < 4),
"symbol %d is illegal for PBCH DM-RS\n",
symbol);
if (symbol == 2) nb_re = 72;
// printf("comp: symbol %d : nb_re %d\n",symbol,nb_re);
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
for (int aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
#if defined(__x86_64__) || defined(__i386__)
dl_ch128 = (__m128i *)&dl_ch_estimates_ext[aarx][symbol*20*12];
rxdataF128 = (__m128i *)&rxdataF_ext[aarx][symbol*20*12];
rxdataF_comp128 = (__m128i *)&rxdataF_comp[aarx][symbol*20*12];
vect128 *dl_ch128 = (vect128 *)&dl_ch_estimates_ext[aarx][symbol*20*12];
vect128 *rxdataF128 = (vect128 *)&rxdataF_ext[aarx][symbol*20*12];
vect128 *rxdataF_comp128 = (vect128 *)&rxdataF_comp[aarx][symbol*20*12];
/*
printf("ch compensation dl_ch ext addr %p \n", &dl_ch_estimates_ext[aarx][symbol*20*12]);
printf("rxdataf ext addr %p symbol %d\n", &rxdataF_ext[aarx][symbol*20*12], symbol);
printf("rxdataf_comp addr %p\n",&rxdataF_comp[aarx][symbol*20*12]);
*/
#elif defined(__arm__)
// to be filled in
#endif
for (int re=0; re<nb_re; re+=12) {
// printf("******re %d\n",re);
#if defined(__x86_64__) || defined(__i386__)
// multiply by conjugated channel
mmtmpP0 = _mm_madd_epi16(dl_ch128[0],rxdataF128[0]);
// print_ints("re",&mmtmpP0);
// mmtmpP0 contains real part of 4 consecutive outputs (32-bit)
mmtmpP1 = _mm_shufflelo_epi16(dl_ch128[0],_MM_SHUFFLE(2,3,0,1));
mmtmpP1 = _mm_shufflehi_epi16(mmtmpP1,_MM_SHUFFLE(2,3,0,1));
mmtmpP1 = _mm_sign_epi16(mmtmpP1,*(__m128i*)&conjugate[0]);
// print_ints("im",&mmtmpP1);
mmtmpP1 = _mm_madd_epi16(mmtmpP1,rxdataF128[0]);
// mmtmpP1 contains imag part of 4 consecutive outputs (32-bit)
mmtmpP0 = _mm_srai_epi32(mmtmpP0,output_shift);
// print_ints("re(shift)",&mmtmpP0);
mmtmpP1 = _mm_srai_epi32(mmtmpP1,output_shift);
// print_ints("im(shift)",&mmtmpP1);
mmtmpP2 = _mm_unpacklo_epi32(mmtmpP0,mmtmpP1);
mmtmpP3 = _mm_unpackhi_epi32(mmtmpP0,mmtmpP1);
// print_ints("c0",&mmtmpP2);
// print_ints("c1",&mmtmpP3);
rxdataF_comp128[0] = _mm_packs_epi32(mmtmpP2,mmtmpP3);
/*
print_shorts("rx:",rxdataF128);
print_shorts("ch:",dl_ch128);
print_shorts("pack:",rxdataF_comp128);
*/
// multiply by conjugated channel
mmtmpP0 = _mm_madd_epi16(dl_ch128[1],rxdataF128[1]);
// mmtmpP0 contains real part of 4 consecutive outputs (32-bit)
mmtmpP1 = _mm_shufflelo_epi16(dl_ch128[1],_MM_SHUFFLE(2,3,0,1));
mmtmpP1 = _mm_shufflehi_epi16(mmtmpP1,_MM_SHUFFLE(2,3,0,1));
mmtmpP1 = _mm_sign_epi16(mmtmpP1,*(__m128i*)&conjugate[0]);
mmtmpP1 = _mm_madd_epi16(mmtmpP1,rxdataF128[1]);
// mmtmpP1 contains imag part of 4 consecutive outputs (32-bit)
mmtmpP0 = _mm_srai_epi32(mmtmpP0,output_shift);
mmtmpP1 = _mm_srai_epi32(mmtmpP1,output_shift);
mmtmpP2 = _mm_unpacklo_epi32(mmtmpP0,mmtmpP1);
mmtmpP3 = _mm_unpackhi_epi32(mmtmpP0,mmtmpP1);
rxdataF_comp128[1] = _mm_packs_epi32(mmtmpP2,mmtmpP3);
// print_shorts("rx:",rxdataF128+1);
// print_shorts("ch:",dl_ch128+1);
// print_shorts("pack:",rxdataF_comp128+1);
// multiply by conjugated channel
mmtmpP0 = _mm_madd_epi16(dl_ch128[2],rxdataF128[2]);
// mmtmpP0 contains real part of 4 consecutive outputs (32-bit)
mmtmpP1 = _mm_shufflelo_epi16(dl_ch128[2],_MM_SHUFFLE(2,3,0,1));
mmtmpP1 = _mm_shufflehi_epi16(mmtmpP1,_MM_SHUFFLE(2,3,0,1));
mmtmpP1 = _mm_sign_epi16(mmtmpP1,*(__m128i*)&conjugate[0]);
mmtmpP1 = _mm_madd_epi16(mmtmpP1,rxdataF128[2]);
// mmtmpP1 contains imag part of 4 consecutive outputs (32-bit)
mmtmpP0 = _mm_srai_epi32(mmtmpP0,output_shift);
mmtmpP1 = _mm_srai_epi32(mmtmpP1,output_shift);
mmtmpP2 = _mm_unpacklo_epi32(mmtmpP0,mmtmpP1);
mmtmpP3 = _mm_unpackhi_epi32(mmtmpP0,mmtmpP1);
rxdataF_comp128[2] = _mm_packs_epi32(mmtmpP2,mmtmpP3);
// print_shorts("rx:",rxdataF128+2);
// print_shorts("ch:",dl_ch128+2);
// print_shorts("pack:",rxdataF_comp128+2);
dl_ch128+=3;
rxdataF128+=3;
rxdataF_comp128+=3;
#elif defined(__arm__)
// to be filled in
#endif
*rxdataF_comp128++ = mulByConjugate128(rxdataF128++, dl_ch128++, output_shift);
*rxdataF_comp128++ = mulByConjugate128(rxdataF128++, dl_ch128++, output_shift);
*rxdataF_comp128++ = mulByConjugate128(rxdataF128++, dl_ch128++, output_shift);
}
}
#if defined(__x86_64__) || defined(__i386__)
_mm_empty();
_m_empty();
#endif
}
void nr_pbch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
......
......@@ -577,7 +577,7 @@ int32_t generate_nr_prach( PHY_VARS_NR_UE *ue, uint8_t eNB_id, uint8_t subframe,
uint8_t preamble_index = ue->prach_resources[eNB_id]->ra_PreambleIndex;
//uint8_t tdd_mapindex = ue->prach_resources[eNB_id]->ra_TDD_map_index;
int16_t *prachF = ue->prach_vars[eNB_id]->prachF;
static int16_t prach_tmp[45600*2] __attribute__((aligned(32)));
static int16_t prach_tmp[45600*4] __attribute__((aligned(32)));
int16_t *prach = prach_tmp;
int16_t *prach2;
int16_t amp = ue->prach_vars[eNB_id]->amp;
......
......@@ -116,7 +116,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
* Where base sequence r_u_v(n)=exp[j*phi(n)*pi/4] 0<=n<=M_ZC-1 and M_ZC={6,12,18,24}
* For M_ZC=30, base sequence r_u_v(n)=exp[-j((pi*[u+1]*[n+1]*[n+2])/31)]
*/
int16_t table_5_2_2_2_1_Re[30][6]={ // Table 5.2.2.2-1 (Re part) TS 38.211 Subclause 5.2.2.2 Base sequences of length less than 36 (M_ZC=6)
static const int16_t table_5_2_2_2_1_Re[30][6]={ // Table 5.2.2.2-1 (Re part) TS 38.211 Subclause 5.2.2.2 Base sequences of length less than 36 (M_ZC=6)
{-23170, 23170,-23170,-23170, 23170,-23170},
{-23170,-23170, 23170, 23170,-23170,-23170},
{-23170,-23170,-23170,-23170, 23170,-23170},
......@@ -148,7 +148,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
{ 23170, 23170, 23170,-23170,-23170, 23170},
{ 23170, 23170,-23170, 23170, 23170, 23170}
};
int16_t table_5_2_2_2_1_Im[30][6]={ // Table 5.2.2.2-1 (Im part) TS 38.211 Subclause 5.2.2.2 Base sequences of length less than 36 (M_ZC=6)
static const int16_t table_5_2_2_2_1_Im[30][6]={ // Table 5.2.2.2-1 (Im part) TS 38.211 Subclause 5.2.2.2 Base sequences of length less than 36 (M_ZC=6)
{-23170,-23170, 23170, 23170,-23170,-23170},
{-23170, 23170,-23170,-23170, 23170,-23170},
{-23170,-23170,-23170, 23170, 23170,-23170},
......@@ -180,7 +180,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
{ 23170, 23170,-23170, 23170,-23170,-23170},
{ 23170, 23170,-23170, 23170,-23170,-23170}
};
int16_t table_5_2_2_2_2_Re[30][12]={ // Table 5.2.2.2-2 (Re part) TS 38.211 Subclause 5.2.2.2 Base sequences of length less than 36 (M_ZC=12)
static const int16_t table_5_2_2_2_2_Re[30][12]={ // Table 5.2.2.2-2 (Re part) TS 38.211 Subclause 5.2.2.2 Base sequences of length less than 36 (M_ZC=12)
{-23170, 23170,-23170,-23170,-23170,-23170,-23170, 23170, 23170, 23170, 23170,-23170},
{-23170,-23170, 23170,-23170, 23170,-23170, 23170, 23170, 23170,-23170,-23170,-23170},
{-23170,-23170,-23170, 23170,-23170,-23170, 23170, 23170,-23170,-23170,-23170,-23170},
......@@ -212,7 +212,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
{ 23170, 23170,-23170, 23170, 23170, 23170, 23170, 23170, 23170,-23170,-23170, 23170},
{-23170,-23170,-23170,-23170,-23170,-23170,-23170, 23170, 23170, 23170,-23170,-23170}
};
int16_t table_5_2_2_2_2_Im[30][12]={ // Table 5.2.2.2-2 (Im part) TS 38.211 Subclause 5.2.2.2 Base sequences of length less than 36 (M_ZC=12)
static const int16_t table_5_2_2_2_2_Im[30][12]={ // Table 5.2.2.2-2 (Im part) TS 38.211 Subclause 5.2.2.2 Base sequences of length less than 36 (M_ZC=12)
{-23170, 23170,-23170,-23170,-23170, 23170,-23170,-23170, 23170, 23170, 23170,-23170},
{-23170, 23170, 23170,-23170, 23170, 23170,-23170,-23170, 23170, 23170, 23170, 23170},
{-23170, 23170, 23170, 23170,-23170, 23170,-23170, 23170, 23170,-23170, 23170,-23170},
......@@ -244,7 +244,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
{ 23170,-23170, 23170, 23170, 23170,-23170,-23170,-23170, 23170, 23170,-23170, 23170},
{-23170, 23170,-23170, 23170,-23170,-23170, 23170,-23170,-23170, 23170, 23170,-23170}
};
int16_t table_5_2_2_2_3_Re[30][18]={ // Table 5.2.2.2-3 (Re part) TS 38.211 Subclause 5.2.2.2 Base sequences of length less than 36 (M_ZC=18)
static const int16_t table_5_2_2_2_3_Re[30][18]={ // Table 5.2.2.2-3 (Re part) TS 38.211 Subclause 5.2.2.2 Base sequences of length less than 36 (M_ZC=18)
{ 23170,-23170, 23170,-23170,-23170, 23170,-23170, 23170,-23170,-23170, 23170, 23170, 23170, 23170, 23170, 23170, 23170, 23170},
{-23170,-23170,-23170, 23170, 23170,-23170,-23170, 23170,-23170,-23170, 23170,-23170,-23170, 23170, 23170,-23170,-23170,-23170},
{-23170,-23170, 23170, 23170, 23170,-23170,-23170, 23170, 23170, 23170, 23170, 23170, 23170, 23170,-23170, 23170,-23170, 23170},
......@@ -276,7 +276,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
{ 23170,-23170, 23170,-23170,-23170,-23170, 23170, 23170,-23170,-23170,-23170,-23170,-23170,-23170, 23170,-23170,-23170, 23170},
{-23170,-23170, 23170, 23170, 23170, 23170, 23170, 23170, 23170,-23170,-23170,-23170, 23170, 23170,-23170, 23170,-23170, 23170}
};
int16_t table_5_2_2_2_3_Im[30][18]={ // Table 5.2.2.2-3 (Im part) TS 38.211 Subclause 5.2.2.2 Base sequences of length less than 36 (M_ZC=18)
static const int16_t table_5_2_2_2_3_Im[30][18]={ // Table 5.2.2.2-3 (Im part) TS 38.211 Subclause 5.2.2.2 Base sequences of length less than 36 (M_ZC=18)
{-23170, 23170,-23170,-23170, 23170, 23170,-23170,-23170, 23170,-23170,-23170,-23170, 23170, 23170, 23170,-23170,-23170,-23170},
{ 23170,-23170, 23170,-23170, 23170, 23170,-23170,-23170,-23170,-23170,-23170,-23170, 23170, 23170,-23170, 23170,-23170, 23170},
{-23170, 23170, 23170,-23170,-23170, 23170,-23170,-23170, 23170, 23170, 23170, 23170, 23170,-23170, 23170,-23170,-23170,-23170},
......@@ -308,7 +308,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
{-23170,-23170, 23170,-23170,-23170,-23170, 23170, 23170, 23170, 23170,-23170, 23170, 23170,-23170,-23170, 23170,-23170, 23170},
{-23170, 23170, 23170,-23170,-23170,-23170,-23170, 23170,-23170, 23170, 23170,-23170,-23170, 23170, 23170,-23170, 23170,-23170}
};
int16_t table_5_2_2_2_4_Re[30][24]={ // Table 5.2.2.2-4 (Re part) TS 38.211 Subclause 5.2.2.2 Base sequences of length less than 36 (M_ZC=24)
static const int16_t table_5_2_2_2_4_Re[30][24]={ // Table 5.2.2.2-4 (Re part) TS 38.211 Subclause 5.2.2.2 Base sequences of length less than 36 (M_ZC=24)
{ 23170,-23170,-23170, 23170,-23170, 23170,-23170, 23170, 23170,-23170, 23170,-23170, 23170, 23170,-23170,-23170, 23170,-23170,-23170,-23170,-23170,-23170,-23170,-23170},
{ 23170,-23170,-23170, 23170, 23170,-23170, 23170,-23170,-23170, 23170,-23170, 23170, 23170,-23170,-23170,-23170,-23170,-23170,-23170, 23170,-23170,-23170,-23170,-23170},
{ 23170,-23170,-23170, 23170, 23170, 23170,-23170, 23170,-23170, 23170,-23170, 23170, 23170,-23170, 23170, 23170,-23170, 23170,-23170, 23170, 23170,-23170,-23170,-23170},
......@@ -340,7 +340,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
{-23170, 23170,-23170, 23170,-23170, 23170, 23170,-23170, 23170,-23170,-23170, 23170, 23170,-23170, 23170,-23170,-23170, 23170, 23170,-23170,-23170,-23170,-23170,-23170},
{-23170,-23170, 23170, 23170,-23170, 23170, 23170,-23170, 23170,-23170, 23170,-23170, 23170,-23170,-23170, 23170,-23170, 23170, 23170,-23170,-23170,-23170,-23170,-23170}
};
int16_t table_5_2_2_2_4_Im[30][24]={ // Table 5.2.2.2-4 (Im part) TS 38.211 Subclause 5.2.2.2 Base sequences of length less than 36 (M_ZC=24)
static const int16_t table_5_2_2_2_4_Im[30][24]={ // Table 5.2.2.2-4 (Im part) TS 38.211 Subclause 5.2.2.2 Base sequences of length less than 36 (M_ZC=24)
{-23170,-23170, 23170,-23170, 23170, 23170, 23170,-23170, 23170,-23170,-23170,-23170,-23170, 23170, 23170,-23170,-23170,-23170, 23170, 23170, 23170,-23170,-23170,-23170},
{-23170,-23170, 23170, 23170, 23170,-23170, 23170,-23170,-23170, 23170,-23170,-23170,-23170, 23170,-23170, 23170, 23170, 23170,-23170, 23170, 23170, 23170,-23170,-23170},
{-23170,-23170,-23170, 23170,-23170,-23170,-23170, 23170, 23170,-23170,-23170,-23170,-23170,-23170, 23170, 23170, 23170, 23170,-23170,-23170,-23170, 23170,-23170,-23170},
......@@ -378,17 +378,17 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
* One table for no intra-slot hopping
* Two tables for intra-slot hopping (mprime=0 and mprime=1)
*/
uint8_t table_6_3_2_4_1_1_N_SF_mprime_PUCCH_1_noHop[14] = {0,0,0,2,2,3,3,4,4,5,5,6,6,7}; // for index PUCCH-length, we obtain N_SF_mprime_PUCCH_1 when no intra-slot hopping
uint8_t table_6_3_2_4_1_1_N_SF_mprime_PUCCH_1_m0Hop[14] = {0,0,0,1,1,1,1,2,2,2,2,3,3,3}; // for index PUCCH-length, we obtain N_SF_mprime_PUCCH_1 when intra-slot hopping and mprime=0
uint8_t table_6_3_2_4_1_1_N_SF_mprime_PUCCH_1_m1Hop[14] = {0,0,0,1,1,2,2,2,2,3,3,3,3,4}; // for index PUCCH-length, we obtain N_SF_mprime_PUCCH_1 when intra-slot hopping and mprime=1
static const uint8_t table_6_3_2_4_1_1_N_SF_mprime_PUCCH_1_noHop[14] = {0,0,0,2,2,3,3,4,4,5,5,6,6,7}; // for index PUCCH-length, we obtain N_SF_mprime_PUCCH_1 when no intra-slot hopping
static const uint8_t table_6_3_2_4_1_1_N_SF_mprime_PUCCH_1_m0Hop[14] = {0,0,0,1,1,1,1,2,2,2,2,3,3,3}; // for index PUCCH-length, we obtain N_SF_mprime_PUCCH_1 when intra-slot hopping and mprime=0
static const uint8_t table_6_3_2_4_1_1_N_SF_mprime_PUCCH_1_m1Hop[14] = {0,0,0,1,1,2,2,2,2,3,3,3,3,4}; // for index PUCCH-length, we obtain N_SF_mprime_PUCCH_1 when intra-slot hopping and mprime=1
/*
* The following tables implement TS 38.211 table 6.4.1.3.1.1-1: Number of DM-RS symbols and the corresponding N_SF_mprime_PUCCH_1
* One table for no intra-slot hopping
* Two tables for intra-slot hopping (mprime=0 and mprime=1)
*/
uint8_t table_6_4_1_3_1_1_1_N_SF_mprime_PUCCH_1_noHop[14] = {0,0,0,2,3,3,4,4,5,5,6,6,7,7}; // for index PUCCH-DM-RS-length, we obtain N_SF_mprime_PUCCH_1 when no intra-slot hopping
uint8_t table_6_4_1_3_1_1_1_N_SF_mprime_PUCCH_1_m0Hop[14] = {0,0,0,1,1,2,2,2,2,3,3,3,3,4}; // for index PUCCH-DM-RS-length, we obtain N_SF_mprime_PUCCH_1 when intra-slot hopping and mprime=0
uint8_t table_6_4_1_3_1_1_1_N_SF_mprime_PUCCH_1_m1Hop[14] = {0,0,0,1,2,1,2,2,3,2,3,3,4,3}; // for index PUCCH-DM-RS-length, we obtain N_SF_mprime_PUCCH_1 when intra-slot hopping and mprime=1
static const uint8_t table_6_4_1_3_1_1_1_N_SF_mprime_PUCCH_1_noHop[14] = {0,0,0,2,3,3,4,4,5,5,6,6,7,7}; // for index PUCCH-DM-RS-length, we obtain N_SF_mprime_PUCCH_1 when no intra-slot hopping
static const uint8_t table_6_4_1_3_1_1_1_N_SF_mprime_PUCCH_1_m0Hop[14] = {0,0,0,1,1,2,2,2,2,3,3,3,3,4}; // for index PUCCH-DM-RS-length, we obtain N_SF_mprime_PUCCH_1 when intra-slot hopping and mprime=0
static const uint8_t table_6_4_1_3_1_1_1_N_SF_mprime_PUCCH_1_m1Hop[14] = {0,0,0,1,2,1,2,2,3,2,3,3,4,3}; // for index PUCCH-DM-RS-length, we obtain N_SF_mprime_PUCCH_1 when intra-slot hopping and mprime=1
/* The following tables implement TS 38.211 table 6.3.2.4.1-2: Orthogonal sequences wi(m)=exp(j*2*pi*phi(m)/N_SF) for PUCCH format 1
uint16_t table_6_3_2_4_1_2_W2[2][2] = {{0,0}, {0,1}};
uint16_t table_6_3_2_4_1_2_W3[3][3] = {{0,0,0}, {0,1,2}, {0,2,1}};
......@@ -397,7 +397,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
uint16_t table_6_3_2_4_1_2_W6[2][2] = {{0,0,0,0,0,0}, {0,1,2,3,4,5}, {0,2,4,0,2,4}, {0,3,0,3,0,3}, {0,4,2,0,4,2}, {0,5,4,3,2,1}};
uint16_t table_6_3_2_4_1_2_W7[2][2] = {{0,0,0,0,0,0,0},{0,1,2,3,4,5,6},{0,2,4,6,1,3,5},{0,3,6,2,5,1,4},{0,4,1,5,2,6,3},{0,5,3,1,6,4,2},{0,6,5,4,3,2,1}};
*/
int16_t table_6_3_2_4_1_2_Wi_Re[8][7][7] = {
static const int16_t table_6_3_2_4_1_2_Wi_Re[8][7][7] = {
{{0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}},
{{32767,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}},
{{32767,32767,0,0,0,0,0}, {32767,-32767,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}},
......@@ -407,7 +407,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
{{32767,32767,32767,32767,32767,32767,0}, {32767,16384,-16384,-32767,-16384,16384,0}, {32767,-16384,-16384,32767,-16384,-16384,0}, {32767,-32767,32767,-32767,32767,-32767,0}, {32767,-16384,-16384,32767,-16384,-16384,0}, {32767,16384,-16384,-32767,-16384,16384,0}, {0,0,0,0,0,0,0}},
{{32767,32767,32767,32767,32767,32767,32767},{32767,20430,-7291,-29522,-29522,-7291,20430},{32767,-7291,-29522,20430,20430,-29522,-7291},{32767,-29522,20430,-7291,-7291,20430,-29522},{32767,-29522,20430,-7291,-7291,20430,-29522},{32767,-7291,-29522,20430,20430,-29522,-7291},{32767,20430,-7291,-29522,-29522,-7291,20430}}
};
int16_t table_6_3_2_4_1_2_Wi_Im[8][7][7] = {
static const int16_t table_6_3_2_4_1_2_Wi_Im[8][7][7] = {
{{0,0,0,0,0,0,0},{0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}},
{{0,0,0,0,0,0,0},{0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}},
{{0,0,0,0,0,0,0},{0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}},
......@@ -418,7 +418,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
{{0,0,0,0,0,0,0},{0,25618,31945,14217,-14217,-31945,-25618},{0,31945,-14217,-25618,25618,14217,-31945},{0,14217,-25618,31945,-31945,25618,-14217},{0,-14217,25618,-31945,31945,-25618,14217},{0,-31945,14217,25618,-25618,-14217,31945},{0,-25618,-31945,-14217,14217,31945,25618}}
};
uint8_t list_of_prime_numbers[46] = {2, 3, 5, 7, 11, 13, 17, 19, 23, 29,
static const uint8_t list_of_prime_numbers[46] = {2, 3, 5, 7, 11, 13, 17, 19, 23, 29,
31, 37, 41, 43, 47, 53, 59, 61, 67, 71,
73, 79, 83, 89, 97, 101,103,107,109,113,
127,131,137,139,149,151,157,163,167,173,
......
......@@ -399,7 +399,7 @@ typedef struct RU_t_s{
/// function pointer to release function for radio interface
int (*stop_rf)(struct RU_t_s *ru);
/// function pointer to initialization function for radio interface
int (*start_if)(struct RU_t_s *ru,struct PHY_VARS_eNB_s *eNB);
int (*start_if)(struct RU_t_s *ru,struct PHY_VARS_gNB_s *gNB);
/// function pointer to RX front-end processing routine (DFTs/prefix removal or NULL)
void (*feprx)(struct RU_t_s *ru);
/// function pointer to TX front-end processing routine (IDFTs and prefix removal or NULL)
......
......@@ -1021,11 +1021,13 @@ typedef struct {
NR_UE_COMMON common_vars;
nr_ue_if_module_t *if_inst;
nr_downlink_indication_t dl_indication;
nr_uplink_indication_t ul_indication;
/// UE FAPI DCI request
nr_dcireq_t dcireq;
// CHECK if we need those as they are also included in dl_indictation
/// UE FAPI indication for DLSCH reception
fapi_nr_rx_indication_t rx_ind;
/// UE FAPI indication for DCI reception
......
......@@ -26,11 +26,11 @@
* The host CPU needs to have support for SSE2 at least. SSE3 and SSE4.1 functions are emulated if the CPU lacks support for them.
* This will slow down the softmodem, but may be valuable if only offline signal processing is required.
*
* \author S. Held
* \email sebastian.held@imst.de
* \company IMST GmbH
* \date 2015
* \version 0.1
* \author S. Held, Laurent THOMAS
* \email sebastian.held@imst.de, laurent.thomas@open-cells.com
* \company IMST GmbH, Open Cells Project
* \date 2019
* \version 0.2
*/
#ifndef SSE_INTRIN_H
......@@ -40,23 +40,23 @@
#if defined(__x86_64) || defined(__i386__)
#ifndef __SSE2__
# error SSE2 processor intrinsics disabled
# error SSE2 processor intrinsics disabled
#endif
#include <emmintrin.h>
#include <xmmintrin.h>
#ifdef __SSE3__
# include <pmmintrin.h>
# include <tmmintrin.h>
#include <pmmintrin.h>
#include <tmmintrin.h>
#endif
#ifdef __SSE4_1__
# include <smmintrin.h>
#include <smmintrin.h>
#endif
#ifdef __AVX2__
# include <immintrin.h>
#include <immintrin.h>
#endif
// ------------------------------------------------
......@@ -108,8 +108,7 @@ typedef union {
* \date 2006-2008
* \copyright Apache License 2.0
*/
static inline __m128i ssp_comge_epi8_SSE2(__m128i a, __m128i b)
{
static inline __m128i ssp_comge_epi8_SSE2(__m128i a, __m128i b) {
__m128i c;
c = _mm_cmpgt_epi8( a, b );
a = _mm_cmpeq_epi8( a, b );
......@@ -126,13 +125,11 @@ static inline __m128i ssp_comge_epi8_SSE2(__m128i a, __m128i b)
* \date 2006-2008
* \copyright Apache License 2.0
*/
static inline __m128i ssp_shuffle_epi8_SSE2 (__m128i a, __m128i mask)
{
static inline __m128i ssp_shuffle_epi8_SSE2 (__m128i a, __m128i mask) {
ssp_m128 A,B, MASK, maskZero;
A.i = a;
maskZero.i = ssp_comge_epi8_SSE2( mask, _mm_setzero_si128() );
MASK.i = _mm_and_si128 ( mask, _mm_set1_epi8( (char)0x0F) );
B.s8[ 0] = A.s8[ (MASK.s8[ 0]) ];
B.s8[ 1] = A.s8[ (MASK.s8[ 1]) ];
B.s8[ 2] = A.s8[ (MASK.s8[ 2]) ];
......@@ -149,7 +146,6 @@ static inline __m128i ssp_shuffle_epi8_SSE2 (__m128i a, __m128i mask)
B.s8[13] = A.s8[ (MASK.s8[13]) ];
B.s8[14] = A.s8[ (MASK.s8[14]) ];
B.s8[15] = A.s8[ (MASK.s8[15]) ];
B.i = _mm_and_si128( B.i, maskZero.i );
return B.i;
}
......@@ -182,8 +178,7 @@ static inline __m128i ssp_shuffle_epi8_SSE2 (__m128i a, __m128i mask)
* \date 2006-2008
* \copyright Apache License 2.0
*/
static inline __m128i ssp_insert_epi8_SSE2( __m128i a, int b, const int ndx )
{
static inline __m128i ssp_insert_epi8_SSE2( __m128i a, int b, const int ndx ) {
ssp_m128 Ahi, Alo;
b = b & 0xFF; /* Convert to 8-bit integer */
Ahi.i = _mm_unpackhi_epi8( a, _mm_setzero_si128() ); /* Ahi = a_8[8:15] Simulate 8bit integers as 16-bit integers */
......@@ -191,72 +186,71 @@ static inline __m128i ssp_insert_epi8_SSE2( __m128i a, int b, const int ndx )
/* Insert b as a 16-bit integer to upper or lower half of a */
switch( ndx & 0xF ) {
case 0:
Alo.i = _mm_insert_epi16( Alo.i, b, 0 );
break;
case 0:
Alo.i = _mm_insert_epi16( Alo.i, b, 0 );
break;
case 1:
Alo.i = _mm_insert_epi16( Alo.i, b, 1 );
break;
case 1:
Alo.i = _mm_insert_epi16( Alo.i, b, 1 );
break;
case 2:
Alo.i = _mm_insert_epi16( Alo.i, b, 2 );
break;
case 2:
Alo.i = _mm_insert_epi16( Alo.i, b, 2 );
break;
case 3:
Alo.i = _mm_insert_epi16( Alo.i, b, 3 );
break;
case 3:
Alo.i = _mm_insert_epi16( Alo.i, b, 3 );
break;
case 4:
Alo.i = _mm_insert_epi16( Alo.i, b, 4 );
break;
case 4:
Alo.i = _mm_insert_epi16( Alo.i, b, 4 );
break;
case 5:
Alo.i = _mm_insert_epi16( Alo.i, b, 5 );
break;
case 5:
Alo.i = _mm_insert_epi16( Alo.i, b, 5 );
break;
case 6:
Alo.i = _mm_insert_epi16( Alo.i, b, 6 );
break;
case 6:
Alo.i = _mm_insert_epi16( Alo.i, b, 6 );
break;
case 7:
Alo.i = _mm_insert_epi16( Alo.i, b, 7 );
break;
case 7:
Alo.i = _mm_insert_epi16( Alo.i, b, 7 );
break;
case 8:
Ahi.i = _mm_insert_epi16( Ahi.i, b, 0 );
break;
case 8:
Ahi.i = _mm_insert_epi16( Ahi.i, b, 0 );
break;
case 9:
Ahi.i = _mm_insert_epi16( Ahi.i, b, 1 );
break;
case 9:
Ahi.i = _mm_insert_epi16( Ahi.i, b, 1 );
break;
case 10:
Ahi.i = _mm_insert_epi16( Ahi.i, b, 2 );
break;
case 10:
Ahi.i = _mm_insert_epi16( Ahi.i, b, 2 );
break;
case 11:
Ahi.i = _mm_insert_epi16( Ahi.i, b, 3 );
break;
case 11:
Ahi.i = _mm_insert_epi16( Ahi.i, b, 3 );
break;
case 12:
Ahi.i = _mm_insert_epi16( Ahi.i, b, 4 );
break;
case 12:
Ahi.i = _mm_insert_epi16( Ahi.i, b, 4 );
break;
case 13:
Ahi.i = _mm_insert_epi16( Ahi.i, b, 5 );
break;
case 13:
Ahi.i = _mm_insert_epi16( Ahi.i, b, 5 );
break;
case 14:
Ahi.i = _mm_insert_epi16( Ahi.i, b, 6 );
break;
case 14:
Ahi.i = _mm_insert_epi16( Ahi.i, b, 6 );
break;
default:
Ahi.i = _mm_insert_epi16( Ahi.i, b, 7 );
default:
Ahi.i = _mm_insert_epi16( Ahi.i, b, 7 );
}
return _mm_packus_epi16( Alo.i, Ahi.i ); // Pack the 16-bit integers to 8bit again.
///* Another implementation, but slower: */
//ssp_m128 A, B, mask;
//mask.i = _mm_setzero_si128();
......@@ -277,16 +271,13 @@ static inline __m128i ssp_insert_epi8_SSE2( __m128i a, int b, const int ndx )
* \date 2006-2008
* \copyright Apache License 2.0
*/
static inline __m128i ssp_cvtepi8_epi16_SSE2 ( __m128i a)
{
static inline __m128i ssp_cvtepi8_epi16_SSE2 ( __m128i a) {
__m128i b = _mm_setzero_si128 ();
__m128i c = _mm_unpacklo_epi8(a, b);
__m128i d = _mm_set1_epi16 (128);
b = _mm_and_si128(d, c);
d = _mm_set1_epi16(0x1FE);
b = _mm_mullo_epi16(b, d);
return _mm_add_epi16(c, b);
}
......@@ -299,8 +290,7 @@ static inline __m128i ssp_cvtepi8_epi16_SSE2 ( __m128i a)
* \date 2006-2008
* \copyright Apache License 2.0
*/
static inline __m128i ssp_logical_bitwise_select_SSE2( __m128i a, __m128i b, __m128i mask ) // Bitwise (mask ? a : b)
{
static inline __m128i ssp_logical_bitwise_select_SSE2( __m128i a, __m128i b, __m128i mask ) { // Bitwise (mask ? a : b)
a = _mm_and_si128 ( a, mask ); // clear a where mask = 0
b = _mm_andnot_si128( mask, b ); // clear b where mask = 1
a = _mm_or_si128 ( a, b ); // a = a OR b
......@@ -316,8 +306,7 @@ static inline __m128i ssp_logical_bitwise_select_SSE2( __m128i a, __m128i b, __m
* \date 2006-2008
* \copyright Apache License 2.0
*/
static inline __m128i ssp_max_epi8_SSE2( __m128i a, __m128i b )
{
static inline __m128i ssp_max_epi8_SSE2( __m128i a, __m128i b ) {
__m128i mask = _mm_cmpgt_epi8( a, b ); // FFFFFFFF where a > b
a = ssp_logical_bitwise_select_SSE2( a, b, mask );
return a;
......@@ -332,15 +321,12 @@ static inline __m128i ssp_max_epi8_SSE2( __m128i a, __m128i b )
* \date 2006-2008
* \copyright Apache License 2.0
*/
static inline __m128i ssp_cvtepi16_epi32_SSE2 ( __m128i a)
{
static inline __m128i ssp_cvtepi16_epi32_SSE2 ( __m128i a) {
__m128i b = _mm_set1_epi32 (-1); //0xFFFFFFFF
__m128i c = _mm_unpacklo_epi16(a, b); //FFFFa0**FFFFa1**....
__m128i d = _mm_set1_epi32 (0x8000); //0x8000
b = _mm_andnot_si128(c, d); // 0x80 for positive, 0x00 for negative
d = _mm_slli_epi32(b, 1); // 0x100 for positive, 0x000 for negative
return _mm_add_epi32(c, d);
}
#endif // __SSE4_1__
......@@ -350,5 +336,46 @@ static inline __m128i ssp_cvtepi16_epi32_SSE2 ( __m128i a)
#endif // x86_64 || i386
#endif // SSE_INTRIN_H
#if defined(__x86_64__) || defined(__i386__)
#define vect128 __m128i
#elif defined(__arm__)
#define vect128 int16x8_t
#endif
static const short minusConjug128[8]__attribute__((aligned(16))) = {-1,1,-1,1,-1,1,-1,1};
static inline vect128 mulByConjugate128(vect128 *a, vect128 *b, int8_t output_shift) {
#if defined(__x86_64__) || defined(__i386__)
vect128 realPart = _mm_madd_epi16(*a,*b);
realPart = _mm_srai_epi32(realPart,output_shift);
vect128 imagPart = _mm_shufflelo_epi16(*b,_MM_SHUFFLE(2,3,0,1));
imagPart = _mm_shufflehi_epi16(imagPart,_MM_SHUFFLE(2,3,0,1));
imagPart = _mm_sign_epi16(imagPart,*(vect128 *)minusConjug128);
imagPart = _mm_madd_epi16(imagPart,*a);
imagPart = _mm_srai_epi32(imagPart,output_shift);
vect128 lowPart = _mm_unpacklo_epi32(realPart,imagPart);
vect128 highPart = _mm_unpackhi_epi32(realPart,imagPart);
return ( _mm_packs_epi32(lowPart,highPart));
#elif defined(__arm__)
AssertFatal(false, "not developped\n");
#endif
}
#if defined(__x86_64__) || defined(__i386__)
#define displaySamples128(vect) {\
__m128i x=vect; \
printf("vector: %s = (%hd,%hd) (%hd,%hd) (%hd,%hd) (%hd,%hd)\n", #vect, \
_mm_extract_epi16(x,0), \
_mm_extract_epi16(x,1),\
_mm_extract_epi16(x,2),\
_mm_extract_epi16(x,3),\
_mm_extract_epi16(x,4),\
_mm_extract_epi16(x,5),\
_mm_extract_epi16(x,6),\
_mm_extract_epi16(x,7));\
}
#elif defined(__arm__)
displaySamples128(vect) {}
//TBD
#endif
#endif // SSE_INTRIN_H
......@@ -36,4 +36,6 @@ nr_subframe_t nr_slot_select(nfapi_nr_config_request_t *cfg,unsigned char slot)
{
if (cfg->subframe_config.duplex_mode.value == FDD)
return(SF_DL);
LOG_E(PHY,"Not developped TDD mode\n");
return -1;
}
......@@ -1595,22 +1595,10 @@ void ue_ulsch_uespec_procedures(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8
int harq_pid;
int frame_tx=proc->frame_tx;
int nr_tti_tx=proc->nr_tti_tx;
int Mod_id = ue->Mod_id;
int CC_id = ue->CC_id;
uint8_t Msg3_flag=0;
uint16_t first_rb, nb_rb;
unsigned int input_buffer_length;
int i;
int aa;
int tx_amp;
uint8_t ulsch_input_buffer[5477] __attribute__ ((aligned(32)));
uint8_t access_mode;
uint8_t Nbundled=0;
uint8_t NbundledCw1=0;
uint8_t ack_status_cw0=0;
uint8_t ack_status_cw1=0;
uint8_t cqi_status = 0;
uint8_t ri_status = 0;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX_ULSCH_UESPEC,VCD_FUNCTION_IN);
/* reset harq for tx of current rx slot because it is sure that transmission has already been achieved for this slot */
......@@ -1621,6 +1609,18 @@ void ue_ulsch_uespec_procedures(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8
#if 0
int Mod_id = ue->Mod_id;
int CC_id = ue->CC_id;
uint8_t Msg3_flag=0;
uint16_t first_rb, nb_rb;
uint8_t ulsch_input_buffer[5477] __attribute__ ((aligned(32)));
uint8_t access_mode;
uint8_t Nbundled=0;
uint8_t NbundledCw1=0;
uint8_t ack_status_cw0=0;
uint8_t ack_status_cw1=0;
uint8_t cqi_status = 0;
uint8_t ri_status = 0;
if (ue->mac_enabled == 1) {
if ((ue->ulsch_Msg3_active[eNB_id] == 1) &&
(ue->ulsch_Msg3_frame[eNB_id] == frame_tx) &&
......@@ -3081,7 +3081,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
pdcch_vars[eNB_id]->crnti = 0x1234; //to be check how to set when using loop memory
uint16_t c_rnti=pdcch_vars[eNB_id]->crnti;
uint16_t cs_rnti,new_rnti,tc_rnti;
uint16_t cs_rnti=0,new_rnti=0,tc_rnti;
uint16_t p_rnti=P_RNTI;
uint16_t si_rnti=SI_RNTI;
uint16_t ra_rnti=99;
......@@ -3354,7 +3354,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
} // end for loop dci_cnt
// TODO: check where should we send up this message.
ue->if_inst->dl_indication(&ue->dl_indication);
//ue->if_inst->dl_indication(&ue->dl_indication);
#if UE_TIMING_TRACE
......
......@@ -32,6 +32,7 @@
#include "PHY/defs_nr_UE.h"
#include "SCHED_NR_UE/pucch_uci_ue_nr.h"
#include "SCHED_NR_UE/pucch_power_control_ue_nr.h"
#include <openair1/PHY/LTE_ESTIMATION/lte_estimation.h>
/**************** defines **************************************/
......
......@@ -36,6 +36,8 @@
#include "PHY/NR_REFSIG/ss_pbch_nr.h"
#include "PHY/defs_nr_UE.h"
#include <openair1/SCHED/sched_common.h>
#include <openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h>
#ifndef NO_RAT_NR
......@@ -278,7 +280,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
/* Part - III */
/* Choice PUCCH format and its related parameters */
pucch_format_nr_t format = pucch_format0_nr;
uint8_t starting_symbol_index;
uint8_t starting_symbol_index=0;
uint8_t nb_symbols_total = 0;
uint8_t nb_symbols = 0;
uint16_t starting_prb = 0;; /* it can be considered as first hop on case of pucch hopping */
......@@ -558,7 +560,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
{
nr_generate_pucch0(ue,ue->common_vars.txdataF,
&ue->frame_parms,
&ue->pucch_config_dedicated_nr[gNB_id],
&ue->pucch_config_dedicated[gNB_id],
tx_amp,
nr_tti_tx,
(uint8_t)m_0,
......@@ -572,7 +574,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
{
nr_generate_pucch1(ue,ue->common_vars.txdataF,
&ue->frame_parms,
&ue->pucch_config_dedicated_nr[gNB_id],
&ue->pucch_config_dedicated[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
......@@ -591,7 +593,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][gNB_id]->crnti,
ue->common_vars.txdataF,
&ue->frame_parms,
&ue->pucch_config_dedicated_nr[gNB_id],
&ue->pucch_config_dedicated[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
......@@ -610,7 +612,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
ue->common_vars.txdataF,
&ue->frame_parms,
format,
&ue->pucch_config_dedicated_nr[gNB_id],
&ue->pucch_config_dedicated[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
......@@ -729,7 +731,7 @@ uint8_t get_downlink_ack(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t
}
}
if (do_reset == TRUE) {
init_downlink_harq_status(&ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->harq_processes[dl_harq_pid]);
init_downlink_harq_status(ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->harq_processes[dl_harq_pid]);
}
}
}
......
......@@ -322,10 +322,10 @@ void ra_failed(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
// if contention resolution fails, go back to PRACH
PHY_vars_UE_g[Mod_id][CC_id]->UE_mode[eNB_index] = PRACH;
PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[0][eNB_index]->crnti_is_temporary = 0;
PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[0][eNB_index]->crnti = 0;
PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[1][eNB_index]->crnti_is_temporary = 0;
PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[1][eNB_index]->crnti = 0;
for (int i=0; i <RX_NB_TH_MAX; i++ ) {
PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[i][eNB_index]->crnti_is_temporary = 0;
PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[i][eNB_index]->crnti = 0;
}
LOG_E(PHY,"[UE %d] Random-access procedure fails, going back to PRACH, setting SIStatus = 0, discard temporary C-RNTI and State RRC_IDLE\n",Mod_id);
}
......@@ -336,16 +336,18 @@ void ra_succeeded(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
LOG_I(PHY,"[UE %d][RAPROC] Random-access procedure succeeded. Set C-RNTI = Temporary C-RNTI\n",Mod_id);
PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[0][eNB_index]->crnti_is_temporary = 0;
PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[1][eNB_index]->crnti_is_temporary = 0;
for (int i=0; i <RX_NB_TH_MAX; i++ ) {
PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[i][eNB_index]->crnti_is_temporary = 0;
}
PHY_vars_UE_g[Mod_id][CC_id]->ulsch_Msg3_active[eNB_index] = 0;
PHY_vars_UE_g[Mod_id][CC_id]->UE_mode[eNB_index] = PUSCH;
for (i=0; i<8; i++) {
if (PHY_vars_UE_g[Mod_id][CC_id]->ulsch[eNB_index]->harq_processes[i]) {
PHY_vars_UE_g[Mod_id][CC_id]->ulsch[eNB_index]->harq_processes[i]->status=SCH_IDLE;
PHY_vars_UE_g[Mod_id][CC_id]->dlsch[0][eNB_index][0]->harq_processes[i]->round=0;
PHY_vars_UE_g[Mod_id][CC_id]->dlsch[1][eNB_index][0]->harq_processes[i]->round=0;
for (int i=0; i <RX_NB_TH_MAX; i++ ) {
PHY_vars_UE_g[Mod_id][CC_id]->dlsch[i][eNB_index][0]->harq_processes[i]->round=0;
}
PHY_vars_UE_g[Mod_id][CC_id]->ulsch[eNB_index]->harq_processes[i]->subframe_scheduling_flag=0;
}
}
......@@ -2885,10 +2887,10 @@ int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint
{
ue->dlsch[th_id][eNB_id][0]->g_pucch += delta_pucch;
}
LOG_D(PHY,"update TPC for PUCCH %d.%d / pid %d delta_PUCCH %d g_pucch %d %d \n",frame_rx, subframe_rx,ue->dlsch[ue->current_thread_id[subframe_rx]][eNB_id][0]->current_harq_pid,
LOG_D(PHY,"update TPC for PUCCH %d.%d / pid %d delta_PUCCH %d g_pucch %d\n",
frame_rx, subframe_rx,ue->dlsch[ue->current_thread_id[subframe_rx]][eNB_id][0]->current_harq_pid,
delta_pucch,
ue->dlsch[0][eNB_id][0]->g_pucch,
ue->dlsch[1][eNB_id][0]->g_pucch
ue->dlsch[0][eNB_id][0]->g_pucch
//ue->dlsch[2][eNB_id][0]->g_pucch
);
}
......
......@@ -65,7 +65,7 @@ typedef struct {
} __attribute__ ((__packed__)) NR_MAC_SUBHEADER_LONG;
typedef struct {
uint8_t LCID:5; // octet 1 [5:0]
uint8_t LCID:6; // octet 1 [5:0]
uint8_t R:2; // octet 1 [7:6]
} __attribute__ ((__packed__)) NR_MAC_SUBHEADER_FIXED;
......
......@@ -58,6 +58,7 @@
#endif
#include "assertions.h"
#include <openair1/PHY/LTE_TRANSPORT/transport_proto.h>
#define ENABLE_MAC_PAYLOAD_DEBUG
#define DEBUG_eNB_SCHEDULER 1
......@@ -392,7 +393,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
}
for (int ii=0; ii<MAX_MOBILES_PER_GNB; ii++) {
LTE_eNB_DLSCH_t *dlsch = RC.gNB[module_idP][CC_id]->dlsch[ii][0];
NR_gNB_DLSCH_t *dlsch = RC.gNB[module_idP][CC_id]->dlsch[ii][0];
if((dlsch != NULL) && (dlsch->rnti == rnti)){
LOG_I(MAC, "clean_eNb_dlsch UE %x \n", rnti);
clean_eNb_dlsch(dlsch);
......
......@@ -74,7 +74,7 @@ int8_t handle_dlsch (module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_n
return nr_ue_process_dlsch( module_id,
cc_id,
gNB_index,
&dci_ind,
dci_ind,
pduP,
pdu_len);
......@@ -308,4 +308,5 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq) {
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.N_RB_BWP = 106;
return 0;
}
......@@ -34,40 +34,42 @@
#include <dlfcn.h>
#include <errno.h>
#include <string.h>
#include <stdlib.h>
#include "common_lib.h"
#include "common/utils/load_module_shlib.h"
#include <common/utils/LOG/log.h>
int set_device(openair0_device *device) {
switch (device->type) {
case EXMIMO_DEV:
printf("[%s] has loaded EXPRESS MIMO device.\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"));
LOG_I(HW,"[%s] has loaded EXPRESS MIMO device.\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"));
break;
case USRP_B200_DEV:
printf("[%s] has loaded USRP B200 device.\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"));
LOG_I(HW,"[%s] has loaded USRP B200 device.\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"));
break;
case USRP_X300_DEV:
printf("[%s] has loaded USRP X300 device.\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"));
case USRP_X300_DEV:
LOG_I(HW,"[%s] has loaded USRP X300 device.\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"));
break;
case BLADERF_DEV:
printf("[%s] has loaded BLADERF device.\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"));
LOG_I(HW,"[%s] has loaded BLADERF device.\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"));
break;
case LMSSDR_DEV:
printf("[%s] has loaded LMSSDR device.\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"));
LOG_I(HW,"[%s] has loaded LMSSDR device.\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"));
break;
case NONE_DEV:
printf("[%s] has not loaded a HW device.\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"));
LOG_W(HW,"[%s] has not loaded a HW device.\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"));
break;
case ADRV9371_ZC706_DEV:
printf("[%s] has loaded ADRV9371_ZC706 device.\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"));
LOG_I(HW,"[%s] has loaded ADRV9371_ZC706 device.\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"));
break;
case UEDv2_DEV:
printf("[%s] has loaded UEDv2 device.\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"));
LOG_I(HW,"[%s] has loaded UEDv2 device.\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"));
break;
default:
printf("[%s] invalid HW device.\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"));
LOG_E(HW,"[%s] invalid HW device.\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"));
return -1;
}
return 0;
......@@ -78,15 +80,15 @@ int set_transport(openair0_device *device) {
switch (device->transp_type) {
case ETHERNET_TP:
printf("[%s] has loaded ETHERNET trasport protocol.\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"));
LOG_I(HW,"[%s] has loaded ETHERNET trasport protocol.\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"));
return 0;
break;
case NONE_TP:
printf("[%s] has not loaded a transport protocol.\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"));
LOG_W(HW,"[%s] has not loaded a transport protocol.\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"));
return 0;
break;
default:
printf("[%s] invalid transport protocol.\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"));
LOG_E(HW,"[%s] invalid transport protocol.\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"));
return -1;
break;
}
......@@ -100,6 +102,9 @@ int load_lib(openair0_device *device, openair0_config_t *openair0_cfg, eth_param
int ret=0;
char *libname;
if (flag == RAU_LOCAL_RADIO_HEAD) {
if (getenv("RFSIMULATOR") != NULL)
libname="rfsimulator";
else
libname=OAI_RF_LIBNAME;
shlib_fdesc[0].fname="device_init";
} else {
......@@ -108,7 +113,7 @@ int load_lib(openair0_device *device, openair0_config_t *openair0_cfg, eth_param
}
ret=load_module_shlib(libname,shlib_fdesc,1,NULL);
if (ret < 0) {
fprintf(stderr,"Library %s couldn't be loaded\n",libname);
LOG_E(HW,"Library %s couldn't be loaded\n",libname);
} else {
ret=((devfunc_t)shlib_fdesc[0].fptr)(device,openair0_cfg,cfg);
}
......@@ -124,7 +129,7 @@ int openair0_device_load(openair0_device *device, openair0_config_t *openair0_cf
if ( rc >= 0) {
if ( set_device(device) < 0) {
fprintf(stderr, "%s %d:Unsupported radio head\n",__FILE__, __LINE__);
LOG_E(HW,"Unsupported radio head\n");
return -1;
}
}
......@@ -136,7 +141,7 @@ int openair0_transport_load(openair0_device *device, openair0_config_t *openair0
rc=load_lib(device, openair0_cfg, eth_params, RAU_REMOTE_RADIO_HEAD);
if ( rc >= 0) {
if ( set_transport(device) < 0) {
fprintf(stderr, "%s %d:Unsupported transport protocol\n",__FILE__, __LINE__);
LOG_E(HW,"Unsupported transport protocol\n");
return -1;
}
}
......
#General
This is a RF simulator that allows to test OAI without a RF board.
It replaces a actual RF board driver.
As much as possible, it works like a RF board, but not in realtime: it can run faster than realtime if there is enough CPU or slower (it is CPU bound instead of real time RF sampling bound)
#build
## From build_oai
You can build it the same way, and together with actual RF driver
Example:
```bash
./build_oai --ue-nas-use-tun --UE --eNB -w SIMU
```
It is also possible to build actual RF and use choose on each run:
```bash
./build_oai --ue-nas-use-tun --UE --eNB -w USRP --rfsimulator
```
Will build both the eNB (lte-softmodem) and the UE (lte-uesoftmodem)
We recommend to use the option --ue-nas-use-tun that is much simpler to use than the OAI kernel driver.
## Add the rfsimulator after initial build
After any regular build, you can compile the driver
```bash
cd <the_compilation_dir_from_bouild_oai_script>/build
make rfsimulator
```
Then, you can use it freely
# Usage
Setting the env variable RFSIMULATOR enables the RF board simulator
It should the set to "enb" in the eNB
## 4G case
For the UE, it should be set to the IP address of the eNB
example:
```bash
sudo RFSIMULATOR=192.168.2.200 ./lte-uesoftmodem -C 2685000000 -r 50
```
Except this, the UE and the eNB can be used as it the RF is real
If you reach 'RA not active' on UE, be careful to generate a valid SIM
```bash
$OPENAIR_DIR/targets/bin/conf2uedata -c $OPENAIR_DIR/openair3/NAS/TOOLS/ue_eurecom_test_sfr.conf -o .
```
## 5G case
After regular build, add the simulation driver
(don't use ./build_oai -w SIMU until we merge 4G and 5G branches)
```bash
cd ran_build/build
make rfsimulator
```
### Launch gNB in one window
```bash
sudo RFSIMULATOR=enb ./nr-softmodem -O ../../../targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf --parallel-config PARALLEL_SINGLE_THREAD
```
### Launch UE in another window
```bash
sudo RFSIMULATOR=127.0.0.1 ./nr-uesoftmodem --numerology 1 -r 106 -C 3510000000
```
Of course, set the gNB machine IP address if the UE and the gNB are not on the same machine
In UE, you can add "-d" to get the softscope
#Caveacts
Still issues in power control: txgain, rxgain are not used
no S1 mode is currently broken, so we were not able to test the simulator in noS1 mode
/*
Author: Laurent THOMAS, Open Cells for Nokia
copyleft: OpenAirInterface Software Alliance and it's licence
*/
#include <sys/socket.h>
#include <netinet/in.h>
#include <netinet/tcp.h>
#include <arpa/inet.h>
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <unistd.h>
#include <stdbool.h>
#include <errno.h>
#include <sys/epoll.h>
#include <string.h>
#include <common/utils/assertions.h>
#include <common/utils/LOG/log.h>
#include "common_lib.h"
#include <openair1/PHY/defs_eNB.h>
#include "openair1/PHY/defs_UE.h"
#define PORT 4043 //TCP port for this simulator
#define CirSize 3072000 // 100ms is enough
#define sample_t uint32_t // 2*16 bits complex number
#define sampleToByte(a,b) ((a)*(b)*sizeof(sample_t))
#define byteToSample(a,b) ((a)/(sizeof(sample_t)*(b)))
#define MAGICeNB 0xA5A5A5A5A5A5A5A5
#define MAGICUE 0x5A5A5A5A5A5A5A5A
typedef struct {
uint64_t magic;
uint32_t size;
uint32_t nbAnt;
uint64_t timestamp;
} transferHeader;
typedef struct buffer_s {
int conn_sock;
bool alreadyRead;
uint64_t lastReceivedTS;
bool headerMode;
transferHeader th;
char *transferPtr;
uint64_t remainToTransfer;
char *circularBufEnd;
sample_t *circularBuf;
} buffer_t;
typedef struct {
int listen_sock, epollfd;
uint64_t nextTimestamp;
uint64_t typeStamp;
uint64_t initialAhead;
char *ip;
buffer_t buf[FD_SETSIZE];
} rfsimulator_state_t;
void allocCirBuf(rfsimulator_state_t *bridge, int sock) {
buffer_t *ptr=&bridge->buf[sock];
AssertFatal ( (ptr->circularBuf=(sample_t *) malloc(sampleToByte(CirSize,1))) != NULL, "");
ptr->circularBufEnd=((char *)ptr->circularBuf)+sampleToByte(CirSize,1);
ptr->conn_sock=sock;
ptr->headerMode=true;
ptr->transferPtr=(char *)&ptr->th;
ptr->remainToTransfer=sizeof(transferHeader);
int sendbuff=1000*1000*10;
AssertFatal ( setsockopt(sock, SOL_SOCKET, SO_SNDBUF, &sendbuff, sizeof(sendbuff)) == 0, "");
struct epoll_event ev= {0};
ev.events = EPOLLIN | EPOLLRDHUP;
ev.data.fd = sock;
AssertFatal(epoll_ctl(bridge->epollfd, EPOLL_CTL_ADD, sock, &ev) != -1, "");
}
void removeCirBuf(rfsimulator_state_t *bridge, int sock) {
AssertFatal( epoll_ctl(bridge->epollfd, EPOLL_CTL_DEL, sock, NULL) != -1, "");
close(sock);
free(bridge->buf[sock].circularBuf);
memset(&bridge->buf[sock], 0, sizeof(buffer_t));
bridge->buf[sock].conn_sock=-1;
}
#define helpTxt "\
\x1b[31m\
rfsimulator: error: you have to run one UE and one eNB\n\
For this, export RFSIMULATOR=enb (eNB case) or \n\
RFSIMULATOR=<an ip address> (UE case)\n\
\x1b[m"
enum blocking_t {
notBlocking,
blocking
};
void setblocking(int sock, enum blocking_t active) {
int opts;
AssertFatal( (opts = fcntl(sock, F_GETFL)) >= 0,"");
if (active==blocking)
opts = opts & ~O_NONBLOCK;
else
opts = opts | O_NONBLOCK;
AssertFatal(fcntl(sock, F_SETFL, opts) >= 0, "");
}
static bool flushInput(rfsimulator_state_t *t);
int fullwrite(int fd, void *_buf, int count, rfsimulator_state_t *t) {
char *buf = _buf;
int ret = 0;
int l;
setblocking(fd, notBlocking);
while (count) {
l = write(fd, buf, count);
if (l <= 0) {
if (errno==EINTR)
continue;
if(errno==EAGAIN) {
flushInput(t);
continue;
}
else
return -1;
}
count -= l;
buf += l;
ret += l;
}
return ret;
}
int server_start(openair0_device *device) {
rfsimulator_state_t *t = (rfsimulator_state_t *) device->priv;
t->typeStamp=MAGICeNB;
AssertFatal((t->listen_sock = socket(AF_INET, SOCK_STREAM, 0)) >= 0, "");
int enable = 1;
AssertFatal(setsockopt(t->listen_sock, SOL_SOCKET, SO_REUSEADDR, &enable, sizeof(int)) == 0, "");
struct sockaddr_in addr = {
sin_family: AF_INET,
sin_port: htons(PORT),
sin_addr: { s_addr: INADDR_ANY }
};
bind(t->listen_sock, (struct sockaddr *)&addr, sizeof(addr));
AssertFatal(listen(t->listen_sock, 5) == 0, "");
struct epoll_event ev;
ev.events = EPOLLIN;
ev.data.fd = t->listen_sock;
AssertFatal(epoll_ctl(t->epollfd, EPOLL_CTL_ADD, t->listen_sock, &ev) != -1, "");
return 0;
}
int start_ue(openair0_device *device) {
rfsimulator_state_t *t = device->priv;
t->typeStamp=MAGICUE;
int sock;
AssertFatal((sock = socket(AF_INET, SOCK_STREAM, 0)) >= 0, "");
struct sockaddr_in addr = {
sin_family: AF_INET,
sin_port: htons(PORT),
sin_addr: { s_addr: INADDR_ANY }
};
addr.sin_addr.s_addr = inet_addr(t->ip);
bool connected=false;
while(!connected) {
LOG_I(HW,"rfsimulator: trying to connect to %s:%d\n", t->ip, PORT);
if (connect(sock, (struct sockaddr *)&addr, sizeof(addr)) == 0) {
LOG_I(HW,"rfsimulator: connection established\n");
connected=true;
}
perror("rfsimulator");
sleep(1);
}
setblocking(sock, notBlocking);
allocCirBuf(t, sock);
t->buf[sock].alreadyRead=true; // UE will start blocking on read
return 0;
}
int rfsimulator_write(openair0_device *device, openair0_timestamp timestamp, void **samplesVoid, int nsamps, int nbAnt, int flags) {
rfsimulator_state_t *t = device->priv;
for (int i=0; i<FD_SETSIZE; i++) {
buffer_t *ptr=&t->buf[i];
if (ptr->conn_sock >= 0 ) {
transferHeader header= {t->typeStamp, nsamps, nbAnt, timestamp};
int n=-1;
AssertFatal( fullwrite(ptr->conn_sock,&header, sizeof(header), t) == sizeof(header), "");
sample_t tmpSamples[nsamps][nbAnt];
for(int a=0; a<nbAnt; a++) {
sample_t *in=(sample_t *)samplesVoid[a];
for(int s=0; s<nsamps; s++)
tmpSamples[s][a]=in[s];
}
n = fullwrite(ptr->conn_sock, (void *)tmpSamples, sampleToByte(nsamps,nbAnt), t);
if (n != sampleToByte(nsamps,nbAnt) ) {
LOG_E(HW,"rfsimulator: write error ret %d (wanted %ld) error %s\n", n, sampleToByte(nsamps,nbAnt), strerror(errno));
abort();
}
}
}
LOG_D(HW,"sent %d samples at time: %ld->%ld, energy in first antenna: %d\n",
nsamps, timestamp, timestamp+nsamps, signal_energy(samplesVoid[0], nsamps) );
return nsamps;
}
static bool flushInput(rfsimulator_state_t *t) {
// Process all incoming events on sockets
// store the data in lists
struct epoll_event events[FD_SETSIZE]= {0};
int nfds = epoll_wait(t->epollfd, events, FD_SETSIZE, 200);
if ( nfds==-1 ) {
if ( errno==EINTR || errno==EAGAIN )
return false;
else
AssertFatal(false,"error in epoll_wait\n");
}
for (int nbEv = 0; nbEv < nfds; ++nbEv) {
int fd=events[nbEv].data.fd;
if (events[nbEv].events & EPOLLIN && fd == t->listen_sock) {
int conn_sock;
AssertFatal( (conn_sock = accept(t->listen_sock,NULL,NULL)) != -1, "");
setblocking(conn_sock, notBlocking);
allocCirBuf(t, conn_sock);
LOG_I(HW,"A ue connected\n");
} else {
if ( events[nbEv].events & (EPOLLHUP | EPOLLERR | EPOLLRDHUP) ) {
LOG_W(HW,"Lost socket\n");
removeCirBuf(t, fd);
if (t->typeStamp==MAGICUE)
exit(1);
continue;
}
buffer_t *b=&t->buf[fd];
if ( b->circularBuf == NULL ) {
LOG_E(HW, "received data on not connected socket %d\n", events[nbEv].data.fd);
continue;
}
int blockSz;
if ( b->headerMode)
blockSz=b->remainToTransfer;
else
blockSz= b->transferPtr+b->remainToTransfer < b->circularBufEnd ?
b->remainToTransfer :
b->circularBufEnd - 1 - b->transferPtr ;
int sz=recv(fd, b->transferPtr, blockSz, MSG_DONTWAIT);
if ( sz < 0 ) {
if ( errno != EAGAIN ) {
LOG_E(HW,"socket failed %s\n", strerror(errno));
abort();
}
} else if ( sz == 0 )
continue;
AssertFatal((b->remainToTransfer-=sz) >= 0, "");
b->transferPtr+=sz;
if (b->transferPtr==b->circularBufEnd - 1)
b->transferPtr=(char *)b->circularBuf;
// check the header and start block transfer
if ( b->headerMode==true && b->remainToTransfer==0) {
AssertFatal( (t->typeStamp == MAGICUE && b->th.magic==MAGICeNB) ||
(t->typeStamp == MAGICeNB && b->th.magic==MAGICUE), "Socket Error in protocol");
b->headerMode=false;
b->alreadyRead=true;
if ( b->lastReceivedTS != b->th.timestamp) {
int nbAnt= b->th.nbAnt;
for (uint64_t index=b->lastReceivedTS; index < b->th.timestamp; index++ )
for (int a=0; a < nbAnt; a++)
b->circularBuf[(index*nbAnt+a)%CirSize]=0;
LOG_W(HW,"gap of: %ld in reception\n", b->th.timestamp-b->lastReceivedTS );
}
b->lastReceivedTS=b->th.timestamp;
b->transferPtr=(char *)&b->circularBuf[b->lastReceivedTS%CirSize];
b->remainToTransfer=sampleToByte(b->th.size, b->th.nbAnt);
}
if ( b->headerMode==false ) {
b->lastReceivedTS=b->th.timestamp+b->th.size-byteToSample(b->remainToTransfer,b->th.nbAnt);
if ( b->remainToTransfer==0) {
LOG_D(HW,"Completed block reception: %ld\n", b->lastReceivedTS);
// First block in UE, resync with the eNB current TS
if ( t->nextTimestamp == 0 )
t->nextTimestamp=b->lastReceivedTS-b->th.size;
b->headerMode=true;
b->transferPtr=(char *)&b->th;
b->remainToTransfer=sizeof(transferHeader);
b->th.magic=-1;
}
}
}
}
return nfds>0;
}
int rfsimulator_read(openair0_device *device, openair0_timestamp *ptimestamp, void **samplesVoid, int nsamps, int nbAnt) {
if (nbAnt != 1) { LOG_E(HW, "rfsimulator: only 1 antenna tested\n"); exit(1); }
rfsimulator_state_t *t = device->priv;
LOG_D(HW, "Enter rfsimulator_read, expect %d samples, will release at TS: %ld\n", nsamps, t->nextTimestamp+nsamps);
// deliver data from received data
// check if a UE is connected
int first_sock;
for (first_sock=0; first_sock<FD_SETSIZE; first_sock++)
if (t->buf[first_sock].circularBuf != NULL )
break;
if ( first_sock == FD_SETSIZE ) {
// no connected device (we are eNB, no UE is connected)
if (!flushInput(t)) {
for (int x=0; x < nbAnt; x++)
memset(samplesVoid[x],0,sampleToByte(nsamps,1));
t->nextTimestamp+=nsamps;
LOG_W(HW,"Generated void samples for Rx: %ld\n", t->nextTimestamp);
*ptimestamp = t->nextTimestamp-nsamps;
return nsamps;
}
} else {
bool have_to_wait;
do {
have_to_wait=false;
for ( int sock=0; sock<FD_SETSIZE; sock++)
if ( t->buf[sock].circularBuf &&
t->buf[sock].alreadyRead && //>= t->initialAhead &&
(t->nextTimestamp+nsamps) > t->buf[sock].lastReceivedTS ) {
have_to_wait=true;
break;
}
if (have_to_wait)
/*printf("Waiting on socket, current last ts: %ld, expected at least : %ld\n",
ptr->lastReceivedTS,
t->nextTimestamp+nsamps);
*/
flushInput(t);
} while (have_to_wait);
}
// Clear the output buffer
for (int a=0; a<nbAnt; a++)
memset(samplesVoid[a],0,sampleToByte(nsamps,1));
// Add all input signal in the output buffer
for (int sock=0; sock<FD_SETSIZE; sock++) {
buffer_t *ptr=&t->buf[sock];
if ( ptr->circularBuf && ptr->alreadyRead ) {
for (int a=0; a<nbAnt; a++) {
sample_t *out=(sample_t *)samplesVoid[a];
for ( int i=0; i < nsamps; i++ )
out[i]+=ptr->circularBuf[((t->nextTimestamp+i)*nbAnt+a)%CirSize]<<1;
}
}
}
*ptimestamp = t->nextTimestamp; // return the time of the first sample
t->nextTimestamp+=nsamps;
LOG_D(HW,"Rx to upper layer: %d from %ld to %ld, energy in first antenna %d\n",
nsamps,
*ptimestamp, t->nextTimestamp,
signal_energy(samplesVoid[0], nsamps));
return nsamps;
}
int rfsimulator_request(openair0_device *device, void *msg, ssize_t msg_len) {
abort();
return 0;
}
int rfsimulator_reply(openair0_device *device, void *msg, ssize_t msg_len) {
abort();
return 0;
}
int rfsimulator_get_stats(openair0_device *device) {
return 0;
}
int rfsimulator_reset_stats(openair0_device *device) {
return 0;
}
void rfsimulator_end(openair0_device *device) {}
int rfsimulator_stop(openair0_device *device) {
return 0;
}
int rfsimulator_set_freq(openair0_device *device, openair0_config_t *openair0_cfg,int exmimo_dump_config) {
return 0;
}
int rfsimulator_set_gains(openair0_device *device, openair0_config_t *openair0_cfg) {
return 0;
}
__attribute__((__visibility__("default")))
int device_init(openair0_device *device, openair0_config_t *openair0_cfg) {
//set_log(HW,OAILOG_DEBUG);
rfsimulator_state_t *rfsimulator = (rfsimulator_state_t *)calloc(sizeof(rfsimulator_state_t),1);
if ((rfsimulator->ip=getenv("RFSIMULATOR")) == NULL ) {
LOG_E(HW,helpTxt);
exit(1);
}
rfsimulator->typeStamp = strncasecmp(rfsimulator->ip,"enb",3) == 0 ?
MAGICeNB:
MAGICUE;
LOG_I(HW,"rfsimulator: running as %s\n", rfsimulator-> typeStamp == MAGICeNB ? "eNB" : "UE");
device->trx_start_func = rfsimulator->typeStamp == MAGICeNB ?
server_start :
start_ue;
device->trx_get_stats_func = rfsimulator_get_stats;
device->trx_reset_stats_func = rfsimulator_reset_stats;
device->trx_end_func = rfsimulator_end;
device->trx_stop_func = rfsimulator_stop;
device->trx_set_freq_func = rfsimulator_set_freq;
device->trx_set_gains_func = rfsimulator_set_gains;
device->trx_write_func = rfsimulator_write;
device->trx_read_func = rfsimulator_read;
/* let's pretend to be a b2x0 */
device->type = USRP_B200_DEV;
device->openair0_cfg=&openair0_cfg[0];
device->priv = rfsimulator;
for (int i=0; i<FD_SETSIZE; i++)
rfsimulator->buf[i].conn_sock=-1;
AssertFatal((rfsimulator->epollfd = epoll_create1(0)) != -1,"");
rfsimulator->initialAhead=openair0_cfg[0].sample_rate/1000; // One sub frame
return 0;
}
......@@ -429,9 +429,12 @@ static void *scope_thread(void *arg) {
for(UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) {
for(CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
if ((ue_cnt<scope_enb_num_ue)) {
phy_scope_eNB(form_enb[CC_id][ue_cnt],
/*
//this function needs to be written
phy_scope_gNB(form_enb[CC_id][ue_cnt],
RC.gNB[0][CC_id],
UE_id);
*/
ue_cnt++;
}
}
......
......@@ -628,7 +628,6 @@ static void *UE_thread_rxn_txnp4(void *arg) {
struct nr_rxtx_thread_data *rtd = arg;
UE_nr_rxtx_proc_t *proc = rtd->proc;
PHY_VARS_NR_UE *UE = rtd->UE;
int ret;
//proc->counter_decoder = 0;
proc->instance_cnt_rxtx=-1;
......@@ -781,16 +780,14 @@ void *UE_thread(void *arg) {
PHY_VARS_NR_UE *UE = (PHY_VARS_NR_UE *) arg;
// int tx_enabled = 0;
int dummy_rx[UE->frame_parms.nb_antennas_rx][UE->frame_parms.samples_per_subframe] __attribute__((aligned(32)));
openair0_timestamp timestamp;
void* rxp[NB_ANTENNAS_RX], *txp[NB_ANTENNAS_TX];
int start_rx_stream = 0;
int i;
char threadname[128];
int th_id;
UE->proc.proc_rxtx[0].counter_decoder = 0;
UE->proc.proc_rxtx[1].counter_decoder = 0;
UE->proc.proc_rxtx[2].counter_decoder = 0;
for (int i=0; i< RX_NB_TH_MAX; i++ )
UE->proc.proc_rxtx[i].counter_decoder = 0;
static uint8_t thread_idx = 0;
uint16_t table_sf_slot[20] = {0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,8,8,9,9};
......@@ -833,48 +830,54 @@ void *UE_thread(void *arg) {
usleep(500*1000);
}
#endif
LOG_W(PHY,"is_synchro %d\n" , is_synchronized );
if (instance_cnt_synch < 0) { // we can invoke the synch
// grab 10 ms of signal and wakeup synch thread
for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++)
rxp[i] = (void*)&UE->common_vars.rxdata[i][0];
if (UE->mode != loop_through_memory)
AssertFatal( UE->frame_parms.samples_per_subframe*10==
UE->rfdevice.trx_read_func(&UE->rfdevice,
&timestamp,
rxp,
UE->frame_parms.samples_per_subframe*10,
UE->frame_parms.nb_antennas_rx), "error reading samples");
AssertFatal ( 0== pthread_mutex_lock(&UE->proc.mutex_synch), "");
instance_cnt_synch = ++UE->proc.instance_cnt_synch;
if (instance_cnt_synch == 0) {
AssertFatal( 0 == pthread_cond_signal(&UE->proc.cond_synch), "");
} else {
LOG_E( PHY, "[SCHED][UE] UE sync thread busy!!\n" );
exit_fun("nothing to add");
}
AssertFatal ( 0== pthread_mutex_unlock(&UE->proc.mutex_synch), "");
} else {
#if OAISIM
(void)dummy_rx; /* avoid gcc warnings */
usleep(500);
#else
// grab 10 ms of signal into dummy buffer
if (UE->mode != loop_through_memory) {
for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++)
rxp[i] = (void*)&dummy_rx[i][0];
for (int sf=0; sf<NR_NUMBER_OF_SUBFRAMES_PER_FRAME; sf++)
// printf("Reading dummy sf %d\n",sf);
AssertFatal(UE->frame_parms.samples_per_subframe==
UE->rfdevice.trx_read_func(&UE->rfdevice,
&timestamp,
rxp,
UE->frame_parms.samples_per_subframe,
UE->frame_parms.nb_antennas_rx), "error reading samples");
}
#endif
if (UE->mode != loop_through_memory) {
void *dummy_tx[UE->frame_parms.nb_antennas_tx];
for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++)
dummy_tx[i]=malloc16_clear(UE->frame_parms.samples_per_subframe*4);
for(int x=0; x<10; x++) {
for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++)
rxp[i] = ((void*)&UE->common_vars.rxdata[i][0]) + 4*x*UE->frame_parms.samples_per_subframe;
AssertFatal( UE->frame_parms.samples_per_subframe ==
UE->rfdevice.trx_read_func(&UE->rfdevice,
&timestamp,
rxp,
UE->frame_parms.samples_per_subframe,
UE->frame_parms.nb_antennas_rx), "");
}
for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++)
free(dummy_tx[i]);
}
AssertFatal( 0 == pthread_mutex_lock(&UE->proc.mutex_synch), "");
AssertFatal( 0 == ++UE->proc.instance_cnt_synch, "[SCHED][UE] UE sync thread busy!!\n" );
AssertFatal( 0 == pthread_cond_signal(&UE->proc.cond_synch), "");
AssertFatal( 0 == pthread_mutex_unlock(&UE->proc.mutex_synch), "");
} else {
// grab 10 ms of signal into dummy buffer to wait result of sync detection
if (UE->mode != loop_through_memory) {
void *dummy_tx[UE->frame_parms.nb_antennas_tx];
for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++)
dummy_tx[i]=malloc16_clear(UE->frame_parms.samples_per_subframe*4);
void *dummy_rx[UE->frame_parms.nb_antennas_rx];
for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++)
dummy_rx[i]=malloc16(UE->frame_parms.samples_per_subframe*4);
for (int sf=0; sf<NR_NUMBER_OF_SUBFRAMES_PER_FRAME; sf++) {
// printf("Reading dummy sf %d\n",sf);
UE->rfdevice.trx_read_func(&UE->rfdevice,
&timestamp,
dummy_rx,
UE->frame_parms.samples_per_subframe,
UE->frame_parms.nb_antennas_rx);
usleep(500); // this sleep improves in the case of simulated RF and doesn't harm with true radio
}
for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++)
free(dummy_tx[i]);
for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++)
free(dummy_rx[i]);
}
}
} // UE->is_synchronized==0
......@@ -884,12 +887,20 @@ void *UE_thread(void *arg) {
if (UE->mode != loop_through_memory) {
if (UE->no_timing_correction==0) {
LOG_I(PHY,"Resynchronizing RX by %d samples (mode = %d)\n",UE->rx_offset,UE->mode);
AssertFatal(UE->rx_offset ==
UE->rfdevice.trx_read_func(&UE->rfdevice,
&timestamp,
(void**)UE->common_vars.rxdata,
UE->rx_offset,
UE->frame_parms.nb_antennas_rx),"");
void *dummy_tx[UE->frame_parms.nb_antennas_tx];
for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++)
dummy_tx[i]=malloc16_clear(UE->frame_parms.samples_per_subframe*4);
for ( int size=UE->rx_offset ; size > 0 ; size -= UE->frame_parms.samples_per_subframe ) {
int unitTransfer=size>UE->frame_parms.samples_per_subframe ? UE->frame_parms.samples_per_subframe : size ;
AssertFatal(unitTransfer ==
UE->rfdevice.trx_read_func(&UE->rfdevice,
&timestamp,
(void**)UE->common_vars.rxdata,
unitTransfer,
UE->frame_parms.nb_antennas_rx),"");
}
for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++)
free(dummy_tx[i]);
}
UE->rx_offset=0;
UE->time_sync_cell=0;
......@@ -965,7 +976,13 @@ void *UE_thread(void *arg) {
UE->rx_offset < 10*UE->frame_parms.samples_per_slot )
UE->rx_offset_diff = 1;
LOG_D(PHY,"AbsSubframe %d.%d TTI SET rx_off_diff to %d rx_offset %d \n",proc->frame_rx,slot_nr,UE->rx_offset_diff,UE->rx_offset);
if ( getenv("RFSIMULATOR") != 0) {
LOG_E(PHY,"AbsSubframe %d.%d TTI SET rx_off_diff to %d rx_offset %d \n",
proc->frame_rx,slot_nr,UE->rx_offset_diff,UE->rx_offset);
//UE->rx_offset_diff=0;
}
readBlockSize=UE->frame_parms.samples_per_slot -
UE->frame_parms.ofdm_symbol_size -
UE->frame_parms.nb_prefix_samples0 -
......@@ -1055,6 +1072,14 @@ void *UE_thread(void *arg) {
#ifdef SAIF_ENABLED
g_ue_rx_thread_busy++;
#endif
if ( getenv("RFSIMULATOR") != NULL ) {
do {
AssertFatal (pthread_mutex_unlock(&proc->mutex_rxtx) == 0, "");
usleep(100);
AssertFatal (pthread_mutex_lock(&proc->mutex_rxtx) == 0, "");
} while ( proc->instance_cnt_rxtx >= 0);
} else
LOG_E( PHY, "[SCHED][UE %d] !! UE RX thread busy (IC %d)!!\n", UE->Mod_id, proc->instance_cnt_rxtx);
if (proc->instance_cnt_rxtx > 4)
{
......
......@@ -986,23 +986,16 @@ int main( int argc, char **argv ) {
for (uint8_t i=0; i<RX_NB_TH_MAX; i++) {
//UE[CC_id]->pdcch_vars[i][0]->agregationLevel = agregation_Level;
//UE[CC_id]->pdcch_vars[i][0]->dciFormat = dci_Format;
}
/*compute_prach_seq(&UE[CC_id]->frame_parms.prach_config_common,
UE[CC_id]->frame_parms.frame_type,
UE[CC_id]->X_u);*/
if (UE[CC_id]->mac_enabled == 1)
{
UE[CC_id]->pdcch_vars[0][0]->crnti = 0x1234;
UE[CC_id]->pdcch_vars[1][0]->crnti = 0x1234;
}
UE[CC_id]->pdcch_vars[i][0]->crnti = 0x1234;
else
{
UE[CC_id]->pdcch_vars[0][0]->crnti = 0x1235;
UE[CC_id]->pdcch_vars[1][0]->crnti = 0x1235;
}
UE[CC_id]->pdcch_vars[i][0]->crnti = 0x1235;
}
UE[CC_id]->rx_total_gain_dB = (int)rx_gain[CC_id][0] + rx_gain_off;
UE[CC_id]->tx_power_max_dBm = tx_max_power[CC_id];
......
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