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OpenXG-RAN
Commits
f80ab879
Commit
f80ab879
authored
Sep 22, 2020
by
Robert Schmidt
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Use vrb_map in in DL for NSA mode
parent
d7d21efc
Changes
5
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5 changed files
with
26 additions
and
7 deletions
+26
-7
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+2
-2
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+5
-1
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
+5
-0
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+12
-2
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+2
-2
No files found.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
View file @
f80ab879
...
...
@@ -444,8 +444,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
//mbsfn_status[CC_id] = 0;
// clear vrb_maps
memset
(
cc
[
CC_id
].
vrb_map
,
0
,
100
);
memset
(
cc
[
CC_id
].
vrb_map_UL
,
0
,
100
);
memset
(
cc
[
CC_id
].
vrb_map
,
0
,
275
);
memset
(
cc
[
CC_id
].
vrb_map_UL
,
0
,
275
);
clear_nr_nfapi_information
(
RC
.
nrmac
[
module_idP
],
CC_id
,
frame
,
slot
);
}
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
View file @
f80ab879
...
...
@@ -550,7 +550,6 @@ void nr_generate_Msg2(module_id_t module_idP,
uint16_t
RA_rnti
=
ra
->
RA_rnti
;
long
locationAndBandwidth
;
// uint8_t *vrb_map = cc[CC_id].vrb_map, CC_id;
// check if UE is doing RA on CORESET0 , InitialBWP or configured BWP from SCD
// get the BW of the PDCCH for PDCCH size and RAR PDSCH size
...
...
@@ -740,6 +739,11 @@ void nr_generate_Msg2(module_id_t module_idP,
nr_mac
->
TX_req
[
CC_id
].
Number_of_PDUs
++
;
nr_mac
->
TX_req
[
CC_id
].
Slot
=
slotP
;
memcpy
((
void
*
)
&
tx_req
->
TLVs
[
0
].
value
.
direct
[
0
],
(
void
*
)
&
cc
[
CC_id
].
RAR_pdu
.
payload
[
0
],
tx_req
->
TLVs
[
0
].
length
);
/* mark the corresponding RBs as used */
uint8_t
*
vrb_map
=
cc
[
CC_id
].
vrb_map
;
for
(
int
rb
=
0
;
rb
<
pdsch_pdu_rel15
->
rbSize
;
rb
++
)
vrb_map
[
rb
+
pdsch_pdu_rel15
->
rbStart
]
=
1
;
}
}
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
View file @
f80ab879
...
...
@@ -137,6 +137,11 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
dl_config_pdu
->
ssb_pdu
.
ssb_pdu_rel15
.
bchPayloadFlag
=
1
;
dl_config_pdu
->
ssb_pdu
.
ssb_pdu_rel15
.
bchPayload
=
(
*
(
uint32_t
*
)
cc
->
MIB_pdu
.
payload
)
&
((
1
<<
24
)
-
1
);
dl_req
->
nPDUs
++
;
uint8_t
*
vrb_map
=
cc
[
CC_id
].
vrb_map
;
const
int
rbStart
=
dl_config_pdu
->
ssb_pdu
.
ssb_pdu_rel15
.
ssbOffsetPointA
;
for
(
int
rb
=
0
;
rb
<
20
;
rb
++
)
vrb_map
[
rbStart
+
rb
]
=
1
;
}
}
}
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
View file @
f80ab879
...
...
@@ -517,9 +517,19 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id,
sched_ctrl
->
time_domain_allocation
=
2
;
// Freq-demain allocation
uint8_t
*
vrb_map
=
RC
.
nrmac
[
module_id
]
->
common_channels
[
CC_id
].
vrb_map
;
const
uint16_t
bwpSize
=
NRRIV2BW
(
sched_ctrl
->
active_bwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
);
sched_ctrl
->
rbSize
=
bwpSize
;
sched_ctrl
->
rbStart
=
0
;
int
rbStart
=
NRRIV2PRBOFFSET
(
sched_ctrl
->
active_bwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
);
while
(
rbStart
<
bwpSize
&&
vrb_map
[
rbStart
])
rbStart
++
;
int
rbSize
=
1
;
while
(
rbStart
+
rbSize
<
bwpSize
&&
!
vrb_map
[
rbStart
+
rbSize
])
rbSize
++
;
DevAssert
(
rbSize
>=
3
);
/* just ensure we have at least 3 RBs */
sched_ctrl
->
rbSize
=
rbSize
;
sched_ctrl
->
rbStart
=
rbStart
;
/* mark the corresponding RBs as used */
for
(
int
rb
=
0
;
rb
<
sched_ctrl
->
rbSize
;
rb
++
)
vrb_map
[
rb
+
sched_ctrl
->
rbStart
]
=
1
;
// modulation scheme
sched_ctrl
->
mcsTableIdx
=
0
;
...
...
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
View file @
f80ab879
...
...
@@ -172,9 +172,9 @@ typedef struct {
/// Template for RA computations
NR_RA_t
ra
[
NR_NB_RA_PROC_MAX
];
/// VRB map for common channels
uint8_t
vrb_map
[
100
];
uint8_t
vrb_map
[
275
];
/// VRB map for common channels and retransmissions by PHICH
uint8_t
vrb_map_UL
[
100
];
uint8_t
vrb_map_UL
[
275
];
/// number of subframe allocation pattern available for MBSFN sync area
uint8_t
num_sf_allocation_pattern
;
}
NR_COMMON_channels_t
;
...
...
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